Image Modeling Support Contour Extraction

Abstract

A wafer measurement tool, such as a scanning electron microscope, can generate an image of a structure on a wafer. A simulated image of the structure is also determined from the design of the wafer. The contours of the structures in the image and the contours of the structures in the simulated image are determined. These contours are compared.

Description

Technical Field

[0001] This disclosure relates to semiconductor metrology.

Background Art

[0002] The evolution of the semiconductor manufacturing industry has imposed greater requirements on yield management, particularly on measurement and inspection systems. Although critical dimensions continue to shrink, the industry needs to reduce the time to achieve high yields and high-value production. By minimizing the total time from detecting a yield problem to fixing it, the return on investment of semiconductor manufacturers is maximized.

[0003] The manufacture of semiconductor devices, such as logic devices and memory devices, typically involves processing semiconductor wafers using a number of manufacturing processes to form various features and multiple levels of the semiconductor device. For example, lithography is a semiconductor manufacturing process that involves transferring a pattern from a reticle to a photoresist disposed on a semiconductor wafer. Further examples of semiconductor manufacturing processes include, but are not limited to, chemical mechanical polishing (CMP), etching, deposition, and ion implantation. The arrangement of multiple semiconductor devices manufactured on a single semiconductor wafer can be separated into individual semiconductor devices.

[0004] Measurement processes are used at various steps during semiconductor manufacturing to monitor and control the process. The metrology process is different from the inspection process where defects are detected on the wafer, in that the metrology process is used to measure one or more characteristics of the wafer that cannot be determined using existing inspection tools. The measurement process can be used to measure one or more characteristics of the wafer so that the performance of the process can be determined from the one or more characteristics. For example, the measurement process can measure the dimensions of features (e.g., line width, thickness, etc.) formed on the wafer during the process. Further, if one or more characteristics of the wafer are unacceptable (e.g., outside a predetermined range of the characteristics), the measured values of the one or more characteristics of the wafer can be used to change one or more parameters of the process so that additional wafers manufactured by the process have acceptable characteristics.

[0005] Measurement tools are designed to perform many different types of measurements for semiconductor manufacturing, such as measuring the characteristics of one or more targets. These characteristics can include, for example, critical dimension (CD), overlay, sidewall angle, film thickness, line edge roughness (LER), line width roughness (LWR), pattern placement error, or process-related parameters (e.g., focus and / or dose). The target can include a specific region of interest that is essentially periodic, such as a grid within a memory die. The metrology target can have various spatial characteristics and typically consists of one or more cells that can include one or more layers of features printed with one or more lithographically distinct exposures. The target or cell can have various symmetries, such as two-fold or four-fold rotational symmetry and / or reflection symmetry. Different cells or combinations of cells can belong to separate layers or exposure steps. An individual cell can include isolated aperiodic features or can be constructed from one-, two-, or three-dimensional periodic structures, or a combination of aperiodic and periodic structures. The periodic structures can be non-segmented or can be constructed from finely segmented features that are at or near the minimum design rule of the lithography process used to print them. The metrology target can also be collocated or proximate to a dummy structure in the same layer or a layer above, below, or between layers of the metrology structure. The target can include multiple layers (or films) whose thickness can be measured by the measurement tool. The target can include a target design (e.g., using alignment and / or overlay alignment operations) that is placed (or already exists) on a semiconductor wafer for use. A particular target can be placed at various locations on the semiconductor wafer. For example, the target can be placed within a scribe line (e.g., between dies) and / or on the die itself. In certain embodiments, multiple targets are measured by the same or multiple measurement tools, either simultaneously or at different times. Data from such measurements can be combined.Data from metrology tools is used in semiconductor manufacturing processes for feed-forward correction, feedback correction, and / or feed-sideway correction to a process (e.g., lithography, etching), and thus can provide a complete process control solution.

[0006] Extracting the contour or shape of a structure on a wafer can be part of a semiconductor manufacturing process. Previous techniques typically used a high-resolution image (e.g., the top layer image of a CD scanning electron microscope (SEM) with a small beam size) and applied a contour detection algorithm (e.g., gray-scale thresholding) to extract the shape of the pattern. The accuracy of this previous technique is limited by imaging characteristics such as beam size, pixel size, or noise. In particular, the edge blur caused by the limited resolution of the image (e.g., due to beam size / shape) can directly affect the reported position of the contour. CD SEMs in today's semiconductor industry use low landing energy to achieve high resolution. Therefore, these CD SEMs can only measure the surface layer. Higher resolution can be achieved with a lower beam current, but this reduces throughput.

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0008] Improved systems and techniques are needed.

Means for Solving the Problems

[0009] In a first embodiment, a system is provided. The system includes a particle beam source that generates a particle beam, a stage configured to hold a wafer in a path of the particle beam, a detector that receives particles from the wafer, and a processor that communicates electronically with the detector. The processor receives an image of a structure on the wafer, determines a contour of the structure in the image of the wafer, determines a simulated image of the structure from a design of the wafer, determines a contour of the structure in the simulated image, and compares the contour of the structure in the image with the contour of the structure in the simulated image. The simulated image constitutes a noise source and imaging characteristics of the system.

[0010] The system can be a scanning electron microscope. For example, the particles are electrons and the particle beam is an electron beam.

[0011] The processor can be further configured to determine a polygon difference between the contour of the structure in the image and the contour of the structure in the simulated image. The processor can also be further configured to determine a modified design of the structure based on the polygon difference.

[0012] The processor can also be further configured to determine a second simulated image of the structure from the modified design, determine a contour of the structure in the second simulated image, and compare the contour of the structure in the image with the contour of the structure in the second simulated image. The second simulated image constitutes a noise source and imaging characteristics of a wafer measurement tool.

[0013] The processor can be further configured to report the polygon difference when the polygon difference is below a threshold.

[0014] In a second embodiment, a method is provided. The method includes the step of directing a particle beam at a wafer using a wafer measurement tool. An image of the wafer is generated based on particles reflected from the wafer using a processor. The contour of a structure in the image of the wafer is determined using a processor. A simulated image of the structure from the design of the wafer is determined using a processor. The simulated image constitutes the noise sources and imaging characteristics of the wafer measurement tool. The contour of the structure in the simulated image is determined using a processor. The contour of the structure in the image and the contour of the structure in the simulated image are compared using a processor.

[0015] The wafer measurement tool can be a scanning electron microscope. For example, the particle beam is an electron beam and the particles are electrons.

[0016] The method can further include the step of determining, using a processor, the polygon difference between the contour of the structure in the image and the contour of the structure in the simulated image.

[0017] The method can further include the step of determining, using a processor, a modified design of the structure based on the polygon difference.

[0018] The method further includes the steps of determining, using a processor, a second simulated image of the structure from the modified design, determining, using a processor, the contour of the structure in the second simulated image, and comparing, using a processor, the contour of the structure in the image and the contour of the structure in the second simulated image. The second simulated image constitutes the noise sources and imaging characteristics of the wafer measurement tool.

[0019] The method can further include the step of reporting the polygon difference when the polygon difference is below a threshold.

[0020] A computer-readable medium storing a program may be configured to instruct a processor to execute the method of the second embodiment.

Brief Description of the Drawings

[0021] For a more complete understanding of the nature and objects of the present disclosure, reference should be made to the following detailed description in conjunction with the accompanying drawings.

Figure 1

Figure 2

Figure 3

Modes for Carrying Out the Invention

[0022] The claimed subject matter is described with respect to certain embodiments, but other embodiments including those that do not provide all of the benefits and features described herein are also within the scope of the present disclosure. Various structural, logical, process step, and electronic changes may be made without departing from the scope of the present disclosure. Accordingly, the scope of the present disclosure is defined only by reference to the appended claims.

[0023] The embodiments disclosed in this specification extract the contours or other shapes of patterns on a substrate (e.g., a wafer or a photomask) using an image. The image can be, for example, from a SEM. The image can be acquired at a lower resolution compared to conventional methods. An image modeling algorithm (e.g., Die-To-Database (D:DB) manufactured by KLA Corporation) is used to achieve accuracy and take into account imaging characteristics. Larger beam sizes or through-stack imaging of buried layers can be performed at a lower resolution. The shape / contour can be used to extract various characteristics such as edge placement error (with respect to the design intent) or the distance between two adjacent edges. The contour extraction is combined with an image modeling algorithm that enables modeling of the image characteristics. Thereby, the accuracy can be improved. The design clip can be configured to match the contour extracted from the simulated image to the contour extracted from the measured image.

[0024] FIG. 1 is a diagram showing an exemplary embodiment. FIG. 2 is a flowchart of method 200. Some or all of the steps of method 200 can use a processor.

[0025] In method 200, at 201, an electron beam is directed at a wafer using a wafer measurement tool. The wafer measurement tool can be a SEM or another system. At 202, an image of the wafer based on the electrons reflected from the wafer is generated. Thereby, as shown in FIG. 1, image 101 is generated. Image 101 includes process variations and / or noise.

[0026] In 203, the contour of the structure in the image of the wafer can be determined. Thereby, the contour 103 in FIG. 1 is generated. In one example, the contour 103 is extracted from the image 101 using a threshold algorithm. For example, Canny-Edge-Detection can be used with a fixed threshold to generate the contour 103. The contour 103 can be used as a reference contour. The contour 103 may be affected by the resolution and imaging characteristics (e.g., blur) of the basic tool that generated the image 101. The image 101 may be a top view of the structure on the wafer, and thus the contour may likewise be a top view of the structure. Other imaging angles of the image 101 are also possible.

[0027] In 204, a simulated image of the structure from the wafer design can be determined. The simulated image constitutes (describes) the noise sources and imaging characteristics of the wafer measurement tool. In FIG. 1, the design 100 is shown. This design 100 is used to determine a simulated image 102 that includes resolution-induced accuracy errors. An example of generating a simulated image is disclosed in Villarubia et al., "3D Monte Carlo Modeling of the SEM: Are There Applications to Photomask Metrology" (2014), which is incorporated by reference.

[0028] The simulated image 102 can be determined from the noise sources and imaging characteristics of the wafer measurement tool and the wafer design. The tool model can be applied to consider tool characteristics such as imaging characteristics, beam characteristics (e.g., beam jitter), and / or tool noise (e.g., shot noise or stage jitter). The simulated image 102 is the expected result of the design intent after considering the tool characteristics. Thus, the simulated image 102 can be an ideal measurement value when considering, for example, stage jitter on the tool.

[0029] In one example, the edges within a design file (e.g., Design 100) are infinitely sharp and binary. This can indicate the inside of the structure versus the outside of the structure. A model for determining a simulated tool signal can include the amplitude and offset of the signals inside and outside the structure. A model for determining a simulated image 102 can also include beam characteristics of the edge shape. These beam characteristics can be similar to the point spread function in optics.

[0030] Design 100 can be, for example, a design clip in the OASIS format or another format. The simulated image 102 can use information such as imaging settings (e.g., pixel size, beam characteristics) and / or tool characteristics (e.g., pre-calibrated tool, imaging model). The model can configure (describe) imaging characteristics such as the resolution or layer interaction when forming the simulated image 102. In one example, a neural network can be used to generate the simulated image 102.

[0031] In one example, a rendering engine is used to determine a simulated image 102 from Design 100. Modeling using a rendering engine can use physical modeling, Monte Carlo simulation-based modeling, machine learning-based modeling (e.g., generative adversarial network or graph neural network), or other techniques. The simulated image 102 of the design intent can be how the image of Design 100 would look with process variations, tool noise, etc.

[0032] At 205, the contour of the structure within the simulated image can be determined. Thereby, the contour 104 in FIG. 1 is generated from the simulated image 102. For example, the same model can be used to generate the contour 103 and the contour 104.

[0033] In 206, the contour of the structure in the image is compared with the contour of the structure in the simulated image. In FIG. 1, this generates a contour difference 105 (i.e., “Δ contour”). For example, the contour difference 105 can be determined on a block-by-block basis where each segment is divided into the same blocks (e.g., with a fixed block size). In another example, the contour difference 105 can be determined in a vertex-by-vertex manner where the vertices along the contour (mathematically described as a polygon) match each other.

[0034] The comparison can also include a quality factor related to a cost function. The quality factor can be, for example, the root mean square value or the mean absolute difference. The purpose of the closed-loop optimization can be to minimize the cost function that generates this quality factor.

[0035] The polygon difference between the contour 103 of the structure in the image 101 and the contour 104 of the structure in the simulation image 102 can be obtained. In one example, the modified design 106 of the structure is determined using the polygon difference. For example, the Δ contour can be applied to the design 100 to generate the modified design 106. The application of the Δ contour can depend on whether the contour difference 105 is determined on a block-by-block basis or a vertex-by-vertex basis. In the block-by-block approach, the application can include a block-by-block movement of the edge segments of the design 100 in the direction given by the Δ contour (e.g., the X direction). In the vertex-by-vertex style, the application can include moving the vertices of the design 100 in the direction given by the Δ contour (e.g., given as a 2D vector).

[0036] As shown in FIG. 1, using closed-loop optimization, the contour difference between the image 101 and the simulated image 102 can be minimized. The second simulated image of the structure can be determined from the modified design 106. The second simulated image can take into account the noise sources and imaging characteristics of the wafer measurement tool. The contour of the structure in the second simulated image can be determined. Then, the contour 103 of the structure in the image 101 can be compared with the contour of the structure in the second simulated image. This process can be repeated until the contour difference falls below a threshold. For example, the threshold can be a quality criterion, and the quality criterion can be a convergence or a maximum number of iterations. As a specific example, it is repeated until the contour differences match except for noise. Therefore, the modified design 106 can conform to the structure that actually appears on the wafer. The modified design 106 can be used to avoid errors caused by imaging characteristics.

[0037] In one example, the polygon difference can be reported when the polygon difference falls below a threshold. For example, this can result in an optimal contour and / or design such as the contour / design 107 in FIG. 1. This can be reported as an edge placement error, line edge roughness, or other feature for the design.

[0038] The contour / design 107 can be a modified design clip that includes the extracted contour. The contour / design 107 can be used as a design clip to avoid errors caused by the imaging characteristics of the tool. Optionally, the contour / design 107 can include a report of any remaining unaccounted differences in the Δ contour that may still exist after the optimization meets the stop criteria.

[0039] The embodiments of FIGS. 1-2 constitute (describe) imaging characteristics. The extracted contours can be independent of the imaging characteristics and can thus be more accurate under various imaging conditions. Low-resolution imaging conditions (e.g., faster measurements or stack-through measurements) can accurately report the contours using the contour / design 107.

[0040] In one example, contour extraction can be enabled on a high beam current, high voltage SEM that uses high landing energy to measure the embedded layer and multiple layers at once and / or uses a high beam current (e.g., surface layer and / or embedded layer) for fast measurements. This can be at least 10 times faster than standard operation on a CD SEM. Stack-through contour extraction is possible. Direct multi-layer edge placement error measurement is also possible.

[0041] In another embodiment, image comparison techniques are used to detect Δ contours using a quality factor instead of contour extraction. In this embodiment, the difference is the measured image (e.g., image 101) minus the simulated image (e.g., simulated image 102). The difference compensates for the overlay. Looking at the grayscale image of the difference can indicate whether it is necessary to shift the position around the design clip. Edge placement characteristics (e.g., overlay, CD, LER) can cause or form the differences. Thus, these edge placement characteristics can be extracted.

[0042] FIG. 3 is a block diagram of an embodiment of system 300. System 300 includes a wafer metrology tool (including electron column 301) configured to generate signals of wafer 304. The signals can be images, but other data is also possible.

[0043] The wafer measurement tool includes an output acquisition subsystem that includes at least an energy source and a detector. The output acquisition subsystem may be an electron beam-based output acquisition subsystem. For example, in one embodiment, the energy directed at the wafer 304 includes electrons, and the energy detected from the wafer 304 includes electrons. In this way, the energy source can be an electron beam source. In one such embodiment shown in FIG. 3, the output acquisition subsystem includes an electron column 301 coupled to a computer subsystem 302. The stage 310 can hold the wafer 304 or another type of sample.

[0044] As also shown in FIG. 3, the electron column 301 includes an electron beam source 303 configured to generate electrons that are focused onto the wafer 304 by one or more elements 305. The electron beam source 303 may include, for example, a cathode source or an emitter tip. The one or more elements 305 can include, for example, a gun lens, an anode, a beam limiting aperture, a gate valve, a beam current selection aperture, an objective lens, and a scanning subsystem, all of which can include any such suitable elements known in the art.

[0045] Electrons (e.g., secondary electrons) returning from the wafer 304 can be focused onto the detector 307 by one or more elements 306. The one or more elements 306 can include a scanning subsystem that can be, for example, the same scanning subsystem included in the element 305.

[0046] The electron column 301 may also include any other suitable elements known in the art.

[0047] The electron column 301 is shown in FIG. 3 as being configured such that electrons are directed at the wafer 304 at an oblique angle of incidence and scattered from the wafer 304 at another oblique angle, but the electron beam may be directed at the wafer 304 and scattered therefrom at any suitable angle. Further, the electron beam-based output acquisition subsystem can be configured to use multiple modes to generate signals of the wafer 304 (e.g., having different illumination angles, collection angles, etc.). The multiple modes of the electron beam-based output acquisition subsystem can differ in any signal generation parameter of the output acquisition subsystem.

[0048] The computer subsystem 302 may be coupled to the detector 307 as described above. The detector 307 can detect electrons returning from the surface of the wafer 304 and thereby form a signal related to the wafer 304. The signal may include any suitable electron beam image or other data. The computer subsystem 302 may be configured to perform any of the functions described herein using the output and / or signal of the detector 307. The computer subsystem 302 may be configured to perform any additional steps described herein. The system 300 including the output acquisition subsystem shown in FIG. 3 can be further configured as described herein.

[0048] Note that FIG. 3 is provided herein to schematically illustrate the configuration of an electron beam-based output acquisition subsystem that may be used in the embodiments described herein. The electron beam-based output acquisition subsystem configuration described herein may be modified to optimize the performance of the output acquisition subsystem as is typically done when designing a commercial output acquisition system. Additionally, the systems described herein may be implemented using existing systems (e.g., by adding the functionality described herein to an existing system). For some such systems, the methods described herein may be provided as an optional functionality of the system (e.g., in addition to other functions of the system). Alternatively, the systems described herein may be designed as completely new systems.

[0049] Although the output acquisition subsystem is described above as an electron beam-based output acquisition subsystem, it is not limited thereto, and the output acquisition subsystem may be an ion beam-based or neutral beam-based output acquisition subsystem. Such an output acquisition subsystem may be configured as shown in FIG. 3, except that the electron beam source may be replaced with any suitable beam source known in the art. Additionally, the output acquisition subsystem may be any other suitable beam-based output acquisition subsystem, such as those included in commercially available focused ion beam (FIB) systems, helium ion microscope (HIM) systems, and secondary ion mass spectrometry (SIMS) systems. Other output acquisition subsystems or different systems using scanning near-field optical microscopy (SNOM), near-field scanning optical microscopy (NSOM), scanning probes, atomic force microscopy (AFM), or other optical scanning using photons (e.g., TDI, photodiodes) can be used. Other optical imaging techniques (e.g., cameras, lens-lens imaging) can also be used. Thus, the particle beam can be an electron beam, an ion beam, or an optical beam.

[0050] The computer subsystem 302 includes a processor 308 and an electronic data storage unit 309. The processor 308 may include a microprocessor, a microcontroller, or other devices.

[0051] The computer subsystem 302 may be coupled to the components of the system 300 in any suitable manner (e.g., via one or more transmission media that can include wired and / or wireless transmission media) such that the processor 308 can receive outputs. The processor 308 may be configured to perform several functions using the outputs. The wafer measurement tool can receive instructions or other information from the processor 308. The processor 308 and / or the electronic data storage unit 309 may optionally communicate electronically with another wafer measurement tool, wafer inspection tool, or wafer review tool (not shown) to receive additional information or transmit instructions.

[0052] The processor 308 communicates electronically with a wafer measurement tool such as the detector 307. The processor 308 may be configured to process a signal generated using measurements from the detector 307. For example, the processor 308 may execute an embodiment of the method 200.

[0053] In one example, the processor 308 is configured to receive an image of a structure on a wafer; determining the contour of the structure in the image of the wafer, determining a simulated image of the structure from the design of the wafer, determining the contour of the structure in the simulated image, and comparing the contour of the structure in the image with the contour of the structure in the simulated image. The simulated image constitutes (describes) the noise sources and imaging characteristics of the wafer measurement tool. The processor 308 can also be configured to determine the polygon difference between the contour of the structure in the image and the contour of the structure in the simulated image.

[0054] Processor 308 can be configured to use the processor to determine a modified design of the structure based on the difference of polygons. Processor 308 can also be configured to determine a second simulated image of the structure from the modified design. Determine the contour of the structure in the second simulated image, and compare the contour of the structure in the image with the contour of the structure in the second simulated image. The second simulated image constitutes (describes) the noise source and imaging characteristics of the wafer measurement tool.

[0055] Processor 308 can further be configured to report the difference of the polygons when the difference of the polygons is below a threshold.

[0056] Computer subsystem 302, other systems, or other subsystems described herein may be part of various systems, including a personal computer system, an image computer, a mainframe computer system, a workstation, a network appliance, an Internet appliance, or other devices. The subsystem or system may also include any suitable processor 308 known in the art, such as a parallel processor. In addition, the subsystem or system may include a platform with high-speed processing and software, either as a stand-alone tool or a network tool.

[0057] Processor 308 and electronic data storage unit 309 can be placed within system 300 or another device, or otherwise be part thereof. In one example, processor 308 and electronic data storage unit 309 may be part of a stand-alone control unit or a centralized quality control unit. A plurality of processors 308 or electronic data storage units 309 may be used.

[0058] Processor 308 can actually be implemented by any combination of hardware, software, and firmware. Also, its functions as described herein may be executed by one unit or divided among different components, each of which may in turn be implemented by any combination of hardware, software, and firmware. The program code or instructions for Processor 308 to implement various methods and functions may be stored in a readable storage medium such as the memory in electronic data storage unit 309 or other memory.

[0059] If system 300 includes multiple computer subsystems 302, different subsystems can be coupled to each other so that images, data, information, instructions, etc. can be transmitted between the subsystems. For example, one subsystem can be coupled to an additional subsystem by any suitable transmission medium that may include any suitable wired and / or wireless transmission medium known in the art. Two or more of such subsystems may also be effectively coupled by a shared computer-readable storage medium (not shown).

[0060] Processor 308 may be configured to perform some functions using the output of system 300 or other output. For example, Processor 308 may be configured to transmit the output to electronic data storage unit 309 or another storage medium. Processor 308 may further be configured as described herein.

[0061] Processor 308 or computer subsystem 302 may also be part of a defect review system, inspection system, measurement system, or some other type of system. Thus, the embodiments disclosed herein describe several configurations that can be adjusted in several ways for systems with different capabilities that are more or less suitable for different applications.

[0062] The processor 308 can be configured according to any of the embodiments described herein. The processor 308 may also be configured to perform other functions or additional steps using the output of the system 300 or using data from other sources.

[0063] The processor 308 can be communicatively coupled to any of the various components or subsystems of the system 300 in any manner known in the art. Further, the processor 308 can be configured to receive and / or obtain data or information from other systems (e.g., inspection results from an inspection system such as a review tool, remote databases including design data, etc.) via a transmission medium that may include wired and / or wireless portions. In this way, the transmission medium can serve as a data link between the processor 308 and other subsystems of the system 300 or systems external to the system 300.

[0064] In one example, the various steps described throughout this disclosure can be performed by a single processor 308 (or computer subsystem 302), or alternatively, by a plurality of processors 308 (or a plurality of computer subsystems 302). Further, different subsystems of the system 300 may include one or more computing or logic systems. Accordingly, the above description should not be construed as a limitation on the present disclosure, but rather as merely illustrative.

[0065] Further embodiments relate to a non-transitory computer-readable medium storing program instructions executable on a processor for performing a computer-implemented method for determining a contour / design or other contour extraction as disclosed herein. In particular, as shown in FIG. 3, the electronic data storage unit 309 or other storage medium may include a non-transitory computer-readable medium containing program instructions executable on the processor 308. The computer-implemented method may include any of the steps of any of the methods described herein.

[0066] Program instructions implementing a method such as those described herein may be stored on a computer-readable medium such as the electronic data storage unit 309 or other storage medium. The computer-readable medium can be a storage medium such as a magnetic or optical disk, magnetic tape, or any other suitable non-transitory computer-readable medium known in the art.

[0067] The program instructions can be implemented in any of a variety of ways, including, among other things, procedure-based techniques, component-based techniques, and / or object-oriented techniques. For example, the program instructions may be implemented using ActiveX controls, C++ objects, JavaBeans, Microsoft Foundation Classes (MFC), Streaming SIMD Extension (SSE), CUDA, or other technologies or methodologies, as desired.

[0068] Each of the steps of the method can be performed as described herein. The method may also include any other steps that can be performed by the processor and / or computer subsystem or system described herein. The steps can be performed by one or more computer systems configured according to any of the embodiments described herein. Additionally, the methods described above can be implemented by any of the system embodiments described herein.

[0069] Although the present disclosure has been described with respect to one or more particular embodiments, it will be understood that other embodiments of the present disclosure may be made without departing from the scope of the present disclosure. Accordingly, the present disclosure is considered to be limited only by the appended claims and their proper interpretation.

Claims

1. It is a system, A particle beam source that generates a particle beam, A stage configured to hold a wafer within the path of the particle beam, A detector that receives particles from the wafer, A processor that communicates electronically with the aforementioned detector, The processor includes, An image of the structure on the wafer is received, The contour of the structure in the image of the wafer is determined, A simulated image of the structure is determined from the wafer design, and the simulated image includes at least one error that constitutes the noise source and the imaging characteristics of the system. Determine the contour of the structure in the simulated image, The contour of the structure in the aforementioned image is compared with the contour of the structure in the simulated image. Determine the difference in polygons between the contour of the structure in the aforementioned image and the contour of the structure in the simulated image. Based on the difference in the aforementioned polygons, a modified design of the structure is determined. A second simulated image of the structure is determined from the modified design, and the second simulated image constitutes the noise source and imaging characteristics of the system. Determine the contour of the structure in the second simulated image described above. The contour of the structure in the aforementioned image is compared with the contour of the structure in the second simulated image. A system configured in such a way.

2. The system according to claim 1, characterized in that the system is a scanning electron microscope.

3. The system according to claim 1, characterized in that the particle is an electron and the particle beam is an electron beam.

4. The aforementioned processor, The system according to claim 1, further configured to report the difference in polygons when the difference in polygons falls below a threshold.

5. The system according to claim 1, characterized in that comparing the contours includes dividing each segment into a block of a fixed size and comparing the blocks of structure in the image and in the simulated image.

6. The system according to claim 1, characterized in that comparing the contours includes matching one or more vertices along the contours in the image with the contours in the simulated image.

7. It is a method, The steps include: directing a particle beam onto a wafer using a wafer measurement tool, A step of generating an image of the wafer based on particles reflected from the wafer using a processor, The steps include determining the contour of a structure in the image of the wafer using the aforementioned processor, The step is to use the processor to determine a simulated image of the structure from the wafer design, wherein the simulated image includes at least one error that constitutes a noise source and imaging characteristic of the wafer measurement tool. The steps include determining the contour of the structure in the simulated image using the aforementioned processor, The steps include comparing the contour of the structure in the image with the contour of the structure in the simulated image using the aforementioned processor, The steps include using the aforementioned processor to determine the difference in polygons between the contour of the structure in the image and the contour of the structure in the simulated image, A step of determining a modified design of the structure based on the difference in polygons using the aforementioned processor, The step is to use the processor to determine a second simulated image of the structure from the modified design, wherein the second simulated image constitutes the noise source and imaging characteristics of the wafer measurement tool. The steps include determining the contour of the structure in the second simulated image using the aforementioned processor, The steps include using the processor to compare the contour of the structure in the image with the contour of the structure in the second simulated image, A method that includes this.

8. The method according to claim 7, characterized in that the wafer measurement tool is a scanning electron microscope.

9. The method according to 7, characterized in that the particle beam is an electron beam and the particles are electrons.

10. If the difference between the polygons falls below a threshold, the step of reporting the difference between the polygons. The method according to claim 7, further comprising:

11. A non-transient, computer-readable medium for storing a program configured to instruct the processor to perform the method described in claim 7.

12. The method according to claim 7, wherein the step of comparing contours comprises dividing each segment into a block of a fixed size and comparing the blocks of structure in the image and in the simulated image.

13. The method according to claim 7, wherein the step of comparing the contours includes matching one or more vertices along the contour in the image with the contour in the simulated image.

14. The method according to claim 7, wherein the particle beam has a high beam current configured to measure the embedded layer of the wafer.

Images