Process for epitaxially grown PZT films and fabrication method for PZT devices

Abstract

The piezoelectric film stack is fabricated by forming a bottom electrode stack on a structured substrate. A pyrochlore lead zirconium titanate (PZT) buffer substrate layer is then formed on the bottom electrode stack. Rapid thermal annealing of the PZT buffer substrate layer is then performed. An epitaxial perovskite (100) PZT film is grown on the PZT buffer substrate layer. A top electrode stack is formed on the perovskite (100) PZT film.

Description

[Technical Field]

[0001] Aspects of the present disclosure relate to methods for forming piezoelectric materials and incorporating them into microelectromechanical systems (MEMS). [Background technology]

[0002] Piezoelectric materials find many applications in industrial and consumer products, and lead zirconium titanate (PZT) is an important material that possesses significant piezoelectric properties due to its crystalline structure. Summary of the Invention

[0003] Rapid thermal annealing of the pyrochlore (220) PZT buffer layer can convert the entire PZT buffer layer into a single-crystalline perovskite PZT (100) seed layer, which is suitable for subsequent epitaxial growth of perovskite (100) for use as piezoelectric films in MEMS.

[0004] The described embodiments and their advantages can best be understood by referring to the following description taken in conjunction with the accompanying drawings, which are not intended to limit any changes in form and detail that may be made to the described embodiments without departing from the spirit and scope of the described embodiments. [Brief explanation of the drawings]

[0005] [Figure 1] FIG. 1 illustrates an exemplary process flow for fabricating epitaxial PZT films, according to an embodiment of the present disclosure.

[0006] [Figure 2] FIG. 2 is an illustration of an X-ray diffraction pattern of an exemplary piezoelectric PZT layer, according to an embodiment of the present disclosure.

[0007] [Figure 3]1 is a cross-sectional view of an example of a MEMS piezoelectric PZT inkjet printhead according to some embodiments of the present disclosure.

[0008] [Figure 4] 1 is a cross-sectional view of an example of a MEMS piezoelectric ultrasonic transducer according to some embodiments of the present disclosure.

[0009] [Figure 5] 1 illustrates a cross-sectional view of an example of a MEMS piezoelectric PZT acoustic transducer, according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0010] This disclosure describes a process for forming epitaxially grown piezoelectric film stacks, including bottom and top electrodes, on structured base wafers for use in piezoelectric-based MEMS devices. The process results in a perovskite (100) PZT buffer layer that supports the homoepitaxial growth of the perovskite (100) PZT film. This disclosure also describes the construction of radio frequency (RF) magnetron reactively sputtered homoepitaxially grown piezoelectric PZT thin films for use in fluid dispensing devices, such as MEMS piezoelectric PZT inkjet printheads, and MEMS piezoelectric PZT ultrasonic and acoustic transducers.

[0011] Applying a voltage to a piezoelectric material can cause a reverse piezoelectric effect, where the piezoelectric material mechanically deforms. Alternatively, a piezoelectric material can generate a voltage difference when subjected to mechanical stress. Piezoelectricity can be useful for use in electrical and mechanical devices such as inkjet printheads and transducers, e.g., actuators and sensors. In some cases, multiple transducers can be combined in MEMS, including a combination of actuators and sensors.

[0012] Piezoelectric materials for either fluid dispensing devices or actuators can be obtained using a variety of methods, including sol-gel, ceramic green sheets, metalorganic chemical vapor deposition (MOCVD) formed layers, or pre-fired blocks of piezoelectric material. However, these different methods can produce piezoelectric materials of different qualities and compositions. For example, sol-gel formation techniques require multiple iterations to produce many individual thin layers to form thick piezoelectric materials. Also, sol-gel formation can leave binders in the final material. MOCVD can construct thin layers of piezoelectric material and can have extremely low deposition rates.

[0013] PZT films can have a perovskite crystal structure according to the chemical formula ABX3. Due to the film substrate characteristics and the technical limitations of the film growth hardware, PZT films can contain materials with differently oriented crystal phases, such as perovskite (100), perovskite (110), and perovskite (111), as well as non-functional pyrochlore (220). The piezoelectric effect of the resulting film may depend not only on the crystallinity of the PZT film but also on the quality of the PZT material in the interfacial transition region at the substrate-PZT film interface. It should be noted that when forming perovskite piezoelectric PZT films on a substrate, the physical properties of the substrate, including its crystal structure, can play a key role in determining the quality of the grown PZT. For example, embodiments of unimorph piezoelectric devices can have PZT films composed of the most highly crystalline phase of perovskite (100), minimizing or eliminating the non-functional pyrochlore (220) phase (and preferably single-crystalline PZT (100)) to maximize lateral electromechanical response.

[0014] Perovskite PZT films can be grown on several select metal seed layers, such as substrates of iridium or platinum. However, due to the heterogeneity of their physical properties (particularly the lattice mismatch between the seed metal and PZT), the resulting PZT films can be polycrystalline and contain a poor transition region at the seed metal-PZT interface. Certain doped metal oxide seed layers have been employed to serve as substrates for growing high-quality perovskite PZT films; for example, SrRuO3 can be used to grow highly crystalline PZT films for various applications. However, while these doped metal oxide seeds offer improved lattice matching with PZT, which can lead to pseudomorphic growth of perovskite PZT materials, the match is imperfect, with interfacial strain and defects still present in the interface region at the substrate-PZT interface. Thus, a need exists for a process for producing PZT films that are primarily perovskite (100) PZT and that support an epitaxial PZT growth process capable of producing nearly single-crystalline perovskite PZT (100), while still providing a PZT film stack free of other unwanted PZT crystalline phases. Such PZT films can maximize their piezoelectric effect. In some embodiments, "predominantly" refers to the PZT buffer layer being converted such that, in an X-ray diffraction (XRD) spectrum, the peak height of the perovskite PZT (100) is at least twice the peak height of any residual pyrochlore PZT (220).

[0015] In some embodiments, the process includes a rotary RF magnetron physical vapor deposition (PVD) apparatus equipped with a self-biasing substrate RF impedance matching network for controlling the substrate DC self-bias voltage. A suitable PVD apparatus is described in U.S. patent application Ser. No. 12 / 389,253, filed Feb. 19, 2009, entitled "Physical Vapor Deposition with Impedance Matching Network," which is incorporated herein by reference. In some cases, the reactive PVD process uses argon and oxygen (Ar / O) as the sputtering process gas.

[0016] In some embodiments, Pb l.00+x (Zr 0.52 Ti 0.48 ) 1.00-y O3Nb y Ceramic PZT targets having a composition where 0<=x<=0.30 and 0<=y<=0.20 can be used. In some embodiments, 0<=x<=0.05 and 0<=y<=0.10.

[0017] In some embodiments, the epitaxial PZT film growth process begins by sputter depositing a pyrochlore PZT film as a PZT buffer layer onto a substrate with a bottom electrode stack that includes a suitable seed metal layer. In some cases, the seed metal can be platinum or iridium with a thickness of 500 Å to 5000 Å. In some cases, the seed metal can be iridium with a thickness of 1000 to 2500 angstroms (Å). In some cases, the seed metal can be deposited by reactive sputtering deposition. In some embodiments, where the seed metal is iridium, the iridium can have a (111) crystallographic plane. In some embodiments, the bottom electrode stack can also include an adhesion layer. In some cases, the adhesion layer can be one of titanium, titanium tungsten, chromium, nickel, or molybdenum with a thickness of 100 Å to 500 Å. In some cases, the adhesion layer can be deposited by PVD.

[0018] In some cases, the PZT film includes a buffer layer of pyrochlore (220) PZT, which does not have piezoelectric properties. This PZT buffer layer can be grown by reactive sputtering deposition of the PZT film at a deposition temperature between 400°C and 500°C. In some embodiments, the deposition can have a thickness of 500 Å to 3000 Å. In preferred embodiments, the deposition is 1500 Å to 2000 Å. A rapid thermal annealing process converts this pyrochlore PZT into a perovskite PZT (100) seed layer on which homoepitaxial thick-film perovskite (100) PZT can be grown.

[0019] In some embodiments, reactive sputtering deposition of piezoelectric PZT is performed at a wafer chuck temperature of 400°C to 750°C. In some embodiments, the gas (Ar / O2) pressure can be between 1 and 15 mTorr. In some preferred embodiments, the gas pressure is 2 to 6 mTorr. In some embodiments, the O2 / (Ar+O2) gas ratio is 1.0 to 5.0%. In some preferred embodiments, the gas ratio is 2.5 to 3.5%. In some embodiments, the cathode RF power is 1000W to 5000W, preferably 4000W. In some embodiments, the substrate DC self-bias is +5V to +150V, preferably +20V to +80V.

[0020] Next, in some embodiments, a rapid thermal annealing process is performed on the substrate with the pyrochlore PZT buffer layer deposited thereon. Optionally, this rapid thermal annealing process can be performed in an oven, furnace, rapid thermal annealer, or hotplate in hot air, vacuum, or partial oxygen atmosphere. Optionally, the rapid thermal annealing step exposes the substrate to a temperature of 550°C to 700°C for 1 to 6 minutes. In some preferred embodiments, the thermal annealing step exposes the substrate to a temperature of 600°C to 650°C for 2 to 4 minutes. In some embodiments, the rapid thermal annealing process converts the pyrochlore PZT buffer layer to primarily the perovskite PZT (100) crystalline phase, thereby producing a perovskite PZT (100) crystalline seed layer for subsequent epitaxial growth of a single-phase perovskite PZT film with a (100) crystalline structure.

[0021] Next, by selecting PZT film growth conditions and using reactive sputter deposition of piezoelectric PZT, epitaxial growth of 0.5 microns to 5 microns of perovskite (100) films can be achieved, in some embodiments, at deposition temperatures between 500° C. and 650° C. Because the growth of this preferred PZT (100) film is initiated on a substrate already treated with a PZT (100) seed layer, homoepitaxial growth of the preferred PZT film can be achieved.

[0022] In some embodiments, the resulting piezoelectric PZT film may contain Pb 1.00+x (Zr 0.50+ / -0.02 Ti 0.50- / +0.02 ) 1.00-y O3Nb y , where -0.01<=x<=0.10 and 0<=y<=0.15). In some embodiments, 0<=x<=0.05 and 0<=y<=0.10. In some embodiments, the resulting PZT is perovskite PZT, particularly perovskite PZT(100) and / or perovskite PZT(111), more preferably single crystalline perovskite PZT(100) entirely comprising a PZT buffer layer.

[0023] In some embodiments, a top electrode stack can then be deposited. The top electrode stack can include a top electrode having a thickness of 1000 Å to 2 microns, including a conductive metal such as platinum, iridium, gold, copper, aluminum, indium tin oxide, or the like. In some cases, the top electrode can be deposited by PVD. In some embodiments, the top electrode stack can also include an adhesion layer. In some cases, the adhesion layer can be one of titanium, titanium tungsten, chromium, nickel, nickel chromium, or the like, having a thickness of 100 Å to 1000 Å. In some cases, the adhesion layer can be a metal oxide that is also conductive, such as indium tin oxide, zinc oxide, or the like. In some cases, the adhesion layer can be deposited by PVD.

[0024] FIG. 1 illustrates an exemplary process flow for fabricating epitaxial PZT films in embodiments of the present disclosure. As shown in FIG. 1, method 100 illustrates exemplary functions used by various embodiments. Although specific functional blocks (“blocks”) are disclosed in method 100, such blocks are examples. That is, examples may be adapted to perform various other blocks or variations of the blocks described in method 100. It is understood that the blocks of method 100 may be performed in an order different from that presented, and that some of the blocks of method 100 may not be performed.

[0025] The method 100 begins at block 110, where a bottom electrode stack is formed on a structured substrate. The bottom electrode stack can include a seed metal layer and can also include an adhesion layer. The seed metal layer can be platinum or iridium. Other metals are contemplated. The adhesion layer can also be deposited to reduce the likelihood of delamination of a subsequently deposited buffer PZT layer. The adhesion layer can be titanium, titanium tungsten, chromium, nickel, or molybdenum. Other materials are also contemplated for the adhesion layer. Both the seed metal layer and the adhesion layer can be deposited by PVD.

[0026] In block 120, a pyrochlore (220) PZT buffer substrate layer is deposited on the bottom electrode stack. The buffer substrate layer can be deposited by reactive sputtering deposition. In an embodiment, the pyrochlore (220) buffer substrate layer can be converted to a uniformly crystalline perovskite (100) PZT.

[0027] At block 130, the pyrochlore (220) PZT buffer substrate layer is subjected to a rapid thermal anneal. In one embodiment, the thermal anneal process exposes the substrate to a temperature of 600°C to 650°C for 2 to 4 minutes. In one embodiment, the rapid thermal anneal converts the pyrochlore (220) PZT buffer layer substantially to perovskite (100) PZT.

[0028] In block 140, epitaxial growth of a perovskite (100) PZT film is formed on the PZT buffer substrate layer by reactive sputter deposition. In an embodiment, a deposition temperature between 500°C and 650°C can produce an epitaxial growth of a perovskite (100) film of 0.5 to 5 microns.

[0029] In block 150, a top electrode stack is formed on the perovskite (100) PZT film. The top electrode stack can include a top electrode comprising a conductive metal such as platinum, iridium, gold, copper, aluminum, indium-tin-oxide, etc. In an embodiment, the top electrode can be deposited by PVD. In an embodiment, the top electrode stack can include an adhesion layer. The adhesion layer can be titanium, titanium-tungsten, chromium, nickel, nickel-chromium, etc. In an embodiment, the adhesion layer can be deposited by PVD.

[0030] FIG. 2 shows an illustration of an XRD pattern of an exemplary piezoelectric PZT layer in accordance with an embodiment of the present disclosure.

[0031] XRD pattern 210 shows an example of a ceramic target having an iridium bottom electrode stack with pyrochlore (220) deposited thereon. XRD pattern 210 shows the (111) crystallographic orientation of the seed metal iridium (IR). X-ray diffraction pattern 210 also shows the pyrochlore with a (220) crystallographic orientation before rapid thermal annealing.

[0032] An example of the results of rapid thermal annealing is shown in XRD pattern 220. XRD pattern 220 shows the bulk of the pyrochlore (220) converted to perovskite (100) and a small amount of perovskite (200).

[0033] XRD pattern 230 shows an example of 1.5 microns of perovskite (100) PZT epitaxially grown on a rapid thermal annealed substrate. The increasing height of the perovskite (100) peak (and the decreasing height of the iridium (111) peak) indicates an increase in film thickness. The increasing height of the perovskite (200) peak, which is a second-order diffraction peak of the (100) plane, further indicates that the film is composed primarily of perovskite (100).

[0034] Figures 3-5 show cross-sectional views of example MEMS devices including piezoelectric PZT films fabricated as described in Figure 1. The examples show a deflection membrane and a piezoelectric film stack as described above on top of a MEMS body.

[0035] FIG. 3 illustrates a cross-sectional view of an example MEMS piezoelectric PZT inkjet printhead 300 that includes a piezoelectric PZT film stack in accordance with some embodiments of the present disclosure.

[0036] The exemplary MEMS piezoelectric PZT inkjet printhead 300 shows a bottom electrode 304 and an adhesive layer 302. The combination of the bottom electrode 304 and adhesive layer 302 comprises a bottom electrode stack. In an embodiment, the bottom electrode 302 is iridium. In another example, the bottom electrode is platinum.

[0037] The example MEMS piezoelectric PZT inkjet printhead 300 further includes a buffer PZT layer 308. In the example 300, the buffer PZT layer 308 is deposited on the bottom electrode stack using PVD. The deposited material is pyrochlore (220) PZT, which is non-functional as a piezoelectric material. After rapid thermal annealing, the buffer PZT layer 308 is largely converted to perovskite (100) PZT.

[0038] After converting the buffer PZT layer 308 to perovskite (100), an epitaxial PZT film growth process is applied to the buffer PZT layer 308 to produce the epitaxially grown layer 306. The epitaxially grown layer 306 comprises perovskite (100).

[0039] The exemplary MEMS piezoelectric PZT inkjet printhead 300 further comprises a top electrode 310 and an adhesive layer 312. The combination of the top electrode 310 and the adhesive layer 312 comprises a top electrode stack. In an embodiment, the top electrode 310 is iridium. In another embodiment, the top electrode is platinum. In another example, the top electrode is indium tin oxide.

[0040] The exemplary MEMS piezoelectric PZT inkjet printhead 300 further includes a deflector membrane 314. A voltage is applied across the top and bottom electrode stacks, resulting in deflection of the deflector membrane 314, creating a pumping action that forces fluid (e.g., ink) out of the body 316 and through a nozzle plate 318 having ink-jetting nozzles 320. In the exemplary MEMS piezoelectric PZT inkjet printhead 300, the body 316 is comprised of a base wafer containing ink channels and pumping chambers.

[0041] FIG. 4 illustrates a cross-sectional view of an example of a MEMS piezoelectric ultrasonic transducer 400 in some embodiments of the present disclosure.

[0042] The exemplary MEMS piezoelectric ultrasonic transducer 400 illustrates a bottom electrode 404 and an adhesive layer 402. The combination of the bottom electrode 404 and the adhesive layer 402 comprises a bottom electrode stack. In this example, the bottom electrode 404 is iridium. In another example, the bottom electrode is platinum.

[0043] The exemplary MEMS piezoelectric ultrasonic transducer 400 further comprises a buffer PZT layer 408. In the embodiment 400, the buffer PZT layer 408 is deposited on the bottom electrode stack using PVD. The deposited material is pyrochlore (220) PZT, which is non-functional as a piezoelectric material. After rapid thermal annealing, the buffer PZT layer 408 is largely converted to perovskite (100) PZT.

[0044] After converting the buffer PZT layer 408 to perovskite (100), an epitaxial PZT film growth process is applied to the buffer PZT layer 408 to produce the epitaxially grown layer 406. The epitaxially grown layer 406 comprises perovskite (100).

[0045] The exemplary MEMS piezoelectric ultrasonic transducer 400 further comprises a top electrode 410 and an adhesion layer 412. The combination of the top electrode 410 and the adhesion layer 412 comprises a top electrode stack. In an embodiment, the top electrode 410 is iridium. In another example, the top electrode is platinum. In another example, the top electrode is indium tin oxide.

[0046] The exemplary MEMS piezoelectric ultrasonic transducer 400 further comprises a deflector membrane 414. As a result of a voltage being applied across the top and bottom electrode stacks, the deflector membrane 414 deflects, generating an ultrasonic wave that exits through an aperture 418 in the body 416. In addition, the returning ultrasonic wave deflects the deflector membrane, generating a voltage between the top and bottom electrode stacks. In the exemplary MEMS piezoelectric ultrasonic transducer 400, the body 416 comprises a base wafer with a backside air gap.

[0047] FIG. 5 is a cross-sectional view of an example of a MEMS piezoelectric PZT acoustic transducer in some embodiments of the present disclosure.

[0048] The example MEMS piezoelectric acoustic transducer 500 illustrates a bottom electrode 504 and an adhesion layer 502. The combination of the bottom electrode 504 and the adhesion layer 502 comprises a bottom electrode stack. In this example, the bottom electrode 504 is iridium. In another example, the bottom electrode is platinum.

[0049] The exemplary MEMS piezoelectric acoustic transducer 500 further comprises a buffer PZT layer 508. In the exemplary embodiment 500, the buffer PZT layer 508 is deposited on the bottom electrode stack using PVD. The deposited material is pyrochlore (220) PZT, which is non-functional as a piezoelectric material. After rapid thermal annealing, the buffer PZT layer 508 is largely converted to perovskite (100) PZT.

[0050] After converting the buffer PZT layer 508 to perovskite (100), an epitaxial PZT film growth process is applied to the buffer PZT layer 508 to produce the epitaxially grown layer 506. The epitaxially grown layer 506 comprises perovskite (100).

[0051] The exemplary MEMS piezoelectric acoustic transducer 500 further comprises a top electrode 510 and an adhesion layer 512. The combination of the top electrode 510 and the adhesion layer 512 comprises a top electrode stack. In an embodiment, the top electrode 510 is iridium. In another embodiment, the top electrode is platinum. In another embodiment, the top electrode is indium tin oxide.

[0052] The exemplary MEMS piezoelectric acoustic transducer 500 further comprises a deflector membrane 514. As a result of a voltage being applied across the top and bottom electrode stacks, the deflector membrane 514 deflects, generating acoustic waves that exit through a backplate 518 with sound holes 520 in the body 516. In addition, the returning acoustic waves bend the deflector membrane, generating a voltage between the top and bottom electrode stacks. In the exemplary MEMS piezoelectric acoustic transducer 500, the body 516 is comprised of a base wafer with a backside air gap cavity.

[0053] It may be found convenient to use various general-purpose systems in accordance with the teachings herein, or to construct more specialized apparatus to perform the required method steps. The required structure for a variety of such systems appears to be described in the foregoing specification.

[0054] The above description is intended to be illustrative, not limiting. While the present disclosure has been described with reference to specific exemplary embodiments, it will be understood that the disclosure is not limited to the described embodiments. The scope of the present disclosure should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

[0055] As used herein, the singular forms "a," "an," "an," and / or "including" are intended to include the plural forms unless the context clearly dictates otherwise. Furthermore, as used herein, the terms "comprises," "comprising," "includes," and / or "including" specify the presence of stated features, items, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, items, steps, operations, elements, components, and / or groups thereof. Accordingly, the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting.

[0056] It should also be noted that in some alternative implementations, the noted functions / acts may occur out of the order noted in the figures. For example, two figures shown in succession may, in fact, be executed substantially concurrently or may sometimes be executed in the reverse order, depending on the functions / acts involved.

[0057] Although the operations of the method are described in a particular order, other operations may be performed between the operations described, the operations described may be arranged to occur at slightly different times, or the operations described may be distributed within a system that allows the operations of the process to occur at various intervals related to the process.

[0058] Various units, circuits, or other components may be described or claimed as being "configured" or "configurable" to perform one or more tasks. In this context, the phrase "configured to" or "configurable" is used to generally refer to structure by indicating that the unit / circuit / component includes a task or structure (e.g., a circuit) that performs a task during operation. In this manner, a unit / circuit / component may be said to be configured to perform a task or to be configurable to perform a task even if the specified unit / circuit / component is not currently operating (e.g., not turned on). A unit / circuit / component used in conjunction with the phrases "configured to" or "configurable to" includes hardware (e.g., a circuit, a memory storing executable program instructions to perform an operation, etc.). It is expressly intended that describing a unit / circuit / component as "configured to" or "configurable to" perform one or more tasks does not implicate 35 U.S.C. 112, Section 6, for that unit / circuit / component. Additionally, "configured to" or "configurable to" can include general-purpose structures (e.g., general-purpose circuits) that are manipulated by software and / or firmware (e.g., FPGAs or general-purpose processors executing software) to operate in a manner capable of performing the task(s) in question. "Configured to" can also include adapting a manufacturing process (e.g., a semiconductor manufacturing facility) to produce a device (e.g., an integrated circuit) adapted to implement or perform one or more tasks. "Configurable" is expressly intended not to apply to blank media, unprogrammed processors or unprogrammed general-purpose computers, or unprogrammed programmable logic devices, programmable gate arrays, or other unprogrammed devices unless accompanied by programming media that gives the unprogrammed device the ability to be configured to perform the disclosed functions.

[0059] The foregoing description has been set forth with reference to specific embodiments for purposes of explanation. However, the illustrative discussion above is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. The embodiments were chosen and described in order to best explain the principles of the embodiments and their practical application, thereby enabling those skilled in the art to best utilize various modifications as suited to the embodiments and the particular uses contemplated. Therefore, the present embodiments are to be considered as illustrative and not restrictive, and the invention is not to be limited to the detailed description given herein, but may be modified within the scope of the appended claims and their equivalents. [Explanation of symbols]

[0060] 110 Forming a bottom electrode stack on a structured substrate 120 Pyrochlore PZT buffer substrate layer formed on the bottom electrode stack 130 Rapid Thermal Annealing of PZT Buffer Substrate Layer Producing epitaxial growth of perovskite PZT films on 140 PZT buffer substrate layers 150 Forming a top electrode stack on the perovskite PZT film

Claims

1. 1. A method of making a piezoelectric stack, comprising: forming a bottom electrode stack on a structured substrate; forming a pyrochlore lead zirconium titanate (PZT) buffer substrate layer on the bottom electrode stack; performing a rapid thermal anneal of the PZT buffer substrate layer; performing epitaxial growth of perovskite (100) PZT on the PZT buffer substrate layer; forming a top electrode stack on the perovskite (100) PZT; A method comprising:

2. The method of claim 1 , wherein forming the bottom electrode stack comprises depositing a metal seed layer of iridium or platinum.

3. The method of claim 1, wherein the rapid thermal annealing of the PZT buffer substrate is performed at a temperature between 600°C and 650°C.

4. 10. The method of claim 1, wherein the rapid thermal annealing of the PZT buffer substrate is performed for a period of between 2 and 4 minutes.

5. 10. The method of claim 1, wherein the PZT buffer substrate layer is converted to perovskite (100) PZT by performing a rapid thermal anneal of the PZT buffer substrate.

6. 2. The method of claim 1, wherein performing epitaxial growth of the perovskite (100) PZT is performed at a temperature between 500°C and 650°C.

7. The method of claim 1 , wherein forming the bottom electrode stack comprises depositing an adhesion layer comprising titanium, titanium tungsten, chromium, nickel, or molybdenum.

8. The method of claim 1 , wherein forming the lead pyrochlore zirconium titanate (PZT) buffer substrate layer on the bottom electrode stack is performed by RF magnetron sputtering.

9. A device, a structured substrate having a first surface; a bottom electrode stack comprising a metal seed layer deposited on a first surface of the structured substrate; a lead pyrochlore zirconate titanate (PZT) buffer substrate layer deposited on the bottom electrode stack opposite the structured substrate, the PZT buffer substrate layer comprising substantially perovskite (100) PZT as a result of rapid thermal annealing; an epitaxially grown layer of perovskite (100) PZT deposited on the buffer substrate layer and opposite the structured substrate; a top electrode stack on the opposite side of the structured substrate, the top electrode stack comprising a metal seed layer deposited on the epitaxially grown layer of perovskite (100); A device comprising:

10. 10. The device of claim 9, wherein the metal seed layer of the bottom electrode stack further comprises one of iridium or platinum.

11. The device of claim 9, wherein the metal seed layer of the top electrode stack comprises one of platinum, iridium, gold, copper, aluminum, or indium-tin-oxide.

12. The device of claim 9 , wherein the bottom electrode stack further comprises an adhesion layer.

13. The device of claim 12 , wherein the adhesion layer comprises one of titanium, titanium tungsten, chromium, nickel, or molybdenum.

14. The device of claim 9 , wherein the top electrode stack further comprises an adhesion layer.

15. 15. The device of claim 14, wherein the adhesion layer comprises one of titanium, titanium tungsten, chromium, nickel, or molybdenum.

16. A microelectromechanical system (MEMS), comprising: a body defining a compressible chamber; an actuator adjacent to the chamber and including a piezoelectric stack formed by the method of claim 1; A microelectromechanical system comprising:

17. The microelectromechanical system of claim 16 , wherein a nozzle plate having ink-jetting nozzles is adjacent to the chamber and opposite the actuator.

18. A microelectromechanical system (MEMS), comprising: a body defining a chamber; a transducer adjacent to the chamber and including a piezoelectric stack formed by the method of claim 1; A microelectromechanical system comprising:

19. The microelectromechanical system of claim 18 , wherein the transducer is an acoustic transducer.

20. The microelectromechanical system of claim 18 , wherein the transducer is an ultrasonic transducer.

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