Real-time phase error detection in quadrature demodulators

Abstract

An apparatus for detecting real-time phase and offset errors of a Q-demodulator includes an RF signal path receiving an RF signal from an RF component, a first chopper for generating a chopped RF signal by chopping the RF signal at a first frequency, an LO signal path receiving an LO signal, a second chopper for generating a chopped LO signal by chopping the LO signal at a second frequency, and a summing mechanism for combining the chopped LO signal and the chopped RF signal into a composite signal. The apparatus further includes a Q-demodulator having a phase shifter for shifting the phase of the composite signal and the phase of the LO signal, and a mixer for generating a baseband signal by multiplying the shifted composite signal by the shifted LO signal, and at least two filters for extracting different signals included in the baseband signal to be analyzed.

Description

[Technical Field]

[0001] The present disclosure relates to an apparatus and method for detecting real-time phase and offset errors in a quadrature demodulator (Q demodulator). In particular, the present disclosure discloses an electrical circuit that includes two choppers for RF and LO signals before the Q demodulator to generate a baseband signal, and several filters that extract different signals from the baseband signal to be analyzed and compensated. [Background technology]

[0002] Modulators and demodulators are used in various RF communication circuits to transfer data over different frequency bands. In circuits where quadrature modulators and / or demodulators are used, in-phase and quadrature RF signals are required. To extract the quadrature components of the signal, the demodulator's radio frequency (RF) and local oscillator (LO) input signals are shifted by 90 degrees from each other.

[0003] If there is an error in the 90 degree phase shift, the output of the demodulator will also contain an error. Therefore, a technique is needed to detect phase shift errors in a quadrature demodulator. Summary of the Invention

[0004] In one aspect, an apparatus for detecting a phase error includes an RF signal path receiving an RF signal from an RF component, a first chopper having a chopper switch that generates a chopped RF signal by chopping the RF signal at a first frequency, an LO signal path receiving an LO signal, a second chopper having a chopper switch that generates a chopped LO signal by chopping the LO signal at a second frequency, and a summing mechanism (e.g., a summer) disposed on the RF path that combines the chopped LO signal and the chopped RF signal into a combined signal. The apparatus further includes a quadrature demodulator (Q demodulator) having a phase shifter that generates a shifted combined signal by shifting the phase of the LO signal so that a phase difference between the combined signal and the LO signal is set to 90 degrees, and a mixer that generates a baseband signal by multiplying the shifted combined signal by the shifted LO signal, and at least one filter that extracts a signal included in the baseband signal.

[0005] In one embodiment, the phase shifter comprises a high pass filter that shifts the phase of the composite signal and a low pass filter that shifts the phase of the LO signal.

[0006] In particular, the phase shifter includes a first amplifier that amplifies the composite signal and provides the amplified composite signal to a high-pass filter, and a second amplifier that amplifies the LO signal and provides the amplified LO signal to a low-pass filter. The first and second amplifiers may function as buffers. The first and second amplifiers are not necessarily required and may be omitted in some embodiments.

[0007] In another embodiment, the apparatus further comprises an amplifier for amplifying the baseband signal output from the Q demodulator by a certain gain. The amplifier is not necessarily required and may be omitted in some embodiments.

[0008] In an embodiment, the apparatus further comprises an analog-to-digital converter (ADC) for digitizing the baseband signal.

[0009] The device may also include a digital signal processor (DSP) to extract different signals to be analyzed.

[0010] Additionally, the DSP includes a low pass filter (LPF) that outputs a circuit offset indicative of the DC offset generated in the Q demodulator.

[0011] Additionally, the apparatus includes an offset cancellation loop that feeds back the circuit offset to the Q demodulator to adjust the offset of the Q demodulator to remove the offset error.

[0012] Additionally, the DSP includes a bandpass filter that passes the baseband signal at the first chopper frequency, thereby outputting a desired signal indicative of the result of operation of the RF component.

[0013] In yet another embodiment, the RF component is a gyro sensor and the desired signal is indicative of an angular rate measured by the gyro sensor.

[0014] Additionally, the DSP includes a bandpass filter that passes an RF signal at the second chopper frequency to extract an error signal indicative of the amount of phase error generated in the Q demodulator.

[0015] The apparatus also includes a phase error cancellation loop that adjusts the phase of the Q demodulator to remove the phase error by feeding back an error signal to the Q demodulator.

[0016] The apparatus may further include an attenuator that reduces the amplitude of the chopper LO signal, such that the amplitude of the reduced chopper LO signal can be greater than, less than, or equal to the amplitude of the RF signal in the RF path.

[0017] In yet another embodiment, the apparatus further comprises a low-pass filter (LPF) that outputs a circuit offset indicative of the DC offset generated in the Q demodulator, and an offset cancellation loop that feeds back the circuit offset to the Q demodulator to adjust the offset of the Q demodulator to remove the offset error.

[0018] The apparatus may also include a bandpass filter that passes an RF signal at the first chopper frequency to output a desired signal indicative of the result of operation of the RF component.

[0019] The apparatus may also include a bandpass filter that passes an RF signal at the second chopper frequency to extract an error signal indicating the amount of phase error generated in the Q demodulator, and a phase error cancellation loop that adjusts the phase of the Q demodulator to remove the phase error by feeding back the error signal to the Q demodulator.

[0020] In another aspect, a method for detecting a phase error includes receiving an RF signal from an RF component to an RF signal path, chopping the RF signal at a first frequency to generate a chopped RF signal, receiving an LO signal from a local oscillator to an LO signal path, chopping the LO signal at a second frequency to generate a chopped LO signal, combining the chopped LO signal and the chopped RF signal into a composite signal, shifting the phase of the combined signal by a phase shifter in a quadrature demodulator to generate a shifted combined signal and shifting the phase of the LO signal to generate a shifted LO signal, so that a phase difference between the combined signal and the LO signal is set to 90 degrees, generating a baseband signal by multiplying the shifted combined signal by the shifted LO signal by a quadrature demodulator (Q demodulator), and extracting a signal included in the baseband signal by at least one filter.

[0021] In one embodiment, the method further includes filtering the baseband signal with a low-pass filter that extracts a circuit offset indicative of a DC offset generated in the Q demodulator, and feeding back the circuit offset to the Q demodulator to adjust the offset of the Q demodulator to remove the offset error.

[0022] In another embodiment, the method further includes outputting a desired signal indicative of a result of the operation of the RF component by filtering the baseband signal with a bandpass filter having a center frequency equal to the first chopper frequency.

[0023] In yet another embodiment, the method further includes extracting an error signal indicative of the amount of phase error generated in the Q demodulator by filtering the baseband signal with a bandpass filter having a center frequency equal to the second chopper frequency, and adjusting the phase of the Q demodulator to remove the phase error by feeding back the error signal to the Q demodulator.

[0024] Other aspects, advantages, and features of the present disclosure will become apparent to those skilled in the art from the following detailed description, in which illustrative embodiments of the present disclosure are described with reference to the accompanying drawings.

[0025] Before proceeding to the detailed description below, for convenience, terms and expressions used in this specification are defined as follows: The terms "include" and "comprise" and their derivatives mean inclusion without limitation. The term "or" is inclusive and means "and / or." The expressions "associated with" and "associated therewith" and their derivatives mean include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, and the like. The term "controller" means any device, system, or portion thereof that controls at least one operation, and may be implemented in hardware, firmware, software, or a combination of at least two of these. It should be noted that the functionality associated with any particular controller may be centralized or distributed, whether locally or indirectly. These definitions of terms and phrases apply herein, and those skilled in the art will understand that in many, if not most, cases, these definitions also apply before and after the use of the terms and phrases. [Brief explanation of the drawings]

[0026] For a more detailed understanding of the present disclosure and its advantages, reference is now made to the accompanying drawings, in which like parts are numbered like, and in which: [Figure 1]FIG. 1 illustrates an example of an electrical circuit for detecting a phase error in a Q demodulator according to an embodiment of the present disclosure. [Figure 2] FIG. 2 illustrates another example of an electrical circuit for detecting a phase error in a Q demodulator according to an embodiment of the present disclosure. [Figure 3] FIG. 3 illustrates the electrical circuit of FIG. 1 with an offset cancellation loop and a phase error cancellation loop according to one embodiment of the present disclosure. [Figure 4] FIG. 4 illustrates the electrical circuit of FIG. 2 with an offset cancellation loop and a phase error cancellation loop according to one embodiment of the present disclosure. [Figure 5] FIG. 5 illustrates an example of a method for detecting a phase error according to an embodiment of the present disclosure.

[0027] In the drawings, like reference numerals refer to the same or similar elements, features, and structures. DETAILED DESCRIPTION OF THE INVENTION

[0028] 1 through 5 described below, as well as various embodiments used herein to explain the principles of the present disclosure, are merely examples and are not to be construed as limiting the scope of the present disclosure in any way. Those skilled in the art will understand that the principles of the present disclosure can be implemented in any appropriately arranged system and method. The following description, taken in conjunction with the accompanying drawings, will help to provide a comprehensive understanding of various embodiments of the present disclosure as set forth in the claims and their equivalents. While such descriptions include numerous specific details to aid in understanding, these are merely exemplary. Therefore, those skilled in the art will recognize that various changes and modifications can be made to the various embodiments described herein without departing from the scope and spirit of the present disclosure. In addition, descriptions of well-known functions and configurations may be omitted for clarity and conciseness.

[0029] It will be apparent to those skilled in the art that the following description of various embodiments of the present disclosure is merely illustrative, and does not limit the disclosure as set forth in the appended claims and their equivalents.

[0030] Although ordinal numbers such as "first" and "second" are used to describe various components, these components are not limited herein. These terms are used only to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the concept of the invention.

[0031] The terms used herein are for the purpose of describing various embodiments only and are not intended to be limiting. As used herein, the singular forms "a," "an," and "the" include the plural forms unless the context clearly dictates otherwise. Furthermore, the terms "comprises" and / or "has," when used herein, specify the presence of stated features, numbers, steps, operations, components, elements, or combinations thereof, but do not exclude the presence or addition of one or more other features, numbers, steps, operations, components, elements, or combinations thereof.

[0032] FIG. 1 illustrates an example of an electrical circuit 100 for detecting phase and offset errors in a Q demodulator, according to one embodiment of the present disclosure.

[0033] The electrical circuit 100 includes an RF path 3 for receiving an RF signal, a first chopper 2 disposed on the RF path 3, a second chopper 5a and an attenuator 5b coupled to an LO signal path 7, a Q demodulator 10 having a phase shifter 11 and a mixer 12, an amplifier 16, an ADC 17, and a DSP 20.

[0034] First, the RF path 3 receives RF signals from various RF devices such as a gyro sensor (not shown), and the received RF signals are coupled to a first chopper 2 having a set of chopper switches to generate chopped RF signals at a first chopper frequency f_chp1.

[0035] A local oscillator (LO) signal having a LO frequency is generated from an oscillator (not shown) and coupled to a chopper 5a comprising a set of chopper switches to generate a chopped LO signal at a second chopper frequency f_chp2. An attenuator 5b also comprises a set of resistors that reduce the amplitude of the chopped LO signal to an appropriate value so that it can be added to the chopped RF signal and processed by the Q demodulator 10.

[0036] The composite chopper signal and the LO signal are phase shifted and mixed in a Q demodulator 10 to generate a baseband signal.

[0037] The attenuated chopper LO signal is combined with the chopper RF signal by summer 4, and the combined signal is sent via amplifiers (or buffers) 13a and 13b to high-pass filter 14 of phase shifter 11. Another LO signal is fed directly to low-pass filter 15 of phase shifter 11 via amplifiers (or buffers) 13c and 13d.

[0038] Any number of known designs using resistors, inductors, and / or capacitors may be implemented as high pass filter 14 and low pass filter 15 of phase shifter 11. Phase shifter 11 shifts the phase of the combined signal and the LO signal such that the phase difference between the combined signal and the LO signal is set to 90 degrees.

[0039] The phase-shifted composite signal and the LO signal are then provided to mixer 12, where the phase-shifted composite signal is multiplied by the phase-shifted LO signal to generate a baseband signal.

[0040] The baseband signal output from the Q demodulator 10 is supplied to an amplifier 16, which amplifies the baseband signal to obtain sufficient gain to facilitate phase error detection.

[0041] The amplified baseband signal is provided to an analog-to-digital converter (ADC) 17, which samples the amplified baseband signal for digitization. ADC 17 may be implemented as a known analog-to-digital converter that generates a digital baseband signal sampled at a particular sampling frequency.

[0042] Following digitization by ADC 17, the digital baseband signal is fed to a digital signal processor (DSP) 20 to extract different signals to be analyzed. In this embodiment, DSP 20 may include three filters: a low pass filter (LPF) 21, a band pass filter (BPF) 22, and a BPF 23, which are connected in parallel with each other.

[0043] The LPF 21 extracts an offset signal indicating the DC offset generated in the Q demodulator 10 by passing a direct current (DC) signal from the digital baseband signal.

[0044] The BPF 22 passes the baseband signal at the first chopper frequency f_chp1 and outputs a desired signal indicative of the results of the operation of various RF devices. As an example, the desired signal may be a signal indicative of the angular velocity measured by the gyro sensor when the electrical circuit first receives the RF signal from the gyro sensor. In addition, the BPF 22 may further include a root-mean-square (RMS) circuit that obtains the RMS value of the baseband signal at f_chp1.

[0045] The BPF 23 passes the baseband signal of the second chopper frequency f_chp2 to extract an error signal indicating the amount of phase error generated in the Q demodulator 10. If no phase error is generated in the Q demodulator 10, the phase-shifted chopper LO signal is canceled by another phase-shifted LO signal during the multiplication operation in the mixer 12. Therefore, the BPF 23 does not generate an error signal of the second chopper frequency f_chp2. In addition, the BPF 23 may further include an RMS circuit to obtain the RMS value of the baseband signal of f_chp2.

[0046] FIG. 2 shows another example of an electrical circuit 200 for detecting phase and offset errors in a Q demodulator, according to one embodiment of the present disclosure.

[0047] The electrical circuit 200 is similar to the electrical circuit 100 shown in Figure 1, except that it uses analog processing to extract a different analog signal, so repeated description of the same components will be omitted.

[0048] The circuit 200 comprises a first chopper 2 disposed in the RF path 3, a chopper 5a and an attenuator 5b coupled to the LO signal path 7, a Q demodulator 10 having a phase shifter 11 and a mixer 12, an amplifier 16, and an analog filter 30.

[0049] The RF signal is chopped by a first chopper 2 at a first chopper frequency f_chp1, and the LO signal is chopped by a second chopper 5a at a second chopper frequency f_chp2 and attenuated by an attenuator 5b. The attenuator 5b may include a resistor to reduce the amplitude of the chopper LO signal to an appropriate value so that it is added to the chopper RF signal and processed in a Q demodulator 10. The combined chopper and LO signals are phase shifted and mixed in the Q demodulator 10 to generate a baseband signal.

[0050] The baseband signal is amplified with sufficient gain in amplifier 16. In this embodiment, the amplified baseband signal is not digitized but is instead fed to three parallel analog filters: LPF 31, BPF 32, and BPF 33. These three analog filters extract different analog signals to be analyzed, in contrast to the filters in DSP 20, which extract digital signals from the digital baseband signal output by ADC 17.

[0051] The LPF 31 extracts an offset signal indicating the offset generated in the Q demodulator 10. The BPF 32 passes a signal of the first chopper frequency f_chp1 to output a desired signal. The BPF 33 passes a signal of the second chopper frequency f_chp2 to extract an error signal indicating the amount of phase error generated in the Q demodulator 10.

[0052] FIG. 3 illustrates the electrical circuit of FIG. 1 with an offset cancellation loop and a phase error cancellation loop according to one embodiment of the present disclosure.

[0053] The electrical circuit 300 is similar to the electrical circuit 100 shown in Fig. 1 except that an offset cancellation loop 35 and a phase error cancellation loop 36 are added, so repeated explanations of the same components will be omitted.

[0054] The electrical circuit 300 includes a first chopper 2 coupled to an RF signal input 1, a chopper 5a and an attenuator 5b coupled to an LO signal path 7, a Q demodulator 10 having a phase shifter 11 and a mixer 12, an amplifier 16, an ADC 17, and a DSP 20. Similar to the embodiment shown in Figure 1, the DSP 20 includes an LPF 21 that outputs an offset signal, a BPF 22 that outputs a desired signal, and a BPF 23 that outputs an error signal.

[0055] The electric circuit 300 includes an offset cancellation loop 35 that adjusts the offset of the Q demodulator 10 so that the offset error is removed by feeding back the offset signal output from the LPF 21 to the Q demodulator 10.

[0056] The electric circuit 300 further includes a phase error cancellation loop 36 that adjusts the phase of the Q demodulator 10 so that the phase error is eliminated by feeding back the error signal output from the BPF 23 to the Q demodulator 10.

[0057] 4 illustrates the electrical circuit of FIG. 2 with an offset cancellation loop and a phase error cancellation loop according to one embodiment of the present disclosure. The electrical circuit 400 is similar to the electrical circuit 200 shown in FIG. 2 except for the addition of an offset cancellation loop 45 and a phase error cancellation loop 46. Therefore, repeated descriptions of the same components will be omitted.

[0058] The electrical circuit 400 includes an offset cancellation loop 45 that adjusts the offset of the Q demodulator 10 so that the offset error is removed by feeding back the offset signal output from the LPF 31 to the Q demodulator 10.

[0059] The electric circuit 400 further includes a phase error cancellation loop 46 that adjusts the phase of the Q demodulator 10 so that the phase error is eliminated by feeding back the error signal output from the BPF 33 to the Q demodulator 10.

[0060] FIG. 5 illustrates an example method 500 for detecting a phase error according to an embodiment of the present disclosure.

[0061] The method begins in step S11 by receiving an RF signal into the RF signal path from one of the various RF components.

[0062] Subsequently, in step 12, the received RF signal is chopped by chopper 2 at a first chopper frequency f_chp1 to generate a chopped RF signal.

[0063] In step S13, an LO signal is received from an oscillator, and in step S14, a chopper LO signal is generated by chopping the LO signal at a second chopper frequency f_chp2 by a chopper 5a. In one embodiment, the LO signal may be further attenuated by an attenuator before and after chopping.

[0064] In step S15, phase shifter 11 shifts the phases of the combined signal and the LO signal so that the phase difference between the combined signal and the LO signal is set to 90 degrees.

[0065] In step S16, the mixer 12 generates a baseband signal by multiplying the phase-shifted composite signal by a phase-shifted LO signal.

[0066] In step S17, the LPF extracts the offset signal from the baseband signal, the BPF with a center frequency equal to the first chopper frequency extracts the desired signal from the baseband signal, and the BPF with a center frequency equal to the second chopper frequency extracts the error signal from the baseband signal. The first chopper frequency is separated from the second chopper frequency so that the desired signal does not interfere with the error signal. As an example, the first chopper frequency may be 20 kHz and the second chopper frequency may be 50 kHz.

[0067] In step S18, the offset cancellation loop adjusts the offset of the Q demodulator 10 to remove the offset error by feeding back the offset signal output from the LPF to the Q demodulator 10. Also, the phase error cancellation loop adjusts the phase of the Q demodulator 10 to remove the phase error by feeding back the error signal output from the LPF to the Q demodulator 10.

[0068] Although the present disclosure has been described with exemplary embodiments, various changes and modifications will be suggested to those skilled in the art, and the present disclosure includes such changes and modifications that fall within the scope of the appended claims.

Claims

1. 1. An apparatus for detecting phase and offset errors, comprising: an RF signal path receiving an RF signal from the RF component; a first chopper having a chopper switch for chopping the RF signal at a first frequency to generate a chopped RF signal; an LO signal path that receives an LO signal; a second chopper having a chopper switch that chops the LO signal at a second frequency to generate a chopper LO signal; a summing mechanism disposed on the RF path for generating a combined signal by combining the chopper LO signal and the chopper RF signal; a phase shifter that generates a shifted combined signal by shifting the phase of the combined signal and generates a shifted LO signal by shifting the phase of the LO signal so that a phase difference between the combined signal and the LO signal is set to 90 degrees; a mixer that generates a baseband signal by multiplying the shifted composite signal by the shifted LO signal; a Q demodulator having and at least one filter for extracting a signal contained in the baseband signal.

2. The phase shifter a high-pass filter for shifting the phase of the composite signal; and a low pass filter that shifts the phase of the LO signal.

3. The phase shifter a first amplifier or a first buffer that amplifies the composite signal and provides the amplified composite signal to the high-pass filter; 2. The apparatus of claim 1, further comprising: a second amplifier or a second buffer that amplifies the LO signal and provides the amplified LO signal to the low pass filter.

4. The apparatus of claim 1 , further comprising an amplifier that amplifies the baseband signal output from the Q demodulator by a particular gain.

5. The apparatus of claim 1 , further comprising an analog-to-digital converter (ADC) that digitizes the baseband signal.

6. 6. The apparatus of claim 5, further comprising a digital signal processor (DSP) for extracting different signals for analysis.

7. 7. The apparatus of claim 6, wherein the DSP comprises a low pass filter (LPF) that outputs a circuit offset indicative of a DC offset generated in the Q demodulator.

8. 8. The apparatus of claim 7, further comprising an offset cancellation loop that feeds back the circuit offset to the Q demodulator to adjust the offset of the Q demodulator to remove offset error.

9. 6. The apparatus of claim 5, wherein the DSP comprises a bandpass filter that passes a baseband signal at the first chopper frequency to output a desired signal indicative of a result of operation of the RF component.

10. the RF component is a gyro sensor, The apparatus of claim 9 , wherein the desired signal is indicative of an angular velocity measured by the gyro sensor.

11. 6. The apparatus of claim 5, wherein the DSP comprises a bandpass filter that passes a baseband signal at the second chopper frequency to extract an error signal indicative of the amount of phase error generated in the Q demodulator.

12. The apparatus of claim 1 , further comprising a phase error cancellation loop that adjusts the phase of the Q demodulator to cancel a phase error by feeding back the error signal to the Q demodulator.

13. The apparatus of claim 1 , further comprising an attenuator that reduces the amplitude of the chopper LO signal that is added to the RF signal in the RF path.

14. a low pass filter (LPF) that outputs a circuit offset indicative of a DC offset generated in the Q demodulator; 2. The apparatus of claim 1, further comprising: an offset cancellation loop that feeds back the circuit offset to the Q demodulator to adjust the offset of the Q demodulator to remove offset error.

15. 2. The apparatus of claim 1, further comprising a bandpass filter that passes a baseband signal at the first chopper frequency to output a desired signal indicative of a result of operation of the RF component.

16. a bandpass filter that passes a baseband signal at the second chopper frequency to extract an error signal indicative of the amount of phase error generated in the Q demodulator; 2. The apparatus of claim 1, further comprising a phase error cancellation loop that adjusts the phase of the Q demodulator to cancel the phase error by feeding back the error signal to the Q demodulator.

17. 1. A method for detecting phase and offset errors, comprising: receiving an RF signal from an RF component into an RF signal path; chopping the RF signal at a first frequency to generate a chopped RF signal; receiving an LO signal from a local oscillator into an LO signal path; generating a chopped LO signal by chopping the LO signal at a second frequency; combining the chopper LO signal and the chopper RF signal into a combined signal; generating a shifted combined signal by shifting the phase of the combined signal and a shifted LO signal by shifting the phase of the LO signal by a quadrature demodulator so that a phase difference between the combined signal and the LO signal is set to 90 degrees; generating a baseband signal by multiplying the shifted composite signal by the shifted LO signal using the quadrature demodulator; and extracting, by at least one filter, a signal contained in said baseband signal.

18. filtering the baseband signal with a low pass filter that extracts a circuit offset indicative of a DC offset generated in the Q demodulator; 18. The method of claim 17, further comprising: feeding back the circuit offset to the Q demodulator to adjust the offset of the Q demodulator to remove offset error.

19. 20. The method of claim 17, further comprising: outputting a desired signal indicative of a result of operation of the RF component by filtering the baseband signal with a bandpass filter having a center frequency equal to the first chopper frequency.

20. extracting an error signal indicative of the amount of phase error generated in the Q demodulator by filtering the baseband signal with a bandpass filter having a center frequency equal to the second chopper frequency; 18. The method of claim 17, further comprising: adjusting the phase of the Q demodulator so that a phase error is removed by feeding back the error signal to the Q demodulator.

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