Regression-Based Decoder-Side Affine Motion Derivation for Video Coding

Abstract

The video coder may be configured to partition a coding block into sub-blocks and generate initial sub-block motion vectors for the multiple sub-blocks. The video coder may further refine the initial sub-block motion vectors for the multiple sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the multiple sub-blocks, and perform linear regression on the refined sub-block motion vectors and coordinates of the multiple sub-blocks to derive an affine motion model. The video coder may then code the coding block using the derived affine motion model.

Description

[Technical Field]

[0001] This application claims priority to U.S. Patent Application No. 18 / 471,131, filed September 20, 2023, and U.S. Provisional Patent Application No. 63 / 379,033, filed October 11, 2022, the entire contents of each of which are incorporated herein by reference. U.S. Patent Application No. 18 / 471,131, filed September 20, 2023, claims the benefit of U.S. Provisional Patent Application No. 63 / 379,033, filed October 11, 2022.

[0002] TECHNICAL FIELD This disclosure relates to video encoding and decoding. [Background technology]

[0003] Digital video capabilities may be incorporated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video gaming devices, video game consoles, cellular or satellite wireless telephones, so-called "smartphones," video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video coding techniques such as those described in standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), ITU-T H.266 / Versatile Video Coding (VVC), and extensions to such standards, as well as proprietary video codecs / formats such as AOMedia Video 1 (AV1) developed by the Alliance for Open Media. By implementing such video coding techniques, video devices may transmit, receive, encode, decode, and / or store digital video information more efficiently.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy inherent in video sequences. In block-based video coding, video slices (e.g., video pictures or portions of video pictures) may be partitioned into video blocks, which are also sometimes referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in intra-coded (I) slices of a picture are encoded using spatial prediction with respect to reference samples in neighboring blocks in the same picture. Video blocks in inter-coded (P or B) slices of a picture may use spatial prediction with respect to reference samples in neighboring blocks in the same picture or temporal prediction with respect to reference samples in other reference pictures. Pictures are sometimes referred to as frames, and reference pictures are sometimes referred to as reference frames. Summary of the Invention

[0005] Generally, this disclosure describes techniques for inter-prediction in video codecs. More specifically, this disclosure describes methods for affine motion derivation at the decoder side. The techniques of this disclosure may include dividing a block into multiple sub-blocks and determining an initial sub-block motion vector for each of the sub-blocks. The initial sub-block motion vector may be based on affine merge candidates from neighboring blocks and may represent an initial affine motion model.

[0006] The video coder may then perform a decoder side motion vector refinement (DMVR) process for each of the sub-blocks. The DMVR process may include performing bilateral matching for each of the sub-blocks. The DMVR process results in a refined sub-block motion vector for each of the sub-blocks. For example, the bilateral matching process may return a motion vector offset value for each of the sub-blocks to add to the initial motion vector. Note that the initial motion vector and the determined motion vector offset may be different for each of the sub-blocks.

[0007] The video coder may then perform a linear regression process on the refined sub-block motion vectors to derive an updated affine motion model. The video coder may determine control point motion vectors from the updated affine motion model and then code the block using the control point motion vectors. By applying the linear regression process to the refined sub-block motion vectors, a more accurate affine motion model may be obtained. Thus, coding efficiency may be improved and distortion may be reduced.

[0008] In one example, the present disclosure describes a method that includes partitioning a coding block into sub-blocks, generating initial sub-block motion vectors for a plurality of sub-blocks, refining the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of sub-blocks, and performing linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0009] In another example, the present disclosure describes an apparatus configured to decode video data, the apparatus comprising: a memory; and one or more processors in communication with the memory, wherein the one or more processors are configured to: partition a coding block into sub-blocks; generate initial sub-block motion vectors for a plurality of sub-blocks; refine the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of sub-blocks; and perform linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0010] In another example, this disclosure describes an apparatus configured to decode video data, the apparatus comprising: means for partitioning a coding block into sub-blocks; means for generating initial sub-block motion vectors for a plurality of sub-blocks; means for refining the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce improved sub-block motion vectors for the plurality of sub-blocks; and means for performing linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0011] In another example, this disclosure describes a non-transitory computer-readable storage medium that stores instructions that, when executed, cause one or more processors to partition a coding block into sub-blocks, generate initial sub-block motion vectors for a plurality of sub-blocks, refine the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of sub-blocks, and perform linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0012] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description, drawings, and claims. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 is a block diagram illustrating an example video encoding and decoding system in which techniques of this disclosure may be implemented. [Figure 2] FIG. 10 is a conceptual diagram illustrating an example of bilateral matching. [Figure 3] FIG. 1 is a conceptual diagram illustrating an example of regression-based decoder-side affine mode derivation. [Figure 4] FIG. 10 is a conceptual diagram illustrating another example of regression-based decoder-side affine mode derivation. [Figure 5] FIG. 2 is a block diagram illustrating an example video encoder that may implement the techniques of this disclosure. [Figure 6] FIG. 2 is a block diagram illustrating an example video decoder that may implement the techniques of this disclosure. [Figure 7] 10 is a flowchart illustrating an example method for encoding a current block, in accordance with techniques of this disclosure. [Figure 8] 10 is a flowchart illustrating an example method for decoding a current block, in accordance with techniques of this disclosure. [Figure 9] 10 is a flowchart illustrating another example method for encoding a current block, in accordance with techniques of this disclosure. [Figure 10] 10 is a flowchart illustrating another exemplary method for decoding a current block, in accordance with techniques of this disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0014] Generally, this disclosure describes techniques for inter-prediction in video codecs. More specifically, this disclosure describes methods for affine motion derivation at the decoder side. The techniques of this disclosure may include dividing a block into multiple sub-blocks and determining an initial sub-block motion vector for each of the sub-blocks. The initial sub-block motion vector may be based on affine merge candidates from neighboring blocks and may represent an initial affine motion model.

[0015] The video coder may then perform a decoder-side motion vector refinement (DMVR) process for each of the sub-blocks. The DMVR process may include performing bilateral matching for each of the sub-blocks. The DMVR process results in a refined sub-block motion vector for each of the sub-blocks. For example, the bilateral matching process may return a motion vector offset value for each of the sub-blocks to add to the initial motion vector. Note that the initial motion vector and the determined motion vector offset may be different for each of the sub-blocks.

[0016] The video coder may then perform a linear regression process on the refined sub-block motion vectors to derive an updated affine motion model. The video coder may determine control point motion vectors from the updated affine motion model and then code the block using the control point motion vectors. By applying the linear regression process to the refined sub-block motion vectors, a more accurate affine motion model may be obtained. Thus, coding efficiency may be improved and distortion may be reduced.

[0017] 1 is a block diagram illustrating an example video encoding and decoding system 100 that may implement the techniques of this disclosure for regression-based decoder-side affine motion derivation. The techniques of this disclosure are generally directed to coding (encoding and / or decoding) video data. Generally, video data includes any data for processing video. Thus, video data may include raw uncoded video, coded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

[0018] 1 , in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. Specifically, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 may be or include any of a wide range of devices, such as a desktop computer, a notebook (i.e., laptop) computer, a mobile device, a tablet computer, a set-top box, a telephone handset such as a smartphone, a television, a camera, a display device, a digital media player, a video gaming console, a video streaming device, a broadcast receiver device, etc. In some cases, source device 102 and destination device 116 may be capable of wireless communication and thus may be referred to as wireless communication devices.

[0019] In the example of FIG. 1 , source device 102 includes video source 104, memory 106, video encoder 200, and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120, and display device 118. According to this disclosure, video encoder 200 of source device 102 and video decoder 300 of destination device 116 may be configured to apply techniques for regression-based decoder-side affine motion derivation. Thus, source device 102 represents an example of a video encoding device, while destination device 116 represents an example of a video decoding device. In other examples, the source device and destination device may include other components or configurations. For example, source device 102 may receive video data from an external video source, such as an external camera. Similarly, destination device 116 may interface with an external display device rather than including an integrated display device.

[0020] System 100 as shown in FIG. 1 is merely an example. In general, any digital video encoding and / or decoding device may implement techniques for regression-based decoder affine motion derivation. Source device 102 and destination device 116 are merely examples of coding devices, such that source device 102 generates coded video data that destination device 116 transmits to source device 102. This disclosure refers to devices that perform coding (encoding and / or decoding) of data as “coding” devices. Accordingly, video encoder 200 and video decoder 300 represent examples of coding devices, specifically, video encoders and video decoders, respectively. In some examples, source device 102 and destination device 116 may operate in a substantially symmetrical manner, such that source device 102 and destination device 116 each include video encoding and decoding components. Thus, system 100 may support unidirectional or bidirectional video transmission between source device 102 and destination device 116, e.g., for video streaming, video playback, video broadcasting, or video telephony.

[0021] Generally, video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a continuous series of pictures (also called “frames”) of the video data to video encoder 200, which encodes the picture data. Video source 104 of source device 102 may include a video capture device such as a video camera, a video archive containing previously captured raw video, and / or a video feed interface that receives video from a video content provider. As a further alternative, video source 104 may generate computer-graphics-based data as source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes the captured, pre-captured, or computer-generated video data. Video encoder 200 may reorder the pictures from the order in which they were received (sometimes referred to as “display order”) to a coding order for coding. Video encoder 200 may generate a bitstream containing the encoded video data. Source device 102 may then output the encoded video data via output interface 108 to computer-readable medium 110, for receipt and / or retrieval by input interface 122 of destination device 116, for example.

[0022] Memory 106 of source device 102 and memory 120 of destination device 116 represent general-purpose memory. In some examples, memory 106, 120 may store raw video data, e.g., raw video from video source 104 and raw decoded video data from video decoder 300. Additionally or alternatively, memory 106, 120 may store software instructions executable by, e.g., video encoder 200 and video decoder 300, respectively. While memory 106 and memory 120 are shown separate from video encoder 200 and video decoder 300 in this example, it should be understood that video encoder 200 and video decoder 300 may also include internal memory for functionally similar or equivalent purposes. Furthermore, memory 106, 120 may store, e.g., encoded video data output from video encoder 200 and input to video decoder 300. In some examples, portions of memory 106, 120 may be allocated as one or more video buffers, for example, to store raw decoded video data and / or encoded video data.

[0023] The computer-readable medium 110 may represent any type of medium or device capable of transferring encoded video data from the source device 102 to the destination device 116. In one example, the computer-readable medium 110 represents a communication medium that enables the source device 102 to transmit encoded video data directly to the destination device 116 in real time, for example, via a radio frequency network or a computer-based network. The output interface 108 may modulate a transmission signal containing the encoded video data, and the input interface 122 may demodulate a received transmission signal in accordance with a communication standard such as a wireless communication protocol. The communication medium may comprise any wireless or wired communication medium, such as the radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include routers, switches, base stations, or any other equipment that may be useful for facilitating communication from the source device 102 to the destination device 116.

[0024] In some examples, source device 102 may output encoded data from output interface 108 to storage device 112. Similarly, destination device 116 may access encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard drive, Blu-ray Disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium that stores encoded video data.

[0025] In some examples, source device 102 may output encoded video data to file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Destination device 116 may access the stored video data from file server 114 via streaming or download.

[0026] File server 114 may be any type of server device capable of storing encoded video data and transmitting the encoded video data to destination device 116. File server 114 may represent a web server (e.g., for a website), a server configured to provide file transfer protocol services (such as File Transfer Protocol (FTP) or File Delivery over Unidirectional Transport (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a Multimedia Broadcast Multicast Service (MBMS) or Enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. The file server 114 may additionally or alternatively implement one or more HTTP streaming protocols, such as Dynamic Adaptive Streaming over HTTP (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, etc.

[0027] Destination device 116 may access the encoded video data from file server 114 through any standard data connection, including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both suitable for accessing encoded video data stored on file server 114. Input interface 122 may be configured to operate according to any one or more of the various protocols mentioned above to retrieve or receive media data from file server 114, or other such protocols to retrieve media data.

[0028] Output interface 108 and input interface 122 may represent a wireless transmitter / receiver, a modem, a wired network component (e.g., an Ethernet card), a wireless communication component operating according to any of the various IEEE 802.11 standards, or other physical components. In examples in which output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transfer data, such as encoded video data, according to a cellular communication standard, such as 4G, 4G-LTE (Long Term Evolution), LTE-Advanced, 5G, etc. In some examples in which output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transfer data, such as encoded video data, according to other wireless standards, such as the IEEE 802.11 standard, the IEEE 802.15 standard (e.g., ZigBee™), the Bluetooth™ standard, etc. In some examples, source device 102 and / or destination device 116 may include respective system-on-chip (SoC) devices. For example, source device 102 may include an SoC device that performs the functionality attributed to video encoder 200 and / or output interface 108, and destination device 116 may include an SoC device that performs the functionality attributed to video decoder 300 and / or input interface 122.

[0029] The techniques of this disclosure may be applied to video coding supporting any of a variety of multimedia applications, such as over-the-air television broadcast, cable television transmission, satellite television transmission, Internet streaming video transmission such as Dynamic Adaptive Streaming over HTTP (DASH), digital video encoded on a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0030] The input interface 122 of the destination device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., a communications medium, a storage device 112, a file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200 that is also used by the video decoder 300, such as syntax elements having values ​​that describe the characteristics and / or processing of video blocks or other coded units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices, such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0031] Although not shown in FIG. 1, in some examples, the video encoder 200 and the video decoder 300 may each be integrated with an audio encoder and / or audio decoder and may include appropriate MUX-DEMUX units or other hardware and / or software to handle multiplexed streams containing both audio and video in a common data stream.

[0032] The video encoder 200 and the video decoder 300 may each be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the techniques are implemented partially in software, a device may store instructions for the software in a suitable non-transitory computer-readable medium and execute the instructions in hardware using one or more processors to implement the techniques of this disclosure. Each of the video encoder 200 and the video decoder 300 may be included in one or more encoders or decoders, any of which may be integrated as part of a combined encoder / decoder (CODEC) in the respective device. Devices including the video encoder 200 and / or the video decoder 300 may implement the video encoder 200 and / or the video decoder 300 in processing circuitry, such as an integrated circuit and / or a microprocessor. Such a device may be a wireless communication device, such as a cellular telephone, or any other type of device described herein.

[0033] The video encoder 200 and the video decoder 300 may operate according to a video coding standard such as ITU-T H.265, also known as High Efficiency Video Coding (HEVC), or an extension thereof, such as multiview and / or scalable video coding extensions. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industry standards, such as ITU-T H.266, also known as Generic Video Coding (VVC). In other examples, the video encoder 200 and the video decoder 300 may operate according to a proprietary video codec / format, such as AOMedia Video 1 (AV1), an extension of AV1, and / or a successor version of AV1 (e.g., AV2). In other examples, the video encoder 200 and the video decoder 300 may operate according to other proprietary formats or industry standards. However, the techniques of this disclosure are not limited to any particular coding standard or format. In general, video encoder 200 and video decoder 300 may be configured to implement the techniques of this disclosure with any video coding technique that uses affine mode.

[0034] Generally, the video encoder 200 and the video decoder 300 may perform block-based coding of pictures. The term “block” generally refers to a structure containing data to be processed (e.g., encoded, decoded, or otherwise used in an encoding and / or decoding process). For example, a block may include a two-dimensional matrix of luminance and / or chrominance data samples. Generally, the video encoder 200 and the video decoder 300 may code video data represented in YUV (e.g., Y, Cb, Cr) format. That is, rather than coding red, green, and blue (RGB) data for picture samples, the video encoder 200 and the video decoder 300 may code luminance and chrominance components, which may include both red and blue chrominance components. In some examples, the video encoder 200 converts received RGB-format data to a YUV representation before encoding, and the video decoder 300 converts the YUV representation to RGB format. Alternatively, pre-processing and post-processing units (not shown) may perform these transformations.

[0035] This disclosure may generally refer to coding (e.g., encoding and decoding) a picture as including the process of encoding or decoding data for a picture. Similarly, this disclosure may refer to coding a block of a picture as including the process of encoding or decoding data for the block, e.g., predictive and / or residual coding. A coded video bitstream generally includes a series of values ​​of syntax elements that represent coding decisions (e.g., coding modes) and the partitioning of a picture into blocks. Thus, references to coding a picture or a block should generally be understood as coding values ​​of the syntax elements that form the picture or block.

[0036] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video coder (such as video encoder 200) partitions coding tree units (CTUs) into CUs according to a quadtree structure. That is, the video coder partitions CTUs and CUs into four equal, non-overlapping squares, and each node of the quadtree has either zero or four child nodes. A node with no child nodes may be called a "leaf node," and a CU of such a leaf node may include one or more PUs and / or one or more TUs. The video coder may further partition PUs and TUs. For example, in HEVC, a residual quadtree (RQT) represents the partitioning of TUs. In HEVC, a PU represents inter-predicted data, and a TU represents residual data. An intra-predicted CU includes intra-prediction information, such as an intra-mode indication.

[0037] As another example, video encoder 200 and video decoder 300 may be configured to operate according to VVC. According to VVC, a video coder (such as video encoder 200) partitions a picture into multiple CTUs. Video encoder 200 may partition the CTUs according to a tree structure, such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure. The QTBT structure eliminates the concept of multiple partition types, such as the separation between CUs, PUs, and TUs in HEVC. The QTBT structure includes two levels: a first level partitioned according to quadtree partitioning and a second level partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to a CTU. The leaf nodes of the binary tree correspond to CUs.

[0038] In the MTT partitioning structure, blocks may be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of triple tree (TT) (also called ternary tree (TT)) partitioning. A triple tree partitioning or triple tree partitioning is a partitioning in which a block is divided into three sub-blocks. In some examples, a triple tree partitioning or triple tree partitioning divides a block into three sub-blocks without splitting the original block through the center. The partition types in MTT (e.g., QT, BT, and TT) can be symmetric or asymmetric.

[0039] When operating according to the AV1 codec, the video encoder 200 and the video decoder 300 may be configured to code video data in blocks. In AV1, the largest coding block that can be processed is called a superblock. In AV1, a superblock can be either 128x128 luma samples or 64x64 luma samples. However, in successor video coding formats (e.g., AV2), a superblock can be defined by a different (e.g., larger) luma sample size. In some examples, a superblock is the top level of a block quadtree. The video encoder 200 may further partition the superblock into smaller coding blocks. The video encoder 200 may partition the superblock and other coding blocks into smaller blocks using square or non-square partitioning. Non-square blocks may include N / 2xN, NxN / 2, N / 4xN, and NxN / 4 blocks. The video encoder 200 and the video decoder 300 may perform separate prediction and transform processes for each of the coding blocks.

[0040] AV1 also defines tiles of video data. A tile is a rectangular array of superblocks that may be coded independently of other tiles. That is, video encoder 200 and video decoder 300 may encode and decode coding blocks within a tile, respectively, without using video data from other tiles. However, video encoder 200 and video decoder 300 may perform filtering across tile boundaries. Tiles may be uniform or non-uniform in size. Tile-based coding may enable parallel processing and / or multithreading for encoder and decoder implementations.

[0041] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luminance and chrominance components, and in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luminance component and another QTBT / MTT structure for both chrominance components (or two QTBT / MTT structures for each chrominance component).

[0042] Video encoder 200 and video decoder 300 may be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, superblock partitioning, or other partitioning structures.

[0043] In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples for a picture having three sample arrays, or a CTB of samples for a picture coded using three separate color planes and syntax structures used to code a monochrome picture or samples. A CTB may be an N×N block of samples for some value of N, partitioned to divide the components into CTBs. A component is a single sample from one of the three arrays (luma and two chroma) that make up a picture in 4:2:0, 4:2:2, or 4:4:4 color format, or a single sample from an array or arrays that make up a picture in monochrome format. In some examples, a coding block is an M×N block of samples for some values ​​of M and N, partitioned to divide the CTB into coding blocks.

[0044] Blocks (e.g., CTUs or CUs) may be grouped in various ways within a picture. As an example, a brick may refer to a rectangular region of a CTU row within a particular tile within a picture. A tile may be a rectangular region of CTUs within a particular tile column and a particular tile row within a picture. A tile column refers to a rectangular region of CTUs with a height equal to the height of the picture and a width specified by a syntax element (e.g., in a picture parameter set). A tile row refers to a rectangular region of CTUs with a height specified by a syntax element (e.g., in a picture parameter set) and a width equal to the width of the picture.

[0045] In some examples, a tile may be partitioned into multiple bricks, each of which may include one or more CTU rows within the tile. A tile that is not partitioned into multiple bricks may also be referred to as a brick. However, a brick that is a true subset of a tile may not be referred to as a tile. Bricks within a picture may also be arranged as slices. A slice may be an integer number of bricks of a picture that may be contained exclusively within a single network abstraction layer (NAL) unit. In some examples, a slice includes either several complete tiles or only a continuous sequence of complete bricks of one tile.

[0046] This disclosure may use "N x N" and "N by N," e.g., 16 x 16 samples or 16 by 16 samples, interchangeably to refer to the sample dimensions of a block (such as a CU or other video block) in the vertical and horizontal dimensions. Generally, a 16 x 16 CU has 16 samples in the vertical direction (y = 16) and 16 samples in the horizontal direction (x = 16). Similarly, an N x N CU generally has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. Samples within a CU may be arranged in rows and columns. Furthermore, a CU does not necessarily have to have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include N x M samples, where M is not necessarily equal to N.

[0047] Video encoder 200 encodes video data for a CU that represents prediction and / or residual information and other information. The prediction information indicates how the CU will be predicted to form a predictive block for the CU. The residual information generally represents sample-by-sample differences between the samples of the CU before encoding and the predictive block.

[0048] To predict a CU, video encoder 200 may generally form a predictive block for the CU through inter prediction or intra prediction. Inter prediction generally refers to predicting a CU from data of a previously coded picture, and intra prediction generally refers to predicting a CU from previously coded data of the same picture. To perform inter prediction, video encoder 200 may generate a predictive block using one or more motion vectors. Video encoder 200 may generally perform a motion search to identify a reference block that closely matches the CU with respect to the difference between the CU and the reference block, for example. Video encoder 200 may calculate a difference metric using a sum of absolute difference (SAD), a sum of squared differences (SSD), a mean absolute difference (MAD), a mean squared difference (MSD), or other such difference calculation to determine whether the reference block closely matches the current CU. In some examples, video encoder 200 may predict the current CU using unidirectional prediction or bidirectional prediction.

[0049] Some examples of VVC also provide an affine motion compensation mode, which may be considered an inter-prediction mode. In affine motion compensation mode, video encoder 200 may determine two or more motion vectors that represent non-translational motion, such as zooming in or out, rotation, perspective movement, or other irregular motion types.

[0050] To perform intra prediction, video encoder 200 may select an intra prediction mode to generate a predicted block. Some examples of VVC provide 67 intra prediction modes, including various directional modes, as well as a planar mode and a DC mode. Generally, video encoder 200 selects an intra prediction mode that describes neighboring samples for a current block (e.g., a block of a CU) and predicts samples of the current block therefrom. Assuming that video encoder 200 codes CTUs and CUs in raster scan order (left to right, top to bottom), such samples may generally be above, above and to the left, or to the left of the current block in the same picture as the current block.

[0051] The video encoder 200 encodes data representing a prediction mode for the current block. For example, in the case of an inter prediction mode, the video encoder 200 may encode data representing which of various available inter prediction modes is used as well as motion information for the corresponding mode. In the case of unidirectional or bidirectional inter prediction, for example, the video encoder 200 may encode motion vectors using an advanced motion vector prediction (AMVP) mode or a merge mode. The video encoder 200 may use a similar mode to encode motion vectors for an affine motion compensation mode.

[0052] AV1 includes two general techniques for encoding and decoding coding blocks of video data. The two general techniques are intra-prediction (e.g., intra-frame prediction or spatial prediction) and inter-prediction (e.g., inter-frame prediction or temporal prediction). In the context of AV1, when predicting a block of a current frame of video data using an intra-prediction mode, the video encoder 200 and the video decoder 300 do not use video data from other frames of the video data. In most intra-prediction modes, the video encoder 200 encodes the block of the current frame based on the difference between sample values ​​in the current block and predicted values ​​generated from reference samples in the same frame. The video encoder 200 determines the predicted values ​​generated from the reference samples based on the intra-prediction mode.

[0053] Following prediction, such as intra- or inter-prediction, of a block, the video encoder 200 may calculate residual data for the block. The residual data, such as a residual block, represents sample-by-sample differences between the block and a prediction block for that block formed using a corresponding prediction mode. The video encoder 200 may apply one or more transforms to the residual block to produce transform data in the transform domain rather than the sample domain. For example, the video encoder 200 may apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 may apply a secondary transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, or a Karhunen-Loeve transform (KLT), following the initial transform. The video encoder 200 produces transform coefficients following application of the one or more transforms.

[0054] As described above, following any transformation that produces transform coefficients, the video encoder 200 may perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 may reduce the bit depth associated with some or all of the transform coefficients. For example, the video encoder 200 may truncate an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 may perform a bitwise right shift of the value to be quantized.

[0055] Following quantization, the video encoder 200 may scan the transform coefficients, creating a one-dimensional vector from a two-dimensional matrix containing the quantized transform coefficients. The scan may be designed to place transform coefficients with higher energy (and therefore lower frequency) at the front of the vector and transform coefficients with lower energy (and therefore higher frequency) at the back of the vector. In some examples, the video encoder 200 may use a predefined scan order to scan the quantized transform coefficients to create a serialized vector and then entropy code the quantized transform coefficients of the vector. In other examples, the video encoder 200 may perform adaptive scanning. After scanning the quantized transform coefficients to form the one-dimensional vector, the video encoder 200 may entropy code the one-dimensional vector, for example, according to context-adaptive binary arithmetic coding (CABAC). The video encoder 200 may also entropy code values ​​for syntax elements that describe metadata associated with the encoded video data for use by the video decoder 300 in decoding the video data.

[0056] To implement CABAC, video encoder 200 may assign a context in a context model to a symbol to be transmitted. The context may relate, for example, to whether neighboring values ​​of the symbol are zeroed. A probability determination may be based on the context assigned to the symbol.

[0057] Video encoder 200 may further generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, for example, within a picture header, a block header, a slice header, or other syntax data, such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS), to video decoder 300. Video decoder 300 may similarly decode such syntax data to determine how to decode the corresponding video data.

[0058] In this manner, video encoder 200 may generate a bitstream including syntax elements that describe coded video data, e.g., partitions of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Finally, video decoder 300 may receive the bitstream and decode the coded video data.

[0059] Generally, video decoder 300 performs a reciprocal process to that performed by video encoder 200 to decode encoded video data of a bitstream. For example, video decoder 300 may decode values ​​for syntax elements of a bitstream using CABAC in a manner that is reciprocal but substantially similar to the CABAC encoding process of video encoder 200. The syntax elements may define partition information for the partition of a picture into CTUs and the partition of each CTU according to a corresponding partition structure, such as a QTBT structure, to define the CUs of the CTU. The syntax elements may further define prediction information and residual information for blocks of video data (e.g., CUs).

[0060] The residual information may be represented, for example, by quantized transform coefficients. The video decoder 300 may dequantize and inverse transform the quantized transform coefficients of the block to reconstruct a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-prediction or inter-prediction) and associated prediction information (e.g., motion information for inter-prediction) to form a predictive block for the block. The video decoder 300 can then combine the predictive block and the residual block (sample by sample) to reconstruct the original block. The video decoder 300 may also perform additional processing, such as performing a deblocking process to reduce visual artifacts along block boundaries.

[0061] This disclosure may generally refer to “signaling” some information, such as a syntax element. The term “signaling” may generally refer to the communication of a value for a syntax element and / or other data used to decode the encoded video data. That is, video encoder 200 may signal a value for a syntax element within a bitstream. Generally, signaling refers to generating a value within a bitstream. As mentioned above, source device 102 may forward the bitstream to destination device 116 in substantially real time or non-real time, which may occur, for example, when storing syntax elements in storage device 112 for later retrieval by destination device 116.

[0062] According to the techniques of this disclosure, as described in more detail below, the video encoder 200 and the video decoder 300 may be configured to determine an affine motion model using a regression-based technique. In one example, the video encoder 200 and the video decoder 300 may be configured to partition a coding block into sub-blocks, generate initial sub-block motion vectors for a plurality of sub-blocks, refine the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of sub-blocks, and perform linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model. The video encoder 200 and the video decoder 300 may then code the coding block using the affine motion model. For example, the video encoder 200 and the video decoder 300 may determine control point motion vectors from the derived affine motion model and code the coding block using the determined control point motion vectors.

[0063] Affine Mode In some examples, the affine motion model may be described as follows:

[0064]

number

[0065]

number

[0066]

number

[0067] In affine mode, video encoder 200 and video decoder 300 may be configured to derive different motion vectors for each pixel in a block according to an associated affine motion model. Thus, motion compensation can be performed on a per-pixel basis. However, to reduce implementation complexity, sub-block-based motion compensation may be performed, where the block is divided into a plurality of sub-blocks (having a smaller block size), and each sub-block is associated with one motion vector for block-based motion compensation.

[0068] Video encoder 200 and video decoder 300 may be configured to derive a motion vector for each sub-block using the representative coordinates of the sub-block. In some examples, the center position of the sub-block is used as the representative coordinate. In one example, video encoder 200 and video decoder 300 may divide the block into non-overlapping sub-blocks. The block width is blkW, the block height is blkH, the sub-block width is sbW, and the sub-block height is sbH. In this example, there are blkH / sbH rows of sub-blocks and blkW / sbW sub-blocks in each row.

[0069] In a 6-parameter affine motion model, the motion vector (referred to as sub-block MV) for the sub-block in the i-th row (0 <= i < blkW / sbW) and j-th column (0 <= j < blkH / sbH) is derived as follows:

[0070] ]

Equation

[0071] Video encoder 200 and video decoder 300 may be configured to round the sub-block MV to a predefined accuracy and store the motion vector in a motion buffer for motion compensation and motion vector prediction.

[0072] A simplified 4-parameter affine model (zoom and rotation motion) can be written as follows:

[0073]

number

[0074] Similar to the six-parameter affine model, the four-parameter affine model for a block can be described by the following two CPMVs:

[0075]

number

[0076]

number

[0077] The sub-block MV at the ith row and jth column is derived as follows:

[0078]

number

[0079] Prediction improvement for affine modes After sub-block-based affine motion compensation is performed, the video encoder 200 and the video decoder 300 may be configured to refine the prediction. Refining the prediction may include adding an offset derived based on pixel-wise motion and the gradient of the prediction. The offset ΔI at location (m,n) may be calculated as follows: ΔI(m,n)=g x (m,n)*Δv x (m,n)+g y (m,n)*Δv y (m,n), In the formula, g x (m,n) is the horizontal gradient of the predicted signal, and g y (m,n) is the vertical gradient of the predicted signal. x (m, n) and Δv y (m,n) is the difference of x and y components between the motion vector calculated at the location pixel location (m,n) and the sub-block MV. The coordinates of the top left sample of the sub-block can be (0,0). In that case, the center of the sub-block is

[0080]

number

[0081]

number

[0082] In a control point-based affine motion model, video encoder 200 and video decoder 300 may calculate affine motion parameters a, b, c, and d from the CPMV as follows:

[0083]

number

[0084] Regression-based affine mode derivation Enhanced Compression Model version 6.0 (ECM6.0) is based on Y. Zhang et al., "Regression based affine derivation," Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29, 27th We adopt the linear regression-based affine merge candidate derivation method proposed in the JVET-AA0107 Teleconference Meeting, 13-22 July 2022 (hereinafter referred to as "JVET-AA0107"). In this proposal, a linear regression process is applied to derive an affine motion model. The input to the linear regression is motion information and corresponding coordinates from a set of pre-coded sub-blocks (e.g., neighboring sub-blocks).

[0085] The goal of linear regression is to use independent variables whose values ​​are known to predict the value of a single unknown dependent variable. Each predictor value is weighted, where the weight represents its relative contribution to the overall prediction, and the predictor values ​​are summed to form the prediction. The general model for multivariate linear regression is Y=a+b1X1+b2X2+...+b n X n where Y is the dependent variable and X1,...,X n are the n independent variables. Weights a, b1,..., b n When calculating, the least squares method is applied to minimize the mean square error between the statistical observation sample and the estimated value.

[0086] The affine motion model can be equivalently expressed by two linear equations in matrix form as follows:

[0087]

number

[0088]

number

[0089] As a general example, the video encoder 200 and the video decoder 300 may be configured to receive a current block of video data coded using an affine merge mode. The video encoder 200 and the video decoder 300 may use the base motion vector field and the guided motion vector field as inputs to a multivariate linear regression process to determine an improved affine model for the current block of video data from the multivariate linear regression process. In one example, the base motion vector field may be determined from an affine model of a neighboring block coded using an affine mode. The guided motion vector field may include motion information from nearby sub-blocks (e.g., neighboring sub-blocks relative to the current block). The video encoder 200 and the video decoder 300 may use the improved affine model to determine one or more affine merge candidates for the current block and code the current block of video data using the affine merge candidates. By using the motion information from the neighboring sub-blocks to improve the affine model of the neighboring block, a more accurate affine model for the current block may be determined, thus producing more accurate affine merge candidates for the current block.

[0090] Decoder-side motion vector improvement In some exemplary video codecs, such as the Universal Video Coding (VVC) standard, the video encoder 200 and the video decoder 300 may be configured to apply bilateral-matching (BM)-based decoder-side motion vector refinement (DMVR) to improve the accuracy of the MV of a bi-predictive merge candidate. When implementing an exemplary BM method, the video encoder 200 and the video decoder 300 may be configured to calculate a sum of absolute differences (SAD) between two candidate blocks in a reference picture list L0 (e.g., a first prediction direction) and a reference picture list L1 (e.g., a second prediction direction).

[0091] As shown in FIG. 2, the video encoder 200 and the video decoder 300 may be configured to calculate the SAD between block 500 and block 502 based on each MV candidate around the initial MV. The SAD may be referred to as a distortion cost calculation or a bilateral matching cost calculation. The MV candidate with the lowest SAD becomes the corrected MV and is used to generate the bi-predicted signal. In some examples, the SAD of the initial MV is subtracted by ¼ of the SAD value to act as a regularization term. In the example of FIG. 2, the temporal distances (e.g., Picture Order Count (POC) differences) from the two reference pictures to the current picture are assumed to be the same, and therefore the motion vector difference (MVD0) of MV0 is simply the opposite sign of the motion vector difference (MVD1) of MV1.

[0092] The refinement search range is two integer luma samples from the initial MV. This search includes an integer sample offset search stage and a fractional sample refinement stage. For the integer sample offset search, a 25-point full search is applied. The SAD of the initial MV pair is calculated first. If the SAD of the initial MV pair is less than a threshold, the integer sample stage of the DMVR ends. Otherwise, the SADs of the remaining 24 points are calculated and checked in raster scan order. The point with the smallest SAD is selected as the output of the integer sample offset search stage.

[0093] The integer sample search is followed by fractional sample refinement. To reduce computational complexity, the fractional sample refinement may be derived by using a parametric error surface equation rather than an additional search using SAD comparison. In one example, the fractional sample refinement is conditionally invoked based on the output of the integer sample search stage. When the integer sample search stage ends on the center with the smallest SAD in either the first or second iteration, fractional sample refinement is further applied.

[0094] In parametric error surface based sub-pixel offset estimation, the central position cost and the costs at four adjacent positions from the center are used to fit a 2D parabolic error surface equation of the form:

[0095]

number

[0096]

number

[0097] Since all cost values ​​are positive and the minimum value is E(0,0), x min and y min The value of is automatically constrained to be between -8 and 8, which corresponds to a half-pel offset with 1 / 16-pel MV precision in VVC. The calculated fractional value (x min ,y min ) is added to the integer distance refinement MV to obtain the sub-pixel accurate refinement delta MV.

[0098] In VVC, the resolution of the motion vector (MV) is 1 / 16 luma sample. Samples at fractional positions are interpolated using an 8-tap interpolation filter. In DMVR mode, the search points surround the initial fractional pel motion vector (MV) with an offset of integer samples. Therefore, samples at those fractional positions are interpolated for the DMVR search process. To reduce computational complexity, a bilinear interpolation filter is used to generate fractional samples for the search process in DMVR. Another advantage is that by using a bilinear filter with a search range of 2 samples, the DMVR process does not access more reference samples than the normal motion compensation process. After the improved motion vector (MV) is obtained using the DMVR search process, a normal 8-tap interpolation filter is applied to generate the final prediction. To avoid accessing more reference samples than the normal motion compensation process, samples that are not required for the interpolation process based on the original motion vector but are required for the interpolation process based on the improved motion vector are padded from the available samples.

[0099] When the width and / or height of a CU is greater than 16 luma samples, the CU may be further divided into sub-blocks with width and / or height equal to 16 luma samples for the DMVR process.

[0100] In VVC, the DMVR process can be applied to CUs coded with the following modes and features: - CU level merge mode with bi-predictive MV - For a current picture, one reference picture is in the past and another is in the future. - The distances from the two reference pictures to the current picture (i.e., the POC difference) are the same - Both reference pictures are short-term reference pictures - CU has more than 64 luma samples - Both the CU height and CU width are greater than or equal to 8 luma samples - Bi-Prediction with CU-level Weight (BCW) weight index indicates equal weight - Weighted Prediction (WP) is not enabled for the current block - The Combined inter-intra prediction (CIIP) mode is not used for the current block

[0101] Decoder-side motion vector refinement for affine merge mode. J.Chen,et al, “Non-EE2:DMVR for affine merge coded blocks,”Joint Video Experts Team(JVET)of ITU-T SG 16 WP 3 and ISO / IEC JTC 1 / SC 29,27 thMeeting, by teleconference, 13-22 July 2022 (hereinafter referred to as "JVET-AA0144"), proposes decoder-side motion vector refinement (DMVR) for bidirectionally predicted affine merge candidates. In one example, the video encoder 200 and the video decoder 300 are configured to add a translational MV offset (e.g., a final offset or a CPMV offset) to all of the CPMVs of a candidate in the affine merge list if the candidate satisfies the DMVR condition. The video encoder 200 and the video decoder 300 may derive the MV offset (e.g., a final offset) by minimizing the cost of bilateral matching, which is similar to the conventional DMVR process. The difference is that affine motion compensation is performed to generate bidirectional predictors. The MV offset search process is the same as the first pass of multi-pass DMVR (prediction unit level) in enhanced compression mode (ECM). A 3x3 square search pattern is used to loop through a search range of possible candidate offsets (e.g., [-8, +8] horizontally and [-8, +8] vertically) to find the best integer MV offset. A half-pel search is then performed around the best integer position, and finally, an error surface estimation is performed to determine the MV offset with 1 / 16 accuracy.

[0102] To calculate the bidirectional matching cost (or more generally, the distortion cost) for a given bidirectional affine motion, the following process may be applied: 1) To update the CPMV, the candidate offset is added to each of the CPMVs in both directions. 2) Affine motion compensation is applied according to the updated CPMV to generate bidirectional predictors. 3) Calculate the distortion between the generated predictors using a predefined cost criterion.

[0103] The candidate offset with the lowest bilateral matching cost is selected as the final offset to be added to CPMV. Typically, affine motion compensation is sub-block based, where the current block is partitioned into non-overlapping sub-blocks. Regular motion compensation is performed for each sub-block, and all samples in a sub-block share the same motion. In VVC, prediction refinement with optical flow (PROF) can be applied after sub-block-based motion compensation to further improve the predictor.

[0104] Co-pending U.S. patent application Ser. No. 18 / 351,342, filed July 12, 2023 (hereinafter the '342 application), describes a lower complexity and more practical DMVR design for affine motion models. The DMVR design can be summarized as follows: 1) Divide the current block into sub-blocks. 2) Generate initial motion vectors (in both prediction directions) for each sub-block (sub-block motion field) according to an initial affine motion model. 3) Loop over each subblock and calculate the subblock bilateral matching cost for all possible offsets. 4) For each possible offset, the sub-block bilateral matching costs are accumulated to generate a bilateral matching cost corresponding to the whole block. 5) Determine the best offset by selecting the offset with the smallest bilateral matching cost that corresponds to the entire block.

[0105] Note that in this way, the sub-block motion field is generated only once for each candidate offset.

[0106] The sub-block size in the above process may be the same as that used for affine motion compensation, typically 4 × 4. The sub-blocks may also be of different sizes. In some examples, the sub-block size may be larger (e.g., 8 × 8, 16 × 16), i.e., fewer sub-blocks, to reduce the complexity of the DMVR process.

[0107] In step 3) above, given the offset and the initial motion vector (generated in step 2), candidate motion vectors can be derived (in the case of mirrored bilateral matching, the offset is added to the motion vector in one direction and subtracted from the motion vector in the other direction), and then motion compensation is performed to generate a predictor for the corresponding sub-block. Prediction refinement may be skipped for simplicity. Note that pre-interpolation may also be applied to generate predictors for all possible offsets in one step, which significantly reduces complexity. Bilinear interpolation can be used instead of the 8-tap (6-tap or 12-tap) interpolation filter typically used for final motion compensation.

[0108] To generate sub-pixel offsets, a parametric error surface based sub-pixel offset estimation can also be applied after step 5).

[0109] Certain size constraints may be applied, for example, DMVR may only be applied to affine blocks larger than N×N, where N is set equal to 8, 16, 32, etc. In another example, the size constraint depends on the sub-block size used in the DMVR process, where N is set equal to the sub-block size.

[0110] High-level syntax may be used to control whether DMVR for affine blocks is applied and signaled in the bitstream, for example, in a sequence parameter set, picture header, slice header, etc.

[0111] Co-pending U.S. Provisional Patent Application No. 63,377,659, filed September 29, 2022, discloses sub-block skipping or sub-sampling to further reduce complexity, where a subset of sub-blocks can be used during the affine DMVR process.

[0112] For example, video encoder 200 and video decoder 300 may receive a current block of video data to be decoded using affine DMVR mode. Video encoder 200 and video decoder 300 may divide the current block into multiple sub-blocks. In one example, to divide the block into multiple sub-blocks, video encoder 200 and video decoder 300 may subsample the multiple sub-blocks to determine a first subset of the multiple sub-blocks on which to perform the affine DMVR process.

[0113] In one example, the first subset of the plurality of subblocks is half of the plurality of subblocks. For example, the first subset of the plurality of subblocks may include every other row of the plurality of subblocks in the block, or every other column of the subblocks in the block. In another example, the first subset of the plurality of subblocks is a checkerboard (or quincunx) pattern in the block. In another example, the first subset of the plurality of subblocks is a quarter of the subblocks of the block, such as including subblocks in every other column and every other row of the subblocks in the block.

[0114] Video encoder 200 and video decoder 300 may determine a final offset for the affine DMVR mode using a first subset of the plurality of sub-blocks. For example, video encoder 200 and video decoder 300 may determine a final offset for the affine DMVR mode using only the first plurality of sub-blocks and may skip bilateral matching cost calculations for a second subset of the plurality of sub-blocks that is different from the first subset of the plurality of sub-blocks.

[0115] To determine the final offset, video encoder 200 and video decoder 300 may determine a respective initial motion vector (for both the first prediction direction and the second prediction direction) for each non-skip sub-block (e.g., for the first subset of sub-blocks) according to an initial affine motion model. Video encoder 200 and video decoder 300 may determine the initial affine motion model from candidate affine motion models (e.g., candidate CPMVs or motion vectors) in the affine candidate merge list.

[0116] Video encoder 200 and video decoder 300 may generate multiple candidate motion vectors for each of the sub-blocks of the first plurality of sub-blocks. Generating the multiple candidate motion vectors may add each respective candidate offset of the multiple candidate offsets to a respective initial motion vector. For example, as described above, the candidate offsets may be in a search range of [-8, +8] horizontally and [-8, +8] vertically. In other examples, other searches may be used.

[0117] The video encoder 200 and the video decoder 300 may loop over each non-skip sub-block (e.g., the first subset of sub-blocks) and perform an affine motion compensation process to generate a predictor for each prediction direction. Based on these predictors, the video encoder 200 and the video decoder 300 may calculate sub-block bilateral matching costs for all possible candidate offsets. For example, the video encoder 200 and the video decoder 300 may calculate a respective bilateral matching cost for each sub-block of the first plurality of sub-blocks for each of a plurality of candidate motion vectors.

[0118] For each possible offset, video encoder 200 and video decoder 300 may accumulate the respective sub-block bilateral matching costs to generate a bilateral matching cost corresponding to all non-skipped sub-blocks (e.g., a first subset of sub-blocks). For example, video encoder 200 and video decoder 300 may accumulate the respective bilateral matching costs for all sub-blocks of the first plurality of sub-blocks for each of a plurality of candidate motion vectors to generate a respective accumulated bilateral matching cost.

[0119] Video encoder 200 and video decoder 300 may then determine the best offset by selecting the candidate offset with the smallest accumulated bilateral matching cost corresponding to the entire block. For example, video encoder 200 and video decoder 300 may determine the final offset to be the respective candidate offset associated with the lowest respective accumulated bilateral matching cost.

[0120] Video encoder 200 and video decoder 300 may code (e.g., encode or decode, respectively) a block of video data using the final offset to generate a coded block of video data. In one example, to code a block of video data using the final offset, video encoder 200 and video decoder 300 may determine a control point motion vector for the block of video data, add the final offset to the control point motion vector to create a refined control point motion vector, and code the block of video data using the refined control point motion vector. [Example]

[0121] This disclosure describes techniques for regression-based decoder-side affine motion derivation. An example method of this disclosure, as shown in FIG. 3, can be summarized as follows: A coding block is partitioned into sub-blocks, and the corresponding initial sub-block MVs are typically generated from the initial motion information of the coding block. In one example, the initial motion information can be an initial affine motion model from candidates in an affine merge list. In this example, the initial affine motion model can be represented by a set of control point motion vectors (e.g., two or three CPMVs). · A decoder-side motion vector refinement (DMVR) technique, such as bilateral matching, is performed on each of the sub-blocks to generate a set of refined MVs. The refined MVs and the corresponding coordinates of their sub-blocks are used as input for a linear regression process. The output of the linear regression is the derived affine motion model.

[0122] Depending on the application, the output affine model may be

[0123]

number

[0124] 3, video encoder 200 and video decoder 300 may be configured to partition coding block 508 into multiple sub-blocks. In some examples, video encoder 200 and video decoder 300 may be configured to determine the size of the sub-blocks. That is, the size of the sub-blocks may vary per slice, picture, sequence, etc. In other examples, video encoder 200 and video decoder 300 may be configured to partition coding block 508 into fixed sub-blocks (e.g., 4x4 sub-blocks).

[0125] Video encoder 200 and video decoder 300 may then generate initial sub-block motion vectors 510 for each of the sub-blocks. In one example, the initial sub-block motion vectors 510 may be based on control point motion vectors that represent an input affine motion model. For example, video encoder 200 and video decoder 300 may determine the control point motion vectors from candidates in an affine merge list. In this example, based on the coordinates of the sub-blocks, each of the sub-blocks may have a different initial sub-block motion vector. In another example, if the initial sub-block motion vectors are based on bi-predictive motion (e.g., bi-predictive motion of neighboring blocks), each of the initial sub-block motion vectors 510 may be the same.

[0126] In some examples of this disclosure, video encoder 200 and video decoder 300 may generate initial sub-block motion vectors 510 for all of the sub-blocks of coding block 508 and then refine those motion vectors. In other examples, video encoder 200 and video decoder 300 may generate initial sub-block motion vectors 510 for a subset of the sub-blocks of coding block 508 and then refine those motion vectors. For example, video encoder 200 and video decoder 300 may use half, quarter, or any other subset of the sub-blocks in any pattern to implement the techniques of this disclosure.

[0127] Video encoder 200 and video decoder 300 may then refine initial sub-block motion vectors 510 for multiple sub-blocks using bilateral matching unit 520 to produce refined sub-block motion vectors 522. More generally, video encoder 200 and video decoder 300 may use DMVR techniques to produce refined motion vectors. In this example, video encoder 200 and video decoder 300 may independently refine each of initial sub-block motion vectors 510 using decoder-side motion vector refinement (e.g., bilateral matching). For example, bilateral matching unit 520 may determine a bilateral matching cost for each of multiple candidate offsets for each of the sub-blocks independently (e.g., regardless of the costs determined for other sub-blocks). The candidate offset that results in the lowest bilateral matching cost for a particular subset is selected as the offset to use to generate a refined sub-block motion vector for that sub-block.

[0128] Therefore, because each of the initial sub-block motion vectors 510 is refined separately, the resulting refined sub-block motion vectors may not have a linear correlation with one another and therefore do not necessarily fit an affine model. A linear regression unit 530 may perform a linear regression process on the refined sub-block motion vectors 522 to produce an affine motion model 532. The linear regression process performed by the linear regression unit 530 is described in more detail below. This linear regression is sometimes referred to as multivariate linear regression or surface fitting. As explained above, the output of the linear regression unit 530 is used to refine the affine parameters (e.g.,

[0129]

number

[0130] In some examples, video encoder 200 and video decoder 300 may not necessarily use affine motion model 532 to code coding block 508. Instead, the control point motion vector determined from affine motion model 532 may be one possible set of motion information from among two or more sets of motion information that video encoder 200 and video decoder 300 may choose from when determining how to code the coding block.

[0131] Figure 4 is a conceptual diagram illustrating another example of regression-based decoder-side affine mode derivation according to this example. The bottom track of Figure 4 is the same as the track shown in Figure 3. That is, video encoder 200 and video decoder 300 are configured to refine initial sub-block motion vectors 510 and perform a linear regression process on refined sub-block motion vectors 522 to produce affine motion model 532. Substantially parallel to this process, video encoder 200 and video decoder 300 may perform a different DMVR process on initial sub-block motion vectors 510 using bilateral matching unit 550. Rather than refining each of the initial sub-block motion vectors independently (e.g., sub-block by sub-block), bilateral matching unit 550 determines, from multiple candidate motion vector offsets, a motion vector offset that achieves the lowest bilateral matching (BM) cost (e.g., the BM cost accumulated for all sub-blocks) for all sub-blocks in coding block 508.

[0132] For example, the bilateral matching unit 550 may implement the DMVR process described above, which may be summarized as follows: - Divide the coding block 508 into sub-blocks. - Generate an initial sub-block motion vector 510 for each sub-block according to an initial affine motion model. - Loop over each sub-block and calculate the sub-block bilateral matching cost for all possible motion vector offsets. - For each possible motion vector offset, the sub-block bilateral matching costs are accumulated to generate a bilateral matching cost corresponding to the whole block. - Determine the best motion vector offset by selecting the offset with the smallest bilateral matching cost that corresponds to the entire block.

[0133] The outputs of the bilateral matching unit 550 are a motion vector offset and a BM cost 552. The video encoder 200 and the video decoder 300 may then use the cost calculation unit 540 to determine a bilateral matching cost (e.g., a regression cost 542) for the control point motion vector derived from the affine motion model 532. The cost comparison unit 560 may then determine whether the BM cost 552 or the regression cost 542 is lowest. If the regression cost 542 is lowest, the video encoder 200 and the video decoder 300 code the coding block 508 using the control point motion vector derived from the regression process (e.g., the affine motion model 532). If the BM cost 552 is lowest, the video encoder 200 and the video decoder 300 code the coding block 508 using the motion vector offset derived from the bilateral matching unit 550. The motion vector offset is added to the input motion information (e.g., the input control point motion vector) to derive an improved control point motion vector. Video encoder 200 and video decoder 300 then use the refined control point motion vectors to code coding block 508. By using both regression-based refinement and DMVR simultaneously, more options for refined control point motion vectors are generated, thus increasing the potential for improved coding efficiency and / or reduced distortion.

[0134] Application to Affine Merge Candidates - Example 1 In the following we describe the application of decoder-side motion refinement for bi-predictive affine merge candidates. The inputs to this process are: - a luma location (xCb, yCb) that specifies the top-left sample of the current luma coding block relative to the top-left luma sample of the current picture; - two variables cbWidth and cbHeight that specify the width and height of the current luma coding block, - luma affine control point motion vectors cpMvLX[cpIdx], where cpIdx=0..numCpMv-1 and X is 0 or 1; - The number of control point motion vectors, numCpMv.

[0135] The output of this process is the refined luma affine control point motion vector refinedCpMvLX[cpIdx], where cpIdx=0..numCpMv-1, and X is 0 or 1. 1) Determine the sub-block width sbWidth and sub-block height sbHeight. Note that in some examples, the sub-block size may be fixed. 2) Determine a step size stepX in the x direction and a step size stepY in the y direction. Note that in some examples, the use and determination of step sizes may be skipped. Additionally, in some examples, sub-blocks may be sub-sampled. For example, if the sub-block width is X (e.g., 4 samples wide), but stepX is 8, meaning the first left x coordinate of the sub-block is 0, then the sub-block coordinate at x coordinate 4 is skipped, the left x coordinate of the second sub-block is 8, etc. 3) Determine a list of sub-blocks, where luma location (xSb[sbIdx], ySb[sbIdx]) specifies the top-left sample of the sub-block relative to the top-left luma sample of the current picture, sbIdx=0...numSubBlk-1, and numSubBlk specifies the number of sub-blocks. 4) Determine the sub-block motion vector sbMvLX[sbIdx], where sbIdx=0...numSubBlk-1, and X is 0 or 1. The sub-block motion vector is based on the luma affine control point motion vector cpMvLX[cpIdx]. 5) For sbIdx=0...numSubBlk-1, the following applies: a. Derive the bilateral matching cost array of sub-block bmCost[sbIdx][dX+srchRng][dY+srchRng] with dX=-srchRng..srchRng and dY=-srchRng..srchRng, where srchRng represents the search range. b. Determine integer delta motion vector dSbMv[sbIdx] = (dXBest, dYBest) such that bmCost[sbIdx][dXBest+srchRng][dYBest+srchRng] corresponds to the minimum value in the 2D array bmCost[sbIdx]. The refined sub-block motion vector is refinedSbMvLX[sbIdx], for X being 0 or 1. refinedSbMvL0[sbIdx] = sbMvL0[sbIdx] + dSbMv[sbIdx], refinedSbMvL1[sbIdx] = sbMvL1[sbIdx] - dSbMv[sbIdx]. c. Determine the sub-pel delta motion vector dSbMvSubPel[sbIdx] for the sub-block: refinedSbMvL0[sbIdx]=refinedSbMvL0[sbIdx]+dSbMvSubPel[sbIdx], refinedSbMvL1[sbIdx]=refinedSbMvL1[sbIdx]-dSbMvSubPel[sbIdx]. A sub-pel bilateral matching search (using bmCost[sbIdx] as input) or an error surface-based derivation can be used in the process. 6) Derive the bilateral matching cost array for coding block bmCostTotal[dX+2][dY+2] with dX=-srchRng..srchRng and dY=-srchRng..srchRng by summing bmCost over sbIdx=0...numSubBlk-1. 7) Determine the integer delta motion vector dMv=(dMvXIntBest,dMvYIntBest) such that minCost=bmCostTotal[dMvXIntBest+srchRng][dMvYIntBest+srchRng] corresponds to the minimum value in the 2D array bmCostTotal. refinedCpMvL0[cpIdx] is set equal to cpMvL0[cpIdx]+dMv, and refinedCpMvL1[cpIdx] is set equal to cpMvL1[cpIdx]-dMv, where cpIdx=0..numCpMv-1. 8) Determine the sub-pel delta motion vector dMvSubPel for the coding block. A sub-pel bilateral matching search (using bmCostTotal as input) or an error surface-based derivation can be used in the process. If a sub-pel bilateral matching search is applied, minCost can be updated accordingly. 9) refinedCpMvL0[cpIdx] is set equal to refinedCpMvL0[cpIdx]+dMvSubPel, refinedCpMvL1[cpIdx] is set equal to refinedCpMvL1[cpIdx]-dMvSubPel, where cpIdx=0..numCpMv-1. 10) The linear regression process is called with inputs (xCb, yCb), cbWidth, cbHeight, refinedSbMvLX[sbIdx], and (xSb[sbIdx]+sbWidth / 2, ySb[sbIdx]+sbHeight / 2). The output is the derived control point motion vector cpMvRegressionLX[cpIdx], where cpIdx=0..numCpMv-1. 11) Derive the bilateral matching cost bmCostRegression corresponding to cpMvRegressionLX[cpIdx], where cpIdx=0..numCpMv-1. If bmCostRegression is less than minCost, refinedCpMvLX[cpIdx] is set equal to cpMvRegressionLX[cpIdx], where cpIdx=0..numCpMv-1.

[0136] In some examples, step 5).c may not be applied. In another example, step 8) may not be applied. In yet another example, an early skip process may be applied after step 7), which stops when minCost is less than a predefined threshold (e.g., the area of ​​the coding block).

[0137] Different cost criteria may be applied, for example, sum of absolute differences, Hadamard transform sum of absolute differences, or other cost criteria. Some cost regularization term that depends on the delta motion vector may also be added to the cost. In one example, the regularization term is s * (abs(dMvX)+abs(dmvY)), where s is the scaling factor and (dMvX, dMvY) is the delta motion vector.

[0138] In another example, the cost is adjusted or scaled depending on the delta motion vector, with the larger the magnitude of the delta motion vector, the larger the scaling factor. For example, as follows: If dMvX and dMvY are both equal to 0, then bmCostTotal[dX+2][dY+2] is set equal to bmCostTotal[dX+2][dY+2]-(bmCostTotal[dX+2][dY+2]>>2). Otherwise, if abs(dMvX)+abs(dmvY)>=4 and abs(dMvX)+abs(dmvY)<7, then bmCostTotal[dX+2][dY+2] is set equal to bmCostTotal[dX+2][dY+2]+(bmCostTotal[dX+2][dY+2]>>2).

[0139] Also, different cost criteria may be applied to different steps.

[0140] Application to Affine Merge Candidates - Example 2 The following describes another exemplary method for determining an affine motion mode that does not require linear regression. In this example, refined sub-block motion vectors from corner sub-blocks (e.g., three corners) of a block are used to determine an affine motion model. For example, refined MVs of numCpMv corner sub-blocks (typically locations (xCb, yCb), (xCb+cbWidth-sbWidth, yCb), and (xCb, yCb+cbHeight-sbHeight)) are used as derived control point motion vectors.

[0141] The inputs to this process are: - a luma location (xCb, yCb) that specifies the top-left sample of the current luma coding block relative to the top-left luma sample of the current picture; - two variables cbWidth and cbHeight that specify the width and height of the current luma coding block, - luma affine control point motion vectors cpMvLX[cpIdx], where cpIdx=0..numCpMv-1 and X is 0 or 1; - The number of control point motion vectors, numCpMv. The output of this process is the refined luma affine control point motion vector refinedCpMvLX[cpIdx], where cpIdx=0..numCpMv-1, and X is 0 or 1.

[0142] The width of the sub-block, sbWidth, and the height of the sub-block, sbHeight, are determined.

[0143] The step size in the x direction, stepX, and the step size in the y direction, stepY, are determined.

[0144] Determine a list of sub-blocks, where luma location (xSb[sbIdx], ySb[sbIdx]) specifies the top-left sample of the sub-block relative to the top-left luma sample of the current picture, sbIdx=0...numSubBlk-1, and numSubBlk specifies the number of sub-blocks.

[0145] Determine the sub-block motion vector sbMvLX[sbIdx], where sbIdx=0...numSubBlk-1, and X is 0 or 1.

[0146] For sbIdx=0...numSubBlk-1, the following applies: a. Derive the bilateral matching cost array of sub-block bmCost[sbIdx][dX+srchRng][dY+srchRng] with dX=-srchRng..srchRng and dY=-srchRng..srchRng, where srchRng represents the search range. b. Determine integer delta motion vector dSbMv[sbIdx] = (dXBest, dYBest) such that bmCost[sbIdx][dXBest+srchRng][dYBest+srchRng] corresponds to the minimum value in the 2D array bmCost[sbIdx]. The refined sub-block motion vector is refinedSbMvLX[sbIdx], for X being 0 or 1. refinedSbMvL0[sbIdx] = sbMvL0[sbIdx] + dSbMv[sbIdx], refinedSbMvL1[sbIdx] = sbMvL1[sbIdx] - dSbMv[sbIdx]. c. Determine the sub-pel delta motion vector dSbMvSubPel[sbIdx] for the sub-block: refinedSbMvL0[sbIdx]=refinedSbMvL0[sbIdx]+dSbMvSubPel[sbIdx], refinedSbMvL1[sbIdx]=refinedSbMvL1[sbIdx]-dSbMvSubPel[sbIdx]. A sub-pel bilateral matching search (using bmCost[sbIdx] as input) or an error surface-based derivation can be used in the process.

[0147] Derive the bilateral matching cost array for coding block bmCostTotal[dX+2][dY+2] with dX=-srchRng..srchRng and dY=-srchRng..srchRng by summing bmCost over sbIdx=0...numSubBlk-1.

[0148] Determine the integer delta motion vector dMv=(dMvXIntBest,dMvYIntBest) such that minCost=bmCostTotal[dMvXIntBest+srchRng][dMvYIntBest+srchRng] corresponds to the minimum value in the 2D array bmCostTotal. refinedCpMvL0[cpIdx] is set equal to cpMvL0[cpIdx]+dMv, and refinedCpMvL1[cpIdx] is set equal to cpMvL1[cpIdx]-dMv, where cpIdx=0..numCpMv-1.

[0149] Determine the sub-pel delta motion vector dMvSubPel for the coding block. A sub-pel bilateral matching search (using bmCostTotal as input) or an error surface-based derivation can be used in the process. If a sub-pel bilateral matching search is applied, minCost can be updated accordingly.

[0150] refinedCpMvL0[cpIdx] is set equal to refinedCpMvL0[cpIdx]+dMvSubPel, refinedCpMvL1[cpIdx] is set equal to refinedCpMvL1[cpIdx]-dMvSubPel, where cpIdx=0..numCpMv-1.

[0151] Select the refined MVs of the numCpMv corner sub-blocks (typically at locations (xCb, yCb), (xCb+cbWidth-sbWidth, yCb) and (xCb, yCb+cbHeight-sbHeight)) as the derived control point motion vectors cpMvCornerLX[cpIdx], where cpIdx=0..numCpMv-1.

[0152] Derive the bilateral matching cost bmCostDerived corresponding to cpMvCornerLX[cpIdx], where cpIdx=0..numCpMv-1. If bmCostDerived is less than minCost, then refinedCpMvLX[cpIdx] is set equal to cpMvCornerLX[cpIdx], where cpIdx=0..numCpMv-1.

[0153] Linear regression Below, we describe an example of linear regression for deriving an updated affine motion model (and improved control point motion vectors generated from the updated affine motion model) using the initial affine motion model and the improved sub-block motion vectors, as described above, although it should be noted that other linear regression methods may be applied as well.

[0154] Multivariate linear regression, also known as multiple regression, is a statistical technique that can be used to analyze the relationship between a single dependent variable and several independent variables. The goal of multiple regression analysis is to use independent variables, whose values ​​are known, to predict the value of a single unknown dependent variable. Each predictor value is weighted, where the weight represents its relative contribution to the overall prediction, and the predictor values ​​are summed to form the prediction. The general model for multivariate linear regression is given by Equation (1): Y=a+b1X1+b2X2+...+b n X n (1)

[0155] In equation (1), Y is the dependent variable, and X1,...,X nare the n independent variables. In one example, the weights a, b1,..., b n Least squares methods can be used to calculate , which minimizes the mean square error between the statistical observation sample and the estimate.

[0156] In VVC, the motion vector of each sub-block is derived based on a linear model. To better represent zoom-in / out, rotation, perspective motion, and other irregular motion, block-based affine transformation motion compensation prediction is applied. The motion vector at the sample location (x, y) of the sub-block center is derived as follows:

[0157]

number

[0158]

number

[0159]

number

[0160] Using the above equations, the derivation process of an affine motion model can essentially be viewed as the derivation process of certain coefficients in a linear equation, the estimation of which can be solved by a multivariate linear regression process.

[0161] To apply the multivariate linear regression process to derive the affine model, the video coder may obtain motion vector information and the corresponding sub-block coordinates of the motion vector information. The coordinates are independent variables, while the motion vector components are dependent variables. Given N motion vectors and the corresponding sub-block center coordinates of the motion vectors, the affine model parameters may be derived using the following equation:

[0162]

number

[0163]

number

[0164] matrix B c,d and for the construction of A, the following formula is used:

[0165]

number

[0166] Using this method, a more optimal affine model can be derived to better describe the input motion vectors in terms of the corresponding coordinates of the input motion vectors in the minimum mean square error sense.

[0167] To elaborate, an example is now provided to show how a video coder may determine an output linear model from an input motion vector field. In this example, the video coder obtains motion information from a particular motion vector field, and N motion vectors are determined as {(mv x0 ,mv y0 ),(mv x1 ,mv y1 ),...,(mv xN-1 ,mv yN-1 )}, and the corresponding center coordinates are {(x0, y0), (x1, y1),..., (x N-1 ,y N-1 )}.

[0168] In a first step, the video coder may determine an anchor coordinate that serves as the origin of the output linear model, instead of using (0,0), which is the top-left coordinate of the entire picture, to avoid large values ​​in the calculations. This is also done to make it easier to derive affine merge candidates after the linear model parameters are derived from the linear regression process. Typically, the video coder may be configured to use the top-left coordinate of the current CU as the origin. The origin may be defined as (x tl ,y tl ), then each of the sub-block center coordinates (x tl ,y tl ) to calculate the relative coordinates. By doing this, the video coder can calculate the relative coordinates by subtracting {(x0-x tl ,y0-y tl ),(x1-x tl ,y1-y tl ),...,(x N-1 -x tl ,y N-1 -y tl )}, given the following: x i '=x i -x tl y i '=y i -y tl, For i∈{0,1,...,N-1}, the video coder calculates {(x0',y0'),(x1',y1'),...,(x N-1 ',y N-1 ')}.

[0169] For motion vectors, the video coder may also select an initial motion vector to subtract to avoid large values ​​in the calculation, but this is not essential since motion vector values ​​are relatively small compared to coordinate values. Also, motion vectors can have negative values, and subtracting a negative value from a positive value will only result in an even larger positive value.

[0170] The output linear model parameters can be estimated using the mean square error (MSE) minimization method for the N available neighboring MVs, where MSE is the function of the estimated MVs {(mv x0 ',mv y0 '),(mv x1 ',mv y1 '),...,(mv xN-1 ',mv yN-1 ')} and input MV{(mv x0 ,mv y0 ),(mv x1 ,mv y1 ),...,(mv xN-1 ,mv yN-1 )} is calculated as the average of the squared differences between the actual value of

[0171]

number

[0172] Mathematically, the solution to the MSE minimization is given by equation (4).

[0173] As an example, parameter b x,0 To derive the matrix A, i,j∈{0,1,2}, A i,j=suml'l' i,j where l'0 is the x' of each sub-block, l'1 is the y' of each sub-block, and l'2=1 for all sub-blocks. The matrix A element at position (0,0) is

[0174]

number

[0175] For matrix B, b x,0 When deriving the matrix B x,0 can also be derived from equation (9).

[0176]

number

[0177]

number

[0178]

number

[0179]

number

[0180]

number

[0181]

number

[0182] Matrices A and B x,0 Using equation (5), the coefficient

[0183]

number

[0184] Applying a similar procedure to the other coefficients, all linear model parameters

[0185]

number

[0186] With the estimated parameters, the affine merge candidate for the current CU has the top-left, top-right, and bottom-left CPMVs equal to (mv tl ,mv tl ), (mv tr ,mv tr ), (mv bl ,mv bl ) and can be derived using equation (2): (mvtl,mvtl)=(b x2 ,b y2 ) (mvtr,mvtr)=(b x0 W+b x2 ,b y0 W+b y2 ) (mvbl,mvbl)=(b x1 H+b x2 ,b y1 H+b y2 ) where W and H are the width and height of the current CU. The variables x and y in equation (2) are replaced by the relative distance from the top-left position of the current CU to the position of the corresponding CPMV.

[0187] 5 is a block diagram illustrating an example video encoder 200 that may implement the techniques of this disclosure. Figure 5 is provided for purposes of explanation and should not be considered limiting of the techniques broadly illustrated and described in this disclosure. For purposes of explanation, this disclosure describes a video decoder 200 in accordance with VVC and HEVC techniques. However, the techniques of this disclosure may be implemented by video encoding devices configured for other video coding standards and video coding formats, such as AV1 and successors to the AV1 video coding format.

[0188] 5, video encoder 200 includes video data memory 230, mode select unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, decoded picture buffer (DPB) 218, and entropy coding unit 220. Any or all of video data memory 230, mode select unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, DPB 218, and entropy coding unit 220 may be implemented in one or more processors or processing circuits. For example, the units of video encoder 200 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Moreover, video encoder 200 may include additional or alternative processors or processing circuitry that perform these and other functions.

[0189] Video data memory 230 may store video data to be encoded by components of video encoder 200. Video encoder 200 may receive video data stored in video data memory 230, for example, from video source 104 (FIG. 1). DPB 218 may function as a reference picture memory that stores reference video data for use in predicting subsequent video data by video encoder 200. Video data memory 230 and DPB 218 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous dynamic random access memory (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. Video data memory 230 and DPB 218 may be provided by the same memory device or separate memory devices. In various examples, video data memory 230 may be on-chip with other components of video encoder 200, as shown, or may be off-chip relative to those components.

[0190] In this disclosure, references to video data memory 230 should not be construed as limited to memory internal to video encoder 200 unless specifically stated so, or to memory external to video encoder 200 unless specifically stated so. Rather, references to video data memory 230 should be understood as a reference memory that stores video data that video encoder 200 receives for encoding (e.g., video data for a current block to be encoded). Memory 106 of FIG. 1 may also provide temporary storage of outputs from various units of video encoder 200.

[0191] The various units in FIG. 5 are shown to aid in understanding the operations performed by video encoder 200. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. A fixed-function circuit refers to a circuit that provides a specific function, and the operations that may be performed are predefined. A programmable circuit refers to a circuit that may be programmed to perform various tasks, and provides flexibility in the operations that may be performed. For example, a programmable circuit may execute software or firmware that causes the programmable circuit to operate in a manner defined by the software or firmware instructions. A fixed-function circuit may execute software instructions (e.g., receive parameters or output parameters), but the types of operations that the fixed-function circuit performs are generally invariant. In some examples, one or more of the units may be different circuit blocks (fixed function or programmable), and in some examples, one or more of the units may be an integrated circuit.

[0192] Video encoder 200 may include arithmetic logic units (ALUs), elementary function units (EFUs), digital circuits, analog circuits, and / or a programmable core formed from programmable circuits. In examples in which the operations of video encoder 200 are implemented using software executed by programmable circuits, memory 106 (FIG. 1) may store software instructions (e.g., object code) that video encoder 200 receives and executes, or a separate memory (not shown) within video encoder 200 may store such instructions.

[0193] The video data memory 230 is configured to store the received video data. The video encoder 200 may retrieve pictures of the video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be raw video data to be encoded.

[0194] The mode select unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode select unit 202 may include additional functional units that perform video prediction according to other prediction modes. By way of example, the mode select unit 202 may include a palette unit, an intra block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0195] The mode selection unit 202 generally coordinates multiple coding passes to test combinations of coding parameters and the resulting rate-distortion values ​​for such combinations. The coding parameters may include partitioning of CTUs into CUs, prediction modes for CUs, transform types for residual data of CUs, quantization parameters for residual data of CUs, etc. The mode selection unit 202 may ultimately select a combination of coding parameters that has a better rate-distortion value than the other tested combinations.

[0196] Video encoder 200 may partition a picture retrieved from video data memory 230 into a series of CTUs and encapsulate one or more CTUs within a slice. Mode select unit 202 may partition the CTUs of a picture according to a tree structure, such as the MTT structure, QTBT structure, superblock structure, or quadtree structure described above. As described above, video encoder 200 may form one or more CUs from partitioning the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks."

[0197] In general, the mode select unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for a current block (e.g., the current CU, or in HEVC, the overlapping portion of the PU and TU). In the case of inter prediction of the current block, the motion estimation unit 222 may perform a motion search to identify one or more closely matching reference blocks among one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 may calculate a value representing how similar a potential reference block is to the current block according to, for example, the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), etc. The motion estimation unit 222 may generally perform these calculations using the sample-by-sample difference between the current block and the reference block under consideration. Motion estimation unit 222 may identify the reference block with the lowest value resulting from these calculations, indicating the reference block that most closely matches the current block.

[0198] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to the position of a current block in the current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, in the case of unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, while in the case of bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then generate a predictive block using the motion vectors. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference blocks. As another example, if the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate values ​​for the predictive block according to one or more interpolation filters. Moreover, in the case of bidirectional inter prediction, the motion compensation unit 224 may retrieve data for the two reference blocks identified by the respective motion vectors and combine the retrieved data, for example, through sample-wise averaging or weighted averaging.

[0199] When operating according to the AV1 video coding format, the motion estimation unit 222 and the motion compensation unit 224 may be configured to encode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using translational motion compensation, affine motion compensation, overlapped block motion compensation (OBMC), and / or synthetic inter-intra prediction.

[0200] According to the techniques of this disclosure, as described above, the motion estimation unit 222 may be configured to determine an affine motion model using a regression-based technique. In one example, the video decoder 200 may be configured to partition a coding block. The motion estimation unit 222 may generate initial sub-block motion vectors for multiple sub-blocks and refine the initial sub-block motion vectors for the multiple sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the multiple sub-blocks. The motion estimation unit 222 may perform linear regression on the refined sub-block motion vectors and coordinates of the multiple sub-blocks to derive an affine motion model. The motion compensation unit 224 may then generate a coding block using the affine motion model. For example, the motion compensation unit 224 may determine control point motion vectors from the derived affine motion model and encode the coding block using the determined control point motion vectors.

[0201] As another example, in the case of intra prediction or intra predictive coding, intra prediction unit 226 may generate a predictive block from samples neighboring the current block. For example, in the case of a directional mode, intra prediction unit 226 may generally mathematically combine values ​​of neighboring samples and populate these calculated values ​​in a defined direction across the current block to create the predictive block. As another example, in the case of a DC mode, intra prediction unit 226 may calculate an average of neighboring samples for the current block and generate a predictive block to include this resulting average for each sample of the predictive block.

[0202] When operating according to the AV1 video coding format, intra prediction unit 226 may be configured to encode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, chroma-from-luma (CFL) prediction, intra block copy (IBC), and / or color palette mode. Mode select unit 202 may include additional functional units that perform video prediction according to other prediction modes.

[0203] The mode select unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives a raw, uncoded version of the current block from the video data memory 230 and the prediction block from the mode select unit 202. The residual generation unit 204 calculates sample-by-sample differences between the current block and the prediction block. The resulting sample-by-sample differences define a residual block for the current block. In some examples, the residual generation unit 204 may also determine differences between sample values ​​in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0204] In examples in which mode select unit 202 partitions CUs into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. Video encoder 200 and video decoder 300 may support PUs having various sizes. As mentioned above, the size of a CU may refer to the size of the luma coding block of the CU, and the size of a PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2N×2N, video encoder 200 may support a PU size of 2N×2N or N×N for intra prediction, and a symmetric PU size of 2N×2N, 2N×N, N×2N, N×N, or similar for inter prediction. Video encoder 200 and video decoder 300 may also support asymmetric partitioning of PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter prediction.

[0205] In examples where mode select unit 202 does not further partition CUs into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As described above, the size of a CU may refer to the size of the luma coding block of the CU. Video encoder 200 and video decoder 300 may support CU sizes of 2N×2N, 2N×N, or N×2N.

[0206] For other video coding techniques, such as intra block copy mode coding, affine mode coding, and linear model (LM) mode coding, as some examples, mode select unit 202 generates a predictive block for the current block being coded via a respective unit associated with the coding technique. In some examples, such as palette mode coding, mode select unit 202 may not generate a predictive block, but instead may generate syntax elements that indicate how to reconstruct the block based on a selected palette. In such modes, mode select unit 202 may provide these syntax elements to entropy coding unit 220 to be coded.

[0207] As described above, the residual generation unit 204 receives video data for a current block and a corresponding predictive block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates sample-by-sample differences between the predictive block and the current block.

[0208] Transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). Transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, transform processing unit 206 may perform multiple transforms on the residual block, e.g., a linear transform and a secondary transform such as a rotational transform. In some examples, transform processing unit 206 does not apply a transform to the residual block.

[0209] When operating according to AV1, transform processing unit 206 may apply one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). Transform processing unit 206 may apply various transforms to the residual block to form the transform coefficient block. For example, transform processing unit 206 may apply a horizontal / vertical transform combination, which may include a discrete cosine transform (DCT), an asymmetric discrete sine transform (ADST), an inverse ADST (e.g., ADST in reverse order), and an identity transform (IDTX). When using an identity transform, the transform is skipped in one of the vertical or horizontal directions. In some examples, the transform process may be skipped.

[0210] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode select unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may result in loss of information, and therefore, the quantized transform coefficients may be less accurate than the original transform coefficients produced by the transform processing unit 206.

[0211] Inverse quantization unit 210 and inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. Reconstruction unit 214 may produce a reconstructed block that corresponds to the current block (possibly with some distortion) based on the reconstructed residual block and the predictive block generated by mode select unit 202. For example, reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples from the predictive block generated by mode select unit 202 to produce the reconstructed block.

[0212] Filter unit 216 may perform one or more filter operations on the reconstructed blocks. For example, filter unit 216 may perform a deblocking operation to reduce blockiness artifacts along the edges of a CU. The operations of filter unit 216 may be skipped in some examples.

[0213] When operating according to AV1, filter unit 216 may perform one or more filter operations on the reconstructed blocks. For example, filter unit 216 may perform a deblocking operation to reduce blockiness artifacts along the edges of a CU. In other examples, filter unit 216 may apply a constrained directional enhancement filter (CDEF), which may be applied after deblocking and may include application of a non-separable, nonlinear, low-pass directional filter based on estimated edge directions. Filter unit 216 may also include a loop restoration filter, which may be applied after the CDEF and may include a separable symmetric normalized Wiener filter or a dual autoinduction filter.

[0214] Video encoder 200 stores the reconstructed blocks in DPB 218. For example, in examples where the operations of filter unit 216 are not performed, reconstruction unit 214 may store the reconstructed blocks in DPB 218. In examples where the operations of filter unit 216 are performed, filter unit 216 may store the filtered reconstructed blocks in DPB 218. Motion estimation unit 222 and motion compensation unit 224 may retrieve reference pictures formed from the reconstructed (and possibly filtered) blocks from DPB 218 to inter-predict blocks of a later-encoded picture. Additionally, intra-prediction unit 226 may use the reconstructed blocks of the current picture in DPB 218 to intra-predict other blocks in the current picture.

[0215] Generally, entropy encoding unit 220 may entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy encoding unit 220 may entropy encode quantized transform coefficient blocks from quantization unit 208. As another example, entropy encoding unit 220 may entropy encode predictive syntax elements (e.g., motion information for inter-prediction or intra-mode information for intra-prediction) from mode select unit 202. Entropy encoding unit 220 may perform one or more entropy encoding operations on syntax elements, which are other examples of video data, to generate entropy-encoded data. For example, entropy encoding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable-to-variable (V2V) coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a Probability Interval Partitioning Entropy (PIPE) coding operation, an Exponential-Golomb coding operation, or another type of entropy coding operation on the data. In some examples, entropy encoding unit 220 may operate in a bypass mode in which syntax elements are not entropy coded.

[0216] Video encoder 200 may output a bitstream that includes entropy-encoded syntax elements needed to reconstruct blocks of a slice or picture. Specifically, entropy encoding unit 220 may output the bitstream.

[0217] The entropy coding unit 220 may be configured as a symbol-to-symbol adaptive multi-symbol arithmetic coder according to AV1. A syntax element in AV1 includes an alphabet of N elements, and a context (e.g., a probability model) includes a set of N probabilities. The entropy coding unit 220 may store the probabilities as n-bit (e.g., 15-bit) cumulative distribution functions (CDFs). The entropy coding unit 220 may perform recursive scaling to update the context, using an update factor based on the alphabet size.

[0218] The operations described above are described with respect to blocks. Such descriptions should be understood as operations on luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding blocks and chroma coding blocks are luma and chroma components of a CU. In some examples, the luma coding blocks and chroma coding blocks are luma and chroma components of a PU.

[0219] In some examples, operations performed with respect to luma coding blocks need not be repeated for chroma coding blocks. As one example, operations identifying motion vectors (MVs) and reference pictures for luma coding blocks need not be repeated to identify MVs and reference pictures for chroma blocks. Rather, the MVs of luma coding blocks may be scaled to determine the MVs of chroma blocks, and the reference pictures may be the same. As another example, the intra prediction process may be the same for luma coding blocks and chroma coding blocks.

[0220] The video encoder 200 represents an example of a device configured to encode video data, including a memory configured to store video data and one or more processing units implemented in a circuit and configured to partition coding blocks into sub-blocks, generate initial sub-block motion vectors for the plurality of sub-blocks, refine the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of sub-blocks, and perform linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0221] 6 is a block diagram illustrating an example video decoder 300 that may implement the techniques of this disclosure. Figure 6 is provided for purposes of explanation and does not limit the techniques broadly illustrated and described in this disclosure. For purposes of explanation, this disclosure describes a video decoder 300 in accordance with VVC and HEVC techniques. However, the techniques of this disclosure may be implemented by video coding devices configured for other video coding standards.

[0222] In the example of Figure 6, the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a DPB 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or processing circuits. For example, the units of the video decoder 300 may be implemented as one or more circuits or logic elements as part of a hardware circuit, or as part of a processor, ASIC, or FPGA. Moreover, the video decoder 300 may include additional or alternative processors or processing circuits that perform these and other functions.

[0223] Prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. Prediction processing unit 304 may include additional units that perform prediction according to other prediction modes. By way of example, prediction processing unit 304 may include a palette unit, an intra block copy unit (which may form part of motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, video decoder 300 may include more, fewer, or different functional components.

[0224] When operating in accordance with AV1, the motion compensation unit 316 may be configured to decode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using translational motion compensation, affine motion compensation, OBMC, and / or synthetic inter-intra prediction, as described above. The intra prediction unit 318 may be configured to decode coding blocks of video data (e.g., both luma coding blocks and chroma coding blocks) using directional intra prediction, non-directional intra prediction, recursive filter intra prediction, CFL, IBC, and / or color palette mode, as described above.

[0225] According to the techniques of this disclosure, as described above, the motion compensation unit 316 may be configured to determine an affine motion model using a regression-based technique. In one example, the video decoder 300 may be configured to partition a coding block. The motion compensation unit 316 may generate initial sub-block motion vectors for multiple sub-blocks and refine the initial sub-block motion vectors for the multiple sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the multiple sub-blocks. The motion compensation unit 316 may perform linear regression on the refined sub-block motion vectors and coordinates of the multiple sub-blocks to derive an affine motion model. The motion compensation unit 316 may then decode the coding block using the affine motion model. For example, the motion compensation unit 316 may determine control point motion vectors from the derived affine motion model and decode the coding block using the determined control point motion vectors.

[0226] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. The video data stored in CPB memory 320 may be retrieved, for example, from computer-readable medium 110 (FIG. 1). CPB memory 320 may include a CPB that stores encoded video data (e.g., syntax elements) from the encoded video bitstream. CPB memory 320 may also store video data other than syntax elements of coded pictures, such as temporary data representing output from various units of video decoder 300. DPB 314 generally stores decoded pictures that video decoder 300 may output and / or use as reference video data when decoding subsequent data or pictures of the encoded video bitstream. CPB memory 320 and DPB 314 may be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. CPB memory 320 and DPB 314 may be provided by the same memory device or separate memory devices. In various examples, CPB memory 320 may be on-chip with other components of video decoder 300 or off-chip relative to those components.

[0227] Additionally or alternatively, in some examples, video decoder 300 may retrieve coded video data from memory 120 (FIG. 1). That is, memory 120 may store data such as those discussed above for CPB memory 320. Similarly, memory 120 may store instructions to be executed by video decoder 300 when some or all of the functionality of video decoder 300 is implemented in software to be executed by processing circuitry of video decoder 300.

[0228] The various units shown in FIG. 6 are presented to aid in understanding the operations performed by video decoder 300. The units may be implemented as fixed-function circuits, programmable circuits, or a combination thereof. As with FIG. 5, fixed-function circuits refer to circuits that provide a specific function and have predefined operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and offer flexibility in the operations that can be performed. For example, a programmable circuit may execute software or firmware that causes the programmable circuit to operate in a manner defined by the software or firmware instructions. While a fixed-function circuit may execute software instructions (e.g., receive parameters or output parameters), the types of operations that the fixed-function circuit performs are generally invariant. In some examples, one or more of the units may be different circuit blocks (fixed function or programmable), and in some examples, one or more of the units may be integrated circuits.

[0229] Video decoder 300 may include a programmable core formed from ALUs, EFUs, digital circuits, analog circuits, and / or programmable circuits. In examples where the operations of video decoder 300 are performed by software executing on programmable circuits, on-chip or off-chip memory may store software instructions (e.g., object code) that video decoder 300 receives and executes.

[0230] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to recover the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0231] Generally, video decoder 300 reconstructs a picture on a block-by-block basis. Video decoder 300 may perform a reconstruction operation on each block individually (the block currently being reconstructed, i.e., decoded, may be referred to as the “current block”).

[0232] The entropy decoding unit 302 may entropy decode syntax elements that define the quantized transform coefficients of the quantized transform coefficient block as well as transform information, such as a quantization parameter (QP) and / or a transform mode indication(s). The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine the degree of quantization, and similarly the degree of inverse quantization, that the inverse quantization unit 306 should apply. The inverse quantization unit 306 may, for example, perform a bitwise left-shift operation to inverse quantize the quantized transform coefficients. The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0233] After the inverse quantization unit 306 forms the transform coefficient blocks, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient blocks to generate residual blocks associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse transform, or another inverse transform to the transform coefficient blocks.

[0234] Further, prediction processing unit 304 generates a predictive block according to the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 may generate a predictive block. In this case, the prediction information syntax element may indicate a reference picture in DPB 314 from which to retrieve a reference block, as well as a motion vector that identifies the location of the reference block in the reference picture relative to the location of the current block in the current picture. Motion compensation unit 316 may generally perform the inter-prediction process in a manner substantially similar to that described with respect to motion compensation unit 224 (FIG. 5).

[0235] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, intra prediction unit 318 may generate a predictive block according to the intra-prediction mode indicated by the prediction information syntax element. Again, intra prediction unit 318 may generally perform the intra-prediction process in a manner substantially similar to that described with respect to intra prediction unit 226 (FIG. 5). Intra prediction unit 318 may retrieve data of neighboring samples for the current block from DPB 314.

[0236] The reconstruction unit 310 may reconstruct the current block using the predictive block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the predictive block to reconstruct the current block.

[0237] Filter unit 312 may perform one or more filter operations on the reconstructed blocks. For example, filter unit 312 may perform a deblocking operation to reduce blockiness artifacts along the edges of the reconstructed blocks. The operations of filter unit 312 are not necessarily performed in all instances.

[0238] The video decoder 300 may store the reconstructed blocks in the DPB 314. For example, in examples where the operations of the filter unit 312 are not performed, the reconstruction unit 310 may store the reconstructed blocks in the DPB 314. In examples where the operations of the filter unit 312 are performed, the filter unit 312 may store the filtered reconstructed blocks in the DPB 314. As described above, the DPB 314 may provide reference information to the prediction processing unit 304, such as samples of the current picture for intra prediction and previously decoded pictures for subsequent motion compensation. Furthermore, the video decoder 300 may output the decoded pictures (e.g., decoded video) from the DPB 314 for later display on a display device, such as the display device 118 of FIG. 1 .

[0239] In this manner, the video decoder 300 represents an example of a video decoding device that includes a memory configured to store video data and one or more processing units implemented in a circuit and configured to: partition coding blocks into sub-blocks; generate initial sub-block motion vectors for the plurality of sub-blocks; refine the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of sub-blocks; and perform linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0240] 7 is a flowchart illustrating an example method for encoding a current block in accordance with the techniques of this disclosure. The current block may be or include a current CU. Although described with respect to video encoder 200 (FIGS. 1 and 5), it should be understood that other devices may be configured to implement methods similar to the method of FIG.

[0241] In this example, video encoder 200 first predicts the current block (350). For example, video encoder 200 may form a predictive block for the current block. Video encoder 200 may then calculate a residual block for the current block (352). To calculate the residual block, video encoder 200 may calculate the difference between the original uncoded block and the predictive block for the current block. Video encoder 200 may then transform the residual block and quantize the transform coefficients of the residual block (354). Video encoder 200 may then scan the quantized transform coefficients of the residual block (356). During or following the scan, video encoder 200 may entropy code the transform coefficients (358). For example, video encoder 200 may code the transform coefficients using CAVLC or CABAC. Video encoder 200 may then output entropy-coded data for the block (360).

[0242] 8 is a flowchart illustrating an example method for decoding a current block of video data in accordance with the techniques of this disclosure. The current block may be or include a current CU. Although described with respect to video decoder 300 (FIGS. 1 and 6), it should be understood that other devices may be configured to implement methods similar to the method of FIG.

[0243] The video decoder 300 may receive entropy-coded data for the current block, such as entropy-coded prediction information and entropy-coded data for the transform coefficients of the residual block corresponding to the current block (370). The video decoder 300 may entropy decode the entropy-coded data to determine prediction information for the current block and reconstruct the transform coefficients of the residual block (372). The video decoder 300 may predict the current block, e.g., using the intra-prediction mode or inter-prediction mode indicated by the prediction information for the current block, to calculate a predictive block for the current block (374). The video decoder 300 may then inverse-scan the reconstructed transform coefficients to create a block of quantized transform coefficients (376). The video decoder 300 may then dequantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (378). The video decoder 300 may finally decode the current block by combining the predictive block and the residual block (380).

[0244] 9 is a flowchart illustrating another example method for encoding a current block in accordance with techniques of this disclosure. The technique of FIG. 9 may be implemented between process 350 and process 352 of FIG. 7. Video encoder 200, including motion estimation unit 22 and motion compensation unit 224, may be configured to implement the technique of FIG. 9.

[0245] The video encoder 200 may be configured to partition a coding block into sub-blocks (900) and generate initial sub-block motion vectors for the plurality of sub-blocks (902). In one example, the video encoder 200 may generate the initial sub-block motion vectors based on control point motion vectors representing an input affine motion model. The video encoder 200 may determine the control point motion vectors from an affine candidate merge list. In another example, the video encoder 200 may generate the initial sub-block motion vectors based on bi-predictive motion vectors.

[0246] Video encoder 200 may be further configured to refine the initial sub-block motion vectors for the multiple sub-blocks using decoder-side motion vector refinement to produce improved sub-block motion vectors for the multiple sub-blocks (904). For example, video encoder 200 may independently refine each of the initial sub-block motion vectors using decoder-side motion vector refinement to produce improved sub-block motion vectors for the multiple sub-blocks.

[0247] Video encoder 200 may then perform linear regression on the refined sub-block motion vectors and the coordinates of the multiple sub-blocks to derive an affine motion model (906). Video encoder 200 may then encode the coding block using the affine motion model (908). For example, video encoder 200 may derive refined control point motion vectors for the coding block based on the affine motion model and encode the coding block using the refined control point motion vectors.

[0248] In another example, video encoder 200 may be further configured to derive a motion vector offset using the initial sub-block motion vector and decoder-side motion vector refinement, which includes determining a first cost for the motion vector offset. Video encoder 200 may be further configured to determine a second cost for an affine motion model. Video encoder 200 may determine to use a motion vector offset or an affine motion model based on the first cost and the second cost.

[0249] Video encoder 200 may then encode the coding block using an affine motion model based on the first cost being greater than the second cost. Video encoder 200 may then encode the coding block using a motion vector offset based on the first cost being less than the second cost. Using the motion vector offset may include adding the motion vector offset to a control point motion vector associated with the initial affine motion model to generate an improved control point motion vector, and encoding the coding block using the improved control point motion vector.

[0250] 10 is a flowchart illustrating another exemplary method for decoding a current block in accordance with the techniques of this disclosure. The technique of FIG. 10 may be implemented between process 374 and process 380 of FIG. 8. A video decoder 300 including a motion compensation unit 316 may be configured to implement the technique of FIG. 10.

[0251] The video decoder 300 may be configured to partition a coding block into sub-blocks (950) and generate initial sub-block motion vectors for the plurality of sub-blocks (952). In one example, the video decoder 300 may generate the initial sub-block motion vectors based on control point motion vectors representing an input affine motion model. The video decoder 300 may determine the control point motion vectors from an affine candidate merge list. In another example, the video decoder 300 may generate the initial sub-block motion vectors based on bi-predictive motion vectors.

[0252] The video decoder 300 may further be configured to refine the initial sub-block motion vectors for the multiple sub-blocks using decoder-side motion vector refinement to produce improved sub-block motion vectors for the multiple sub-blocks (954). For example, the video decoder 300 may independently refine each of the initial sub-block motion vectors using decoder-side motion vector refinement to produce improved sub-block motion vectors for the multiple sub-blocks.

[0253] The video decoder 300 may then perform linear regression on the refined sub-block motion vectors and the coordinates of the multiple sub-blocks to derive an affine motion model (956). The video decoder 300 may then decode the coding block using the affine motion model (958). For example, the video decoder 300 may derive refined control point motion vectors for the coding block based on the affine motion model and decode the coding block using the refined control point motion vectors.

[0254] In another example, the video decoder 300 may be further configured to derive a motion vector offset using the initial sub-block motion vector and decoder-side motion vector refinement, which includes determining a first cost for the motion vector offset. The video decoder 300 may be further configured to determine a second cost for an affine motion model. The video decoder 300 may determine to use a motion vector offset or an affine motion model based on the first cost and the second cost.

[0255] The video decoder 300 may then decode the coding block using an affine motion model based on the first cost being greater than the second cost. The video decoder 300 may then decode the coding block using a motion vector offset based on the first cost being less than the second cost. Using the motion vector offset may include adding the motion vector offset to a control point motion vector associated with the initial affine motion model to generate a refined control point motion vector, and decoding the coding block using the refined control point motion vector.

[0256] The following numbered clauses illustrate one or more aspects of the devices and techniques described in this disclosure.

[0257] Aspect 1A - A method of coding video data, the method including: partitioning a coding block into sub-blocks; generating initial sub-block motion vectors for a plurality of sub-blocks; refining the initial sub-block motion vectors for the plurality of sub-blocks using bilateral matching to produce improved sub-block motion vectors for the plurality of sub-blocks; performing linear regression on the improved sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model; and coding the coding block using the affine motion model.

[0258] Embodiment 2A - The method of embodiment 1A, wherein the plurality of sub-blocks are all of the sub-blocks of a coding block.

[0259] Embodiment 3A - The method of embodiment 1A, wherein the plurality of sub-blocks is a subset of the sub-blocks of the coding block.

[0260] Example 4A - The method of Example 1A, further comprising deriving control point motion vectors for the coding block based on an affine motion model.

[0261] Aspect 5A - A method of coding video data, the method including: partitioning a coding block into sub-blocks; generating initial sub-block motion vectors for a plurality of sub-blocks; refining the initial sub-block motion vectors for the plurality of sub-blocks using bilateral matching to produce improved sub-block motion vectors for the plurality of sub-blocks; determining an affine motion model based on the improved sub-block motion vectors; and coding the coding block using the affine motion model.

[0262] Embodiment 6A - The method of embodiment 5A, wherein the plurality of sub-blocks are all of the sub-blocks of a coding block.

[0263] Embodiment 7A - The method of embodiment 5A, wherein the plurality of sub-blocks is a subset of the sub-blocks of the coding block.

[0264] Embodiment 8A - The method described in embodiment 5A, wherein determining an affine motion model based on the refined sub-block motion vectors includes determining a control point motion vector for the coded block based on the refined sub-block motion vectors.

[0265] Embodiment 9A - The method of any one of embodiments 1A-8A, wherein the coding includes decoding.

[0266] Embodiment 10A - The method of any one of embodiments 1A-8A, wherein coding comprises encoding.

[0267] Aspect 11A - A device for coding video data, the device comprising one or more means for performing the method according to any one of aspects 1A to 10A.

[0268] Embodiment 12A - The device of embodiment 11A, wherein the one or more means comprise one or more processors implemented in the circuitry.

[0269] Embodiment 13A - The device of embodiment 11A or 12A, further comprising a memory for storing video data.

[0270] Embodiment 14A - The device of any one of embodiments 11A-13A, further comprising: a display configured to display the decoded video data.

[0271] Aspect 15A - The device of any one of Aspects 11A to 14A, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0272] Example 16A - The device of any one of Examples 11A to 15A, wherein the device includes a video decoder.

[0273] Example 17A - The device of any one of Examples 11A to 16A, wherein the device comprises a video encoder.

[0274] Aspect 18A - A computer-readable storage medium having stored thereon instructions that, when executed, cause one or more processors to perform a method described in any one of Aspects 1A-10A.

[0275] Aspect 19A - A device for encoding video data, the device comprising: means for partitioning a coding block into sub-blocks; means for generating initial sub-block motion vectors for a plurality of sub-blocks; means for refining the initial sub-block motion vectors for the plurality of sub-blocks using bilateral matching to produce improved sub-block motion vectors for the plurality of sub-blocks; means for performing linear regression on the improved sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model; and means for coding the coding block using the affine motion model.

[0276] Aspect 20A - A device for encoding video data, the device comprising: means for partitioning a coding block into sub-blocks; means for generating initial sub-block motion vectors for a plurality of sub-blocks; means for refining the initial sub-block motion vectors for the plurality of sub-blocks using bilateral matching to produce improved sub-block motion vectors for the plurality of sub-blocks; means for determining an affine motion model based on the improved sub-block motion vectors; and means for coding the coding block using the affine motion model.

[0277] Aspect 1B - A method of decoding video data, the method including: partitioning a coding block into sub-blocks; generating initial sub-block motion vectors for a plurality of sub-blocks; refining the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce improved sub-block motion vectors for the plurality of sub-blocks; and performing linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0278] Embodiment 2B - The method of embodiment 1B, wherein generating the initial sub-block motion vectors includes generating the initial sub-block motion vectors based on control point motion vectors representing an input affine motion model.

[0279] Aspect 3B - The method of Aspect 2B, further comprising determining control point motion vectors from the affine candidate merge list.

[0280] Embodiment 4B The method of embodiment 1B, wherein generating the initial sub-block motion vector includes generating the initial sub-block motion vector based on a bi-predictive motion vector.

[0281] Embodiment 5B - The method of any one of embodiments 1B-4B, further comprising decoding the coding block using an affine motion model.

[0282] Aspect 6B - The method described in aspect 5B, wherein decoding the coding block using an affine motion model includes deriving an improved control point motion vector for the coding block based on the affine motion model, and decoding the coding block using the improved control point motion vector.

[0283] Embodiment 7B - The method of any one of embodiments 1B to 6B, wherein refining initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce improved sub-block motion vectors for the plurality of sub-blocks comprises independently refining each of the initial sub-block motion vectors using decoder-side motion vector refinement to produce improved sub-block motion vectors for the plurality of sub-blocks.

[0284] Aspect 8B - The method of any one of aspects 1B to 7B, further comprising: deriving a motion vector offset using an initial sub-block motion vector and a decoder-side motion vector refinement including determining a first cost for the motion vector offset; determining a second cost for an affine motion model; and determining to use a motion vector offset or an affine motion model based on the first cost and the second cost.

[0285] Embodiment 9B - The method of embodiment 8B, further comprising decoding the coding block using an affine motion model based on the first cost being greater than the second cost.

[0286] Embodiment 10B - The method of embodiment 8B, further comprising: decoding the coding block using the motion vector offset based on the first cost being less than the second cost.

[0287] Aspect 11B - The method described in aspect 10B, wherein decoding the coding block using the motion vector offset includes adding the motion vector offset to a control point motion vector associated with the initial affine motion model to generate an improved control point motion vector, and decoding the coding block using the improved control point motion vector.

[0288] Embodiment 12B - The method of any one of embodiments 1B to 11B, wherein the plurality of sub-blocks are all of the sub-blocks of a coding block.

[0289] Embodiment 13B - The method of any one of embodiments 1B to 11B, wherein the plurality of sub-blocks is a subset of sub-blocks of a coding block.

[0290] Aspect 14B - An apparatus configured to decode video data, the apparatus comprising: a memory; and one or more processors in communication with the memory, wherein the one or more processors are configured to: partition a coding block into sub-blocks; generate initial sub-block motion vectors for a plurality of sub-blocks; refine the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce improved sub-block motion vectors for the plurality of sub-blocks; and perform linear regression on the improved sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0291] Example 15B - The apparatus described in Example 14B, wherein to generate the initial sub-block motion vector, the one or more processors are further configured to generate the initial sub-block motion vector based on control point motion vectors representing an input affine motion model.

[0292] Example 16B - The apparatus of example 15B, wherein the one or more processors are further configured to determine control point motion vectors from the affine candidate merge list.

[0293] Example 17B - The apparatus of example 14B, wherein to generate the initial sub-block motion vector, the one or more processors are further configured to generate the initial sub-block motion vector based on a bi-predictive motion vector.

[0294]

[0071] Example 18B - The apparatus of any one of Examples 14B to 17B, wherein the one or more processors are further configured to decode the coding blocks using an affine motion model.

[0295] Aspect 19B - The apparatus described in aspect 18B, wherein, to decode a coding block using an affine motion model, one or more processors are further configured to derive an improved control point motion vector for the coding block based on the affine motion model, and decode the coding block using the improved control point motion vector.

[0296]

[0047] Embodiment 20B - The apparatus of any one of embodiments 14B to 19B, wherein the one or more processors are further configured to: refine the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce improved sub-block motion vectors for the plurality of sub-blocks; and to independently refine each of the initial sub-block motion vectors using decoder-side motion vector refinement to produce improved sub-block motion vectors for the plurality of sub-blocks.

[0297] Embodiment 21B - The apparatus described in any one of embodiments 14B to 20B, wherein the one or more processors are further configured to: derive a motion vector offset using the initial sub-block motion vector and a decoder-side motion vector refinement including determining a first cost for the motion vector offset; determine a second cost for an affine motion model; and determine to use the motion vector offset or the affine motion model based on the first cost and the second cost.

[0298] Example 22B - The apparatus of example 21B, wherein the one or more processors are further configured to decode the coding block using an affine motion model based on the first cost being greater than the second cost.

[0299] Aspect 23B. The apparatus of aspect 21B, wherein the one or more processors are further configured to decode the coding block using the motion vector offset based on the first cost being less than the second cost.

[0300] Aspect 24B - The apparatus described in aspect 23B, wherein, to decode a coding block using a motion vector offset, one or more processors are further configured to add the motion vector offset to a control point motion vector associated with the initial affine motion model to generate an improved control point motion vector, and decode the coding block using the improved control point motion vector.

[0301] Embodiment 25B - The apparatus of any one of embodiments 14B to 24B, wherein the plurality of sub-blocks are all of the sub-blocks of a coding block.

[0302] Embodiment 26B - The apparatus of any one of embodiments 14B to 24B, wherein the plurality of sub-blocks is a subset of sub-blocks of a coding block.

[0303] Aspect 27B - An apparatus configured to decode video data, the apparatus comprising: means for partitioning a coding block into sub-blocks; means for generating initial sub-block motion vectors for a plurality of sub-blocks; means for refining the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce improved sub-block motion vectors for the plurality of sub-blocks; and means for performing linear regression on the improved sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0304] Embodiment 28B - The apparatus described in embodiment 27B, further comprising: means for deriving a motion vector offset using an initial sub-block motion vector and a decoder-side motion vector refinement including determining a first cost for the motion vector offset; means for determining a second cost for an affine motion model; and means for determining to use a motion vector offset or an affine motion model based on the first cost and the second cost.

[0305] Aspect 29B - A non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors to partition a coding block into sub-blocks, generate initial sub-block motion vectors for a plurality of sub-blocks, refine the initial sub-block motion vectors for the plurality of sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of sub-blocks, and perform linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

[0306] Aspect 30B - A non-transitory computer-readable storage medium of aspect 29B, wherein the instructions further cause the one or more processors to derive a motion vector offset using the initial sub-block motion vector and a decoder-side motion vector refinement including determining a first cost for the motion vector offset, determine a second cost for an affine motion model, and determine to use a motion vector offset or an affine motion model based on the first cost and the second cost.

[0307] It should be recognized that, in some examples, some acts or events of any of the techniques described herein may be performed in a different order, added, merged, or omitted entirely (e.g., not all acts or events described may be required to practice the techniques). Moreover, in some examples, acts or events may be performed in parallel rather than sequentially, for example, through multithreading, interrupt processing, or multiple processors.

[0308] In one or more examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted via a computer-readable medium as one or more instructions or code and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which correspond to tangible media such as data storage media, or communication media, including any medium that facilitates transfer of a computer program from one place to another, for example, according to a communications protocol. As such, computer-readable media may generally correspond to (1) tangible computer-readable storage media that is non-transitory, or (2) a communication medium such as a signal or carrier wave. Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and / or data structures to implement the techniques described in this disclosure. A computer program product may include a computer-readable medium.

[0309] By way of example, and not limitation, such computer-readable storage media may include one or more of RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable storage medium. For example, if instructions are transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included within the definition of medium. However, it should be understood that computer-readable storage media and data storage media do not include connections, carrier waves, signals, or other transitory media, but instead cover non-transitory tangible storage media. As used herein, disk and disc include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, where disks typically reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable recording media.

[0310] The instructions may be executed by one or more processors, such as one or more DSPs, general-purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry. Accordingly, the terms "processor" and "processing circuitry," as used herein, may refer to any of the above structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functionality described herein may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or may be incorporated into a combined codec. The techniques may also be implemented entirely in one or more circuits or logic elements.

[0311] The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units have been described in this disclosure to highlight functional aspects of devices configured to implement the disclosed techniques, but they do not necessarily require realization by different hardware units. Rather, as described above, the various units may be combined in a codec hardware unit or may be provided by a collection of interoperable hardware units, including one or more processors as described above, in conjunction with suitable software and / or firmware.

[0312] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. 1. A method for decoding video data, the method comprising: Partitioning a coding block into sub-blocks; generating initial sub-block motion vectors for a plurality of said sub-blocks; refining the initial sub-block motion vectors for the plurality of the sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of the sub-blocks; performing a linear regression on the refined sub-block motion vectors and the coordinates of the plurality of sub-blocks to derive an affine motion model.

2. generating the initial sub-block motion vector, 2. The method of claim 1, comprising generating the initial sub-block motion vectors based on control point motion vectors representing an input affine motion model.

3. The method of claim 2 , further comprising determining the control point motion vectors from an affine candidate merge list.

4. generating the initial sub-block motion vector, The method of claim 1 , comprising generating the initial sub-block motion vector based on a bi-predictive motion vector.

5. The method of claim 1 , further comprising decoding the coding block using the affine motion model.

6. decoding the coding block using the affine motion model; deriving refined control point motion vectors for the coding blocks based on the affine motion model; and and decoding the coding block using the refined control point motion vector.

7. refining the initial sub-block motion vectors for the plurality of the sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of the sub-blocks; 2. The method of claim 1, comprising independently refining each of the initial sub-block motion vectors using decoder-side motion vector refinement to produce the refined sub-block motion vectors for the plurality of sub-blocks.

8. deriving a motion vector offset using the initial sub-block motion vector and decoder-side motion vector refinement including determining a first cost for the motion vector offset; determining a second cost for the affine motion model; The method of claim 1 , further comprising: determining to use the motion vector offset or the affine motion model based on the first cost and the second cost.

9. The method of claim 8 , further comprising: decoding the coding block using the affine motion model based on the first cost being greater than the second cost.

10. The method of claim 8 , further comprising: decoding the coding block using the motion vector offset based on the first cost being less than the second cost.

11. decoding the coding block using the motion vector offset, adding the motion vector offset to the control point motion vector associated with the initial affine motion model to generate an improved control point motion vector; and decoding the coding block using the refined control point motion vector.

12. The method of claim 1 , wherein the plurality of sub-blocks are all of the sub-blocks of the coding block.

13. The method of claim 1 , wherein the plurality of sub-blocks is a subset of the sub-blocks of the coding block.

14. 1. An apparatus configured to decode video data, comprising: Memory and one or more processors in communication with the memory; wherein the one or more processors: Dividing the coding block into sub-blocks; generating initial sub-block motion vectors for a plurality of said sub-blocks; refine the initial sub-block motion vectors for the plurality of the sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of the sub-blocks; performing a linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model.

15. To generate the initial sub-block motion vectors, the one or more processors: The apparatus of claim 14 , further configured to generate the initial sub-block motion vectors based on control point motion vectors representing an input affine motion model.

16. the one or more processors: The apparatus of claim 15 , further configured to determine the control point motion vectors from an affine candidate merge list.

17. To generate the initial sub-block motion vectors, the one or more processors: The apparatus of claim 14 , further configured to generate the initial sub-block motion vector based on a bi-predictive motion vector.

18. the one or more processors: The apparatus of claim 14 , further configured to decode the coding block using the affine motion model.

19. To decode the coding blocks using the affine motion model, the one or more processors: deriving refined control point motion vectors for the coding blocks based on the affine motion model; The apparatus of claim 18 , further configured to decode the coding block using the refined control point motion vector.

20. the one or more processors to refine the initial sub-block motion vectors for the plurality of the sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of the sub-blocks; 15. The apparatus of claim 14, further configured to independently refine each of the initial sub-block motion vectors using decoder-side motion vector refinement to produce the refined sub-block motion vectors for the plurality of the sub-blocks.

21. the one or more processors: deriving a motion vector offset using the initial sub-block motion vector and a decoder-side motion vector refinement including determining a first cost for the motion vector offset; determining a second cost for the affine motion model; The apparatus of claim 14 , further configured to determine to use the motion vector offset or the affine motion model based on the first cost and the second cost.

22. the one or more processors:

22. The method of claim 21, further configured to decode the coding block using the affine motion model based on the first cost being greater than the second cost.

23. the one or more processors:

22. The apparatus of claim 21, further configured to decode the coding block using the motion vector offset based on the first cost being less than the second cost.

24. To decode the coding block using the motion vector offset, the one or more processors: adding the motion vector offset to the control point motion vector associated with the initial affine motion model to generate an improved control point motion vector; 24. The apparatus of claim 23, further configured to decode the coding block using the refined control point motion vector.

25. The apparatus of claim 14 , wherein the plurality of sub-blocks are all of the sub-blocks of the coding block.

26. The apparatus of claim 14 , wherein the plurality of sub-blocks is a subset of the sub-blocks of the coding block.

27. 1. A method for encoding video data, comprising: Partitioning a coding block into sub-blocks; generating initial sub-block motion vectors for a plurality of said sub-blocks; refining the initial sub-block motion vectors for the plurality of the sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of the sub-blocks; performing a linear regression on the refined sub-block motion vectors and coordinates of the plurality of sub-blocks to derive an affine motion model; encoding the coding block using the affine motion model.

28. encoding the coding block using the affine motion model, deriving refined control point motion vectors for the coding blocks based on the affine motion model; and and encoding the coding block using the refined control point motion vector.

29. 1. An apparatus configured to encode video data, comprising: Memory and one or more processors in communication with the memory; wherein the one or more processors: Dividing the coding block into sub-blocks; generating initial sub-block motion vectors for a plurality of said sub-blocks; refine the initial sub-block motion vectors for the plurality of the sub-blocks using decoder-side motion vector refinement to produce refined sub-block motion vectors for the plurality of the sub-blocks; performing a linear regression on the refined sub-block motion vectors and the coordinates of the plurality of sub-blocks to derive an affine motion model; An apparatus configured to encode the coding block using the affine motion model.

30. To encode the coding block using the affine motion model, the one or more processors: deriving refined control point motion vectors for the coding blocks based on the affine motion model; 30. The apparatus of claim 29, further configured to encode the coding block using the refined control point motion vector.

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