Radiation detectors and radiation imaging devices

Abstract

The present invention provides a radiation detector that properly resets the photodiode when detecting visible light emitted from a phosphor. [Solution] The radiation detector comprises a phosphor that converts radiation into visible light, an avalanche photodiode that detects the visible light, a reset switch capable of resetting the avalanche photodiode by applying a potential, and a control means that controls the reset switch so that the reset operation is performed in accordance with the detection of avalanche multiplication in the avalanche photodiode.

Description

Technical Field

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[0005]

[0001] The present invention relates to a radiation detector. The radiation detector is a device mounted on a radiation imaging apparatus such as a medical diagnostic apparatus or a non-destructive inspection apparatus. The radiation imaging apparatus is used, for example, as an X-ray flat panel detector.

Background Art

[0002] Digital radiation imaging apparatuses that detect radiation and obtain the intensity distribution of the radiation as a radiation image are known. Recently, a configuration in which a SPAD element having sensitivity to a single photon is applied to a radiation imaging apparatus has been studied.

[0003] In a SPAD element, an avalanche photodiode that is adjusted to cause Geiger-mode avalanche multiplication for a single photon and is reverse-biased is used. When a photon enters the SPAD element, avalanche multiplication occurs in the photodiode, a current flows, and the bias voltage of the photodiode is lost. Patent Document 1 discloses a configuration in which the bias voltage of the photodiode is periodically reset and recharged by controlling the ON / OFF of a transistor.

[0004] A configuration in which a photodiode is formed on a single crystal silicon semiconductor wafer is not suitable for detecting radiation such as X-rays because it has a characteristic of high sensitivity in the visible light region. Patent Document 2 discloses a configuration in which a SPAD element is used together with a phosphor that converts radiation into visible light.

Prior Art Documents

Patent Documents

[0005] <00​​​​​​​​​​​​[Problems that the invention aims to solve]

[0006] As described in Patent Document 2, when a phosphor is used to convert radiation into light, the phosphor emits multiple visible light photons in proportion to the energy of the incident radiation. Since this emission occurs in bursts over a short period of time, it is desirable that the photodiode be reset appropriately so that the emitted visible light photons can be detected multiple times.

[0007] The object of the present invention is to provide a radiation detector in which the photodiode is properly reset when detecting visible light emitted from a phosphor. [Means for solving the problem]

[0008] The radiation detector according to the present invention includes a phosphor that converts radiation into visible light, The avalanche photodiode for detecting visible light, A reset switch capable of resetting the avalanche photodiode by applying a potential, The present invention is characterized by having a control means for controlling the reset switch so that the reset operation is performed in accordance with the detection of avalanche multiplication in the avalanche photodiode. [Effects of the Invention]

[0009] According to the present invention, it is possible to provide a radiation detector in which the photodiode is properly reset when detecting visible light emitted from a phosphor. [Brief explanation of the drawing]

[0010] [Figure 1] This is a diagram showing a radiation imaging system. [Figure 2] This is a diagram showing a radiation imaging device. [Figure 3] This diagram shows the layer structure of a radiation detector. [Figure 4]It is a diagram showing the pixel configuration. [Figure 5] It is a diagram explaining the relationship between radiation photons and visible light photons. [Figure 6] It is a diagram showing the configuration of a single SPAD and the peripheral circuit that drives it. [Figure 7] It is a timing diagram showing the switching of the reset cycle accompanying photon incidence. [Figure 8] It is a diagram showing the configuration of a plurality of SPADs and the peripheral circuit that drives them. [Figure 9] It is a timing diagram showing the switching of the reset cycle accompanying photon incidence.

Embodiments for Carrying Out the Invention

[0011] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that the invention according to the claims is not limited to the configurations described in the embodiments. Modifications such as replacing or omitting a part of the configuration or a part of the processing with equivalents may be made within the range where the same effects can be obtained.

[0012] (Example 1) <Radiation Imaging System> A radiation imaging system 1, which is the usage environment of a radiation imaging device 10 (radiation imaging apparatus, radiation imaging device), will be described. FIG. 1 is a diagram showing the radiation imaging system.

[0013] The radiation imaging system 1 includes a radiation imaging device 10 (10a, 10b), a control device 20, a radiation generation device 30 (30a, 30b), a display unit 25, an operation unit 26, a RIS 55, a PACS 56, and a HIS 57.

[0014] The control device 20 is a device that relays each device connectable via the radiation imaging device 10, the radiation generation device, and the network 50 and performs various controls. The control device 20 controls radiation imaging using the radiation imaging device 10 and the radiation generation device 30.

[0015] The radiation generating device 30 (radiation irradiation device) includes a radiation tube that generates radiation, and irradiates a subject such as a patient with radiation. Here, not only X-rays but also α-rays, β-rays, γ-rays, particle beams, cosmic rays, etc. are included in the radiation. The radiation generating device 30a and the radiation generating device 30b are selected and used according to the imaging content. When there is no particular preference, these are collectively referred to as the radiation generating device 30.

[0016] The radiation imaging device 10 (radiation imaging device, radiation imaging device) is a device that generates an image based on the radiation irradiated from the radiation generating device. The radiation imaging device 10 is, for example, a flat panel detector. The radiation imaging device 10a and the radiation imaging device 10b are selected and used according to the imaging content. When there is no particular preference, these are collectively referred to as the radiation imaging device 10.

[0017] The radiation imaging device 10 detects the radiation irradiated from the radiation generating device 30 and passed through the subject, and outputs image data corresponding to the radiation. Note that the image data can also be referred to as medical images or radiation images.

[0018] The display unit 25 is a display device including a monitor such as a liquid crystal display. The operation unit 26 is an input device including a keyboard, a pointing device (e.g., a mouse, etc.), a touch panel, etc.

[0019] RIS55, PACS56, and HIS57 are services that extend various functions related to radiography by coordinating with the control unit 20 via a network. The control unit 20 is also connected to RIS55, PACS56, and HIS57 via the network 50, and can exchange radiographic images, patient information, etc. In Figure 1, the radiographic imaging system 1 is shown to include all of RIS55, PACS56, and HIS57, but the system may not include at least some of these. Here, RIS is an abbreviation for Radiology Information Systems. PACS is an abbreviation for Picture Archiving and Communication Systems. HIS is an abbreviation for Hospital Information Systems.

[0020] <Radiation detection device> Figure 2 shows the configuration of the radiation imaging device 10. The radiation imaging device 10 includes a sensor panel 11 (radiation detection panel, radiation detector), a power supply circuit 14, a drive circuit 15, a readout circuit 16, a signal processing unit 17, a control unit 18, and a communication interface 19.

[0021] The sensor panel 11 has multiple pixels (pixel matrix) arranged in a matrix (array) such that it constitutes multiple rows and multiple columns.

[0022] The drive circuit 15 is configured to supply a drive signal to the pixel to be driven according to a control signal from the control unit 18.

[0023] The readout circuit 16 is a circuit configured to read signals from multiple pixels.

[0024] The signals read from the pixels are supplied to the signal processing unit 17, where they are processed, including calculations and storage. The signal processing unit 17 generates a radiation image based on the read signals and supplies it to the control unit 18.

[0025] The control unit 18 is a controller that controls the drive circuit 15 and the read circuit 16 based on information from the signal processing unit 17. The control unit 18 comprehensively controls the radiation imaging device 10. The control unit 18 includes a CPU as an arithmetic processing circuit and ROM and RAM as memory. For example, the control unit 18 loads a program stored in ROM into RAM, and the CPU executes this program to realize various controls. Note that the control unit 18 may use an MPU or ASIC instead of a CPU as its arithmetic processing circuit.

[0026] Communication I / F19 is a communication interface for communication with external devices. Wired LAN (IEEE802.3), wireless LAN (IEEE802.11), etc., are used for communication.

[0027] <Sensor Panel> Figure 3 shows the layer structure of the radiation detector. In Figure 3, the layers that make up the sensor panel 11 are separated and shown in three dimensions.

[0028] The sensor panel 11 comprises a phosphor layer 111 and a semiconductor substrate layer 112. Multiple pixels 113 are arranged in a matrix on the sensor panel 11. For example, in the x-direction, pixels are arranged as pixels 113aa, pixels ab, etc. In the y-direction, pixels are arranged as pixels 113aa, pixels ba, etc. The figure shows only some of the pixels of the sensor panel 11, and omits the rest. By having a large number of such pixels arranged in a matrix, the sensor panel 11 can acquire the intensity distribution of radiation as a radiation image.

[0029] The phosphor layer 111 contains phosphors (scintillators) separated on a pixel-by-pixel basis.

[0030] Various circuits are formed on the semiconductor substrate layer 112 on a pixel-by-pixel basis. In this embodiment, the semiconductor substrate layer 112 is a stacked structure in which multiple layers are stacked. However, the semiconductor substrate layer 112 may be a single layer or three or more layers, depending on the characteristics and integration density. Among the layers of the semiconductor substrate layer 112, a photodiode semiconductor substrate layer 112-1 is provided as the layer in contact with the phosphor layer 111. Multiple photodiodes 7 are formed in a matrix on the photodiode semiconductor substrate layer 112-1. In Figure 3, only some of the photodiodes are shown, and the others are omitted.

[0031] Of the semiconductor substrate layers 112, a semiconductor substrate layer 112-2 for control circuits is provided on the side opposite the phosphor layer 111, with a photodiode semiconductor substrate layer 112-1 in between. Multiple circuits corresponding to pixel circuits are integrated and formed on the substrate of the control circuit semiconductor substrate 112-2. In Figure 3, only some of the pixel circuits are shown, and others are omitted.

[0032] <Pixel> Figure 4 shows the structure of a pixel. As shown in Figure 4, one pixel 113 is composed of a phosphor cell consisting of a phosphor 111-1 and a partition wall 111-2, and multiple SPAD subpixels 114. One phosphor cell has a structure in which a phosphor 111-1 that converts radiation into visible light is surrounded by a partition wall 111-2 that transmits radiation and reflects / shields visible light. Note that in Figures 3 and 4, for the sake of simplicity, the partition wall 111-2 is depicted as being spatially independent for each phosphor cell. However, the partition wall 111-2 may be formed to be continuous across multiple phosphor cells. The multiple phosphor cells with continuous partition walls 111-2 may be all the phosphor cells in the phosphor layer 111, or some of the phosphor cells. For example, a large number of phosphor cells can be formed by creating a large number of depressions in a flat plate that will be the material for the partition wall 111-2, and then forming phosphors in these depressions by a method such as vapor deposition.

[0033] In this embodiment, "one pixel" is defined by this structure. Hereafter, a section separated by partition wall 111-2 will be referred to as a "cell". Partition wall 111-2 has an opening on the lower side of the figure, where the semiconductor substrate layer 112 is in contact. A large number of photodiodes are formed on the semiconductor substrate layer 112 by accumulating them in a matrix. Radiation (X-ray photons) incident on the phosphor 111-1 is converted here into a large number of visible light photons. The propagation direction of the visible light photons is random, and they are emitted dispersed in both the left-right and up-down directions. The dispersed visible light photons are reflected by partition wall 111-2, and most of them reach the semiconductor substrate layer 112. In this structure, since the visible light photons are dispersed and reach multiple photodiodes on the semiconductor substrate layer 112, the possibility of pile-up occurring at each photodiode can be reduced. In this structure, since multiple photodiodes are arranged within one pixel, these photodiodes are also called SPAD subpixels 114. Furthermore, a group consisting of some or all of the subpixels within the same cell is referred to here as a subpixel group.

[0034] As described above, the phosphor 111-1 is separated by the partition wall 111-2. Therefore, the possibility of radiation incident on one cell affecting a subpixel group in another cell is kept low. On the other hand, multiple visible light photons generated in one cell are likely to simultaneously incident on multiple photodiodes within that cell. Thus, subpixel groups have the property of being highly correlated in the operation of photodiodes within the same cell and less correlated between different cells.

[0035] (SPAD circuit configuration) Figure 6 shows the configuration of a single SPAD and the peripheral circuitry that drives it. Note that this circuit is just one example. Therefore, the circuit configuration may be modified within the range where the desired effect can be achieved. For example, the polarity of the semiconductors and the positive / negative logic of the digital circuit may be reversed.

[0036] The anode side of the photodiode 7 is connected to the power supply VPDL. The cathode side is connected to the power supply VDD via the reset switch 5. In detail, the cathode of the photodiode 7 and the input node of the wave shaping buffer 6 are electrically connected between semiconductor substrate layer 112-1 and semiconductor substrate layer 112-2.

[0037] The photodiode 7 is reverse-biased to a degree deeper than its breakdown voltage by the potential difference between VDD and VPDL, causing it to undergo avalanche breakdown with the incidence of a single photon. A photodiode in this state (avalanche photodiode) is called a single-photon avalanche diode (SPAD).

[0038] After the reset switch 5 is opened to provide a bias voltage to the photodiode 7, the reset switch is then deactivated, completing the SPAD's state of waiting for photon incidence. In this state, the cathode of the photodiode 7 initially maintains the VDD potential, but as the charge is rapidly lost due to photon incidence, the cathode potential decreases. This phenomenon, in which a large potential change can be extracted from the small energy of a photon, is called avalanche multiplication. The change in cathode potential due to avalanche multiplication is converted into a digital signal by the wave-forming buffer 6 and counted by the incidence count counter 4. Since the number of photons is counted directly, this operation is called photon counting.

[0039] Once an SPAD has generated avalanche multiplication, the potential difference between its two electrodes decreases, and it loses its ability to generate avalanche multiplication. During this time, even if there are further incident photons, the cathode potential does not change, making it impossible to count the incident photons. This phenomenon, where incident photons overlap and are not counted, is called pile-up. To regain sensitivity to incident photons, it is necessary to re-conduce the reset switch 5 and apply a reverse bias voltage. In addition to avalanche multiplication, the decrease in potential difference can also be caused by leakage current, etc. Therefore, it is desirable to reset the SPAD again at a certain period even if avalanche multiplication is not occurring.

[0040] Thus, it is desirable to reset the SPAD in accordance with the photon incidence interval. If detecting natural light, the average incidence interval can be determined by the target illuminance, so it is best to reset at an interval that matches this. On the other hand, when X-ray photons are converted to visible light photons using phosphor 111-1, the visible light photons are generated in bursts. Therefore, it is desirable to reset at an interval suitable for these bursts.

[0041] Figure 5 illustrates the relationship between radiation photons and visible light photons. In Figure 5, the vertical axis represents the number of visible light photons, and the horizontal axis represents the passage of time. As shown in Figure 5, after a burst ends, there is a period during which no visible light photons are incident on the SPAD until the next X-ray photon incident. During this period, it is acceptable to omit the SPAD reset. Omitting the reset can be expected to reduce power consumption. The mechanism for omitting the SPAD reset will be explained below using Figure 6.

[0042] The pixel circuit in Figure 6 is supplied with a first reset clock with a long period (Leak.reset.clock in the figure) and a second reset clock with a short period (Sample.reset.clock in the figure). These clocks are supplied by their respective clock circuits (not shown). The second reset clock is set to a period that allows it to capture bursts of visible light photons without pile-up. The first reset clock is set to a period that is sufficient to periodically compensate for the decrease in reverse bias voltage due to leakage. This pixel circuit also includes a one-shot timer circuit 3 that is activated when an incident pulse is detected after avalanche multiplication. The one-shot timer may be implemented by some circuit time constant, or by counting the second reset clock. Furthermore, it may be determined according to a separate clock (not shown). In any case, the length of the one-shot timer is set to simulate the length of phosphor emission. In other words, the one-shot timer is activated by the start of the burst emission of phosphor light and terminates at the timing estimated to be the end of the burst emission. The output of the one-shot timer is input to a clock selection circuit consisting of AND and NOR gates. The output of the clock selection circuit is supplied to the reset switch 5, which controls the reset of the SPAD.

[0043] The operation of the pixel circuit in Figure 6 will be explained with reference to Figure 7. Figure 7 is a timing diagram showing the switching of the reset period in response to photon incidence.

[0044] In Figure 7, the horizontal axis represents the time axis, progressing in the order of "T1", "T2", "T3", and "T4". In Figure 7, "Leak.reset.clock" shows the state of the first reset clock. "Sample.reset.clock" shows the state of the second reset clock. In this example, the ratio of the periods of the first reset clock to the second reset clock is set to 5:1, but other ratios may also be used. "Photon incident" indicates that a visible light photon has been incident. "PD Vcathode" shows the cathode potential. "Buffer output" shows the output of the wave-forming buffer 6. "Timer output" shows the output of the one-shot timer circuit 3. "Reset Tr.ON state" shows whether the reset switch 5 is conducting or not. Note that the figure shows whether the reset switch 5 is conducting or not, and does not show the voltage of the gate electrode of the PMOS switch.

[0045] When no photons are incident on the SPAD, the second reset clock is masked by the AND gate and does not reach the reset switch 5, and only the first reset clock is supplied to the reset switch 5. In this way, the first reset clock drives the reset switch 5 even when no photons are incident, so the decrease in bias voltage is periodically compensated for (T1).

[0046] When photons are incident on the SPAD, the photodiode 7 undergoes avalanche multiplication, causing current to flow and the cathode potential to decrease. This decrease in cathode potential is shaped by the wave-forming buffer 6, which performs logic inversion, generating a positive edge. This edge is counted by the incidence counter and also triggers the activation of the one-shot timer circuit 3 (T2).

[0047] The activated one-shot timer circuit 3 continuously outputs a high level. This output is supplied to the AND gate that masks the second reset clock. The AND gate receives the output of the one-shot timer circuit 3 and unmasks the second reset clock. As a result, the second reset clock passes through the AND gate and reaches the input of the NOR gate. The NOR gate mixes the first reset clock with the unmasked second reset clock and supplies it to the reset switch 5. This shortens the operating cycle of the reset switch 5, and the photodiode 7 is quickly reset after the photon is incident. When the cathode potential returns to its original state due to the reset, the output of the wave shaping buffer 6 also returns to low. In this way, the system returns to the state of waiting for the next photon incidence (T3).

[0048] Subsequently, the one-shot timer circuit 3 continues to output an H level, and during this time, regardless of whether photons are incident or not, the operation cycle of the reset switch 5 is governed by a short cycle determined by the second reset clock. During this period, the pixel circuit operates in a way that reduces the possibility of pile-up at the expense of increased power consumption due to frequent resets. Therefore, multiple reset operations are performed in accordance with the detection of a single avalanche multiplication. The duration (predetermined period) of the one-shot timer circuit 3 is set considering the time constant of the phosphor, and the output is stopped at the timing (decay time) when burst emission is expected to end (T4).

[0049] When the output of the one-shot timer circuit 3 stops, the operating cycle of the reset switch 5 returns to the longer cycle determined by the first reset clock, and power consumption decreases.

[0050] In this embodiment, the circuit in Figure 6 is configured to switch whether or not to mix the second reset clock with the first reset clock, but it is not limited to this configuration, and a configuration in which only one of the clocks is selected using a multiplexer is also possible.

[0051] As described above, this embodiment allows for increasing the SPAD reset frequency only during necessary periods and decreasing the reset frequency during other periods. Therefore, it becomes possible to avoid constant high-frequency resets, thereby reducing power consumption.

[0052] (Example 2) Next, the configuration of Example 2 will be described. Example 2 differs from Example 1 in that multiple photodiodes share a timer circuit. Except for the parts related to the features described above, the configuration of the sensor panel 11 in Example 2 is the same as that of the sensor panel 11 in Example 1. Therefore, common components are given the same reference numerals, and their detailed descriptions are omitted.

[0053] Figure 8 shows an embodiment that focuses on the correlation of the operation of photodiodes within a group. Figure 8 is a diagram showing the configuration of multiple SPADs and the peripheral circuits that drive them. On the left side of Figure 8 is a phosphor 111-1 surrounded by a partition wall 111-2, which converts incident X-ray photons into multiple visible light photons. A photodiode semiconductor substrate layer 112-1 is laminated on the phosphor 111-1, and multiple photodiodes, such as photodiodes 7a and 7b, are formed on the substrate. A control circuit semiconductor substrate 112-2 is in contact with the side of the photodiode semiconductor substrate layer 112-1 opposite to the phosphor 111-1 side. Multiple circuits corresponding to the pixel circuits in Figure 6 are integrated and formed on the control circuit semiconductor substrate 112-2. Specifically, a timer circuit 3, an incident count counter 4a and 4b, reset switches 5a and 5b, and wave shaping buffers 6a and 6b are provided on the control circuit semiconductor substrate 112-2.

[0054] Next, we will explain the differences between the circuit in Figure 8 and that in Figure 6. In Figure 6, the one-shot timer circuit 3 and the AND / NOR circuit for clock mixing were provided in a one-to-one correspondence with the photodiode 7. In contrast, the circuit in Figure 8 does not adopt such a configuration, and instead, multiple subpixel circuits (two in the example in Figure 8) belonging to the same subpixel group share the one-shot timer circuit 3 and the clock mixing circuit. Pulses from multiple subpixel circuits are input to the one-shot timer circuit 3, and these can be combined to determine the timer's activation conditions. As mentioned above, there is a correlation regarding photon incidence within the same cell, so if incidence is detected somewhere in the group, it is highly likely that incidence will occur in other subpixels in the group thereafter. Therefore, when photon incidence is detected in one subpixel, the reset operation can be quickly started in the other subpixels as well. Consequently, it is possible to reduce the number of undetected photons caused by pile-up in each subpixel. In addition, since it is not necessary to provide timers etc. individually for each subpixel circuit, there is also the advantage of reducing the size of the circuit.

[0055] Furthermore, the one-shot timer circuit 3 can perform more advanced decision-making and control by monitoring signals from multiple subpixel circuits. For example, if a signal is detected in only a few subpixels when the timer is not activated, it can be estimated that this is breakdown due to dark current rather than photon incidence, and the normal timer activation (execution of the first mode) can be avoided. In this case, the timer is activated (execution of the second mode) for the duration of one short-period second reset clock, resetting the photodiode once and returning to the standby state. Figure 9 is a timing diagram showing the switching of the reset period associated with photon incidence. In Figure 9, the horizontal axis represents the time axis. "Sample.reset.clock" shows the status of the second reset clock. "Photon incident A", "Photon incident B", and "Photon incident C" indicate that visible light photons have been incident. "Timer output" shows the output of the one-shot timer circuit 3. "Reset Tr.ON state" indicates whether the reset switch 5 is conducting or not. As shown in Figure 9, if a small number of photon incidences are detected at a specific timing, the second mode is executed, and the one-shot timer circuit 3 outputs for a short period. Conversely, if a large number of photon incidences are detected, the first mode is executed, and the one-shot timer circuit 3 outputs for a long period.

[0056] Furthermore, to account for cases where some subpixels enter a malfunction mode that constantly outputs a signal, the one-shot timer circuit 3 may be provided with programmability to block some of its inputs.

[0057] As explained above, this embodiment allows for a reduction in the number of one-shot timer circuits 3 relative to the number of photodiodes. Furthermore, the one-shot timer circuits 3 can be operated based on the detection results of multiple photodiodes.

[0058] (Other examples) The present invention is not limited to the above embodiments, and various modifications (including organic combinations of each embodiment) are possible based on the spirit of the invention, and these are not excluded from the scope of the invention.

[0059] A processor or circuit may include a central processing unit (CPU), a microprocessing unit (MPU), a graphics processing unit (GPU), an application-specific integrated circuit (ASIC), or a field-programmable gateway (FPGA). It may also include a digital signal processor (DSP), a dataflow processor (DFP), or a neural processing unit (NPU).

[0060] In the embodiment described above, a configuration in which a single cell contains multiple subpixels was explained, but a configuration in which a single cell contains only one pixel is also possible.

[0061] In the embodiment described above, we explained an example where there is only one subpixel group within a cell, but the pixel configuration is not limited to this. A single pixel may have multiple subpixel groups separated by their position within the cell or other factors.

[0062] In the embodiments described above, the partition wall 111-2 was designed to reflect visible light, but it is not limited to this. The partition wall 111-2 may be adjusted to absorb visible light, or it may have a structure that uses reflection and absorption selectively depending on the location. The property required of the partition wall 111-2 is that it does not affect other cells with fluorescence.

[0063] In the embodiment described above, the structure of a phosphor cell in which the phosphor is separated for each pixel was explained, but a phosphor spanning multiple pixels may also be used.

[0064] In the embodiment described above, Figure 8 shows a configuration in which the incident count counter is provided for each pixel, but this configuration is not the only one. For example, a counter that counts the incident count within a subpixel group may be provided for each subpixel group. Alternatively, a cell may have multiple subpixel groups, and the incident count counter may count the entire cell at once.

[0065] (Note) The disclosure of this embodiment includes the following:

[0066] [Note 1] A phosphor that converts radiation into visible light, The avalanche photodiode for detecting visible light, A reset switch capable of resetting the avalanche photodiode by applying a potential, A radiation detector characterized by having control means for controlling the reset switch so that the reset operation is performed in accordance with the detection of avalanche multiplication in the avalanche photodiode.

[0067] [Note 2] The radiation detector according to Appendix 1, characterized in that the control means controls the reset switch so that the reset operation is performed multiple times based on a single detection of the avalanche multiplication.

[0068] [Note 3] The radiation detector according to Appendix 1 or 2, characterized in that the reset switch performs the reset operation in accordance with the supply of a reset clock.

[0069] [Note 4] The radiation detector according to any one of the appendices 1 to 3, characterized in that the control means supplies one reset clock to the reset switch from among a plurality of reset clocks, including a first reset clock and a second reset clock having a shorter period than the first reset clock.

[0070] [Note 5] The radiation detector according to Appendix 4, characterized by having a first clock circuit for supplying the first reset clock and a second clock circuit for supplying the second reset clock.

[0071] [Note 6] The radiation detector according to Appendix 4 or 5, characterized in that the control means supplies the second reset clock to the reset switch during a predetermined period after the detection of the avalanche multiplication, and supplies the first reset clock to the reset switch during a period different from the predetermined period.

[0072] [Note 7] The avalanche photodiode is activated when avalanche multiplication occurs, and the timer circuit operates for a predetermined period of time. The radiation detector according to Appendix 6, characterized in that the control means supplies the first reset clock to the reset switch during periods when the timer circuit is not operating, and supplies the second reset clock to the reset switch during periods when the timer circuit is operating.

[0073] [Note 8] The radiation detector according to Appendix 6 or 7, characterized in that the predetermined period is a period determined in accordance with the decay time of the emission of the phosphor.

[0074] [Note 9] A radiation detector according to any one of appendices 1 to 8, characterized in that a plurality of the avalanche photodiode and reset switch sets are arranged in an array.

[0075] [Note 10] The radiation detector according to any one of the appendices 1 to 9, characterized in that the phosphor has a cell structure separated by partitions that shield or reflect the visible light, and a plurality of them are arranged in an array.

[0076] [Note 11] The radiation detector according to any one of appendices 1 to 10, characterized in that the cell structure of the phosphor is provided with one cell for each pixel.

[0077] [Note 12] The radiation detector according to Appendix 11, characterized in that a plurality of pairs of the avalanche photodiode and the reset switch are arranged as subpixels within the range of one cell.

[0078] [Note 13] The group of subpixels arranged within the range of one cell shares one timer circuit. The radiation detector according to Appendix 11, characterized in that the timer circuit is activated when any of the multiple avalanche photodiodes belonging to the subpixel group undergoes avalanche multiplication.

[0079] [Note 14] The timer circuit includes a plurality of modes, including a first mode that operates for a predetermined period and a second mode that operates for a shorter period than the first mode. The radiation detector according to Appendix 13, characterized in that the timer circuit determines which of the multiple modes it operates in based on the result of monitoring the state of the multiple avalanche photodiodes belonging to the group of subpixels.

[0080] [Note 15] A radiation detector according to any one of appendices 1 to 14, characterized in that it acquires a radiation image based on the output from multiple pixels.

[0081] [Note 16] A phosphor that converts radiation into visible light, The avalanche photodiode for detecting visible light, A reset switch capable of resetting the avalanche photodiode by applying a potential, A radiation imaging apparatus characterized by having control means for controlling the reset switch so that the reset operation is performed in accordance with the detection of avalanche multiplication in the avalanche photodiode. [Explanation of symbols]

[0082] 1. Radiation imaging system 3. One-shot timer circuit 4. Incidence Count Counter 5. Reset switch 6. Buffer for wave shaping type 7 Photodiode 111-1 Phosphor 111-2 Bulkhead 112-1 Semiconductor substrate for photodiodes 112-2 Semiconductor substrate for control circuits

Claims

1. A phosphor that converts radiation into visible light, The avalanche photodiode for detecting visible light, A reset switch capable of resetting the avalanche photodiode by applying a potential, A radiation detector characterized by having control means for controlling the reset switch so that the reset operation is performed in accordance with the detection of avalanche multiplication in the avalanche photodiode.

2. The radiation detector according to claim 1, characterized in that the control means controls the reset switch so that the reset operation is performed multiple times based on a single detection of the avalanche multiplication.

3. The radiation detector according to claim 1, characterized in that the reset switch performs the reset operation in accordance with the supply of a reset clock.

4. The radiation detector according to claim 3, characterized in that the control means supplies one reset clock to the reset switch from among a plurality of reset clocks, including a first reset clock and a second reset clock having a shorter period than the first reset clock.

5. The radiation detector according to claim 4, further comprising a first clock circuit for supplying the first reset clock and a second clock circuit for supplying the second reset clock.

6. The radiation detector according to claim 4, characterized in that the control means supplies the second reset clock to the reset switch during a predetermined period after the detection of the avalanche multiplication, and supplies the first reset clock to the reset switch during a period different from the predetermined period.

7. The avalanche photodiode is activated when avalanche multiplication occurs, and the timer circuit operates for a predetermined period of time. The radiation detector according to claim 6, characterized in that the control means supplies the first reset clock to the reset switch during periods when the timer circuit is not operating, and supplies the second reset clock to the reset switch during periods when the timer circuit is operating.

8. The radiation detector according to claim 6 or 7, characterized in that the predetermined period is a period determined in accordance with the decay time of the emission of the phosphor.

9. The radiation detector according to claim 1, characterized in that a plurality of sets of the avalanche photodiode and the reset switch are arranged in an array.

10. The radiation detector according to claim 1, characterized in that the phosphor has a cell structure separated by partitions that shield or reflect the visible light, and a plurality of them are arranged in an array.

11. The radiation detector according to claim 10, characterized in that the cell structure of the phosphor is provided with one cell for each pixel.

12. The radiation detector according to claim 11, characterized in that a plurality of pairs of the avalanche photodiode and the reset switch are arranged as subpixels within the range of one cell.

13. The group of subpixels arranged within the range of one cell shares one timer circuit. The radiation detector according to claim 11, characterized in that the timer circuit is activated when any of the multiple avalanche photodiodes belonging to the subpixel group undergoes avalanche multiplication.

14. The timer circuit includes a plurality of modes, including a first mode that operates for a predetermined period and a second mode that operates for a shorter period than the first mode. The radiation detector according to claim 13, characterized in that the timer circuit determines which of the multiple modes it operates in based on the result of monitoring the state of the multiple avalanche photodiodes belonging to the group of subpixels.

15. The radiation detector according to claim 1, characterized in that it acquires a radiation image based on the output from multiple pixels.

16. A phosphor that converts radiation into visible light, The avalanche photodiode for detecting visible light, A reset switch capable of resetting the avalanche photodiode by applying a potential, A radiation imaging apparatus characterized by having control means for controlling the reset switch so that the reset operation is performed in accordance with the detection of avalanche multiplication in the avalanche photodiode.

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