Electronic terminal device, substrate, and method for manufacturing an electronic terminal device

Abstract

The objective is to provide an electronic terminal device and substrate that can suppress uneven thickness, as well as a method for manufacturing an electronic terminal device. [Solution] The electronic terminal device according to the embodiment comprises a core layer having a first opening and a second opening, an IC module disposed in the first opening, a first surface layer laminated on one main surface of the core layer, and a second surface layer laminated on the other main surface of the core layer, wherein a portion of at least one of the first surface layer and the second surface layer fills the first opening and the second opening.

Description

Technical Field

[0001] Embodiments of the present invention relate to an electronic terminal device, a substrate, and a method for manufacturing an electronic terminal device.

Background Art

[0002] An electronic terminal device includes, for example, a base material layer and an IC module embedded in the base material layer. Such an electronic terminal device is manufactured, for example, by integrating the base material layer and the IC module by hot pressing. At this time, in the electronic terminal device, the thickness of the portion where the IC module is mounted may become thicker than other portions, and the thickness of the electronic terminal device may become non-uniform.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Patent Document 5

Summary of the Invention

Problems to be Solved by the Invention

[0004] The problem of the present embodiment is to provide an electronic terminal device and a substrate capable of suppressing non-uniform thickness, and a method for manufacturing an electronic terminal device.

Means for Solving the Problems

[0005] The electronic terminal device according to the embodiment comprises a core layer having a first opening and a second opening, an IC module disposed within the first opening, a first surface layer laminated on one main surface of the core layer, and a second surface layer laminated on the other main surface of the core layer. A portion of at least one of the first surface layer and the second surface layer fills the first opening and the second opening.

[0006] A method for manufacturing an electronic terminal device according to an embodiment includes the steps of: preparing a core layer having a first opening and a second opening; arranging an IC module in the first opening; stacking a first surface layer, a core layer, and a second surface layer in this order to obtain a laminate; and hot-pressing the laminate to melt at least one of the first surface layer and the second surface layer, and filling the first opening and the second opening with a portion of the molten surface layer of at least one of the first surface layer and the second surface layer. [Brief explanation of the drawing]

[0007] [Figure 1] Figure 1 is a plan view of an electronic terminal device according to the first configuration example. [Figure 2] Figure 2 is an exploded perspective view showing the main components of an electronic terminal device. [Figure 3] Figure 3 is a plan view showing an enlarged view of the electronic terminal device. [Figure 4] Figure 4 is a cross-sectional view along the line IV-IV shown in Figure 3. [Figure 5] Figure 5 is a cross-sectional view of an electronic terminal device according to the second configuration example. [Figure 6] Figure 6 is a cross-sectional view of an electronic terminal device according to the third configuration example. [Figure 7] Figure 7 is a cross-sectional view of an electronic terminal device according to the fourth configuration example. [Figure 8] Figure 8 is a plan view of the base according to the first configuration example. [Figure 9] Figure 9 is a cross-sectional view along the line IX-IX shown in Figure 8. [Figure 10] Figure 10 is a plan view of the base according to the second configuration example. [Figure 11]FIG. 11 is a cross-sectional view for explaining an example of a method for manufacturing an electronic terminal device. [Figure 12] FIG. 12 is a cross-sectional view for explaining an example of a method for manufacturing an electronic terminal device. [Figure 13] FIG. 13 is a cross-sectional view for explaining an example of a method for manufacturing an electronic terminal device. [Figure 14] FIG. 14 is a cross-sectional view showing an electronic terminal device according to a comparative example.

Embodiments for Carrying Out the Invention

[0008] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that the disclosure is merely an example, and for those that can be easily conceived by those skilled in the art with appropriate modifications while maintaining the gist of the invention, they are naturally included in the scope of the present invention. Also, for the sake of clarity of the drawings and the description, the width, thickness, shape, etc. of each part may be schematically represented compared to the actual state, but this is merely an example and does not limit the interpretation of the present invention. Further, in this specification and each figure, elements that are the same as those described above with respect to the previously shown figures may be assigned the same reference numerals, and detailed descriptions may be appropriately omitted.

[0009] (First Embodiment) Hereinafter, the electronic terminal device according to the first embodiment will be described in detail with reference to the drawings.

[0010] (First Configuration Example) FIG. 1 is a plan view of an electronic terminal device 10 according to the first configuration example. In the figure, an X direction, a Y direction, and a Z direction that are perpendicular to each other are defined. The X direction corresponds to the width direction of the electronic terminal device 10. The Y direction corresponds to the length direction of the electronic terminal device 10. The Z direction corresponds to the thickness direction of the electronic terminal device 10. Also, it is assumed that there is an observation position for observing the electronic terminal device 10 on the tip side of the arrow indicating the Z direction, and looking from this observation position toward the XY plane defined by the X direction and the Y direction is referred to as a plan view.

[0011] The electronic terminal device 10 according to the first configuration example is, for example, a wireless card such as an IC card, a wireless tag, a wireless sheet, etc. In the example shown in FIG. 1, the electronic terminal device 10 constitutes a wireless IC card. The electronic terminal device 10 includes a rectangular plate-shaped base material layer 20, an IC module 30 embedded in the base material layer 20, and an antenna 100 for communicating with an external terminal.

[0012] FIG. 2 is an exploded perspective view showing the main part of the electronic terminal device 10. As shown in FIG. 2, the base material layer 20 of the electronic terminal device 10 includes a first surface layer 41, a second surface layer 42, and a core layer 50. In the example shown in FIG. , the core layer 50 includes a first core layer 51 and a second core layer 52. The first surface layer 41, the first core layer 51, the second core layer 52, and the second surface layer 42 are laminated in this order in the Z direction.

[0013] Each of the first surface layer 41, the second surface layer 42, the first core layer 51, and the second core layer 52 has a rectangular flat plate shape with substantially the same dimensions in the XY plane. The first surface layer 41, the second surface layer 42, the first core layer 51, and the second core layer 52 overlap each other in plan view.

[0014] The first core layer 51 has through holes 511 and 512. In the example shown in FIG. 2, the first core layer 51 has a plurality of, for example, four through holes 512, and the through holes 512 are provided around the through hole 511. The IC module 30 is disposed in the through hole 511. An antenna 100 is provided on the surface of the first core layer 51 facing the second core layer 52. The antenna 100 is connected to the IC module 30.

[0015] The second core layer 52 has through holes 521 and 522. In the example shown in FIG. 2, the second core layer 52 has a plurality of, for example, four through holes 522, and the through holes 522 are provided around the through hole 521. The through hole 521 of the second core layer 52 faces the through hole 511 of the first core layer 51.

[0016] Figure 3 is a plan view showing an enlarged portion of the electronic terminal device 10. In Figure 3, the first surface layer 41 and the second surface layer 42 are omitted from the illustration. The second core layer 52 is shown as a dashed transparent line. Figure 4 is a cross-sectional view along the line IV-IV shown in Figure 3.

[0017] The core layer 50 has a main surface 50a and a main surface 50b opposite to the main surface 50a. The main surface 50a faces the first surface layer 41. The main surface 50b faces the second surface layer 42. In the examples shown in Figures 3 and 4, the surface of the first core layer 51 facing the first surface layer 41 corresponds to the main surface 50a, and the surface of the second core layer 52 facing the second surface layer 42 corresponds to the main surface 50b.

[0018] The first core layer 51 has through holes 511 and 512. The second core layer 52 also has through holes 521 and 522. As shown in Figures 3 and 4, the through hole 511 is formed to a size and shape corresponding to the substrate 60 of the IC module 30. The through hole 521 is formed to a size and shape corresponding to the sealing portion 80 of the IC module 30.

[0019] The core layer 50 has a first opening 531 and a second opening 532. The first opening 531 is a through hole, formed by the overlapping of through holes 511 and 521 in a plan view. The second opening 532 is a through hole, formed by the overlapping of through holes 512 and 522 in a plan view.

[0020] The second opening 532 is provided around the first opening 531 in a plan view. The second opening 532 is provided, for example, in a region within 5 mm of the outer edge of the first opening 531 in a plan view. In the example shown in Figures 3 and 4, the core layer 50 has four second openings 532a, 532b, 532c, and 532d. The second openings 532a and 532b are located on either side of the first opening 531 in the X direction. The second openings 532c and 532d are located on either side of the first opening 531 in the Y direction.

[0021] The shape of the second opening 532 is not particularly limited and can be rectangular or circular, for example. In the example shown in Figure 3, the second openings 532a, 532b, 532c, and 532d are rectangular. Furthermore, the longer sides of the rectangular second openings 532a, 532b, 532c, and 532d are positioned along the outer edge of the IC module 30. The longer sides of the rectangular openings are between 1 / 2 and 2 / 3 the length of the IC module. The width of the second opening 532 in the X and Y directions is greater than the thickness of the core layer 50.

[0022] The core layer 50 includes an IC module 30. The IC module 30 includes a substrate 60, an IC chip 70 mounted on the substrate 60, and a pair of antenna terminals 90a and 90b provided on the substrate 60.

[0023] In the example shown in Figure 3, the substrate 60 is formed in a plate shape and is rectangular in plan view. The substrate 60 is not limited to a rectangular shape and can be any other shape. The substrate 60 is made of an electrically insulating material, such as glass epoxy.

[0024] In one example, the IC chip 70 is mounted in the center of the substrate 60 via adhesive. The IC chip 70 is a semiconductor chip, such as a large-scale integrated circuit (LSI).

[0025] The antenna terminals 90a and 90b are positioned on either side of the IC chip 70 in the X direction. The antenna terminals 90a and 90b are electrically connected to the IC chip 70 by connecting wires 71. In one example, the connecting wires 71 are gold wires (bonding wires) formed by wire bonding.

[0026] The IC chip 70 and connecting wiring 71 mounted on the substrate 60 are covered and sealed by a sealing portion 80. The sealing portion 80 is formed of an electrically insulating molding resin, such as a thermosetting epoxy resin. The outer contour of the sealing portion 80 is formed, for example, in a rectangular shape.

[0027] The core layer 50 further comprises an antenna 100. In the example shown in Figures 3 and 4, the antenna 100 is provided between the first core layer 51 and the second core layer 52. The antenna 100 is formed in a spiral shape along the outer edge of the core layer 50 and at a predetermined distance from the outer edge of the core layer 50. The antenna 100 is not limited to a shape corresponding to the outer edge of the core layer 50, but may have a circular, elliptical, or any other arbitrary shape. The antenna 100 is an antenna coil formed of a metal such as copper, aluminum, and silver.

[0028] In the examples shown in Figures 3 and 4, both ends of the antenna 100 are bent into a U-shape. The bent ends of the antenna 100 are located between the first aperture 531 and the second aperture 532a, and between the first aperture 531 and the second aperture 532b, respectively, but are not limited to these positions.

[0029] The antenna terminals 90a and 90b of the IC module 30 are electrically connected to the antenna 100 by making contact with the antenna 100, respectively.

[0030] The IC module 30 is located within the first opening 531 of the core layer 50. In the example shown in Figures 3 and 4, the substrate 60 and antenna terminals 90a and 90b are housed in the through-hole 511, and the sealing portion 80 is housed in the through-hole 512.

[0031] The first surface layer 41 is laminated on the main surface 50a of the core layer. The second surface layer 42 is laminated on the main surface 50b of the core layer 50. In other words, the first surface layer 41 covers the main surface 50a and the surface of the IC module 30 opposite to the IC chip 70 mounting surface, while the second surface layer 42 covers the main surface 50b and the IC chip 70 mounting surface of the IC module 30.

[0032] The first opening 531 and the second opening 532 are filled with a portion of at least one of the surface layers of the first surface layer 41 and the second surface layer 42, a portion of at least one of the core layers of the first core layer 51 and the second core layer 52, or both a portion of the surface layer and a portion of the core layer. In the examples shown in Figures 3 and 4, the gap between the first opening 531 and the IC module 30, and the second opening 532, are each filled with a portion of the first surface layer 41 and the second surface layer 42. In this case, the boundary between the first surface layer 41 and the second surface layer 42 may be clearly separated within the first opening 531 and the second opening 532, or the first surface layer 41 and the second surface layer 42 may be mixed together.

[0033] The first surface layer 41 and the second surface layer 42 are sheets containing a thermoplastic material such as a resin. The first surface layer 41 and the second surface layer 42 may be made of the same material as each other. The first core layer 51 and the second core layer 52 are sheets containing a resin or the like. The first core layer 51 and the second core layer 52 may be made of the same material as the first surface layer 41 and the second surface layer 42.

[0034] Next, we will describe an electronic terminal device relating to another configuration example. In the other configuration examples described below, the same reference numerals are used for parts that are the same as those in the first configuration example described above, and their detailed explanations are simplified or omitted. The explanation will focus on the parts that differ from the first configuration example.

[0035] (Second configuration example) The electronic terminal device according to the second configuration example will now be described. The electronic terminal device 10 according to the second configuration example is configured in the same way as the first configuration example described above, except for the configuration described in the second configuration example. Figure 5 is a cross-sectional view of the electronic terminal device 10 according to the second configuration example.

[0036] The electronic terminal device 10 according to the second configuration example differs from the electronic terminal device 10 according to the first configuration example in that the second opening 532 is a recess facing the first surface layer 41.

[0037] The first core layer 51 has through holes 511 and 512. The second core layer 52 has only the through hole 521 and does not have the through hole 522.

[0038] The core layer 50 has a first opening 531 and a second opening 532. The first opening 531 is a through hole, formed by the overlapping of through holes 511 and 521 in a plan view.

[0039] The second opening 532 is a recess facing the first surface layer 41. The recess is formed by a through hole 512 and a second core layer 52. The side of the through hole 512 corresponds to the side of the recess, and the surface of the second core layer 52 facing the first surface layer 41 corresponds to the bottom surface of the recess.

[0040] The first opening 531 and the second opening 532 are filled with a portion of at least one of the surface layers of the first surface layer 41 and the second surface layer 42, a portion of at least one of the core layers of the first core layer 51 and the second core layer 52, or both a portion of the surface layer and a portion of the core layer. In the example shown in Figure 5, a portion of the first surface layer 41 and the second surface layer 42 is filled in the gap between the first opening 531 and the IC module 30. Also, a portion of the first surface layer 41 is filled in the second opening 532.

[0041] (Example of configuration 3) The electronic terminal device according to the third configuration example will now be described. The electronic terminal device 10 according to the third configuration example is configured in the same way as the first configuration example described above, except for the configuration described in the third configuration example. Figure 6 is a cross-sectional view of the electronic terminal device 10 according to the third configuration example.

[0042] The electronic terminal device 10 according to the third configuration example differs from the electronic terminal device 10 according to the first configuration example in that the second opening 532 is a recess facing the second surface layer 42.

[0043] The first core layer 51 has only through holes 511 and no through holes 512. The second core layer 52 has through holes 521 and 522.

[0044] The core layer 50 has a first opening 531 and a second opening 532. The first opening 531 is a through hole, formed by the overlapping of through holes 511 and 521 in a plan view.

[0045] The second opening 532 is a recess facing the second surface layer 42. The recess is formed by a through hole 522 and the first core layer 51. The side of the through hole 522 corresponds to the side of the recess, and the surface of the first core layer 51 facing the second surface layer 42 corresponds to the bottom surface of the recess.

[0046] The first opening 531 and the second opening 532 are filled with a portion of at least one of the surface layers of the first surface layer 41 and the second surface layer 42, a portion of at least one of the core layers of the first core layer 51 and the second core layer 52, or both a portion of the surface layer and a portion of the core layer. In the example shown in Figure 6, a portion of the first surface layer 41 and the second surface layer 42 is filled in the gap between the first opening 531 and the IC module 30. Also, a portion of the second surface layer 42 is filled in the second opening 532.

[0047] (Example of configuration 4) The electronic terminal device according to the fourth configuration example will now be described. The electronic terminal device 10 according to the fourth configuration example is configured in the same way as the first configuration example described above, except for the configuration described in the fourth configuration example. Figure 7 is a cross-sectional view of the electronic terminal device 10 according to the fourth configuration example.

[0048] The electronic terminal device 10 according to the fourth configuration example differs from the electronic terminal device 10 according to the first configuration example in that the second opening 532 is a recess facing the first surface layer 41 and a recess facing the second surface layer 42.

[0049] The first core layer 51 has through holes 511 and 512. The second core layer 52 also has through holes 521 and 522. Through holes 512 and 522 do not overlap in a plan view.

[0050] The core layer 50 has a first opening 531 and a second opening 532. The first opening 531 is a through hole, formed by the overlapping of through holes 511 and 521 in a plan view.

[0051] The second opening 532 is a recess facing the first surface layer 41 and a recess facing the second surface layer 42. The recess facing the first surface layer 41 is formed by a through hole 512 and the second core layer 52. The side of the through hole 512 corresponds to the side of the recess, and the surface of the second core layer 52 facing the first surface layer 41 corresponds to the bottom surface of the recess. The recess facing the second surface layer 42 is formed by a through hole 522 and the first core layer 51. The side of the through hole 522 corresponds to the side of the recess, and the surface of the first core layer 51 facing the second surface layer 42 corresponds to the bottom surface of the recess.

[0052] The first opening 531 and the second opening 532 are filled with a portion of at least one of the surface layers of the first surface layer 41 and the second surface layer 42, a portion of at least one of the core layers of the first core layer 51 and the second core layer 52, or both a portion of the surface layer and a portion of the core layer. In the example shown in Figure 7, a portion of the first surface layer 41 and the second surface layer 42 is filled in the gap between the first opening 531 and the IC module 30. In addition, a portion of the first surface layer 41 is filled in the recess facing the first surface layer 41, and a portion of the second surface layer 42 is filled in the recess facing the second surface layer 42.

[0053] (Second Embodiment) Next, a substrate according to the second embodiment will be described. In the embodiments described below, the same reference numerals are used for parts that are the same as those in the first embodiment described above, and their detailed descriptions are simplified or omitted. The focus will be on describing the parts that differ from the first embodiment in detail.

[0054] (Example configuration 1) Figure 8 is a plan view of the substrate 110 according to the first configuration example. In Figure 8, the first surface layer 41 is shown through the viewfinder. Figure 9 is a cross-sectional view along the line IX-IX shown in Figure 8.

[0055] The substrate 110 comprises a rectangular substrate layer 20 and a plurality of IC modules 30 embedded in the substrate layer 20. The substrate 110 also has a plurality of electronic terminal areas 120 arranged in the X and Y directions.

[0056] The substrate layer 20 of the base body 110 comprises a first surface layer 41, a second surface layer 42, and a core layer 50. For example, the core layer 50 comprises a first core layer 51 and a second core layer 52. The first surface layer 41, the first core layer 51, the second core layer 52, and the second surface layer 42 are stacked in this order along the Z direction.

[0057] Each of the first surface layer 41, the second surface layer 42, the first core layer 51, and the second core layer 52 has a plate-like shape that is generally parallel to the XY plane. The first surface layer 41, the second surface layer 42, the first core layer 51, and the second core layer 52 overlap each other in a plan view.

[0058] The core layer 50 has a main surface 50a and a main surface 50b opposite to the main surface 50a. The main surface 50a faces the first surface layer 41. The main surface 50b faces the second surface layer 42. In the examples shown in Figures 8 and 9, the surface of the first core layer 51 facing the first surface layer 41 corresponds to the main surface 50a, and the surface of the second core layer 52 facing the second surface layer 42 corresponds to the main surface 50b.

[0059] The first core layer 51 has a plurality of through holes 511, 512. The second core layer 52 also has a plurality of through holes 521, 522. As shown in Figure 9, each of the plurality of through holes 511 is formed to a size and shape corresponding to the substrate 60 of the IC module 30. Each of the plurality of through holes 521 is formed to a size and shape corresponding to the sealing portion 80 of the IC module 30.

[0060] The core layer 50 has a plurality of first openings 531 and a plurality of second openings 532. Each of the plurality of first openings 531 is provided in each of the plurality of electronic terminal areas 120. The first openings 531 are through holes, and are formed by the overlapping of through holes 511 and through holes 521 in a plan view.

[0061] Multiple second openings 532 are provided within the electronic terminal area 120 and at least one of adjacent electronic terminal areas 120 in the X or Y direction. In the example shown in Figures 8 and 9, the second openings 532 are provided between adjacent electronic terminal areas 120 in the X and Y directions. Although not shown, when the second openings 532 are provided within the electronic terminal area 120, they are provided, for example, in an area within 5 mm of the outer edge of the first opening 531.

[0062] In the examples shown in Figures 8 and 9, multiple second openings 532 are provided between the outer edge of the base body 110 and the electronic terminal area 120. However, it is not necessary to provide second openings 532 between the outer edge of the base body 110 and the electronic terminal area 120.

[0063] In the examples shown in Figures 8 and 9, each of the multiple second openings 532 has a rectangular shape. Each of the multiple second openings 532 is positioned such that the longer side of the rectangle is aligned with the outer edge of the electronic terminal area 120. The longer side of the rectangle is also at least half the length of the electronic terminal area 120. The width of each of the multiple second openings 532 in the X and Y directions is greater than the thickness of the core layer 50.

[0064] The multiple second openings 532 are through holes and at least one of recesses facing the first surface layer 41 or the second surface layer 42. In the example shown in Figures 8 and 9, the second openings 532 are through holes, formed by through holes 512 and 522 overlapping each other in a plan view.

[0065] Each of the multiple electronic terminal areas 120 comprises each of the multiple IC modules 30. The IC modules 30 are configured in the same manner as described in the first embodiment above.

[0066] Each of the multiple electronic terminal regions 120 further comprises each of the multiple antennas 100. In the example shown in Figure 9, the antenna 100 is provided between the first core layer 51 and the second core layer 52. The antenna 100 is also formed in a spiral shape along the outer edge of the electronic terminal region 120 and at a predetermined distance from the outer edge of the electronic terminal region 120.

[0067] Although not shown in the diagram, the antenna terminals 90a and 90b of the IC module 30 are electrically connected to the antenna 100, which is located in the same electronic terminal area 120, by contacting the antenna 100, respectively.

[0068] Each of the multiple IC modules 30 is located within each of the multiple first openings 531. In the example shown in Figure 9, the substrate 60 and antenna terminals 90a and 90b (not shown) are housed in the through-hole 511, and the sealing portion 80 is housed in the through-hole 512.

[0069] The first surface layer 41 is laminated on the main surface 50a of the core layer. The second surface layer 42 is laminated on the main surface 50b of the core layer 50. In other words, the first surface layer 41 covers the main surface 50a and the surface of the IC module 30 opposite to the IC chip 70 mounting surface, while the second surface layer 42 covers the main surface 50b and the IC chip 70 mounting surface of the IC module 30.

[0070] The first opening 531 and the second opening 532 are filled with a portion of at least one of the surface layers of the first surface layer 41 and the second surface layer 42, a portion of at least one of the core layers of the first core layer 51 and the second core layer 52, or a portion of the surface layer and a portion of the core layer, or both. In the example shown in Figure 9, the gap between the first opening 531 and the IC module 30, and the second opening 532, are each filled with a portion of the first surface layer 41 and the second surface layer 42. In this case, the boundary between the first surface layer 41 and the second surface layer 42 may be clearly separated within the first opening 531 and the second opening 532, or the first surface layer 41 and the second surface layer 42 may be mixed together.

[0071] Next, we will describe the substrates related to other configuration examples. In the other configuration examples described below, the same reference numerals are used for parts that are the same as those in the first configuration example described above, and their detailed explanations are simplified or omitted. The explanation will focus on the parts that differ from the first configuration example.

[0072] (Second configuration example) The base according to the second configuration example will now be described. The base 110 according to the second configuration example is configured in the same way as the first configuration example described above, except for the configuration described in the second configuration example. Figure 10 is a plan view of the base 110 according to the second configuration example.

[0073] The base 110 according to the second configuration example differs from the base 110 according to the first configuration example in that the multiple second openings 532 have a circular shape in a plan view.

[0074] In the example shown in Figure 10, two second openings 532 are arranged side-by-side in the Y direction between adjacent electronic terminal regions 120 in the X direction, and three second openings 532 are arranged side-by-side in the X direction between adjacent electronic terminal regions 120 in the Y direction. Note that the number of second openings 532 is not limited to the example shown.

[0075] Next, a method for manufacturing the electronic terminal device 10 according to the first embodiment will be described. Here, a method for manufacturing the electronic terminal device 10 according to the first configuration example shown in Figure 4 will be described. Figures 11, 12, and 13 are cross-sectional views illustrating an example of a method for manufacturing the electronic terminal device 10.

[0076] First, a core layer 50 having a first opening 531 and a second opening 532 is prepared. In the example shown in Figure 11, a first core layer 51 and a second core layer 52 are prepared as the core layer 50.

[0077] Next, as shown in Figure 11, the IC module 30 is placed in the first opening 531. For example, the IC module 30 is placed in the first opening 531 as follows: An antenna 100 is formed on the first core layer 51, and the IC module 30 is placed in the through hole 511 of the first core layer 51. The antenna terminals 90a and 90b of the IC module are brought into contact with the antenna 100 and electrically connected. Next, a sealing portion 80 is placed in the through hole 521 of the second core layer 52, and the second core layer 52 is stacked on the first core layer 51 such that the through hole 512 and the through hole 522 overlap in a plan view. In this way, the IC module 30 is placed in the first opening 531. The thickness of the core layer 50 on which the IC module 30 is placed is, for example, 500 μm at its thickest point.

[0078] Next, as shown in Figure 12, the first surface layer 41 is laminated on the main surface 50a of the core layer 50, and the second surface layer 42 is laminated on the main surface 50b to form a laminate 10'. The thickness of the first surface layer 41 and the second surface layer 42 is, for example, 200 μm.

[0079] Next, as indicated by the arrows in Figure 12, hot pressing is performed on the laminate 10' in the Z direction from the side of the first surface layer 41 and the second surface layer 42. The hot pressing is performed, for example, by a vacuum hot pressing apparatus. When hot pressing is performed, as shown in Figure 13, at least a portion of the first surface layer 41 and the second surface layer 42 melts due to the heat of the hot pressing and fills the first opening 531 and the second opening 532. In addition, the surface of the first surface layer 41 and the surface of the second surface layer 42 are formed into flat surfaces without irregularities. In this way, the electronic terminal device 10 shown in Figure 4 is manufactured. The thickness of the electronic terminal device 10 is, for example, 340 μm or more and 400 μm or less.

[0080] Furthermore, the heat from the hot press is more easily transferred to the first surface layer 41 and the second surface layer 42, which are located in the outermost layer of the laminate 10', than to the first core layer 51 and the second core layer 52. For this reason, even when the first surface layer 41, the second surface layer 42, the first core layer 51, and the second core layer 52 are formed from the same material, the first core layer 51 and the second core layer 52 do not melt and block the first opening 531 and the second opening 532, and at least a portion of the first surface layer 41 and the second surface layer 42 fills the first opening 531 and the second opening 532.

[0081] Next, a method for manufacturing the substrate 110 according to the second embodiment, and a method for manufacturing the electronic terminal device 10 according to the first embodiment using the substrate 110 according to the second embodiment will be described.

[0082] The substrate 110 can be manufactured using the same process as described above for the manufacturing method of the electronic terminal device 10.

[0083] First, a core layer 50 having a plurality of first openings 531 and a plurality of second openings 532 is prepared. For example, a first core layer 51 and a second core layer 52 are prepared as the core layer 50.

[0084] Next, each of the multiple IC modules 30 is placed in each of the multiple first openings 531. For example, each of the multiple IC modules 30 is placed as follows: Multiple antennas 100 are formed on the first core layer 51 for each electronic terminal area 120. Each of the multiple IC modules 30 is placed in each of the multiple through holes 511 of the first core layer 51. The antenna terminals 90a and 90b of the IC modules are brought into contact with the antennas 100 formed in the same electronic terminal area 120 and electrically connected. Next, the second core layer 52 is stacked on the first core layer 51 such that each of the sealing portions 80 of the multiple IC modules is placed in each of the multiple through holes 521 of the second core layer 52. In this way, each of the multiple IC modules 30 is placed in each of the multiple first openings 531. The thickness of the core layer 50 on which the multiple IC modules 30 are placed is, for example, 500 μm at its thickest point.

[0085] Next, the first surface layer 41 is laminated onto the main surface 50a of the core layer 50, and the second surface layer 42 is laminated onto the main surface 50b to form a laminate 10'. The thickness of the first surface layer 41 and the second surface layer 42 is, for example, 200 μm.

[0086] Next, hot pressing is performed on the laminate 10' in the Z direction from the side of the first surface layer 41 and the second surface layer 42. The hot pressing is performed, for example, by a vacuum hot pressing apparatus. When hot pressing is performed, at least a portion of the first surface layer 41 and the second surface layer 42 is melted by the heat of the hot pressing and fills each of the plurality of first openings 531 and plurality of second openings 532. In addition, the surface of the first surface layer 41 and the surface of the second surface layer 42 are formed into flat surfaces without irregularities. In this way, the substrate 110 shown in Figures 8 to 10 is manufactured. The thickness of the substrate 110 is, for example, 340 μm or more and 400 μm or less. Multiple electronic terminal devices 10 are manufactured by cutting out each electronic terminal region 120 shown in Figures 8 and 10 from the substrate 110.

[0087] As described above, the electronic terminal device 10 and the base body 110 can be manufactured.

[0088] The effects of the electronic terminal device according to the first embodiment and the substrate according to the second embodiment, as described above, will be explained below. Figure 14 is a cross-sectional view showing an electronic terminal device 200 according to a comparative example. The electronic terminal device 200 according to the comparative example differs in that the core layer 50 does not have a second opening 532.

[0089] In electronic terminal devices, the thickness of the portion where the IC module is mounted may be thicker than other portions, resulting in uneven thickness of the electronic terminal device. In the manufacturing of electronic terminal devices, when hot pressing is performed on the laminate, the surface layer located around the IC module is melted, and a portion of the surface layer is filled into the gap between the first opening and the IC module. By reducing the thickness of the surface layer around the IC module, uneven thickness of the electronic terminal device can be suppressed.

[0090] However, the gap between the first opening and the IC module alone is insufficient to fill the surface layer, and the thickness around the IC module may become thicker than other parts. To resolve this, making the first opening larger can secure the volume needed to fill the surface layer, but this may cause the surface layer located around the first opening to be concentrated in the gap, potentially creating a recess on the surface of the electronic terminal device.

[0091] The electronic terminal device according to the first embodiment comprises a core layer having a first opening and a second opening, an IC module disposed within the first opening, a first surface layer laminated on one main surface of the core layer, and a second surface layer laminated on the other main surface of the core layer. Furthermore, in the electronic terminal device according to the first embodiment, a portion of at least one of the first surface layer and the second surface layer is filled into the first opening and the second opening.

[0092] In the electronic terminal device according to the first embodiment, since the surface layer can be filled into the first and second openings, it is possible to fill a larger area of ​​the surface layer and to distribute the location of the surface layer filling compared to the electronic terminal device according to the comparative example which has only the first opening. As a result, the electronic terminal device according to the first embodiment can suppress uneven thickness of the electronic terminal device.

[0093] The substrate according to the second embodiment can also achieve the same effects as the electronic terminal device according to the first embodiment.

[0094] While several embodiments of the present invention have been described, these embodiments are presented as examples only and are not intended to limit the scope of the invention. These novel embodiments can be implemented in a variety of other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, as well as in the claims and their equivalents. Multiple embodiments can also be combined as needed. [Explanation of Symbols]

[0095] 10...Electronic terminal device, 20...Base material layer, 30...IC module, 41...First surface layer, 42...Second surface layer, 50...Core layer, 51...First core layer, 52...Second core layer, 60...Substrate, 70...IC chip, 71...Connection wiring, 80...Sealing part, 90...Antenna connection part, 100...Antenna, 110...Base body, 120...Electronic terminal area.

Claims

1. A core layer having a first opening and a second opening, An IC module placed within the first opening, A first surface layer laminated on one main surface of the core layer, The core layer comprises a second surface layer laminated on the other main surface of the core layer, An electronic terminal device in which a portion of at least one of the first surface layer and the second surface layer fills the first opening and the second opening.

2. The electronic terminal device according to claim 1, further comprising an antenna provided in the core layer and connected to the IC module.

3. The electronic terminal device according to claim 1, wherein the core layer comprises a first core layer disposed between the first surface layer and the second surface layer, and a second core layer disposed between the first core layer and the second surface layer.

4. The core layer has through holes formed in the first core layer, The electronic terminal device according to claim 3, wherein the second opening is a recess formed by a through hole formed in the first core layer and the second core layer.

5. The core layer has through holes formed in the second core layer, The electronic terminal device according to claim 3, wherein the second opening is a recess formed by a through hole formed in the second core layer and the first core layer.

6. The core layer has through holes formed in the first core layer and through holes formed in the second core layer, The electronic terminal device according to claim 3, wherein the second opening is a through hole formed by the superposition of a through hole formed in the first core layer and a through hole formed in the second core layer in a plan view.

7. The electronic terminal device according to claim 3, wherein the first surface layer and the second surface layer are formed of the same material.

8. The electronic terminal device according to claim 7, wherein the first core layer and the second core layer are formed of the same material as the first surface layer and the second surface layer.

9. The electronic terminal device according to claim 1, wherein the second opening is formed in an area within 5 mm from the outer edge of the first opening.

10. The second opening has a rectangular shape in plan view, The second opening is positioned such that the long side of the rectangular shape is along the outer edge of the IC module. The electronic terminal device according to claim 1, wherein the longer side has a length of 1 / 2 or more of the length of the IC module.

11. The electronic terminal device according to claim 1, wherein the width of the second opening is greater than the thickness of the core layer.

12. A substrate having a plurality of electronic terminal regions arranged in a first direction and a second direction perpendicular to the first direction, The aforementioned substrate is A core layer having a plurality of first openings and a plurality of second openings provided in each of the plurality of electronic terminal areas, A plurality of IC modules arranged within the plurality of first openings, A first surface layer laminated on one main surface of the core layer, The core layer comprises a second surface layer laminated on the other main surface of the core layer, A substrate in which a portion of at least one of the first surface layer and the second surface layer fills each of the plurality of first openings and the plurality of second openings.

13. The substrate according to claim 12, wherein the plurality of second openings are through holes and at least one of the first surface layer or a recess facing the second surface layer.

14. The substrate according to claim 13, wherein the plurality of second openings are formed within the electronic terminal area and between adjacent electronic terminal areas in the first or second direction.

15. A step of preparing a core layer having a first opening and a second opening, The steps include placing an IC module within the first opening, A step of obtaining a laminate by stacking the first surface layer, the core layer, and the second surface layer in this order, A method for manufacturing an electronic terminal device, comprising the steps of: hot-pressing the laminate to melt at least one of the first surface layer and the second surface layer; and filling the first opening and the second opening with a portion of the molten surface layer of at least one of the first surface layer and the second surface layer.

16. A step of preparing a core layer having a plurality of electronic terminal regions arranged in a first direction and a second direction perpendicular to the first direction, a plurality of first openings provided in each of the electronic terminal regions, and a plurality of second openings formed within the electronic terminal region and in at least one of the spaces between adjacent electronic terminal regions in the first direction or the second direction, The steps include placing each of the multiple IC modules within each of the multiple first openings, A step of obtaining a laminate by stacking the first surface layer, the core layer, and the second surface layer in this order, The process involves hot-pressing the laminate to melt at least one of the first surface layer and the second surface layer, and filling each of the plurality of first openings and the plurality of second openings with a portion of the molten surface layer of at least one of the first surface layer and the second surface layer. A method for manufacturing an electronic terminal device, comprising the step of cutting out the laminate for each electronic terminal region to obtain a plurality of electronic terminal devices.

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