Semiconductor modules and power converters

Abstract

To provide a semiconductor module and a power converter that can suppress switching surges while suppressing an increase in body size. [Solution] The semiconductor module comprises a semiconductor element 40, a wiring member 50, a wiring member 60, a encapsulant 30, and a dielectric 90. The wiring member 50 is electrically connected to the semiconductor element 40. The wiring member 60 is electrically connected to the semiconductor element 40, has a different potential from the wiring member 50, and is positioned at a different location from the wiring member 50 in the Z direction. The encapsulant 30 encapsulates the semiconductor element and is positioned between the opposing surfaces of the wiring members 50 and 60. The dielectric 90 has a higher relative permittivity than the encapsulant 30 and is positioned between the opposing surfaces. A capacitor 91 is formed by including the wiring member 50, the dielectric 90, and the wiring member 60, and the capacitor 91 is connected in parallel to the semiconductor element 40.

Description

Technical Field

[0001] The disclosure in this specification relates to a semiconductor module and a power conversion device.

Background Art

[0002] Patent Document 1 discloses a semiconductor module constituting an inverter. The semiconductor module includes a semiconductor element on which an IGBT is formed, a lead frame electrically connected to the semiconductor element, and a molding resin for sealing the semiconductor element. The description of the prior art document is incorporated by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In Patent Document 1, the lead frame connected to the collector of the semiconductor element constituting the upper arm of the upper and lower arm circuits and the lead frame connected to the emitter of the semiconductor element constituting the lower arm are in the same position in the thickness direction of the semiconductor element and are arranged side by side in a direction orthogonal to the thickness direction.

[0005] The semiconductor module disclosed in Patent Document 1 includes a snubber capacitor such as a ceramic capacitor. The snubber capacitor is disposed between two lead frames arranged side by side in a direction orthogonal to the thickness direction and is connected in parallel to the upper and lower arm circuits. From the above viewpoints or other viewpoints not mentioned, further improvements are required for the semiconductor module and the power conversion device.

[0006] One of the objectives of this disclosure is to provide a semiconductor module and a power converter that can suppress switching surges while suppressing an increase in size. Another objective of this disclosure is to provide a semiconductor module and a power converter that can suppress switching surges with a simple configuration. [Means for solving the problem]

[0007] One aspect of the disclosure is a semiconductor module, A semiconductor element (40) on which a switching element constituting a power conversion circuit is formed, A first conductor (50, 50H, 60H) electrically connected to the semiconductor element, A second conductor (60,60L,70,70L) is electrically connected to the semiconductor element, has a different potential from the first conductor, and is positioned differently from the first conductor in the thickness direction of the semiconductor element. A encapsulant (30) is provided, which encloses the semiconductor element and is positioned between the opposing surfaces of the first conductor and the second conductor. A dielectric material (90) having a higher relative permittivity than the sealing material and arranged between opposing surfaces, Equipped with, A capacitor (91) is formed by including a first conductor, a dielectric, and a second conductor. Capacitors are electrically connected in parallel to semiconductor elements.

[0008] According to the disclosed semiconductor module, a portion of the seal placed between the opposing surfaces of the first conductor and the second conductor is replaced with a dielectric. The dielectric, together with the first and second conductors, constitutes a capacitor, or snubber circuit, connected in parallel to the semiconductor element. Therefore, it is possible to provide a semiconductor module that can suppress switching surges while suppressing an increase in size. The first and second conductors, together with the dielectric, constitute the capacitor of the snubber circuit. Therefore, it is possible to provide a semiconductor module that can suppress switching surges with a simple configuration.

[0009] Another aspect of the disclosure is a power converter, A semiconductor module (21) that constitutes a power conversion circuit, A cooler (22) for cooling the semiconductor module, It is equipped with, Semiconductor modules are A semiconductor element (40) on which a switching element is formed, A first conductor (50) electrically connected to the semiconductor element, A second conductor (60) is electrically connected to the semiconductor element, has a different potential from the first conductor, and is positioned at a different location from the first conductor in the thickness direction of the semiconductor element, A encapsulant (30) is provided, which encloses the semiconductor element and is positioned between the opposing surfaces of the first conductor and the second conductor. A dielectric material (90) having a higher relative permittivity than the sealing material and arranged between opposing surfaces, It has, A capacitor (91) is formed by including a first conductor, a dielectric, and a second conductor. Capacitors are electrically connected in parallel to semiconductor elements.

[0010] According to the disclosed power converter, a portion of the seal placed between the opposing surfaces of the first conductor and the second conductor is replaced with a dielectric. The dielectric, together with the first and second conductors, constitutes a capacitor, or snubber circuit, connected in parallel to the semiconductor element. Therefore, it is possible to provide a power converter that can suppress switching surges while suppressing an increase in size. The first and second conductors, together with the dielectric, constitute the capacitor of the snubber circuit. Therefore, it is possible to provide a semiconductor module that can suppress switching surges with a simple configuration.

[0011] The various embodiments disclosed in this specification employ different technical means to achieve their respective objectives. The reference numerals in parentheses in the claims are illustrative in their correspondence with the embodiments described later and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the accompanying drawings.

Brief Description of the Drawings

[0012] [Figure 1] FIG. 1 is a diagram showing an example of a drive system to which a semiconductor module and a power conversion device according to the first embodiment are applied. [Figure 2] FIG. 2 is a diagram showing an example of a power conversion device. [Figure 3] FIG. 3 is a diagram showing another example of a power conversion device. [Figure 4] FIG. 4 is a diagram showing another example of a power conversion device. [Figure 5] FIG. 5 is a plan view showing a semiconductor module. [Figure 6] FIG. 6 is a cross-sectional view taken along line VI-VI of FIG. 5. [Figure 7] FIG. 7 is a cross-sectional view taken along line VII-VII of FIG. 5. [Figure 8] FIG. 8 is an enlarged view of region VIII in FIG. 7. [Figure 9] FIG. 9 is a plan view showing a modification example. [Figure 10] FIG. 10 is a plan view showing a modification example. [Figure 11] FIG. 11 is a cross-sectional view taken along line XI-XI of FIG. 10. [Figure 12] FIG. 12 is a cross-sectional view showing an example of a semiconductor module according to the second embodiment. [Figure 13] FIG. 13 is a cross-sectional view showing an example of a semiconductor module according to the third embodiment. [Figure 14] FIG. 14 is a cross-sectional view showing a modification example. [Figure 15] FIG. 15 is a cross-sectional view showing an example of a semiconductor module according to the fourth embodiment. [Figure 16] FIG. 16 is a cross-sectional view showing an example of a semiconductor module according to the fifth embodiment. [Figure 17] FIG. 17 is an enlarged view of region XVII in FIG. 16. [Figure 18] FIG. 18 is a plan view showing an example of a semiconductor module according to the sixth embodiment. [Figure 19] FIG. 19 is a cross-sectional view taken along line XIX of FIG. 18. [Figure 20] This is a cross-sectional view showing a modified example. [Figure 21] This is a cross-sectional view showing a modified example. [Figure 22] This is a plan view showing an example of a semiconductor module according to the seventh embodiment. [Figure 23] This is a cross-sectional view along the line XXIII-XXIII in Figure 22. [Figure 24] This is a cross-sectional view showing a modified example. [Figure 25] This is a cross-sectional view showing an example of a semiconductor module according to the eighth embodiment. [Figure 26] This is a cross-sectional view showing a modified example. [Figure 27] This is a cross-sectional view showing a modified example. [Figure 28] This is a cross-sectional view showing an example of a semiconductor module according to the ninth embodiment. [Figure 29] This is a plan view showing an example of a semiconductor module according to the 10th embodiment. [Figure 30] This is a cross-sectional view along the line XXX-XXX in Figure 29. [Modes for carrying out the invention]

[0013] Several embodiments will be described below with reference to the drawings. In each embodiment, the same reference numerals are used for corresponding components, and redundant explanations may be omitted. If only a part of the configuration is described in each embodiment, the configuration of other embodiments described earlier can be applied to the other parts of that configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations from multiple embodiments can be partially combined even if not explicitly stated, as long as there are no particular problems with the combination.

[0014] (First Embodiment) The semiconductor module of this embodiment is applied, for example, to a mobile device that uses a rotating electric machine as its drive source. Examples of mobile devices include electric vehicles such as battery electric vehicles (BEVs), hybrid electric vehicles (HEVs), and plug-in hybrid electric vehicles (PHEVs); electric aircraft such as drones and electric vertical take-off and landing aircraft (eVTOLs); ships; construction machinery; and agricultural machinery. BEV stands for Battery Electric Vehicle. HEV stands for Hybrid Electric Vehicle. eVTOL stands for electronic Vertical Take-Off and Landing aircraft. Examples of applications to vehicles will be described below.

[0015] <Vehicle drive system> Figure 1 shows an example of a vehicle drive system. The drive system 1 comprises a DC power supply 2, a motor generator 3, and a power conversion circuit 4.

[0016] The DC power supply 2 is a DC voltage source composed of a rechargeable secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as the vehicle's driving source, i.e., an electric motor. The motor generator 3 also functions as a generator during regeneration. The power conversion circuit 4 performs power conversion between the DC power supply 2 and the motor generator 3. The power generated by the motor generator 3 is supplied to, for example, the DC power supply 2 via the power conversion circuit 4. This charges the DC power supply 2.

[0017] The drive system 1 may include a power supply switch, such as an SMR (not shown), between the DC power supply 2 and the power conversion circuit 4. SMR stands for System Main Relay. For example, turning the power supply switch on enables power supply from the DC power supply 2 to the motor generator 3, and turning the power supply switch off cuts off the power supply from the DC power supply 2 to the motor generator 3.

[0018] <Power Conversion Circuit> Figure 1 shows an example of a power conversion circuit 4. The example power conversion circuit 4 includes a filter capacitor 5, a smoothing capacitor 6, a discharge resistor 7, a converter 8, and an inverter 9.

[0019] The power conversion circuit 4 is equipped with power lines. The P line, which is the high-potential power line, includes the VL line 10L and the VH line 10H. The VL line 10L is connected to the positive terminal of the DC power supply 2. A converter 8 is provided between the VL line 10L and the VH line 10H. The potential of the VH line 10H is set to be greater than or equal to the potential of the VL line 10L. The N line 11 is the low-potential power line connected to the negative terminal of the DC power supply 2. The N line 11 is sometimes referred to as the ground line.

[0020] The filter capacitor 5 is connected between the VL line 10L and the N line 11. The positive terminal of the filter capacitor 5 is connected to the VL line 10L between the DC power supply 2 and the converter 8. The negative terminal of the filter capacitor 5 is connected to the N line 11 between the DC power supply 2 and the converter 8. The filter capacitor 5 is connected in parallel with the DC power supply 2. The filter capacitor 5 removes power supply noise from, for example, the DC power supply 2. Because the filter capacitor 5 is located on the lower voltage side than the smoothing capacitor 6, it is sometimes referred to as a low-voltage side capacitor.

[0021] The smoothing capacitor 6 is connected between the VH line 10H and the N line 11. The positive terminal of the smoothing capacitor 6 is connected to the VH line 10H between the converter 8 and the inverter 9. The negative terminal of the smoothing capacitor 6 is connected to the N line 11 between the converter 8 and the inverter 9. The smoothing capacitor 6 is connected in parallel to the upper and lower arm circuits 8HL and 9HL, which will be described later. The smoothing capacitor 6 smooths the DC voltage boosted by the converter 8, for example. The voltage across the smoothing capacitor 6 becomes the high DC voltage for driving the motor generator 3. The voltage across the smoothing capacitor 6 is set to be greater than or equal to the voltage across the filter capacitor 5. Because the smoothing capacitor 6 is located on the higher voltage side than the filter capacitor 5, it is sometimes called a high-voltage side capacitor.

[0022] The discharge resistor 7 discharges the charge stored in the smoothing capacitor 6, for example, to reduce the terminal voltage of the smoothing capacitor 6 to a predetermined voltage. One terminal of the discharge resistor 7 is electrically connected to the VH line 10H, and the other terminal is electrically connected to the N line 11. The discharge resistor 7 is connected in parallel with the smoothing capacitor 6. The discharge resistor 7 forces (rapidly) the charge stored in the smoothing capacitor 6 to discharge when, for example, the power supply from the DC power source is interrupted. The discharge resistor 7 dissipates the discharged charge as heat.

[0023] Converter 8 is a DC-DC conversion circuit. Converter 8 converts, for example, a DC voltage to a DC voltage of a different value according to switching control by a control circuit. Converter 8 has the function of boosting the DC voltage supplied from a DC power supply 2. The example converter 8 also has a step-down function that charges the DC power supply 2 using the charge of the smoothing capacitor 6. Converter 8 has an upper and lower arm circuit 8HL and a reactor 8R.

[0024] The upper and lower arm circuit 8HL has an upper arm 8H and a lower arm 8L. The upper arm 8H and lower arm 8L are connected in series between the VH line 10H and the N line 11, with the upper arm 8H on the VH line 10H side. One terminal of the reactor 8R is connected to the connection point between the upper arm 8H and the lower arm 8L. The other terminal of the reactor 8R is connected to the VL line 10L. The example converter 8 has only one set of upper and lower arm circuits 8HL and reactor 8R, i.e., only one phase. Alternatively, the upper and lower arm circuits 8HL and reactor 8R may be configured for multiple phases.

[0025] The inverter 9 is an AC-DC conversion circuit. The inverter 9 converts a DC voltage to a three-phase AC voltage according to the switching control of the control circuit and outputs it to the motor generator 3. This drives the motor generator 3 to generate a predetermined torque. For example, during regenerative braking of the vehicle, the inverter 9 converts the three-phase AC voltage generated by the motor generator 3 in response to the rotational force from the wheels into a DC voltage according to the switching control of the control circuit. In this way, the inverter 9 performs bidirectional power conversion between the DC power supply 2 and the motor generator 3.

[0026] The inverter 9 is configured with three phase upper and lower arm circuits 9HL. The upper and lower arm circuits 9HL have an upper arm 9H and a lower arm 9L. The upper arm 9H and lower arm 9L are connected in series between the VH line 10H and the N line 11, with the upper arm 9H on the VH line 10H side. The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via the output line 12.

[0027] The upper and lower arm circuits 8HL and 9HL are sometimes referred to as "legs." A single-phase upper and lower arm circuit has one upper arm and one lower arm, i.e., two arms. A three-phase upper and lower arm circuit 9H has six arms. Each arm 8H, 8L, 9H, and 9L is equipped with a switching element. The number of switching elements constituting each arm 8H, 8L, 9H, and 9L is not particularly limited. There may be one or more. In the case of multiple switching elements, the multiple switching elements connected in parallel to each other are driven on and off at the same timing by a common gate drive signal (drive voltage).

[0028] In the example power conversion circuit 4, the upper arm 8H and lower arm 8L of the upper and lower arm circuit 8HL each have a switching element 8S and a freewheeling diode 8D, respectively. The diode 8D is connected in antiparallel to the switching element 8S. Similarly, the upper arm 9H and lower arm 9L of the upper and lower arm circuit 9HL each have a switching element 9S and a freewheeling diode 9D, respectively. The diode 9D is connected in antiparallel to the switching element 9S.

[0029] Switching elements 8S and 9S may have the same specifications. The same type of semiconductor chip may be used for switching elements 8S and 9S. The specifications of switching element 8S and switching element 9S may differ. The example switching elements 8S and 9S are both n-channel type MOSFETs. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. Diodes 8D and 9D may be parasitic diodes (body diodes) of the MOSFET, or they may be provided separately from the parasitic diodes. The anode terminal of the diode is connected to the source terminal of the corresponding MOSFET, and the cathode terminal is connected to the drain terminal.

[0030] Note that the switching element is not limited to MOSFETs. For example, IGBTs may be used. IGBT stands for Insulated Gate Bipolar Transistor. In the case of IGBTs as well, a freewheeling diode is connected in antiparallel.

[0031] In the upper and lower arm circuit 8HL, the drain terminal of the switching element 8S on the upper arm 8H side is connected to the VH line 10H, and the source terminal of the switching element 8S on the lower arm 8L side is connected to the N line 11. The source terminal of the switching element 8S on the upper arm 8H side and the drain terminal of the switching element 8S on the lower arm 8L side are interconnected. The upper and lower arm circuit 9HL has the same circuit configuration as the upper and lower arm circuit 9HL.

[0032] The power conversion circuit 4 further includes a snubber circuit. The snubber circuit absorbs transient high voltages, so-called switching surges, that occur when the switching elements (MOSFETs) constituting the upper and lower arm circuits are switched. The snubber circuit suppresses switching surges, thereby enabling high-speed switching. The snubber circuit reduces the inductance of the upper and lower arm circuits. The example snubber circuit is connected in parallel with the switching elements. A snubber circuit is provided for each arm 8H, 8L, 9H, and 9L. Such a snubber circuit is sometimes called an arm snubber. The snubber circuit has a capacitor 13. The snubber circuit may be a C snubber circuit containing only a capacitor, or an RC snubber circuit having a capacitor 13 and a resistor. The snubber circuit may also be an RCD snubber circuit having a capacitor, a resistor, and a diode.

[0033] The power conversion circuit 4 may include a filter circuit. The filter circuit is a circuit for reducing noise such as electromagnetic noise. The filter circuit is sometimes called an EMI filter. EMI is an abbreviation for Electromagnetic Interference. The filter circuit is connected in parallel with the smoothing capacitor 6 and the inverter 9. The filter circuit is provided between the DC power supply 2 and the smoothing capacitor 6. The filter circuit may have elements to reduce common-mode noise, for example. The filter circuit may have a Y capacitor or a choke coil to reduce common-mode noise. The filter circuit may have elements to reduce normal-mode noise. The filter circuit may have an X capacitor or a normal-mode coil to reduce normal-mode noise.

[0034] The power conversion circuit 4 may include a drive circuit for the switching elements 8S and 9S. The drive circuit supplies a drive voltage to the gates of the corresponding switching elements 8S and 9S (MOSFETs) based on a drive command from the control circuit. The drive circuit drives the corresponding switching elements 8S and 9S, i.e., turns them on or off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0035] The power conversion circuit 4 may include a control circuit for the switching elements 8S and 9S. The control circuit generates drive commands for operating the switching elements 8S and 9S and outputs them to the drive circuit. The control circuit generates drive commands based on, for example, torque requests input from a higher-level ECU (not shown) and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit.

[0036] Various sensors include, for example, current sensors, rotation angle sensors, voltage sensors, and temperature sensors. One current sensor detects the phase current flowing through the windings 3a of each phase of the motor generator 3. Another current sensor detects the current flowing through the reactor 8R. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. One voltage sensor detects the voltage across the smoothing capacitor 6. Another voltage sensor detects the voltage across the filter capacitor 5. The control circuit outputs a drive command, for example, a PWM signal. PWM is an abbreviation for Pulse Width Modulation. The control circuit may be configured to include, for example, a processor, memory, storage, etc.

[0037] <Power converter> Figure 2 is a plan view showing an example of a power conversion device. The thickness direction of the semiconductor element (semiconductor substrate), which will be described later, is defined as the Z direction. The direction perpendicular to the Z direction is defined as the X direction. The direction perpendicular to both the Z and X directions is defined as the Y direction. The X, Y, and Z directions are in a mutually orthogonal positional relationship. Unless otherwise specified, the planar shape is defined as the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions. The view from the Z direction is sometimes simply referred to as the planar view.

[0038] The power converter 20 constitutes at least a part of the power conversion circuit 4 described above. The power converter 20 may constitute, for example, only the converter 8, or only the inverter 9. The power converter 20 may constitute both the converter 8 and the inverter 9, or it may constitute the entire power conversion circuit 4, including the smoothing capacitor 6 and the discharge resistor 7.

[0039] The power converter 20 comprises at least a semiconductor module 21 constituting an upper and lower arm circuit, i.e., a power conversion circuit, and a cooler 22 for cooling the semiconductor module 21. The semiconductor module 21 is thermally connected to the cooler 22. The power converter 20 may further comprise support members for supporting other elements constituting the power converter 20. The power converter may further comprise a housing for housing the above-mentioned other elements. The power converter 20 may further comprise elements of the power conversion circuit 4 that are not composed of the semiconductor module 21, such as a smoothing capacitor 6 or a discharge resistor 7. The power converter 20 may also comprise conductive members such as busbars.

[0040] A single semiconductor module 21 may constitute one arm, or it may constitute an upper and lower arm circuit for one phase. A single semiconductor module 21 may constitute an upper and lower arm circuit for multiple phases. The cooler 22 may be composed of a metal member with good thermal conductivity, such as Al or Cu. The cooler 22 may have a flow path through which a coolant flows inside. The cooler 22 may also be a heat dissipation member such as a heat sink. The heat dissipation member may have heat dissipation fins. A bonding material such as solder or sintered Ag may be interposed between the semiconductor module 21 and the cooler 22. A thermal conductive material such as TIM may be interposed between the semiconductor module 21 and the cooler 22. TIM is an abbreviation for Thermal Interface Material. The cooler 22 may be part of a support member or housing, or it may be provided separately from a support member or housing.

[0041] The power converter 20 shown in Figure 2 comprises a plurality of semiconductor modules 21 and a plurality of coolers 22. Each semiconductor module 21 constitutes one arm. The semiconductor module 21 includes two semiconductor modules 21CH and 21CL that constitute the upper and lower arm circuits 8HL of the converter 8, and six semiconductor modules 21UH, 21UL, 21VH, 21VL, 21WH, and 21WL that constitute the three-phase upper and lower arm circuits 9HL of the inverter 9. The letter H at the end of the code for the semiconductor module 21 indicates that it constitutes the upper arm, and the letter L at the end indicates that it constitutes the lower arm. Semiconductor modules 21UH and 21UL constitute the U-phase upper and lower arm circuits 9HL. Semiconductor modules 21VH and 21VL constitute the V-phase upper and lower arm circuits 9HL. Semiconductor modules 21WH and 21WL constitute the W-phase upper and lower arm circuits 9HL.

[0042] Multiple semiconductor modules 21 are stacked in the Z direction. The semiconductor modules 21 are arranged in multiple stages in the Z direction. The semiconductor modules 21 and coolers 22 are stacked alternately along the Z direction. The semiconductor modules 21 and coolers 22 are arranged side by side in the Z direction. Each semiconductor module 21 is sandwiched by the coolers 22 in the Z direction. Each semiconductor module 21 is cooled by the coolers 22 from both sides in the Z direction. In the example power converter 20, two semiconductor modules 21 constituting one upper and lower arm circuit are arranged side by side in the X direction. The semiconductor modules 21 are arranged in different stages for each upper and lower arm circuit unit.

[0043] The cooler 22 has a flow path inside. The cooler 22 is a flattened tubular body overall. For example, the cooler 22 is made by pressing at least one of a pair of plates (thin metal sheets) into a shape that bulges in the Z direction. Then, the outer edges of the pair of plates are fixed together by crimping or the like, and joined together all around by brazing or the like. This creates a flow path between the pair of plates through which a refrigerant can flow, making it possible to use it as a cooler 22.

[0044] The power converter 20 includes an inlet pipe 23 and an outlet pipe 24. Each of the inlet pipe 23 and the outlet pipe 24 may be made of a single component, or multiple components may be connected to form an integrated structure. The inlet pipe 23 and the outlet pipe 24 are connected to each of the coolers 22. By supplying refrigerant to the inlet pipe 23 by a pump (not shown), refrigerant flows through the flow path in each of the coolers 22. This cools each of the semiconductor modules 21. The refrigerant that has flowed through each of the coolers 22 is discharged through the outlet pipe 24. The refrigerant may be a phase-changing refrigerant such as water or ammonia, or a non-phase-changing refrigerant such as ethylene glycol. An example refrigerant is LLC. LLC is an abbreviation for Long Life Coolant.

[0045] If electrical insulation between the semiconductor module 21 and the cooler 22 is not required, the power converter 20 may include a bonding material interposed between the semiconductor module 21 and the cooler 22. If electrical insulation between the semiconductor module 21 and the cooler 22 is required, the power converter 20 may include an insulating member interposed between the semiconductor module 21 and the cooler 22. The insulating member may include a ceramic plate or a thermal conductive member such as a TIM.

[0046] The structure of the cooler 22 is not limited to the example shown in Figure 2. The arrangement of the semiconductor module 21 and the cooler 22 is not limited to the example shown in Figure 2. For example, in the arrangement in Figure 2, a cooler 22 without internal flow channels, such as a heat sink, may be used. In Figure 2, one semiconductor module 21 may be arranged in each stage.

[0047] Figure 3 is a plan view showing another example of a power converter. In the exemplary power converter 20, a plurality of semiconductor modules 21 are arranged on one surface of a cooler 22. The plurality of semiconductor modules 21 are aligned in the X direction. The plurality of semiconductor modules 21 are thermally connected to a single cooler 22. The semiconductor modules 21 are cooled from one side in the Z direction. The cooler 22 may form part of the support member or housing as described above, or it may be provided separately from the support member or housing. The cooler 22 may have a flow path that overlaps with the plurality of semiconductor modules 21 in a plan view in the Z direction.

[0048] Figure 4 is a plan view showing another example of a power converter. The illustrated power converter 20 includes coolers 22A and 22B as coolers 22. Cooler 22A corresponds to cooler 22 shown in Figure 3. Multiple semiconductor modules 21 are arranged on one surface of cooler 22A. Multiple semiconductor modules 21 are aligned in the X direction. Cooler 22A has a flow path 25 that overlaps with the multiple semiconductor modules 21 in a plan view.

[0049] Cooler 22B is positioned so as to overlap with multiple semiconductor modules 21 in a plan view. Coolers 22A and 22B are arranged so as to sandwich the semiconductor modules 21 in the Z direction. The flow path of cooler 22B is connected to flow path 25 via connecting pipes 26 and 27. A portion of the refrigerant flowing through flow path 25 flows through the flow path of cooler 22B via connecting pipe 26 and returns to flow path 25 via connecting pipe 27. Flow path 25 of cooler 22A is the main flow path, and the flow path of cooler 22B is a secondary flow path branched from the main flow path. Each semiconductor module 21 is cooled from both sides in the Z direction by coolers 22A and 22B.

[0050] <Semiconductor Module> Figure 5 is a plan view showing an example of a semiconductor module according to this embodiment. Figure 6 is a cross-sectional view along the line VI-VI in Figure 5. Figure 7 is a cross-sectional view along the line VII-VII in Figure 5.

[0051] The semiconductor module 21 may constitute the converter 8 described above, or it may constitute the inverter 9. The example semiconductor module 21 constitutes one of the arms of the upper and lower arm circuits 8HL and 9HL. In other words, two semiconductor modules 21 constitute one phase of the upper and lower arm circuits 8HL and 9HL. The semiconductor module 21 has a so-called 1-in-1 package structure. The semiconductor module 21 is sometimes referred to as a power module or semiconductor device. As shown in Figures 5 to 7, the semiconductor module 21 comprises a encapsulant 30, a semiconductor element 40, wiring members 50 and 60, a conductive spacer 70, an external connection terminal 80, and a dielectric 90.

[0052] The encapsulant 30 encapsulates some of the other elements that make up the semiconductor module 21. The remaining parts of the other elements are exposed outside the encapsulant 30. The encapsulant 30 is made of, for example, a resin. An example of a resin is an epoxy resin. The encapsulant 30 is molded from resin by, for example, a transfer molding method. Such an encapsulant 30 may be referred to as a resin encapsulant, molded resin, or resin molded body. The encapsulant 30 may also be formed using, for example, a gel. The gel is filled (placed) in the opposing regions of, for example, a pair of wiring members 50, 60.

[0053] The illustrated seal 30 has a planar shape that is approximately rectangular. The seal 30 has an outer surface, which is one surface 301 and a back surface 302 that is opposite to the one surface 301 in the Z direction. The one surface 301 and the back surface 302 are, for example, approximately flat surfaces. The seal 30 has sides 303, 304, 305, and 306 that are connected to the one surface 301 and the back surface 302. Side 303 is the surface from which the main terminal 81 of the external connection terminals 80 protrudes. Side 304 is the surface opposite to side 303 in the Y direction. Side 304 is the surface from which the signal terminal 82 protrudes. Sides 305 and 306 are surfaces from which the external connection terminals 80 do not protrude. Side 306 is the surface opposite to side 305 in the X direction.

[0054] The semiconductor device 40 provides switching elements 8S and 9S. The semiconductor device 40 is formed by forming switching elements on a semiconductor substrate made of materials such as silicon (Si) or a wide-bandgap semiconductor with a wider bandgap than silicon. Examples of wide-bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor device 40 is sometimes referred to as a power element or semiconductor chip.

[0055] The example semiconductor element 40 is formed by creating an n-channel type MOSFET on a semiconductor substrate made of SiC. The MOSFET has a vertical structure such that the main current flows in the thickness direction of the semiconductor element 40 (semiconductor substrate), i.e., in the Z direction. The semiconductor element 40 has main electrodes for the switching element on both sides in its thickness direction, i.e., the Z direction. Specifically, it has a drain electrode 41 on one side and a source electrode 42 on the back side as the main electrodes. When diodes 8D and 9D are parasitic diodes, the source electrode 42 also serves as the anode electrode and the drain electrode 41 also serves as the cathode electrode. Diodes 8D and 9D may be configured on a separate chip from the semiconductor element 40 (MOSFET). The drain electrode 41 is the main electrode on the high-potential side, and the source electrode 42 is the main electrode on the low-potential side.

[0056] The illustrated semiconductor element 40 has a substantially rectangular planar shape. The semiconductor element 40 has a pad 43 formed on its back surface at a different location from the source electrode 42. The source electrode 42 and the pad 43 are exposed from a protective film (not shown) formed on the back surface of the semiconductor substrate. The drain electrode 41 is formed over almost the entire surface of one side. The source electrode 42 is formed on a portion of the back surface of the semiconductor element 40. The pad 43 is a signal electrode. The pad 43 includes a gate electrode pad. In the illustrated pad 43, in the Y direction, it is formed at the end opposite to the area where the source electrode 42 is formed.

[0057] The example semiconductor module 21 comprises one semiconductor element 40. The semiconductor module 21 may also comprise multiple semiconductor elements 40 that constitute a single arm. In this case, the semiconductor elements 40 are connected in parallel to each other between the wiring members 50 and 60.

[0058] The wiring members 50 and 60 are electrically connected to the semiconductor element 40 and provide a wiring function. The wiring member 50 is electrically connected to the drain electrode 41 and provides a wiring function. Similarly, the wiring member 60 is electrically connected to the source electrode 42 and provides a wiring function. The wiring members 50 and 60 are arranged so as to sandwich the semiconductor element 40 in the Z direction. The wiring members 50 and 60 are arranged so that at least a portion of them faces each other in the Z direction. In a plan view, the wiring members 50 and 60 enclose the semiconductor element 40.

[0059] The wiring members 50 and 60 provide a heat dissipation function to dissipate the heat generated by the semiconductor element 40. The wiring members 50 and 60 in this embodiment are metal plates made of a metal with good conductivity, such as Cu or a Cu alloy. Such metal plates are sometimes referred to as heat sinks or heat dissipation plates. The metal plates are provided, for example, as part of a lead frame. The wiring members 50 and 60 are not limited to metal plates. For example, a substrate in which a metal body is arranged on one side of an insulating substrate may be used as the wiring members 50 and 60. The metal body may be arranged not only on one side, but also on the back side of the insulating substrate. In other words, a substrate in which metal bodies are arranged on both sides may be used. The wiring members 50 and 60 may have a plating film of Ni or Au on their surface.

[0060] The wiring member 50 has one side 501 which faces the semiconductor element 40, and one side 502 which is opposite to the one side 501. Similarly, the wiring member 60 also has one side 601 and one side 602. The wiring members 50 and 60 are, for example, roughly rectangular in shape. The one side 501 and 601 are roughly flat surfaces. The side surfaces 502 and 602 are exposed from the encapsulant 30. The side surfaces 502 and 602 are sometimes referred to as heat dissipation surfaces or exposed surfaces. The side surface 502 of the wiring member 50 is roughly flush with the one side 301 of the encapsulant 30. The side surface 602 of the wiring member 60 is roughly flush with the side surface 302 of the encapsulant 30.

[0061] The conductive spacer 70 is interposed between the semiconductor element 40 and the wiring member 60. The conductive spacer 70 provides a spacer function to ensure a predetermined distance between the semiconductor element 40 and the wiring member 60. For example, the conductive spacer 70 ensures height for electrically connecting the corresponding signal terminal 82 to the pad 43 of the semiconductor element 40. The conductive spacer 70 is located in the middle of the electrical conduction path and heat conduction path between the source electrode 42 of the semiconductor element 40 and the wiring member 60, and provides wiring and heat dissipation functions.

[0062] The conductive spacer 70 contains a metallic material with good electrical and thermal conductivity, such as Cu. The conductive spacer 70 may have a plating film on its surface. The conductive spacer 70 is a columnar body with a planar shape that is approximately the same size as the source electrode 42 in a plan view. The conductive spacer 70 is sometimes referred to as a terminal, terminal block, or metal block.

[0063] The external connection terminal 80 is a terminal for electrically connecting the semiconductor module 21 to an external device. The external connection terminal 80 is formed using a highly conductive metallic material such as Cu. The external connection terminal 80 is, for example, a plate. The external connection terminal 80 includes a main terminal 81 and a signal terminal 82. The main terminal 81 is electrically connected to the main electrode of the semiconductor element 40. The main terminal 81 includes main terminals 81D and 81S.

[0064] The main terminal 81D is electrically connected to the drain electrode 41. The main terminal 81D is sometimes referred to as the drain terminal. The main terminal 81D is connected to the drain electrode 41 via the wiring member 50. The main terminal 81D is connected to one end of the wiring member 50 in the Y direction. The thickness of the main terminal 81D is thinner than that of the wiring member 50. The main terminal 81D is connected to the wiring member 50 such that it is substantially flush with one surface 501, for example. The main terminal 81D may be provided integrally with the wiring member 50, or it may be provided as a separate component and joined to the wiring member 50.

[0065] The illustrated main terminal 81D is provided integrally with the wiring member 50 as part of the lead frame. The main terminal 81D extends in the Y direction from the wiring member 50 and protrudes to the outside from the side surface 303 of the sealant 30. The main terminal 81D has a bent portion in the middle of the part covered by the sealant 30. The main terminal 81D protrudes from near the center in the Z direction on the side surface 303.

[0066] The main terminal 81S is electrically connected to the source electrode 42. The main terminal 81S is sometimes referred to as the source terminal. The main terminal 81S is connected to the source electrode 42 via the wiring member 60. The main terminal 81S is connected to one end of the wiring member 60 in the Y direction. The thickness of the main terminal 81S is thinner than that of the wiring member 60. The main terminal 81S is connected to the wiring member 60, for example, so as to be substantially flush with one surface 601. The main terminal 81S may be provided continuously and integrally with the wiring member 60, or it may be provided as a separate component and joined to the wiring member 60.

[0067] The illustrated main terminal 81S is provided integrally with the wiring member 60 as part of a lead frame separate from the main terminal 81D. The main terminal 81S extends from the wiring member 60 in the Y direction and protrudes to the outside from the same side surface 303 as the main terminal 81D. The main terminal 81S also has a bend in the middle of the portion covered by the sealant 30. The main terminal 81S protrudes from near the center in the Z direction on the side surface 303. The two main terminals 81D and 81S are arranged side by side in the X direction with their sides facing each other.

[0068] The signal terminal 82 is electrically connected to the corresponding pad 43 of the semiconductor element 40. The example signal terminal 82 is electrically connected to the pad 43 via a bonding wire 45. The signal terminal 82 extends generally in the Y direction in a plan view. A portion of the signal terminal 82, including the connection to the pad 43, is covered by the sealant 30, while another portion protrudes from the sealant 30. The signal terminal 82 protrudes from the side surface 304 outside the sealant 30. The semiconductor module 21 has a plurality of signal terminals 82. The plurality of signal terminals 82 are arranged side by side in the X direction. The signal terminals 82 are configured on a lead frame common to, for example, the wiring member 60 and the main terminal 81S. During the manufacturing process of the semiconductor module 21, unnecessary parts such as tie bars are removed from the lead frame.

[0069] The semiconductor module 21 is equipped with a bonding material 46. The bonding material 46 may be, for example, solder or a sintered material. The drain electrode 41 of the semiconductor element 40 is connected to the wiring member 50 via the bonding material 46. The source electrode 42 of the semiconductor element 40 is connected to the conductive spacer 70 via the bonding material 46. The conductive spacer 70 is connected to the wiring member 60 via the bonding material 46. Note that the multiple bonding materials 46 may be made of the same material, or some of the bonding materials 46 may be made of a different material than the others.

[0070] The dielectric 90 is arranged between opposing surfaces of the wiring members 50 and 60, that is, in regions facing each other on one surface 501, 601. The dielectric 90 replaces a portion of the sealant 30 between the opposing surfaces. It is sufficient that at least a portion of the dielectric 90 is arranged between the opposing surfaces. The dielectric 90 has a higher relative permittivity than the sealant 30. The dielectric 90 may be, for example, a ceramic, or it may be a resin with a higher relative permittivity than the sealant 30 achieved by adjusting the filler added to the resin. The example dielectric 90 is barium titanate.

[0071] As described above, in the semiconductor module 21, the semiconductor element 40 constituting one arm is sealed by the encapsulant 30. The encapsulant 30 integrally seals the semiconductor element 40, a part of the wiring member 50, a part of the wiring member 60, the conductive spacer 70, a part of the external connection terminal 80, and the dielectric 90. The encapsulant 30 is positioned between the opposing surfaces of the wiring members 50 and 60.

[0072] The semiconductor element 40 is positioned between the wiring members 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the opposing wiring members 50 and 60. This allows the heat from the semiconductor element 40 to be dissipated on both sides in the Z direction. The semiconductor module 21 has a double-sided heat dissipation structure. The wiring member 50 is exposed from the encapsulant 30, substantially flush with one surface 301. The wiring member 60 is exposed from the encapsulant 30, substantially flush with the back surface 302. The exposed structure of the wiring members 50 and 60 enhances heat dissipation.

[0073] <Snubber circuit> Figure 8 is an enlarged view of region VIII shown by the dashed line in Figure 7. As described above, the dielectric 90 is positioned between the opposing surfaces of the wiring members 50 and 60. The dielectric 90 has a higher relative permittivity than the encapsulant 30. The semiconductor module 21 includes a capacitor 91 comprising the wiring members 50, the dielectric 90, and the wiring members 60. The capacitor 91 provides the capacitor 13 of the snubber circuit described above. The wiring members 50 and 60 function as electrodes of the capacitor 91. The capacitor 91 is connected in parallel to the semiconductor element 40. The capacitor 91 constitutes a snubber circuit. The capacitor 91 constitutes an arm snubber. The example capacitor 91 constitutes a C snubber circuit.

[0074] The dielectric 90 is positioned around (near) the semiconductor element 40 in a plan view. In the example, the dielectric 90 is positioned between the semiconductor element 40 and the side surface 306 of the encapsulant 30 so as to be aligned with the semiconductor element 40 in the X direction. The dielectric 90 has a substantially rectangular shape in plan with the Y direction as its longitudinal direction.

[0075] The dielectric 90 is not in contact with the wiring members 50 and 60. The dielectric 90 is positioned away from the wiring members 50 and 60. A sealant 30 is interposed between the dielectric 90 and one surface 501 of the wiring member 50. A sealant 30 is interposed between the dielectric 90 and one surface 601 of the wiring member 60. The dielectric 90 is in contact with the sealant 30 on both sides in the Z direction. In other words, the three dielectric members are stacked in the Z direction in the order of sealant 30, dielectric 90, sealant 30.

[0076] Capacitor 91 is formed by connecting three capacitor elements C1, C2, and C3 in series. Capacitor element C1 is composed of a dielectric 90. Capacitor element C2 is composed of a sealant 30 interposed between the dielectric 90 and the wiring member 50. Capacitor element C3 is composed of a sealant 30 interposed between the dielectric 90 and the wiring member 60.

[0077] Furthermore, by forming the sealant 30 while supporting the dielectric 90 with support pins, for example, the dielectric 90 can be held at a predetermined position away from the wiring members 50 and 60. The wiring members 50 and 60 have a shape that allows the dielectric 90 to be supported by the support pins. The wiring members 50 and 60 may have, for example, through holes or notches.

[0078] <Summary of the First Embodiment> The semiconductor module 21 of this embodiment comprises at least one semiconductor element 40, a first conductor, a second conductor, a encapsulant 30, and at least one dielectric 90. The first conductor is electrically connected to the semiconductor element 40. The second conductor is electrically connected to the semiconductor element 40, has a different potential from the first conductor, and is positioned differently from the first conductor in the Z direction. The encapsulant 30 encapsulates the semiconductor element 40 and is positioned between the opposing surfaces of the first conductor and the second conductor. The dielectric 90 has a higher relative permittivity than the encapsulant 30 and is positioned between the opposing surfaces. The capacitor 91 is composed of the first conductor, the dielectric 90, and the second conductor. The capacitor 91 is electrically connected in parallel to the semiconductor element 40. In the exemplary semiconductor module 21, one of the wiring members 50, 60 corresponds to the first conductor, and the other of the wiring members 50, 60 corresponds to the second conductor. For example, wiring member 50 corresponds to the first conductor, and wiring member 60 corresponds to the second conductor.

[0079] In this way, a portion of the seal 30, which is positioned between the opposing surfaces of the first conductor and the second conductor, is replaced with the dielectric 90. Therefore, the increase in size due to the placement of the dielectric 90 can be suppressed. The dielectric 90, together with the first and second conductors, constitutes a capacitor 91, or snubber circuit, which is connected in parallel to the semiconductor element 40. The snubber circuit, including the capacitor 91, is positioned close to the semiconductor element 40. As a result, switching surges can be suppressed while suppressing an increase in size.

[0080] Furthermore, the first and second conductors, together with the dielectric 90, constitute the capacitor 91 of the snubber circuit. The first and second conductors function as electrodes for the capacitor 91. Therefore, no connection is required between the capacitor 91 and the conductors. Thus, switching surges can be suppressed with a simple configuration.

[0081] The power converter 20 of this embodiment includes a semiconductor module 21 that constitutes a power conversion circuit and a cooler 22 for cooling the semiconductor module 21. The semiconductor module 21 has the above configuration. A part of the seal 30 arranged between the opposing surfaces of the first conductor and the second conductor is replaced with a dielectric 90. Therefore, an increase in size due to the arrangement of the dielectric 90 can be suppressed. The dielectric 90, together with the first conductor and the second conductor, constitutes a capacitor 91, that is, a snubber circuit, which is connected in parallel to the semiconductor element 40. The snubber circuit including the capacitor 91 is configured near the semiconductor element 40. As a result, switching surges can be suppressed while suppressing an increase in size. Furthermore, since the first conductor and the second conductor, together with the dielectric 90, constitute the capacitor 91 of the snubber circuit, switching surges can be suppressed with a simple configuration.

[0082] As illustrated, a sealant 30 may be interposed between at least one of the first conductor and the second conductor and the dielectric 90. For example, even if the dielectric 90 cracks, the sealant 30 can prevent a short circuit from occurring between the first conductor and the second conductor. In other words, the interposed sealant 30 provides short-circuit protection. In the illustrated semiconductor module 21, the sealant 30 is placed between the first conductor and the dielectric 90, and between the second conductor and the dielectric 90. Therefore, the occurrence of a short circuit can be effectively suppressed.

[0083] As illustrated, the first conductor may be electrically connected to the first main electrode of the semiconductor element 40, and the second conductor may be electrically connected to the second main electrode formed on the semiconductor element 40 to which the first conductor is connected, on the side opposite to the first main electrode in the Z direction. This makes it possible to construct an arm snubber connected in parallel to the semiconductor elements constituting one arm while suppressing an increase in size.

[0084] <Variation> An example in which the dielectric 90 is placed between the semiconductor element 40 and the side surface 306 has been shown, but the invention is not limited to this. For example, as shown in Figure 9, the dielectric 90 may be placed between the semiconductor element 40 and the side surfaces 303, 305, and 306. The dielectric 90 has a planar shape that is approximately C-shaped (U-shaped). In Figure 9, the dielectric 90 is not placed on the side surface 304 where the signal terminal 82 protrudes, so as not to interfere with the connection of the bonding wire 45.

[0085] As shown in Figures 10 and 11, the dielectric 90 may be placed between the semiconductor element 40 and the sides 303, 304, 305, and 306. The dielectric 90 has a planar, approximately rectangular, annular shape so as to surround the semiconductor element 40. Depending on the position that does not interfere with the connection of the bonding wires 45 and the thickness of the dielectric 90, the dielectric 90 can be placed around the entire circumference of the semiconductor element 40. By increasing the area of ​​the dielectric 90 in a plan view, the capacitance of the capacitor 91 can be increased.

[0086] Although not shown in the diagram, the dielectric 90 may be placed between two of the sides 303, 304, 305, and 306 and the semiconductor element 40. Alternatively, the dielectric 90 may be placed between one of the sides 303, 304, and 305 and the semiconductor element 40.

[0087] (Second Embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be incorporated by reference. In the prior embodiment, the dielectric was placed at a distance from the first and second conductors. Alternatively, the dielectric may be connected to at least one of the first and second conductors.

[0088] Figure 12 is a cross-sectional view showing a semiconductor module according to this embodiment. Figure 12 corresponds to Figure 7. In the semiconductor module 21, the dielectric 90 is arranged on one surface 501 of the wiring member 50. The dielectric 90 is connected (fixed) to the wiring member 50 by an adhesive or the like (not shown). The other configurations are the same as those described in the prior embodiment.

[0089] <Summary of the second embodiment> As illustrated, the dielectric 90 may be connected to at least one of the first conductor and the second conductor. This eliminates the need to hold the dielectric 90 in a predetermined position away from the first and second conductors when forming the sealant 30, thereby simplifying the manufacturing process.

[0090] In this embodiment as well, a sealant 30 is interposed between one of the first conductor and the second conductor and the dielectric 90. The interposed sealant 30 can suppress the occurrence of a short circuit between the first conductor and the second conductor.

[0091] <Variation> Although not shown in the diagram, the dielectric 90 may be connected to the wiring member 60. The dielectric 90 may also be connected to both the wiring members 50 and 60. In other words, the sealing body 30 may not be interposed between the first conductor and the dielectric 90, or between the second conductor and the dielectric 90.

[0092] The connection structure of the dielectric 90 can be combined with the configurations described in the first embodiment and its modifications.

[0093] (Third embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, the opposing surfaces of the first conductor and the second conductor were made substantially flat. That is, an example was shown in which the distance between the opposing surfaces was approximately constant in the opposing region. Alternatively, the dielectric arrangement region may be partially narrowed.

[0094] Figure 13 is a cross-sectional view showing a semiconductor module according to this embodiment. Figure 13 corresponds to Figure 7. In the semiconductor module 21, the space between the opposing surfaces of the wiring members 50 and 60 is partially narrowed. In the exemplary semiconductor module 21, the wiring member 50 has a protrusion 51.

[0095] The protruding portion 51 is positioned to overlap with the dielectric 90 in a plan view. The protruding portion 51 protrudes toward the wiring member 60. One surface 501 is closer to the surface 601 than the other parts excluding the protruding portion 51. In some areas of the opposing regions of the surfaces 501 and 601, including the area where the dielectric 90 is arranged, the distance between the opposing surfaces of the wiring members 50 and 60 is narrower than in other areas excluding the area. The protruding portion 51 is provided integrally with the other parts of the wiring member 50. The other configurations are the same as those described in the prior embodiment.

[0096] <Summary of the third embodiment> As illustrated, the first and second conductors may be arranged such that, in a portion of the region between their opposing surfaces, including the region where the dielectric 90 is placed, the distance between their opposing surfaces is narrower than in the other regions excluding that portion. A portion of the distance between the opposing surfaces is narrower, and the dielectric 90 is placed in this narrow region. This makes it possible to increase the capacitance of the capacitor 91.

[0097] As illustrated, one of the first and second conductors may be positioned to overlap with the dielectric 90 in the Z direction and may have a projection that protrudes toward the other of the first and second conductors. This makes it possible to narrow a portion of the space between opposing surfaces without increasing the number of parts.

[0098] <Variation> An example has been shown in which a protrusion 51 is provided on the wiring member 50, but the invention is not limited to this. A protrusion may also be provided on the wiring member 60. Protrusions may also be provided on both the wiring member 50 and 60 such that their respective protrusions overlap in a plan view.

[0099] Although an example has been shown in which the protrusion 51 is provided integrally with other parts of the wiring member 50, the method is not limited to this. The protrusion 51 may also be provided by joining multiple members. For example, in Figure 14, the protrusion 51 is provided by joining a second member to a first member which forms the main part of the wiring member 50. The protrusion 51 is composed of the second member.

[0100] An example has been shown in which a protrusion 51 is provided on the wiring member 50, but the invention is not limited to this. A protrusion may also be provided on the wiring member 60. Protrusions may also be provided on both the wiring member 50 and 60 such that their respective protrusions overlap in a plan view.

[0101] Configurations that narrow a portion of the space between opposing surfaces, and configurations that narrow the space by providing a protruding portion, can be combined with the configurations described in the first embodiment and its modified form, and the configurations described in the second embodiment and its modified form.

[0102] (Fourth Embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be incorporated by reference. In the prior embodiment, a dielectric material was placed between the wiring members. Alternatively, a dielectric material may be placed between the wiring members and the conductive spacer.

[0103] Figure 15 is a cross-sectional view showing a semiconductor module according to this embodiment. Figure 15 corresponds to Figure 7. In the semiconductor module 21, the dielectric 90 is arranged between the opposing surfaces of the wiring member 50 and the conductive spacer 70.

[0104] The conductive spacer 70 has an overlapping portion 71 that overlaps with the semiconductor element 40 in a plan view, and a non-overlapping portion 72 that extends from the overlapping portion and does not overlap with the semiconductor element in a plan view. In other words, compared to the configuration described in the prior embodiment, the conductive spacer 70 is extended in a direction perpendicular to the Z direction. The dielectric 90 is disposed between one surface 701 of the conductive spacer 70 and one surface 501 of the wiring member 50. One surface 701 is the surface of the conductive spacer 70 that faces the semiconductor element 40. The dielectric 90 is disposed between the non-overlapping portion 72 and the opposing surfaces of the wiring member 50. The exemplary dielectric 90 is non-contact with the wiring member 50 and the conductive spacer 70. A sealant 30 is interposed between the dielectric 90 and the wiring member 50, and between the dielectric 90 and the conductive spacer 70. The other configurations are the same as those described in the prior embodiment.

[0105] <Summary of the fourth embodiment> As illustrated, the semiconductor module 21 may include a third conductor electrically connected to the semiconductor element 40, with the second conductor interposed between the semiconductor element 40 and the third conductor in the Z direction to electrically relay the semiconductor element 40 and the third conductor. The second conductor may have an overlapping portion 71 that overlaps with the semiconductor element 40 in a plan view, and a non-overlapping portion 72 that extends from the overlapping portion and does not overlap with the semiconductor element 40 in a plan view. The dielectric 90 may be arranged between the non-overlapping portion 72 and the first conductor. In the illustrated semiconductor module 21, the wiring member 50 corresponds to the first conductor, the conductive spacer 70 corresponds to the second conductor, and the wiring member 60 corresponds to the third conductor.

[0106] By intentionally extending the second conductor (conductive spacer 70) interposed between the semiconductor element 40 and the third conductor (wiring member 60), the distance between the opposing surfaces of the first conductor and the second conductor can be narrowed compared to the configuration shown in the first embodiment. Therefore, the capacitance of the capacitor 91 can be increased.

[0107] <Variation> The configuration in which the conductive spacer 70 is used as the second conductor can be combined with the configurations described in the first embodiment and its modifications, and the configurations described in the second embodiment and its modifications. It can also be combined with the configuration in which the wiring member 50 described in the third embodiment is provided with a protrusion 51. For example, the dielectric 90 may be placed on one surface 701 and connected to the conductive spacer 70.

[0108] (Fifth embodiment) This embodiment is a modification based on the prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, one dielectric material was placed between the opposing surfaces. Alternatively, multiple dielectric materials may be placed between the opposing surfaces.

[0109] Figure 16 is a cross-sectional view showing a semiconductor module according to this embodiment. Figure 16 corresponds to Figure 7. Figure 17 is an enlarged view of region XVII shown by the dashed line in Figure 16. Figure 17 corresponds to Figure 8. In the semiconductor module 21, the dielectric 90 is arranged between the opposing surfaces of the wiring members 50 and 60. The semiconductor module 21 comprises a plurality of dielectrics 90.

[0110] The example semiconductor module 21 comprises two dielectrics 90. The two dielectrics 90 are aligned in the Z direction between opposing surfaces. Dielectric 90A, one of the dielectrics 90, is located on one surface 501 and connected to the wiring member 50. Dielectric 90B, the other of the dielectrics 90, is located on one surface 601 and connected to the wiring member 60. A sealant 30 is interposed between dielectrics 90A and dielectric 90B. In other words, the three dielectric members are stacked in the Z direction in the order of dielectric 90A, sealant 30, and dielectric 90B.

[0111] Capacitor 91 is formed by connecting three capacitor elements C4, C5, and C6 in series. Capacitor element C4 is composed of a dielectric 90A. Capacitor element C5 is composed of a dielectric 90B. Capacitor element C6 is composed of a sealant 30 interposed between the dielectrics 90A and 90B. The other configurations are the same as those described in the prior embodiment.

[0112] <Summary of the Fifth Embodiment> As illustrated, multiple dielectrics 90 may be arranged in the Z direction between opposing surfaces. In the example semiconductor module 21, the wiring member 50 corresponds to the first conductor, and the wiring member 60 corresponds to the second conductor. As a result, multiple capacitor elements are connected in series to form a capacitor 91. Since the voltage across each capacitor element is distributed, the failure rate can be reduced. In particular, the voltage is distributed across multiple capacitor elements including the dielectric 90, which can reduce the failure rate.

[0113] <Variation> The number of dielectrics 90 aligned in the Z direction between opposing surfaces is not limited to two. There may be three or more. If there are three or more, at least one dielectric 90 is positioned away from the wiring members 50, 60.

[0114] The configuration in which multiple dielectrics 90 are aligned in the Z direction can be combined with the configuration described in the first embodiment and its modified form, the configuration described in the second embodiment and its modified form, the configuration described in the third embodiment and its modified form, and the configuration described in the fourth embodiment and its modified form.

[0115] (Sixth Embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, a snubber circuit in which the encapsulant is replaced with a dielectric was applied to a 1-in-1 package. Alternatively, it may be applied to a 2-in-1 package.

[0116] Figure 18 is a plan view showing an example of a semiconductor module according to this embodiment. Figure 19 is a cross-sectional view along the line XIX-XIX in Figure 18. The semiconductor module 21 has a so-called U-shaped 2-in-1 package structure. The semiconductor module 21 comprises a encapsulant 30, a plurality of semiconductor elements 40, a wiring member 50, a plurality of wiring members 60, a plurality of conductive spacers 70, an external connection terminal 80, and a dielectric 90.

[0117] The semiconductor element 40 includes at least one semiconductor element 40H that constitutes the upper arm of the upper and lower arm circuit, and at least one semiconductor element 40L that constitutes the lower arm. The example semiconductor element 40 comprises one semiconductor element 40H and one semiconductor element 40L. The semiconductor elements 40H and 40L are aligned in the X direction in a plan view. The semiconductor elements 40H and 40L are in a reversed configuration relative to each other. The semiconductor element 40H is positioned so that its source electrode 42 faces the wiring member 50. The semiconductor element 40L is positioned so that its drain electrode 41 faces the wiring member 50.

[0118] The wiring member 50 electrically connects the upper arm and the lower arm. The wiring member 50 is positioned so as to overlap all of the semiconductor elements 40 in a plan view. The wiring member 50 is positioned so as to enclose all of the semiconductor elements 40 in a plan view. The illustrated wiring member 50 is flat. The source electrode 42 of the semiconductor element 40H is electrically connected to the wiring member 50. The drain electrode 41 of the semiconductor element 40L is electrically connected to the wiring member 50.

[0119] The wiring member 60 includes a wiring member 60H on the upper arm side and a wiring member 60L on the lower arm side. The wiring member 60H is positioned so as to overlap with the semiconductor element 40H in a plan view. The wiring member 60H is positioned so as to sandwich the semiconductor element 40H between it and the wiring member 50. The drain electrode 41 of the semiconductor element 40H is electrically connected to the wiring member 60H. The wiring member 60L is positioned so as to overlap with the semiconductor element 40L in a plan view. The wiring member 60L is positioned so as to sandwich the semiconductor element 40L between it and the wiring member 50. The source electrode 42 of the semiconductor element 40L is electrically connected to the wiring member 60L.

[0120] The conductive spacer 70 includes a conductive spacer 70H on the upper arm side and a conductive spacer 70L on the lower arm side. Conductive spacer 70H is interposed between the semiconductor element 40H and the wiring member 50. Conductive spacer 70L is interposed between the semiconductor element 40L and the wiring member 60L.

[0121] The external connection terminal 80 includes main terminals 81P, 81N, and 81A as main terminals 81. Main terminal 81P is electrically connected to the drain electrode 41 of the semiconductor element 40H via wiring member 60H. Main terminal 81P is sometimes referred to as the P terminal or high-potential power terminal. Main terminal 81N is electrically connected to the source electrode 42 of the semiconductor element 40L via wiring member 60L. Main terminal 81N is sometimes referred to as the N terminal or low-potential power terminal. Main terminal 81A is electrically connected to the source electrode 42 of the semiconductor element 40H and the drain electrode 41 of the semiconductor element 40L via wiring member 50. Main terminal 81A is sometimes referred to as the output terminal, etc.

[0122] The main terminals 81P, 81N, and 81A are connected to the corresponding wiring members 50, 60H, and 60L. The main terminals 81P, 81N, and 81A extend generally in the Y direction and protrude from the side surface 303 to the outside of the sealing body 30. The main terminals 81P, 81N, and 81A are aligned in the X direction so that their side surfaces face each other.

[0123] The external connection terminal 80 includes signal terminals 82, namely signal terminals 82H and 82L. Signal terminal 82H is electrically connected to the pad 43 of semiconductor element 40H. Signal terminal 82L is electrically connected to the pad 43 of semiconductor element 40L. Signal terminals 82H and 82L extend generally in the Y direction and protrude out of the encapsulant 30 from the side surface 304. Signal terminals 82H and 82L are aligned in the X direction.

[0124] The dielectric 90 is positioned between opposing surfaces of the wiring members 50 and 60H. The dielectric 90 is positioned between opposing surfaces of the wiring members 50 and 60L. In the example, the dielectric 90 is positioned on one surface 501 and connected to the wiring member 50. The dielectric 90 is positioned so as to overlap with the wiring members 60H and 60L in a plan view. The dielectric 90 is positioned between the semiconductor elements 40H and 40L in the X direction. The dielectric 90 has a substantially rectangular shape in plan with the Y direction as its longitudinal direction.

[0125] The capacitor 91 includes a capacitor 91H on the upper arm side and a capacitor 91L on the lower arm side. Capacitor 91H is composed of a wiring member 50, a dielectric 90, and a wiring member 60H. Specifically, it has a configuration in which a capacitor element including a dielectric 90 and a capacitor element including a seal 30 are connected in series. Capacitor 91L is composed of a wiring member 50, a dielectric 90, and a wiring member 60L. Specifically, it has a configuration in which a capacitor element including a dielectric 90 and a capacitor element including a seal 30 are connected in series. The other configurations are the same as those described in the prior embodiment.

[0126] <Summary of the 6th Embodiment> As illustrated, the first conductor may be electrically connected to the first main electrode of the semiconductor element, and the second conductor may be electrically connected to the second main electrode formed on the semiconductor element 40 to which the first conductor is connected, on the opposite side in the Z direction from the first main electrode. On the upper arm side of the illustrated semiconductor module 21, one of the wiring members 50, 60H corresponds to the first conductor, and the other corresponds to the second conductor. On the lower arm side, one of the wiring members 50, 60L corresponds to the first conductor, and the other corresponds to the second conductor. This makes it possible to construct an arm snubber connected in parallel to the semiconductor elements constituting one arm while suppressing an increase in size.

[0127] <Variation> The U-shaped 2-in-1 package structure can be combined with the configuration described in the first embodiment and its variant, the configuration described in the second embodiment and its variant, the configuration described in the third embodiment and its variant, the configuration described in the fourth embodiment and its variant, and the configuration described in the fifth embodiment and its variant.

[0128] For example, as shown in Figure 20, the dielectric 90 may be placed between the opposing surfaces of the conductive spacer 70H and the wiring member 60H. The dielectric 90 may also be placed between the opposing surfaces of the conductive spacer 70L and the wiring member 50. By intentionally extending the conductive spacers 70H and 70L to provide a non-overlapping portion 72, the distance between the opposing surfaces of the first conductor and the second conductor can be narrowed. Therefore, the capacitance of the capacitor 91 can be increased. On the upper arm side of the example semiconductor module 21, the wiring member 60H corresponds to the first conductor, and the conductive spacer 70H corresponds to the second conductor. The wiring member 50 corresponds to the third conductor. On the lower arm side, the wiring member 50 corresponds to the first conductor, and the conductive spacer 70L corresponds to the second conductor. The wiring member 60L corresponds to the third conductor.

[0129] The conductive spacer 70 may be placed on the drain electrode 41 side. In the example shown in Figure 21, the conductive spacer 70H is interposed between the drain electrode 41 of the semiconductor element 40H and the wiring member 60H. This aligns the arrangement of the first conductor and the second conductor in the upper and lower arms, simplifying the arrangement of the dielectric 90 while allowing the dielectric 90 to be placed between the wiring member 50 and the conductive spacers 70H and 70L. In the example semiconductor module 21, the dielectric 90 is placed on one surface 501 of the wiring member 50.

[0130] At least one of the wiring members 50 and 60 may be made from the above-mentioned substrate. In particular, if the wiring members 60H and 60L are made from a substrate, the two wiring members can be realized on a single substrate by patterning the metal body on the semiconductor element 40 side. Therefore, the configuration can be simplified.

[0131] (Seventh Embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, a snubber circuit in which the encapsulant is replaced with a dielectric was applied to a U-shaped 2-in-1 package. Alternatively, it may be applied to an N-shaped 2-in-1 package.

[0132] Figure 22 is a plan view showing an example of a semiconductor module according to this embodiment. Figure 23 is a cross-sectional view taken along the line XXIII-XXIII in Figure 22. The semiconductor module 21 has a so-called N-type 2-in-1 package structure. The semiconductor module 21 comprises a encapsulant 30, a plurality of semiconductor elements 40, a plurality of wiring members 50, a plurality of wiring members 60, a plurality of conductive spacers 70, a joint portion 75, an external connection terminal 80, and a dielectric 90.

[0133] The semiconductor element 40 includes at least one semiconductor element 40H that constitutes the upper arm of the upper and lower arm circuit, and at least one semiconductor element 40L that constitutes the lower arm. The exemplary semiconductor element 40 comprises one semiconductor element 40H and one semiconductor element 40L. The semiconductor elements 40H and 40L are aligned in the X direction in a plan view. The semiconductor elements 40H and 40L are arranged in the same orientation. The semiconductor elements 40H and 40L are arranged such that their drain electrodes 41 face the wiring member 50. The semiconductor elements 40H and 40L are arranged in approximately the same position relative to each other in the Z direction.

[0134] The wiring member 50 includes a wiring member 50H on the upper arm side and a wiring member 50L on the lower arm side. The wiring member 50H is positioned so as to overlap with the semiconductor element 40H in a plan view. The drain electrode 41 of the semiconductor element 40H is electrically connected to the wiring member 50H. The wiring member 50L is positioned so as to overlap with the semiconductor element 40L in a plan view. The drain electrode 41 of the semiconductor element 40L is electrically connected to the wiring member 50L.

[0135] The wiring member 60 includes a wiring member 60H on the upper arm side and a wiring member 60L on the lower arm side. The wiring member 60H is positioned so as to overlap with the semiconductor element 40H in a plan view. The wiring member 60H is positioned so as to sandwich the semiconductor element 40H between it and the wiring member 50H. The source electrode 42 of the semiconductor element 40H is electrically connected to the wiring member 60H. The wiring member 60L is positioned so as to overlap with the semiconductor element 40L in a plan view. The wiring member 60L is positioned so as to sandwich the semiconductor element 40L between it and the wiring member 50L. The source electrode 42 of the semiconductor element 40L is electrically connected to the wiring member 60L.

[0136] The conductive spacer 70 includes a conductive spacer 70H on the upper arm side and a conductive spacer 70L on the lower arm side. Conductive spacer 70H is interposed between the semiconductor element 40H and the wiring member 60H. Conductive spacer 70L is interposed between the semiconductor element 40L and the wiring member 60L.

[0137] The joint 75 electrically connects the upper arm and the lower arm. The joint 75 electrically connects the wiring member 60H and the wiring member 50L. The joint 75 is positioned closer to the signal terminal 82 than to the main terminal 81 in the Y direction.

[0138] The external connection terminal 80 includes main terminals 81P, 81N, and 81A as main terminals 81. Main terminal 81P is electrically connected to the drain electrode 41 of the semiconductor element 40H via wiring member 50H. Main terminal 81N is electrically connected to the source electrode 42 of the semiconductor element 40L via wiring member 60L. Main terminal 81A is electrically connected to the source electrode 42 of the semiconductor element 40H and the drain electrode 41 of the semiconductor element 40L via wiring member 50L.

[0139] The main terminals 81P, 81N, and 81A are connected to the corresponding wiring members 50H, 50L, and 60L. The main terminals 81P, 81N, and 81A extend generally in the Y direction and protrude from the side surface 303 to the outside of the sealing body 30. The main terminals 81P, 81N, and 81A are aligned in the X direction so that their side surfaces face each other.

[0140] The external connection terminal 80 includes signal terminals 82, namely signal terminals 82H and 82L. Signal terminal 82H is electrically connected to the pad 43 of semiconductor element 40H. Signal terminal 82L is electrically connected to the pad 43 of semiconductor element 40L. Signal terminals 82H and 82L extend generally in the Y direction and protrude out of the encapsulant 30 from the side surface 304. Signal terminals 82H and 82L are aligned in the X direction.

[0141] The dielectric 90 is positioned between opposing surfaces of wiring members 50H and 60H. The dielectric 90 is positioned between opposing surfaces of wiring members 50L and 60L. The example dielectric 90 is positioned on one surface 501 and connected to the wiring member 50. One of the dielectrics 90 is positioned to surround the semiconductor element 40H. The other dielectric 90 is positioned to surround the semiconductor element 40L. Each of the dielectrics 90 forms a ring with a planar shape that is approximately rectangular.

[0142] The capacitor 91 includes a capacitor 91H on the upper arm side and a capacitor 91L on the lower arm side. Capacitor 91H is composed of a wiring member 50H, a dielectric 90, and a wiring member 60H. Specifically, it has a configuration in which a capacitor element including a dielectric 90 and a capacitor element including a seal 30 are connected in series. Capacitor 91L is composed of a wiring member 50L, a dielectric 90, and a wiring member 60L. Specifically, it has a configuration in which a capacitor element including a dielectric 90 and a capacitor element including a seal 30 are connected in series. The other configurations are the same as those described in the prior embodiment.

[0143] <Summary of Embodiment 7> As illustrated, the first conductor may be electrically connected to the first main electrode of the semiconductor element, and the second conductor may be electrically connected to the second main electrode formed on the semiconductor element 40 to which the first conductor is connected, on the opposite side in the Z direction from the first main electrode. On the upper arm side of the illustrated semiconductor module 21, one of the wiring members 50H, 60H corresponds to the first conductor, and the other corresponds to the second conductor. On the lower arm side, one of the wiring members 50L, 60L corresponds to the first conductor, and the other corresponds to the second conductor. This makes it possible to construct an arm snubber connected in parallel to the semiconductor elements constituting one arm while suppressing an increase in size.

[0144] <Variation> The N-shaped 2-in-1 package structure can be combined with the configuration described in the first embodiment and its variant, the configuration described in the second embodiment and its variant, the configuration described in the third embodiment and its variant, the configuration described in the fourth embodiment and its variant, and the configuration described in the fifth embodiment and its variant.

[0145] For example, as shown in Figure 24, the dielectric 90 may be placed between the opposing surfaces of the conductive spacer 70H and the wiring member 60H. The dielectric 90 may also be placed between the opposing surfaces of the conductive spacer 70L and the wiring member 50. By intentionally extending the conductive spacers 70H and 70L to provide a non-overlapping portion 72, the distance between the opposing surfaces of the first conductor and the second conductor can be narrowed. Therefore, the capacitance of the capacitor 91 can be increased. On the upper arm side of the exemplary semiconductor module 21, the wiring member 50H corresponds to the first conductor, and the conductive spacer 70H corresponds to the second conductor. The wiring member 60H corresponds to the third conductor. On the lower arm side, the wiring member 50L corresponds to the first conductor, and the conductive spacer 70L corresponds to the second conductor. The wiring member 60L corresponds to the third conductor.

[0146] At least one of the wiring members 50 and 60 may be made of the above-mentioned substrate. If the wiring members 50H and 50L are made of substrate, the two wiring members can be realized on a single substrate by patterning the metal body on the semiconductor element 40 side. If the wiring members 60H and 60L are made of substrate, the two wiring members can be realized on a single substrate by patterning the metal body on the semiconductor element 40 side. Therefore, the configuration can be simplified.

[0147] (Eighth embodiment) This embodiment is a modification based on a prior embodiment, and the description of the prior embodiment can be incorporated by reference. In the prior embodiment, an arm snubber was applied to a 2-in-1 package. A PN snubber may be applied instead, or in addition to this.

[0148] Figure 25 is a cross-sectional view showing an example of a semiconductor module according to this embodiment. The semiconductor module 21 has a U-shaped 2-in-1 package structure, similar to the configuration shown in Figure 19. The conductive spacer 70H is interposed between the source electrode 42 of the semiconductor element 40H and the wiring member 50. The conductive spacer 70L is interposed between the source electrode 42 of the semiconductor element 40L and the wiring member 60L. The conductive spacer 70L is at the same potential as the wiring member 60L.

[0149] The conductive spacer 70L has an overlapping portion 71 and a non-overlapping portion 72. The conductive spacer 70L extends in the X direction so as to overlap a portion of the wiring member 60H in a plan view. A portion of the non-overlapping portion 72 overlaps with the wiring member 60H in a plan view. The dielectric 90 is arranged in the region where one surface 701 of the conductive spacer 70L and one surface 601 of the wiring member 60H face each other. The exemplary dielectric 90 is connected to the wiring member 60H. The encapsulant 30 is interposed between the dielectric 90 and the conductive spacer 70L. The capacitor 91 is connected in parallel to the series circuit of the semiconductor elements 40H and 40L. The other configurations are the same as those described in the prior embodiment.

[0150] <Summary of the 8th Embodiment> As illustrated, the semiconductor module 21 may include a fourth conductor that electrically connects the upper arm element and the lower arm element. The first conductor may be electrically connected only to the upper arm element, and the second conductor may be electrically connected only to the lower arm element. In other words, the capacitor 91 may be composed of a first conductor electrically connected only to the upper arm element, a second conductor electrically connected only to the lower arm element, and a dielectric 90. In the illustrated semiconductor module 21, the semiconductor element 40H corresponds to the upper arm element, and the semiconductor element 40L corresponds to the lower arm element. The wiring member 50 and the conductive spacer 70H correspond to the fourth conductor. The wiring member 60H corresponds to the first conductor, and the conductive spacer 70L corresponds to the second conductor. The wiring member 60L corresponds to the third conductor.

[0151] According to this, a PN snubber is configured to be connected in parallel to the upper and lower arm circuits. The PN snubber can be configured while suppressing an increase in its size. By extending the conductive spacer 70L, the distance between opposing surfaces can be narrowed, and the capacitance of the capacitor 91 can be increased.

[0152] <Variation> A PN snubber may be applied to an N-shaped 2-in-1 package. For example, as shown in Figure 26, a non-overlapping portion 72 may be provided in the conductive spacer 70L. The semiconductor module 21 has an N-shaped 2-in-1 package structure, similar to the configuration shown in Figure 23. The cross-section shown in Figure 26 shows a cross-section at a position closer to the main terminal 81 than in Figure 23. The conductive spacer 70H is interposed between the source electrode 42 of the semiconductor element 40H and the wiring member 60H. The conductive spacer 70L is interposed between the source electrode 42 of the semiconductor element 40L and the wiring member 60L. The conductive spacer 70L is at the same potential as the wiring member 60L.

[0153] The conductive spacer 70L has an overlapping portion 71 and a non-overlapping portion 72. The conductive spacer 70L extends in the X direction so as to overlap a portion of the wiring member 50H in a plan view. A portion of the non-overlapping portion 72 overlaps with the wiring member 50H in a plan view. The dielectric 90 is arranged in the region where one surface 701 of the conductive spacer 70L and one surface 601 of the wiring member 60H face each other. The exemplary dielectric 90 is connected to the wiring member 50H. The sealant 30 is interposed between the dielectric 90 and the conductive spacer 70L. The other configurations are the same as those described in the prior embodiment.

[0154] In Figure 26, the wiring member 60H, the conductive spacer 70H, and the wiring member 50L correspond to the fourth conductor. The wiring member 50H corresponds to the first conductor, and the conductive spacer 70L corresponds to the second conductor. The wiring member 60L corresponds to the third conductor. According to this, a PN snubber is constructed in an N-type 2-in-1 package. The PN snubber can be constructed while suppressing an increase in size. By extending the conductive spacer 70L, the distance between opposing surfaces can be narrowed, and the capacitance of the capacitor 91 can be increased.

[0155] As shown in Figure 27, a portion of the wiring member 50H and a portion of the wiring member 60L may be arranged so as to overlap each other, and the dielectric 90 may be placed between the opposing surfaces of the wiring members 50H and 60L. Figure 27 corresponds to Figure 26. This also allows a PN snubber to be constructed in an N-type 2-in-1 package. Since the dielectric 90 is placed in place of a portion of the encapsulant 30, the PN snubber can be constructed while suppressing an increase in its size.

[0156] (Ninth Embodiment) This embodiment is a modification based on the prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, a C snubber circuit containing only a capacitor was provided as the snubber circuit. Instead, an RC snubber circuit may be provided.

[0157] Figure 28 is a cross-sectional view showing an example of a semiconductor module according to this embodiment. Figure 28 corresponds to Figure 7. The semiconductor module 21 includes a resistive component 92. The resistive component 92 is, for example, a chip resistor. The resistive component 92 is positioned to overlap with the dielectric 90 in a plan view. The dielectric 90 and the resistive component 92 are arranged between the opposing surfaces of the wiring members 50 and 60.

[0158] In the exemplary semiconductor module 21, the encapsulant 30 is interposed between the resistive component 92 and the dielectric 90. The encapsulant 30 is interposed between the dielectric 90 and the wiring member 60. One terminal of the resistive component 92 is connected to the wiring member 50, and the other terminal is connected to the encapsulant 30 interposed between the resistive component 92 and the dielectric 90. The other configurations are the same as those described in the prior embodiment.

[0159] <Summary of the 9th Embodiment> As illustrated, the semiconductor module 21 may also include a resistive component 92 in addition to the dielectric 90. In this case, a series circuit of a resistor and a capacitor is formed between the opposing surfaces of the first conductor and the second conductor. In other words, an RC snubber circuit can be formed.

[0160] The configuration shown in this embodiment can be combined with the configuration described in the first embodiment and its variant, the configuration described in the second embodiment and its variant, the configuration described in the third embodiment and its variant, the configuration described in the fourth embodiment and its variant, the configuration described in the fifth embodiment and its variant, the configuration described in the sixth embodiment and its variant, the configuration described in the seventh embodiment and its variant, and the configuration described in the eighth embodiment and its variant.

[0161] (Tenth embodiment) This embodiment is a modification based on the prior embodiment, and the description of the prior embodiment can be referenced. In the prior embodiment, the semiconductor module 21 was configured to allow heat dissipation from both sides. Alternatively, the semiconductor module 21 may be configured to allow heat dissipation from one side.

[0162] Figure 29 is a cross-sectional view showing an example of a semiconductor module according to this embodiment. Figure 30 is a cross-sectional view along the line XXX-XXX in Figure 29. The semiconductor module 21 is configured to allow heat dissipation from one side. One semiconductor module 21 constitutes one arm. The semiconductor module 21 includes a encapsulant 30, a semiconductor element 40, a wiring member 50, a clip 77, an external connection terminal 80, and a dielectric 90.

[0163] The wiring member 50 includes a wiring member 50D that is electrically connected to the drain electrode 41 of the semiconductor element 40, and a wiring member 50S that is electrically connected to the source electrode 42 of the semiconductor element 40. The wiring members 50D and 50S are arranged on the same plane. The illustrated wiring members 50D and 50S are aligned in the X direction. The back surfaces 502 of the wiring members 50D and 50S are exposed to the outside of the encapsulant 30 from one surface 301. A cooler 22 (not shown) is placed on the side of one surface 301 of the semiconductor module 21.

[0164] The semiconductor element 40 is arranged on one surface 501 of the wiring member 50D. The drain electrode 41 is electrically connected to the wiring member 50D. The source electrode 42 is electrically connected to the wiring member 50S via a clip 77 made of metal plate material. The clip 77 is at the same potential as the wiring member 50S.

[0165] The external connection terminal 80 includes main terminals 81D and 81S as main terminals 81. Main terminal 81D is electrically connected to the wiring member 50D. Main terminal 81S is electrically connected to the wiring member 50S. Main terminals 81D and 81S extend generally in the Y direction and protrude from the side surface 303 to the outside of the sealant 30.

[0166] The dielectric 90 is located in the region where one surface 501 of the wiring member 50D and one surface 771 of the clip 77 face each other. In the example, the dielectric 90 is located on surface 501 and connected to the wiring member 50D. Between the facing surfaces of the wiring member 50D and the clip 77, there is the dielectric 90 and the sealant 30. The sealant 30 is interposed between the dielectric 90 and the clip 77. The capacitor 91 of the snubber circuit is composed of the wiring member 50D, the dielectric 90, the sealant 30, and the clip 77. The other configurations are the same as those described in the prior embodiment.

[0167] <Summary of the 10th Embodiment> As illustrated, in the semiconductor module 21 with a single-sided heat dissipation structure, the first conductor may be electrically connected to the first main electrode of the semiconductor element 40, and the second conductor may be electrically connected to the second main electrode formed on the semiconductor element 40 to which the first conductor is connected, on the side opposite to the first main electrode in the Z direction. In the illustrated semiconductor module 21, the wiring member 50D corresponds to the first conductor, and the clip 77 corresponds to the second conductor. This makes it possible to construct an arm snubber connected in parallel to semiconductor elements constituting one arm while suppressing an increase in size.

[0168] <Variation> The wiring member 50S may be removed, and the main terminal 80S may be electrically connected to the source electrode 42 instead of the clip 77. In this case, the main terminal 80S corresponds to the second conductor. The dielectric 90 is placed between the opposing surfaces of the main terminal 81S and the wiring member 50D.

[0169] A semiconductor module 21 with a single-sided heat dissipation structure may be combined with a PN snubber.

[0170] (Other embodiments) The disclosures in this specification and drawings are not limited to the exemplary embodiments. The disclosures include the exemplary embodiments and variations thereof by those skilled in the art. For example, the disclosures are not limited to combinations of parts and / or elements shown in the embodiments. The disclosures are implementable in a variety of combinations. The disclosures may have additional parts that can be added to the embodiments. The disclosures include those in which parts and / or elements of the embodiments have been omitted. The disclosures include substitutions or combinations of parts and / or elements between one embodiment and another. The scope of the disclosed technical areas is not limited to the descriptions of the embodiments. Some of the scope of the disclosed technical areas are indicated by the claims and should be understood to include all modifications within the meaning and scope equivalent to the claims.

[0171] The disclosures in the specification and drawings are not limited by the claims. The disclosures in the specification and drawings encompass the technical ideas described in the claims and extend to a wider and more diverse range of technical ideas than those described in the claims. Therefore, a variety of technical ideas can be extracted from the disclosures in the specification and drawings without being bound by the claims.

[0172] When an element or layer is referred to as “on top of,” “connected to,” “linked to,” or “joined,” it may be directly on top of, connected to, or joined to another element or layer, and there may also be an intervening element or layer. In contrast, when an element is referred to as “directly on top of,” “directly connected to,” “directly linked to,” or “directly joined to” another element or layer, there is no intervening element or layer. Other words used to describe relationships between elements should be interpreted in a similar manner (e.g., “between” vs. “directly between,” “adjacent” vs. “directly adjacent,” etc.). As used in this specification, the term “and / or” includes any combination and all combinations relating to one or more of the enumerated items relating to each other. That is, the statement A and / or B means at least one of A and B.

[0173] Spatially relative terms such as "inside," "outside," "back," "below," "low," "above," and "high" are used here to facilitate descriptions of the relationship between one element or feature and other elements or features, as illustrated. Spatially relative terms may be intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the drawings. For example, if the device in the drawing is turned upside down, an element described as "below" or "directly below" another element or feature will be oriented "above" the other element or feature. Thus, the term "below" can encompass both up and down orientations. The device may also be oriented in other directions (it may be rotated 90 degrees or in other directions), and the spatially relative descriptors used in this specification will be interpreted accordingly.

[0174] Examples of semiconductor modules 21 include 1-in-1 and 2-in-1 packages, but are not limited to these. The semiconductor module 21 may also be a 6-in-1 package that constitutes, for example, three phase upper and lower arm circuits 9HL.

[0175] (Disclosure of technical ideas) This specification discloses several technical concepts, as described in the following paragraphs. Some paragraphs are written in a multiple dependent form, where subsequent paragraphs optionally refer to preceding paragraphs. Furthermore, some paragraphs are written in a multiple dependent form, referring to other multiple dependent forms. These paragraphs written in multiple dependent forms define several technical concepts.

[0176] <Technical philosophy 1> A semiconductor element (40) on which a switching element constituting a power conversion circuit is formed, A first conductor (50, 50H, 60H) electrically connected to the semiconductor element, A second conductor (60,60L,70,70L) is electrically connected to the semiconductor element, has a different potential from the first conductor, and is positioned at a different location from the first conductor in the thickness direction of the semiconductor element, The semiconductor element is enclosed by a sealing body (30) disposed between the opposing surfaces of the first conductor and the second conductor, Having a relative permittivity higher than that of the aforementioned sealing body, at least one dielectric (90) disposed between the opposing surfaces, Equipped with, The capacitor (91) is composed of the first conductor, the dielectric, and the second conductor, The capacitor is electrically connected in parallel to the semiconductor element in a semiconductor module.

[0177] <Technical philosophy 2> The semiconductor module according to technical concept 1, wherein the sealing body is interposed between at least one of the first conductor and the second conductor and the dielectric.

[0178] <Technical philosophy 3> The semiconductor module according to Technical Concept 1 or Technical Concept 2, wherein the dielectric is connected to at least one of the first conductor and the second conductor.

[0179] <Technical philosophy 4> A semiconductor module according to any one of technical concepts 1 to 3, wherein the first conductor and the second conductor are arranged such that the distance between the opposing surfaces is narrower in a portion of the region between the opposing surfaces, including the region where the dielectric is arranged, than in the other regions excluding the portion of the region.

[0180] <Technical philosophy 5> The semiconductor module according to technical concept 4, wherein one of the first conductor and the second conductor is provided at a position overlapping with the dielectric in a plan view in the thickness direction and has a protrusion (51) projecting toward the other of the first conductor and the second conductor.

[0181] <Technical philosophy 6> The semiconductor element comprises a third conductor (60) electrically connected to the semiconductor element, The second conductor (70) is interposed between the semiconductor element and the third conductor in the thickness direction, electrically relaying the semiconductor element and the third conductor. The second conductor has an overlapping portion (71) that overlaps with the semiconductor element in a plan view in the thickness direction, and a non-overlapping portion (72) that extends from the overlapping portion and does not overlap with the semiconductor element in a plan view in the thickness direction. The dielectric is disposed between the non-overlapping portion and the first conductor in the semiconductor module according to any one of the technical concepts 1 to 3.

[0182] <Technical philosophy 7> The first conductor is electrically connected to the first main electrode (41) of the semiconductor element. The semiconductor module according to any one of technical concepts 1 to 6, wherein the second conductor is electrically connected to a second main electrode (42) formed on the semiconductor element to which the first conductor is connected, on the surface opposite to the first main electrode in the thickness direction.

[0183] <Technical philosophy 8> The semiconductor element includes an upper arm element (40H) that constitutes the upper arm of the upper and lower arm circuit, which is the power conversion circuit, and a lower arm element (40L) that constitutes the lower arm of the upper and lower arm circuit. The upper arm element and the lower arm element are electrically connected by a fourth conductor (50), The first conductor (50H, 60H) is electrically connected only to the upper arm element. The semiconductor module according to any one of technical concepts 1 to 6, wherein the second conductor (60L, 70L) is electrically connected only to the lower arm element.

[0184] <Technical philosophy 9> The dielectric material is arranged in multiple parallel lines in the thickness direction between the opposing surfaces, in a semiconductor module according to any one of the technical concepts 1 to 8.

[0185] <Technical Thought 10> A semiconductor module (21) that constitutes a power conversion circuit, A cooler (22) for cooling the semiconductor module, It is equipped with, The aforementioned semiconductor module is A semiconductor element (40) on which a switching element is formed, A first conductor (50) electrically connected to the semiconductor element, A second conductor (60) is electrically connected to the semiconductor element, has a different potential from the first conductor, and is positioned at a different location from the first conductor in the thickness direction of the semiconductor element, The semiconductor element is enclosed by a sealing body (30) disposed between the opposing surfaces of the first conductor and the second conductor, Having a relative permittivity higher than that of the aforementioned sealing body, at least one dielectric (90) disposed between the opposing surfaces, It has, The capacitor (91) is composed of the first conductor, the dielectric, and the second conductor, The capacitor is electrically connected in parallel to the semiconductor element in a power conversion device. [Explanation of Symbols]

[0186] 1...Drive system, 2...DC power supply, 3...Motor generator, 3a...Winding, 4...Power conversion circuit, 5...Filter capacitor, 6...Smoothing capacitor, 7...Discharge resistor, 8...Converter, 8D...Diode, 8S...Switching element, 9...Inverter, 9D...Diode, 9S...Switching element, 10H...VH line, 10L...VL line, 11...N line, 12...Output line, 13...Capacitor, 20...Power converter, 21...Semiconductor module, 22,22A,22B...Cooler, 23...Inlet pipe, 24...Outlet pipe, 25...Flow path, 26,27...Connecting pipe, 30...Sealing body, 301...One side, 302...Back side, 303,304,305,306...Side, 40, 40H, 40L…Semiconductor element, 41…Drain electrode, 42…Source electrode, 43…Pad, 45…Bonding wire, 46…Bonding material, 50, 50D, 50H, 50S, 60H, 60, 60H, 60H…Wiring material, 501, 601…One side, 502, 602…Back side, 51…Protruding part, 70, 70H, 70L…Conductive spacer, 701…One side, 71…Overlapping part, 72…Non-overlapping part, 75…Joint part, 77…Clip, 771…One side, 80…External connection terminal, 81, 81A, 81D, 81M, 81P, 81S…Main terminal, 82, 82H, 82L…Signal terminal, 85…Suspension lead, 90, 90A, 90B…Dielectric, 91, 91H, 91L…Capacitor, 92…Resistor component

Claims

1. A power conversion circuit comprising at least one semiconductor element (40) on which a switching element is formed, A first conductor (50, 50H, 60H) electrically connected to the semiconductor element, A second conductor (60, 60L, 70, 70L) is electrically connected to the semiconductor element, has a different potential from the first conductor, and is positioned at a different location from the first conductor in the thickness direction of the semiconductor element, A sealing body (30) is provided to enclose the semiconductor element and to be disposed between the opposing surfaces of the first conductor and the second conductor, A dielectric (90) having a higher relative permittivity than the aforementioned sealing body, and disposed between the opposing surfaces, Equipped with, The capacitor (91) is formed by including the first conductor, the dielectric, and the second conductor. The capacitor is electrically connected in parallel to the semiconductor element in a semiconductor module.

2. The semiconductor module according to claim 1, wherein the sealing body is interposed between at least one of the first conductor and the second conductor and the dielectric.

3. The semiconductor module according to claim 1, wherein the dielectric is connected to at least one of the first conductor and the second conductor.

4. The semiconductor module according to claim 1, wherein the first conductor and the second conductor are arranged such that the distance between the opposing surfaces is narrower in a portion of the region between the opposing surfaces, including the region where the dielectric is arranged, than in the other regions excluding the portion of the region.

5. The semiconductor module according to claim 4, wherein one of the first conductor and the second conductor is provided at a position overlapping with the dielectric in a plan view in the thickness direction and has a projection (51) projecting toward the other one of the first conductor and the second conductor.

6. The semiconductor element comprises a third conductor (60) electrically connected to the semiconductor element, The second conductor (70) is interposed between the semiconductor element and the third conductor in the thickness direction, electrically relaying the semiconductor element and the third conductor. The second conductor has an overlapping portion (71) that overlaps with the semiconductor element in a plan view in the thickness direction, and a non-overlapping portion (72) that extends from the overlapping portion and does not overlap with the semiconductor element in a plan view in the thickness direction. The semiconductor module according to claim 1, wherein the dielectric is disposed between the non-overlapping portion and the first conductor.

7. The first conductor is electrically connected to the first main electrode (41) of the semiconductor element. The semiconductor module according to any one of claims 1 to 6, wherein the second conductor is electrically connected to a second main electrode (42) formed on the semiconductor element to which the first conductor is connected, on the surface opposite to the first main electrode in the thickness direction.

8. The semiconductor element includes an upper arm element (40H) that constitutes the upper arm of the upper and lower arm circuit, which is the power conversion circuit, and a lower arm element (40L) that constitutes the lower arm of the upper and lower arm circuit. The upper arm element and the lower arm element are electrically connected by a fourth conductor (50), The first conductor (50H, 60H) is electrically connected only to the upper arm element. The semiconductor module according to any one of claims 1 to 6, wherein the second conductor (60L, 70L) is electrically connected only to the lower arm element.

9. The semiconductor module according to any one of claims 1 to 6, wherein a plurality of dielectrics are arranged in the thickness direction between the opposing surfaces.

10. A semiconductor module (21) that constitutes a power conversion circuit, A cooler (22) for cooling the semiconductor module, It is equipped with, The aforementioned semiconductor module is A semiconductor element (40) on which a switching element is formed, A first conductor (50) electrically connected to the semiconductor element, A second conductor (60) is electrically connected to the semiconductor element, has a different potential from the first conductor, and is positioned at a different location from the first conductor in the thickness direction of the semiconductor element, A sealing body (30) is provided to enclose the semiconductor element and to be disposed between the opposing surfaces of the first conductor and the second conductor, A dielectric (90) having a higher relative permittivity than the aforementioned sealing body, and disposed between the opposing surfaces, It has, The capacitor (91) is formed by including the first conductor, the dielectric, and the second conductor. The capacitor is electrically connected in parallel to the semiconductor element in a power conversion device.

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