Circuitry and head-up displays

Abstract

To provide a circuit device, etc., that does not generate unnecessary displays when distortion correction is performed using multiple distortion correction tables. [Solution] The circuit device 100 includes a buffer memory 130 for storing input image data IMA and a distortion correction circuit 140 for correcting distortion of the input image. The output image includes a first output-side region ARQ1 projected by a first optical system and a second output-side region ARQ2 projected by a second optical system. The distortion correction circuit 140 converts the output-side coordinates to input-side coordinates. If the output-side coordinates are included in the first output-side region ARQ1 and the input-side coordinates do not belong to the first input-side region ARI1, the distortion correction circuit 140 converts the pixel data of the output image data IMB in the output-side coordinates to predetermined color data. If the output-side coordinates are included in the second output-side region ARQ2 and the input-side coordinates do not belong to the second input-side region ARI2, the distortion correction circuit 140 converts the pixel data of the output image data IMB in the output-side coordinates to predetermined color data.

Description

Technical Field

[0001] The present invention relates to a circuit device, a head-up display, and the like.

Background Art

[0002] Patent Document 1 discloses an image generation device that corrects distortion of an image captured by a wide-angle lens. An image obtained by correcting the distortion of an image captured by a wide-angle lens is used as a target image. A semi-circular indefinite region where an image is not formed is formed at the periphery of the target image. The image generation device sets a rectangular mask region that covers an end portion of the target image where the indefinite region exists, and fills the mask region with a defined color.

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When performing distortion correction on a plurality of regions of an image using a plurality of warp parameters, in the distortion correction of a certain region, there is a possibility that a display defect may occur between regions by referring to the image of the adjacent region. Due to this defect, for example, it may give a user a sense of discomfort.

Means for Solving the Problems

[0005] One aspect of the present disclosure is a circuit device for controlling a display device that projects an image using a first optical system and a second optical system, comprising: a buffer memory for storing input image data which is image data of an input image; and a distortion correction circuit for correcting the distortion of the input image and outputting output image data which is image data of an output image, wherein the output image includes a first output-side region projected by the first optical system and a second output-side region projected by the second optical system, and the distortion correction circuit converts the output-side coordinates of the output image to the input-side coordinates of the input image, and the output-side coordinates are converted to the first output-side region The present invention relates to a circuit device that, if the input coordinates are included in the region, determines whether or not they belong to a first input region set in accordance with the first output region, and if the input coordinates do not belong to the first input region, sets the pixel data of the output image data at the output coordinates to predetermined color data; and if the output coordinates are included in the second output region, determines whether or not the input coordinates belong to a second input region set in accordance with the second output region, and if the input coordinates do not belong to the second input region, sets the pixel data of the output image data at the output coordinates to predetermined color data.

[0006] Another aspect of the present disclosure relates to a head-up display including the above-described circuit device and a display device that projects the output image using the first optical system and the second optical system. [Brief explanation of the drawing]

[0007] [Figure 1] An example configuration of a display device included in a HUD. [Figure 2] A diagram illustrating distortion correction in a HUD using multiple optical systems. [Figure 3] An explanatory diagram for the "unnecessary" label. [Figure 4] A first example configuration of a head-up display. [Figure 5] Detailed configuration example of a distortion correction circuit. [Figure 6] Examples of areas set by area setting information. [Figure 7]An example of the processing flow of a distortion correction circuit. [Figure 8] An example of a processing flow for region detection, warp processing, and pixel data generation. [Figure 9] An example of a processing flow for region detection, warp processing, and pixel data generation. [Figure 10] An explanatory diagram illustrating an example of arranging display areas vertically. [Figure 11] Detailed configuration example of the distortion correction circuit in the second HUD configuration example. [Figure 12] An example of the circuit device configuration in the third configuration example of the HUD. [Figure 13] Detailed configuration example of the distortion correction circuit in the third HUD configuration example. [Figure 14] A diagram illustrating the operation of the distortion correction circuit in the third configuration example. [Modes for carrying out the invention]

[0008] Preferred embodiments of this disclosure will be described in detail below. The embodiments described below are not intended to unduly limit the scope of the claims, and not all configurations described in these embodiments are necessarily essential. For example, the following example shows the application of the distortion correction method of this disclosure to a head-up display. However, the distortion correction method of this disclosure is applicable to any display system that projects images using multiple optical systems, such as a projector. In the following, a head-up display may be abbreviated as a HUD.

[0009] 1. First Configuration Example Figure 1 shows an example configuration of a display device 200 included in the HUD. The display device 200 includes a display controller 210, display drivers 221 and 222, light sources 231 and 232, liquid crystal display panels 241 and 242, a first mirror 251, and a second mirror 252.

[0010] The display controller 210 receives output image data from the circuit device 100 and outputs image data and timing control signals to the display driver 221 and to the display driver 222. The display driver 221 drives the liquid crystal display panel 241 based on the image data and timing control signals received from the display controller 210. The display driver 222 drives the liquid crystal display panel 242 based on the image data and timing control signals received from the display controller 210.

[0011] Light source 231 emits light, which passes through liquid crystal display panel 241, and the first mirror 251 projects the transmitted light onto screen 10. Screen 10 is, for example, a windscreen for a mobile device. Screen 10 reflects the light, and the reflected light enters the user's eye 1. As a result, the user can see the first image 21 through screen 10. Similarly, light source 232 emits light, which passes through liquid crystal display panel 242, and the second mirror 252 projects the transmitted light onto screen 10. The second mirror 252 is, for example, a mirror or lens. Screen 10 reflects the light, and the reflected light enters the user's eye 1. As a result, the user can see the second image 22 through screen 10. The combined image of the first image 21 and the second image 22 becomes the display image projected by the HUD.

[0012] Furthermore, the display image projected by the HUD may be projected by three or more optical systems. For example, if the display image is projected by three mirrors, three sets of liquid crystal display panels, light sources, and mirrors are provided, and the display image, divided into a first image, a second image, and a third image, is projected by these sets.

[0013] FIG. 2 is a diagram for explaining distortion correction in a HUD using a plurality of optical systems. Distortion correction is to apply an image distortion opposite to the image distortion when the image is projected onto the screen of the HUD to the image. As a result, the distortion due to distortion correction and the distortion due to projection cancel each other out, so that an image display without distortion or with reduced distortion can be obtained. The image distortion due to projection is an image distortion including the image distortion due to the curved surface of the projection surface such as a screen, the image distortion due to the optical system, or both of them. Hereinafter, it is assumed that the display image is projected by three mirrors.

[0014] The input image to the circuit device 100 includes a first display area BI1 projected by the first mirror, a second display area BI2 projected by the second mirror, and a third display area BI3 projected by the third mirror. The first display area BI1 of the input image is distortion-corrected to the first display area BQ1 of the output image by the first distortion correction table. The first distortion correction table is a table that gives a distortion opposite to the distortion caused by projection using the first mirror. The second display area BI2 of the input image is distortion-corrected to the second display area BQ2 of the output image by the second distortion correction table. The second distortion correction table is a table that gives a distortion opposite to the distortion caused by projection using the second mirror. The third display area BI3 of the input image is distortion-corrected to the third display area BQ3 of the output image by the third distortion correction table. The third distortion correction table is a table that gives a distortion opposite to the distortion caused by projection using the third mirror.

[0015] The first display area BQ1, the second display area BQ2, and the third display area BQ3 of the output image generated in this way are projected by the first mirror, the second mirror, and the third mirror, respectively, so that the distortion due to projection and the distortion due to distortion correction cancel each other out. As a result, a display image without distortion similar to the input image can be seen by the user through the screen 10.

[0016] Although FIG. 2 above is an example in the case where ideal distortion correction is performed, in a HUD using a plurality of mirrors, unnecessary displays as shown in FIG. 3 below may occur.

[0017] In distortion correction, when the pixel coordinates of the output image are (U,V), (U,V) is converted to the input image coordinates (X,Y) based on the distortion correction table. Then, the pixel data of the output image coordinates (U,V) is constructed based on the pixel data of the input image coordinates (X,Y). At this time, the first output-side region ARQ1, which contains the first display region BQ1 in the output image, is converted to the first transformed region ART1 in the input image by distortion correction. Since the first transformed region ART1 has a shape similar to the first output-side region ARQ1 with inverse distortion correction, it includes not only the first display region BI1 of the input image but also a part of the adjacent second display region BI2. As a result, an unwanted display BG1 appears in the output image due to referencing the pixel data of the second display region BI2.

[0018] Similarly, when the second display area BQ2 of the output image is generated during distortion correction, an unnecessary display BG2 occurs due to referencing the pixel data of the first display area BI1, and an unnecessary display BG3 occurs due to referencing the pixel data of the third display area BI3. When the third display area BQ3 of the output image is generated during distortion correction, an unnecessary display BG4 occurs due to referencing the pixel data of the second display area BI2.

[0019] Figure 4 shows a first configuration example of a head-up display 500 including the circuit device 100 of this embodiment. The head-up display 500 includes the circuit device 100, a display device 200, and a processing device 300.

[0020] The processing unit 300 transmits the input image data (IMA), which is the image data of the input image, to the circuit device 100. The processing unit 300 is a so-called SoC, which is a processor such as a CPU or microcomputer. SoC stands for System on Chip. CPU stands for Central Processing Unit.

[0021] The circuit device 100 includes an input interface circuit 110, a buffer memory 130, a distortion correction circuit 140, an output interface circuit 150, and a storage circuit 160. The circuit device 100 is, for example, an integrated circuit device in which multiple circuit elements are integrated on a semiconductor substrate.

[0022] The input interface circuit 110 receives input image data (IMA) from the processing unit 300. The input interface circuit 110 may be an interface circuit for various image communication standards, but examples include receiving circuits for LVDS, DVI, DisplayPort, GMSL, or GVIF. LVDS stands for Low Voltage Differential Signaling, DVI stands for Digital Visual Interface, GMSL stands for Gigabit Multimedia Serial Link, and GVIF stands for Gigabit Video Interface.

[0023] The memory circuit 160 stores the area setting information 161 and the strain correction table 162. The memory circuit 160 may include non-volatile memory such as EEPROM or OTP memory, volatile memory such as SRAM or DRAM, or registers such as flip-flop circuits. The area setting information 161 and the strain correction table 162 may be stored in different types of memory circuits. For example, the area setting information 161 may be stored in a register, and the strain correction table 162 may be stored in volatile memory or non-volatile memory. The area setting information 161 may be written to the memory circuit 160 from the processing unit 300 via an interface not shown. Alternatively, if the memory circuit 160 is non-volatile memory, the area setting information 161 may be written to the memory circuit 160 in advance. The same applies to the strain correction table 162.

[0024] The buffer memory 130 temporarily stores the input image data IMA. The buffer memory 130 may be a line buffer that stores image data for multiple scan lines, or a frame memory that stores image data for one frame. The buffer memory 130 is, for example, a volatile memory such as SRAM or DRAM.

[0025] The distortion correction circuit 140 performs distortion correction on the input image based on the distortion correction table 162 and outputs output image data IMB, which is the image data of the output image. At this time, the distortion correction circuit 140 determines the output coordinates where the aforementioned unwanted display occurs based on the region setting information 161 and sets the pixel data of those coordinates to predetermined color data. The distortion correction table 162 is a table that associates the input coordinates (X,Y) of the input image with the output coordinates (U,V) of the output image. The distortion correction table 162 is also called the warp parameter. The predetermined color data is the color data that becomes transparent in the HUD display, for example, black data.

[0026] The output interface circuit 150 transmits the output image data IMB to the display device 200. The output interface circuit 150 may be an interface circuit for various image communication standards, but examples include transmission circuits such as LVDS, DVI, DisplayPort, GMSL, or GVIF.

[0027] The distortion correction circuit 140 is a logic circuit. Part or all of the logic circuit may be implemented by a processor such as a DSP. DSP stands for Digital Signal Processor. In this case, a program or instruction set describing the function of each circuit is stored in memory, and the processor executes this program or instruction set to realize the function of each circuit.

[0028] The display device 200 displays a virtual image in the user's field of view based on the output image data IMB received from the circuit device 100. An example of the display device 200 is shown in Figure 1, but it is not limited to this. For example, the circuit device 100 may have the function of a display controller 210 built in. Alternatively, there may be one display driver and one liquid crystal display panel, and multiple mirrors. In this case, images displayed in multiple areas of the liquid crystal display panel are projected by the corresponding mirrors. Alternatively, the optical system used for projection is not limited to mirrors, but may be, for example, lenses. Alternatively, an image display device may be used instead of a liquid crystal display panel and mirrors, and multiple such devices may be provided. The image display device may consist of a laser light source, a mirror that reflects the laser, and an actuator that drives the mirror to scan the laser. Alternatively, the image display device may be a digital mirror device including a laser light source, an array of micro-mirrors, and actuators that drive each micro-mirror.

[0029] Figure 5 shows a detailed configuration example of the distortion correction circuit 140. The distortion correction circuit 140 includes a pixel interpolation unit 141, a fill unit 142, an address conversion unit 143, a warp processing unit 145, a coordinate counter 146, a region setting information selection unit 148, a table selection unit 147, a region determination unit 149, and a region out-of-region determination unit 171. The operation of each part will be explained below using Figures 6 to 9.

[0030] Figure 6 shows an example of regions set by region setting information 161. The input image is set to a first input region ARI1, a second input region ARI2, and a third input region ARI3. The first input region ARI1 contains the first display region BI1 but does not contain the second display region BI2 and the third display region BI3. The second input region ARI2 contains the second display region BI2 but does not contain the first display region BI1 and the third display region BI3. The third input region ARI3 contains the third display region BI3 but does not contain the first display region BI1 and the second display region BI2.

[0031] The output image is configured with a first output region ARQ1, a second output region ARQ2, and a third output region ARQ3. The first output region ARQ1 contains the first display region BQ1 but does not contain the second display region BQ2 or the third display region BQ3. The second output region ARQ2 contains the second display region BQ2 but does not contain the first display region BQ1 or the third display region BQ3. The third output region ARQ3 contains the third display region BQ3 but does not contain the first display region BQ1 or the second display region BQ2.

[0032] In Figure 6, each display area of ​​the input image is shown as a rectangle, but the shape of each display area can be arbitrary. Also, in Figure 6, an example is shown where adjacent display areas in the input image are spaced apart, but adjacent display areas may be touching. Also, in Figure 6, an example is shown where adjacent input-side areas are touching, but if adjacent display areas are spaced apart, adjacent input-side areas may also be spaced apart. Similarly, adjacent output-side areas may be spaced apart. Also, in Figure 6, an example is shown where the input-side area is larger than the display area, but each input-side area may be the same area as the display area contained within it.

[0033] As shown in Figure 5, the region setting information 161 includes SARI1, which sets the first input region ARI1; SARI2, which sets the second input region ARI2; and SARI3, which sets the third input region ARI3. The region setting information 161 also includes SARQ1, which sets the first output region ARQ1; SARQ2, which sets the second output region ARQ2; and SARQ3, which sets the third output region ARQ3. Each piece of information sets the position and shape of the region. Each piece of information may also be the coordinates of all the vertices of the region. If the region is rectangular, each piece of information may be the coordinates of the reference position of the rectangle, the horizontal width, and the horizontal width. The reference position may be any vertex of the rectangle or the center point.

[0034] The distortion correction table 162 includes a first distortion correction table TB1, a second distortion correction table TB2, and a third distortion correction table TB3. The first distortion correction table TB1 is a table that associates the output coordinates (U,V) in the first output region ARQ1 with the input coordinates (X,Y) of the input image. The second distortion correction table TB2 is a table that associates the output coordinates (U,V) in the second output region ARQ2 with the input coordinates (X,Y) of the input image. The third distortion correction table TB3 is a table that associates the output coordinates (U,V) in the third output region ARQ3 with the input coordinates (X,Y) of the input image.

[0035] Figure 7 shows an example of the processing flow of the distortion correction circuit 140. In step S1, the coordinate counter 146 outputs the output coordinates (U,V) based on the coordinate count. Specifically, the coordinate counter 146 outputs (U,V)=(0,0) at the beginning of the frame, and increments the coordinates with each loop from S3 onwards. When (U,V) reaches the last pixel of the frame, it resets the horizontal coordinate U and the vertical coordinate V. In each loop increment, the coordinate counter 146 first increments the horizontal coordinate U, resets U when it reaches the number of horizontal pixels, and increments the vertical coordinate V. This is repeated until the last pixel of the frame.

[0036] In step S2, the distortion correction circuit 140 performs region determination, warp processing, and pixel data generation. Details are explained in Figures 8 and 9.

[0037] In step S3, the distortion correction circuit 140 determines whether all coordinates of the output side coordinate (U,V) have been counted. If all coordinates have been counted, the distortion correction circuit 140 terminates the process; otherwise, it returns to step S1.

[0038] Figures 8 and 9 show an example of the processing flow for region determination, warp processing, and pixel data generation in step S2.

[0039] In step S11, the region determination unit 149 determines whether the output coordinates (U,V) belong to the first output region ARQ1 based on the setting information SARQ1 of the first output region ARQ1.

[0040] If it is determined in step S11 that the output coordinates (U,V) belong to the first output region ARQ1, then in step S12, the table selection unit 147 selects the first distortion correction table TB1. The warp processing unit 145 refers to the selected first distortion correction table TB1 and converts the output coordinates (U,V) to input coordinates (X,Y).

[0041] In step S13, the region setting information selection unit 148 selects the setting information SARI1 for the first input region ARI1 based on the information that the region determination unit 149 has determined to be the first output region ARQ1. The region out-of-region determination unit 171 determines, based on the setting information SARI1, whether or not the input coordinates (X,Y) belong to the first input region ARI1.

[0042] If, in step S13, it is determined that the input coordinates (X,Y) belong to the first input region ARI1, then in step S14, the distortion correction circuit 140 generates pixel data for the output coordinates (U,V). The address conversion unit 143 converts the input coordinates (X,Y) into an address in the buffer memory 130. Specifically, the address conversion unit 143 outputs an address that specifies multiple pixels surrounding (X,Y) in the input image. The pixel interpolation unit 141 reads the pixel data of multiple pixels from that address in the buffer memory 130 and generates the pixel data for (U,V) in the output image by performing pixel interpolation using that pixel data.

[0043] If it is determined in step S13 that the input coordinates (X,Y) do not belong to the first input region ARI1, then in step S22, the fill unit 142 sets the pixel data of (U,V) in the output image to predetermined color data. The predetermined color data is, for example, black data.

[0044] If it is determined in step S11 that the output coordinates (U,V) do not belong to the first output region ARQ1, then in step S15, the region determination unit 149 determines whether or not the output coordinates (U,V) belong to the second output region ARQ2 based on the setting information SARQ2 for the second output region ARQ2.

[0045] If, in step S15, it is determined that the output coordinates (U,V) belong to the second output region ARQ2, then in step S16, the table selection unit 147 selects the second strain correction table TB2. The warp processing unit 145 refers to the selected second strain correction table TB2 and converts the output coordinates (U,V) to input coordinates (X,Y).

[0046] In step S17, the region setting information selection unit 148 selects the setting information SARI2 for the second input region ARI2 based on the information that the region determination unit 149 has determined to be the second output region ARQ2. The region out-of-region determination unit 171 determines, based on the setting information SARI2, whether or not the input coordinates (X,Y) belong to the second input region ARI2.

[0047] If it is determined in step S17 that the input coordinates (X,Y) belong to the second input region ARI2, then in step S14, the distortion correction circuit 140 generates pixel data for the output coordinates (U,V). If it is determined in step S17 that the input coordinates (X,Y) do not belong to the second input region ARI2, then in step S22, the fill unit 142 converts the pixel data for (U,V) of the output image into predetermined color data.

[0048] If it is determined in step S15 that the output coordinates (U,V) do not belong to the second output region ARQ2, then in step S18, the region determination unit 149 determines whether or not the output coordinates (U,V) belong to the third output region ARQ3 based on the setting information SARQ3 for the third output region ARQ3.

[0049] If it is determined in step S18 that the output coordinates (U,V) belong to the third output region ARQ3, then in step S19, the table selection unit 147 selects the third distortion correction table TB3. The warp processing unit 145 refers to the selected third distortion correction table TB3 and converts the output coordinates (U,V) to input coordinates (X,Y).

[0050] In step S20, the region setting information selection unit 148 selects the setting information SARI3 for the third input region ARI3 based on the information that the region determination unit 149 has determined to be the third output region ARQ3. The region out-of-region determination unit 171 determines, based on the setting information SARI3, whether or not the input coordinates (X,Y) belong to the third input region ARI3.

[0051] If it is determined in step S20 that the input coordinates (X,Y) belong to the third input region ARI3, then in step S14, the distortion correction circuit 140 generates pixel data for the output coordinates (U,V). If it is determined in step S20 that the input coordinates (X,Y) do not belong to the third input region ARI3, then in step S22, the fill unit 142 converts the pixel data for (U,V) of the output image into predetermined color data.

[0052] If, in step S18, it is determined that the output coordinates (U,V) do not belong to the third output region ARQ3, then in step S21, the region determination unit 149 determines that the output coordinates (U,V) are outside the region. In step S22, the fill unit 142 converts the pixel data of (U,V) in the output image into predetermined color data. Through the above processing, the output image data IMB is composed of the pixel data output by the pixel interpolation unit 141 and the fill unit 142.

[0053] Figure 10 is an explanatory diagram of an example where the display areas are arranged vertically. In the input image, the first display area BI1, the second display area BI2, and the third display area BI3 are arranged vertically. In the output image, the first display area BQ1, the second display area BQ2, and the third display area BQ3 are displayed vertically. This saves memory capacity for the line buffer if the buffer memory 130 is a line buffer.

[0054] While such methods may be used, from the standpoint of synchronizing display timing, it is more advantageous to arrange the three display areas horizontally in the input image as shown in Figure 6. That is, since the display proceeds from top to bottom of the input image, the output image will display the first display area BQ1, the second display area BQ2, and the third display area BQ3 in that order, resulting in a timing discrepancy in the display of the display areas. On the other hand, when the three display areas are arranged horizontally in the input image as shown in Figure 6, the three display areas are displayed simultaneously in the output image.

[0055] In this embodiment, the circuit device 100 controls a display device 200 that projects an image using a first optical system and a second optical system. The circuit device 100 includes a buffer memory 130 and a distortion correction circuit 140. The buffer memory 130 stores input image data IMA, which is image data of the input image. The distortion correction circuit 140 corrects the distortion of the input image and outputs output image data IMB, which is image data of the output image. The output image includes a first output-side region ARQ1 projected by the first optical system and a second output-side region ARQ2 projected by the second optical system. The distortion correction circuit 140 converts the output-side coordinates (U,V) of the output image to the input-side coordinates (X,Y) of the input image. If the output-side coordinates (U,V) are included in the first output-side region ARQ1, the distortion correction circuit 140 determines whether the input-side coordinates (X,Y) belong to the first input-side region ARI1, which is set corresponding to the first output-side region ARQ1. The distortion correction circuit 140 sets the pixel data of the output image data IMB at the output coordinates (U,V) to predetermined color data if the input coordinates (X,Y) do not belong to the first input region ARI1. The distortion correction circuit 140 determines whether the input coordinates (X,Y) belong to the second input region ARI2, which is set to correspond to the second output region ARQ2, if the output coordinates (U,V) are included in the second output region ARQ2. The distortion correction circuit 140 sets the pixel data of the output image data IMB at the output coordinates (U,V) to predetermined color data if the input coordinates (X,Y) do not belong to the second input region ARI2.

[0056] As explained in Figure 3, images of multiple display areas are projected by multiple optical systems. Hereinafter, the first and second display areas will be used as examples. In distortion correction, the output image is generated by referencing images of adjacent display areas BI1 and BI2 in the input image, which may result in unwanted display areas BG1 and BG2 occurring between the display areas BQ1 and BQ2 of the output image. According to this embodiment, as explained in Figure 6, etc., normal distortion correction is performed on the area of ​​the first output-side area ARQ1 that contains the first display area BQ1 of the output image, corresponding to the first input-side area ARI1 that contains the first display area BI1 of the input image. The area of ​​the first output-side area ARQ1 that does not correspond to the first input-side area ARI1 is filled with a predetermined color. The same applies to other output-side areas. As a result, in distortion correction, images of adjacent display areas in the input image are no longer referenced, and unwanted display areas BG1 and BG2 do not occur. Unwanted display areas may cause discomfort to users of the display device 200, but according to this embodiment, a display that does not cause discomfort to users can be provided.

[0057] In the example shown in Figure 1, the first optical system corresponds to the first mirror 251, and the second optical system corresponds to the second mirror 252. Alternatively, as described above, the image display device may consist of a laser light source, a mirror or a micro-mirror array, and an actuator. In this case, the first optical system may correspond to the first image display device, and the second optical system may correspond to the second image display device.

[0058] In this embodiment, the circuit device 100 may also include a memory circuit 160. The memory circuit 160 may store region setting information 161 that sets the first output region ARQ1, the first input region ARI1, the second output region ARQ2, and the second input region ARI2. The distortion correction circuit 140 may determine, based on the region setting information 161, whether the output coordinates (U,V) belong to the first output region ARQ1, whether the input coordinates (X,Y) belong to the first input region ARI1, whether the output coordinates (U,V) belong to the second output region ARQ2, and whether the input coordinates (X,Y) belong to the second input region ARI2.

[0059] According to this embodiment, the input and output regions corresponding to the display area projected by each optical system can be set using region setting information 161. The distortion correction circuit 140 then performs region determination based on the region setting information 161 and selects either normal distortion correction or filling with predetermined color data according to the determination result, thereby eliminating unnecessary displays.

[0060] Furthermore, as is clear from comparing Figure 3 and Figure 6, the first transformed region ART1 obtained by coordinate-transforming the first output region ARQ1 to the input side may overlap with the first input region ARI1 and a part of the second input region ARI2. Similarly, the second transformed region obtained by coordinate-transforming the second output region ARQ2 to the input side may overlap with the second input region ARI2 and a part of the first input region ARI1.

[0061] When the first conversion area ART1 overlaps with a portion of the second input area ARI2, unwanted background light (BG1) originating from the display of the second input area ARI2 is generated in the first output area ARQ1. According to this embodiment, the portion of the first output area ARQ1 in which the first conversion area ART1 overlaps with a portion of the second input area ARI2 is filled with predetermined color data. This prevents unwanted background light (BG1) from occurring. Similarly, the portion of the second output area ARQ2 in which the second conversion area overlaps with a portion of the first input area ARI1 is filled with predetermined color data. This prevents unwanted background light (BG2) from occurring.

[0062] In this embodiment, the distortion correction circuit 140 may select a first distortion correction table TB1 corresponding to the first optical system when the output coordinates (U,V) are included in the first output region ARQ1, and use the first distortion correction table TB1 to convert the output coordinates (U,V) to input coordinates (X,Y). The distortion correction circuit 140 may also select a second distortion correction table TB2 corresponding to the second optical system when the output coordinates (U,V) are included in the second output region ARQ2, and use the second distortion correction table TB2 to convert the output coordinates (U,V) to input coordinates (X,Y).

[0063] According to this embodiment, the distortion correction circuit 140 can determine which coordinates (X,Y) of the input image the pixel data of each pixel in the first output region ARQ1 projected by the first optical system is generated by referencing. This allows the distortion correction circuit 140 to convert the pixel data to predetermined color data if the reference point results in unwanted display.

[0064] In this embodiment, the distortion correction circuit 140 may also use a distortion correction table 162 to convert the output coordinates (U,V) to the input coordinates (X,Y). The distortion correction table 162 may be a table that associates the output coordinates (U,V) belonging to the first output region ARQ1 with the input coordinates (X,Y) so as to perform distortion correction corresponding to the first optical system, and also associates the output coordinates (U,V) belonging to the second output region ARQ2 with the input coordinates (X,Y) so as to perform distortion correction corresponding to the second optical system.

[0065] According to this embodiment, the distortion correction circuit 140 can perform distortion correction corresponding to the first optical system and distortion correction corresponding to the second optical system using the distortion correction table 162. Such distortion correction may result in unwanted displays as described above, but according to this embodiment, no unwanted displays occur.

[0066] In this embodiment, the first output region ARQ1 and the second output region ARQ2 may be arranged horizontally, and the first input region ARI1 and the second input region ARI2 may also be arranged horizontally.

[0067] As explained in Figure 10, if display areas BQ1 and BQ2 are arranged horizontally in the output image, but display areas BI1 and BI2 are arranged vertically in the input image, then display areas BI1 and BQ2 will not be displayed simultaneously in the output image. According to this embodiment, both the output and input regions containing each display area are arranged horizontally. As a result, display areas BI1 and BQ2 are displayed simultaneously in the output image.

[0068] In this embodiment, the display device 200 may project the output image onto the projection surface using the first optical system and the second optical system. Distortion correction may be performed to correct image distortion caused by distortion of the first optical system and the second optical system, or distortion of the projection surface.

[0069] When the display device 200 projects the output image onto the projection surface using the first optical system and the second optical system, there is a risk of unwanted display occurring as described above. According to this embodiment, unwanted display can be eliminated as described above.

[0070] In this embodiment, the predetermined color data may be color data that becomes transparent when displayed by the display device 200.

[0071] According to this embodiment, the portion of the first output region ARQ1 that does not correspond to the first input region ARI1 is filled with a transparent color. The same applies to the other output regions. As a result, the portions of the unnecessary display BG1 and BG2 are filled with the same transparent color as the transparent region where there is no display, and unnecessary displays are prevented.

[0072] In this embodiment, the head-up display 500 includes one of the above-mentioned circuit devices 100 and a display device 200 that projects an output image using the first optical system and the second optical system.

[0073] 2. Second Configuration Example The following explanation will primarily focus on the differences from the first configuration example, omitting explanations of parts that are similar to the first configuration example.

[0074] Figure 11 shows a detailed configuration example of the distortion correction circuit 140 in the second configuration example of the HUD. The distortion correction circuit 140 includes a pixel interpolation unit 141, a fill unit 142, an address conversion unit 143, a warp processing unit 145, a coordinate counter 146, a region setting information selection unit 148, a region determination unit 149, and an out-of-region determination unit 171.

[0075] The distortion correction table 162 is a single table that maps the output coordinates (U,V) belonging to the first output region ARQ1, the second output region ARQ2, and the third output region ARQ3 to the input coordinates (X,Y). Specifically, the distortion correction table 162 is a composite of the first distortion correction table TB1, the second distortion correction table TB2, and the third distortion correction table TB3 shown in Figure 5. Since the first output region ARQ1, the second output region ARQ2, and the third output region ARQ3 do not overlap with each other, the coordinate transformation for warp processing is uniquely determined even when the tables are combined into one.

[0076] 3. Third Configuration Example The following explanation will primarily focus on the differences from the first configuration example, omitting explanations of parts that are similar to the first configuration example. Note that the third configuration example can also be combined with the second configuration example.

[0077] Figure 12 shows an example configuration of the circuit device 100 in a third configuration example of the HUD. The circuit device 100 includes an input interface circuit 110, an image selection circuit 120, a buffer memory 130, a distortion correction circuit 140, an output interface circuit 150, and a storage circuit 160.

[0078] The image selection circuit 120 selects selected image data IMS, which is the image data of the selected region, from the input image data IMA based on the region setting information 161. The selected region is the first input region ARI1, the second input region ARI2, and the third input region ARI3, and is a region smaller than the entire input image. The image selection circuit 120 writes the selected image data IMS to the buffer memory 130.

[0079] Based on the region setting information 161, the distortion correction circuit 140 generates output image data IMB for the region corresponding to the selected image in the output image from the selected image data IMS, and converts the output image data IMB for the remaining regions into predetermined color data.

[0080] Figure 13 shows a detailed configuration example of the distortion correction circuit 140 in the third configuration example of the HUD. The distortion correction circuit 140 includes a pixel interpolation unit 141, a fill unit 142, an address conversion unit 143, a coordinate correction unit 144, a warp processing unit 145, a coordinate counter 146, a region setting information selection unit 148, a table selection unit 147, and a region determination unit 149.

[0081] Here, it is assumed that the input image is set to a first input region ARI1 and a second input region ARI2, and the output image is set to a first output region ARQ1 and a second output region ARQ2. The region setting information includes setting information SARI1, setting information SARI2, setting information SARQ1, and setting information SARQ2. The distortion correction table 162 includes a first distortion correction table TB1 and a second distortion correction table TB2.

[0082] The operation of the distortion correction circuit 140 in the third configuration example will be explained using Figure 14. Note that in Figure 14, the coordinate (X,Y)=(100,100) is written as (X:100 Y:100).

[0083] Assume the input image has 800 horizontal pixels and 400 vertical pixels, and that the input image has two selected regions: a first input region ARI1 and a second input region ARI2. The reference point for each region is the top-left vertex. The reference point of the first input region ARI1 in the input image is at coordinates (X:100 Y:100), with 100 horizontal pixels and 100 vertical pixels. The reference point of the second input region ARI2 in the input image is at coordinates (X:500 Y:100), with 100 horizontal pixels and 100 vertical pixels.

[0084] The selected image stored in buffer memory 130 has 100 + 100 = 200 horizontal pixels and 100 vertical pixels. The coordinates of the selected image in buffer memory 130 are denoted as post-selection coordinates (Xs, Ys). Within buffer memory 130, the reference point of the first input region ARI1 is coordinate (Xs:0 Ys:0), and the reference point of the second input region ARI2 is coordinate (Xs:100 Ys:0).

[0085] Assume that the region determination unit 149 determines that the output coordinates (U,V) belong to the first output region ARQ1. In this case, the warp processing unit 145 converts the output coordinates (U,V) to input coordinates (X,Y) using the first distortion correction table TB1. The coordinate correction unit 144 determines whether the input coordinates (X,Y) are within the range of (X:100 Y:100) to (X:200 Y:200), that is, whether they belong to the first input region ARI1.

[0086] The coordinate correction unit 144 determines that the input coordinates (X,Y) belong to the first input region ARI1, and sets the selected coordinates to (Xs,Ys)=(X-100,Y-100). That is, the coordinate correction unit 144 shifts the reference point (X:100 Y:100) of the first input region ARI1 to (Xs:0 Ys:0). The address conversion unit 143 converts (Xs,Ys) to an address in the buffer memory 130. The pixel interpolation unit 141 generates the (U,V) pixel data of the output image by performing pixel interpolation using the pixel data read from the corresponding address in the buffer memory 130.

[0087] If the coordinate correction unit 144 determines that the input coordinates (X,Y) do not belong to the first input region ARI1, the fill unit 142 converts the pixel data of (U,V) in the output image to predetermined color data.

[0088] Assume that the region determination unit 149 determines that the output coordinates (U,V) belong to the second output region ARQ2. In this case, the warp processing unit 145 converts the output coordinates (U,V) to input coordinates (X,Y) using the second distortion correction table TB2. The coordinate correction unit 144 determines whether the input coordinates (X,Y) are within the range of (X:500 Y:100) to (X:600 Y:200), that is, whether they belong to the second input region ARI2.

[0089] The coordinate correction unit 144 determines that the input coordinates (X,Y) belong to the second input region ARI2, and calculates the coordinates (Xs',Ys')=(X-500,Y-100). Then, the coordinate correction unit 144 sets the selected coordinates to (Xs,Ys)=(Xs'+100,Ys'+0). That is, the coordinate correction unit 144 shifts the reference point of the second input region ARI2 from (X:500 Y:100) to (Xs':0 Ys':0), and then further shifts it to (Xs:100 Ys:0). The address conversion unit 143 converts (Xs,Ys) to an address in the buffer memory 130. The pixel interpolation unit 141 generates the (U,V) pixel data of the output image by performing pixel interpolation using the pixel data read from the corresponding address in the buffer memory 130.

[0090] If the coordinate correction unit 144 determines that the input coordinates (X,Y) do not belong to the second input region ARI2, the fill unit 142 converts the pixel data of (U,V) in the output image to predetermined color data.

[0091] In this embodiment, the circuit device 100 includes an image selection circuit 120. The image selection circuit 120 selects image data from the input image data IMA, image data from the first input side area ARI1 and image data from the second input side area ARI2, and stores them in the buffer memory 130.

[0092] According to this embodiment, image data of the first input-side region ARI1 and the second input-side region ARI2, which are narrower than the input image, are stored in the buffer memory 130. As a result, the buffer size for distortion correction is reduced compared to when the input image is buffered directly. This reduces the chip size of the circuit device 100 or lowers the cost of the circuit device 100.

[0093] Although this embodiment has been described in detail above, it will be readily apparent to those skilled in the art that many modifications are possible without substantially departing from the novelty and effects of this disclosure. Therefore, all such modifications are included within the scope of this disclosure. For example, any term that appears at least once in the specification or drawings together with a broader or synonymous term may be replaced with that different term anywhere in the specification or drawings. Furthermore, all combinations of this embodiment and its modifications are also included within the scope of this disclosure. In addition, the configuration and operation of the input interface circuit, image selection circuit, buffer memory, distortion correction circuit, output interface circuit, memory circuit, circuit device, processing device, display device, and head-up display are not limited to those described in this embodiment, and various modifications are possible. [Explanation of Symbols]

[0094] 10...Screen, 100...Circuit device, 110...Input interface circuit, 120...Image selection circuit, 130...Buffer memory, 140...Distortion correction circuit, 141...Pixel interpolation unit, 142...Fill unit, 143...Address conversion unit, 144...Coordinate correction unit, 145...Warp processing unit, 146...Coordinate counter, 147...Table selection unit, 148...Region setting information selection unit, 149...Region determination unit, 150...Output interface circuit, 160...Memory circuit, 161...Region setting information, 162...Distortion correction table, 171...Out-of-region determination unit, 200...Display device, 210...Display controller, 2 21,222…Display driver, 231,232…Light source, 241,242…Liquid crystal display panel, 251…First mirror, 252…Second mirror, 300…Processing unit, 500…Head-up display, ARI1…First input area, ARI2…Second input area, ARI3…Third input area, ART1…First conversion area, ARQ1…First output area, ARQ2…Second output area, ARQ3…Third output area, BG1~BG4…Unnecessary display, IMA…Input image data, IMB…Output image data, TB1…First distortion correction table, TB2…Second distortion correction table, TB3…Third distortion correction table

Claims

1. A circuit device for controlling a display device that projects an image using a first optical system and a second optical system, A buffer memory that stores input image data, which is the image data of the input image, A distortion correction circuit that corrects the distortion of the input image and outputs output image data, which is the image data of the output image, Includes, The output image is It includes a first output-side region projected by the first optical system and a second output-side region projected by the second optical system, The aforementioned distortion correction circuit is The output coordinates of the output image are converted to the input coordinates of the input image. If the output coordinates are included in the first output region, it is determined whether the input coordinates belong to the first input region set corresponding to the first output region. If the input coordinates do not belong to the first input region, the pixel data of the output image data at the output coordinates is set to predetermined color data. A circuit device characterized in that, if the output coordinates are included in the second output region, it is determined whether the input coordinates belong to a second input region set corresponding to the second output region, and if the input coordinates do not belong to the second input region, the pixel data of the output image data at the output coordinates is set to the predetermined color data.

2. In the circuit device described in claim 1, It includes a storage circuit for storing region setting information for setting the first output region, the first input region, the second output region, and the second input region. The aforementioned distortion correction circuit is A circuit device characterized by determining, based on the region setting information, whether the output coordinates belong to the first output region, whether the input coordinates belong to the first input region, whether the output coordinates belong to the second output region, and whether the input coordinates belong to the second input region.

3. In the circuit device described in claim 1, The first transformed region obtained by coordinate-transforming the first output region to the input region overlaps with the first input region and a part of the second input region. The circuit device is characterized in that the second transformed region obtained by coordinate transformation of the second output region to the input region overlaps with the second input region and a part of the first input region.

4. In the circuit device described in claim 1, The aforementioned distortion correction circuit is If the output coordinates are included in the first output region, a first distortion correction table corresponding to the first optical system is selected, and the output coordinates are converted to the input coordinates using the first distortion correction table. A circuit device characterized in that, when the output coordinates are included in the second output region, a second distortion correction table corresponding to the second optical system is selected, and the output coordinates are converted to the input coordinates using the second distortion correction table.

5. In the circuit device described in claim 1, The aforementioned distortion correction circuit is Using a distortion correction table, the output coordinates are converted to the input coordinates. The aforementioned distortion correction table is A circuit device characterized by a table that associates the output coordinates belonging to the first output region with the input coordinates so as to be distortion correction corresponding to the first optical system, and associates the output coordinates belonging to the second output region with the input coordinates so as to be distortion correction corresponding to the second optical system.

6. In the circuit device described in claim 1, A circuit device characterized by including an image selection circuit that selects image data from the first input region and image data from the second input region from the input image data and stores them in the buffer memory.

7. In the circuit device described in claim 1, A circuit device characterized in that the first output region and the second output region are aligned horizontally, and the first input region and the second input region are aligned horizontally.

8. In the circuit device described in claim 1, The aforementioned display device is The output image is projected onto the projection surface using the first optical system and the second optical system. The aforementioned distortion correction is, A circuit device characterized by correcting image distortion caused by distortion in the first optical system and the second optical system, or distortion of the projection surface.

9. In the circuit device described in claim 1, The circuit device is characterized in that the predetermined color data is color data that becomes transparent when displayed by the display device.

10. A circuit device according to any one of claims 1 to 9, The display device that projects the output image using the first optical system and the second optical system, A head-up display characterized by including the following.

Images