A computing device, a measuring device, a computing program, and a computer-readable recording medium.

By using linear approximation formulas in computing devices to perform calculations in different numerical regions, the problems of large computational load and long processing time in traditional exponential operations are solved, achieving efficient computation and storage optimization.

JP2026079305APending Publication Date: 2026-05-15KOITO MFG CO LTD
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
KOITO MFG CO LTD
Filing Date
2024-10-30
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

Traditional computing devices use Taylor series algorithms when performing exponential operations, which leads to large computational loads, increased circuit area, and increased processing time.

Method used

A computing device is employed, comprising an input unit, first and second computing circuits, and a selector, which performs calculations in different numerical regions using linear approximation formulas, avoiding operations on logarithmic or exponential functions, and selectively executing the computing circuits when necessary.

Benefits of technology

It reduces memory usage, avoids unnecessary calculations, and improves computational efficiency.

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Abstract

The present invention provides a arithmetic device for calculating the root of a power function. [Solution] Power function Y=A X An arithmetic device for calculating the power root Y of a given number (where A is a constant and X is within a predetermined numerical range), the control circuit 42 comprises: an input unit 83 into which input data indicating the exponent X is input; a first arithmetic circuit 71 that performs a first arithmetic process based on a linear approximation formula of the graph of the power function in a first numerical region E1 within the numerical range of the exponent X; a second arithmetic circuit 72 that performs a second arithmetic process based on a linear approximation formula of the graph of the power function in a second numerical region E2 different from the first numerical region within the numerical range; and a selector 82 that outputs output data indicating the power root Y calculated by the first arithmetic circuit when the exponent X indicated by the input data input to the input unit belongs to the first numerical region, and outputs output data indicating the power root Y calculated by the second arithmetic circuit when the exponent X indicated by the input data input to the input unit belongs to the second numerical region.
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Description

[Technical Field]

[0001] The technologies disclosed herein relate to computing devices, measuring devices, computing programs, and computer-readable recording media. [Background technology]

[0002] Traditionally, the exponentiation function (Y=A X A calculation device is known that calculates the root Y of a given value (A: constant, X: predetermined numerical range) (see, for example, Patent Document 1). This calculation device calculates the root Y by performing calculations using logarithmic functions or exponential functions. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] International Publication No. 2020 / 231471 [Overview of the project] [Problems that the invention aims to solve]

[0004] In conventional arithmetic circuits, calculations using logarithmic and exponential functions are performed based on algorithms that utilize Taylor series, which increases the amount of computation and may result in increased circuit area and processing time.

[0005] This specification discloses a technology capable of solving at least one of the problems described above. [Means for solving the problem]

[0006] The technologies disclosed herein can be implemented, for example, in the following forms:

[0007] (1) The computing device disclosed herein is a power function (Y=A XA calculation device for calculating the power root Y of a constant (A: constant, X: predetermined numerical range), comprising: an input unit into which input data indicating the exponent X is input; a first calculation circuit that performs a first calculation process based on a linear approximation formula of the graph of the power function in a first numerical region within the numerical range of the exponent X; a second calculation circuit that performs a second calculation process based on a linear approximation formula of the graph of the power function in a second numerical region different from the first numerical region within the numerical range; and a selector that outputs output data indicating the power root Y calculated by the first calculation circuit when the exponent X indicated by the input data input to the input unit belongs to the first numerical region, and outputs output data indicating the power root Y calculated by the second calculation circuit when the exponent X indicated by the input data input to the input unit belongs to the second numerical region.

[0008] This configuration allows for the calculation of power roots without requiring operations on logarithmic or exponential functions, for example. Furthermore, this configuration reduces memory usage compared to configurations that utilize reference tables, for example.

[0009] (2) In the above-mentioned arithmetic unit, the numerical width of the first numerical domain and the numerical width of the second numerical domain may be configured to be different from each other. With this configuration, the calculation precision of the power root can be made to differ depending on the numerical domain.

[0010] (3) In the above-described arithmetic device, the selector may be configured such that, if the exponent X indicated by the input data input to the input unit belongs to the first numerical domain, the first arithmetic circuit executes the first arithmetic process and the second arithmetic circuit does not execute the second arithmetic process; and if the exponent X indicated by the input data input to the input unit belongs to the second numerical domain, the second arithmetic circuit executes the second arithmetic process and the first arithmetic circuit does not execute the first arithmetic process. This configuration makes it possible to suppress the execution of unnecessary arithmetic processes by the arithmetic circuits.

[0011] (4) In the above-described arithmetic device, both the first arithmetic circuit and the second arithmetic circuit are configured to perform arithmetic processing on the exponent X indicated by the input data input to the input unit, and the selector may be configured to output output data indicating the root Y calculated by the first arithmetic circuit when the exponent X indicated by the input data input to the input unit belongs to the first numerical domain, and to output output data indicating the root Y calculated by the second arithmetic circuit when the exponent X indicated by the input data input to the input unit belongs to the second numerical domain. With this configuration, it is not necessary to have a configuration for selectively executing the arithmetic processing of the first arithmetic circuit and the arithmetic processing of the second arithmetic circuit.

[0012] (5) The above measuring device may include a light emitter that emits light, a light receiver having a light-receiving element that receives reflected light that is reflected back from the object to be measured after being emitted from the light emitter, and a controller, wherein the controller includes the above-mentioned calculation device, and the controller may be configured to input received data indicating the output value from the light-receiving element to the input unit, use the output value as the exponent X, have the calculation device calculate the power root Y of the exponentiation function, and estimate the amount of incident light of the reflected light at the light receiver based on the output data from the calculation device. With this configuration, for example, the amount of incident light of the reflected light can be estimated without requiring calculation processing of logarithmic or exponential functions, and while reducing memory capacity compared to a configuration that uses a reference table.

[0013] Furthermore, the technologies disclosed herein can be implemented in various forms, for example, in the form of a computing device, a measuring device, a computing method, a measuring method, a computing processing program, a computer-readable recording medium on which the computing processing program is recorded, and so on. [Brief explanation of the drawing]

[0014] [Figure 1] Block diagram schematically showing the configuration of the measuring device 10 in the embodiment. [Figure 2] Flowchart showing the measurement process executed by the TOF measurement device 40 and the control circuit 42 [Figure 3] Explanatory diagram showing the relationship between the incident light quantity of the reflected light L2 and the peak intensity (SPAD output value) of the histogram [Figure 4] Explanatory diagram showing the implementation configuration of the FPGA in the control circuit 42

Mode for Carrying Out the Invention

[0015] A. Embodiment: A-1. Configuration of the measurement device 10: FIG. 1 is a block diagram schematically showing the configuration of the measurement device 10 in the present embodiment. As shown in FIG. 1, the measurement device 10 includes a projector 20 that irradiates a measurement target W with emitted light L1 (for example, a light beam (laser light)), and a light receiver 30 that receives reflected light L2 (return light) that returns after the emitted light L1 is reflected by the measurement target W, and functions as a LiDAR (Light Detection And Ranging). The measurement device 10 measures the difference between the timing when the projector 20 emits the emitted light L1 and the timing when the light receiver 30 receives the reflected light L2 (the flight time of the laser light, hereinafter referred to as "TOF" (Time of Flight)) to obtain information regarding the measurement target W.

[0016] The measurement device 10 is mounted on, for example, a vehicle (not shown) in which AD (Autonomous Driving) or ADAS (Advanced Driver-Assistance Systems) is implemented. The measurement device 10, for example, during the running of the vehicle, assists in detecting objects such as people and other vehicles, and provides various useful information to other devices and users to ensure the safety of the driver of the vehicle and the people present around the vehicle, and to reduce damage to the objects present around during the driving of the vehicle.

[0017] The projector 20 has a light source 22, a projection optical system 24, a projection control device 26, and a current source 28.

[0018] The light source 22 includes one or more light-emitting elements (not shown) or a light-emitting source having one or more arrays of light-emitting elements (for example, those in which the light-emitting elements are arranged linearly (one-dimensionally) or planar (two-dimensionally)). The light-emitting element is, for example, a laser diode, a surface-emitting type laser light-emitting element (for example, a VCSEL (Vertical Cavity Surface Emitting Laser, hereinafter referred to as a "surface-emitting element")), a surface-emitting element array (for example, a VCSEL array) in which a plurality of surface-emitting elements are arranged one-dimensionally or two-dimensionally on a substrate (such as a semiconductor substrate, a ceramic substrate, etc.).

[0019] The current source 28 supplies a current corresponding to a control signal input from the light projection control device 26 to the light-emitting elements constituting the light source 22. The current source 28 supplies, for example, a periodic square-wave current for turning on and off the current flowing through the light-emitting element to the light-emitting element.

[0020] The light projection control device 26 controls the current (drive current) supplied from the current source 28 to the light-emitting element by generating a control signal for the current source 28 and inputting it to the current source 28. The light projection control device 26 inputs a signal indicating the timing when the light-emitting element emits light (the timing when the light-emitting element emits light. Hereinafter referred to as the "light projection timing") to the TOF measurement device 40. The light projection control device 26 causes the light-emitting element to emit light periodically and repeatedly, for example, by performing control to periodically repeat the on and off of the current flowing through the light-emitting element.

[0021] The light projection optical system 24 adjusts the light distribution of the emitted light L1, for example, by applying an optical action (refraction, scattering, diffraction, etc.) to the light emitted from the light source 22. The light projection optical system 24 is configured using various optical components such as various lenses such as a collimating lens and a reflecting mirror (mirror).

[0022] The light receiver 30 has a light reception unit 32 and a light reception optical system 34.

[0023] The light-receiving optical system 34 focuses the reflected light L2 that returns after the light L1 emitted from the light emitter 20 is reflected by the object to be measured W, etc., onto the light-receiving unit 32. The light-receiving optical system 34 is composed of optical components such as various lenses such as focusing lenses, various filters such as wavelength filters, and reflectors (mirrors).

[0024] The light-receiving unit 32 has multiple light-receiving elements. The light-receiving unit 32 generates a light-receiving signal with a current level or voltage level corresponding to the intensity of the reflected light L2 by photoelectric conversion of the reflected light L2 incident from the light-receiving optical system 34. The light-receiving unit 32 inputs a signal indicating the timing at which the light-receiving elements constituting the light-receiving unit 32 received the reflected light L2 (hereinafter referred to as "light-receiving timing"), and the light-receiving signal generated by the light-receiving elements, to the TOF measuring device 40.

[0025] The measuring device 10 further includes a TOF measuring device 40, a control circuit 42, and a communication I / F (Interface) 50. In this embodiment, the TOF measuring device 40 and the control circuit 42 are examples of controllers.

[0026] The TOF measuring device 40 determines the time of flight (TOF) based on a signal indicating the light emission timing input from the light emission control device 26 and a signal indicating the light reception timing input from the light receiving unit 32. The TOF measuring device 40 has, for example, a time measurement IC (integrated circuit) equipped with a TDC (Time to Digital Converter) circuit. The TOF measuring device 40 inputs the determined TOF and the light reception signal input from the light receiving unit 32 to the control circuit 42.

[0027] The control circuit 42 has a processor (CPU (Central Processing Unit), MPU (Micro Processing Unit), ASIC (Application Specific Integrated Circuit), FPGA (Field Programmable Gate Array), DSP (Digital Signal Processor), etc.). Based on the received light signal and TOF input from the TOF measuring device 40, the control circuit 42 generates information used for various measurements such as detection of the target W and distance measurement. This information includes, for example, a histogram used in time-correlated single-photon counting, the distance to each point of the target W, and a point cloud. The control circuit 42 also controls the light projection control device 26 and the light receiving unit 32. For example, by controlling the light projection control device 26 and the light receiving unit 32, the control circuit 42 controls the aforementioned light projection timing and light receiving timing so that the processing for histogram generation is accelerated or optimized. The information generated by the control circuit 42 is provided (transmitted) to devices that utilize this information (hereinafter referred to as "various utilization devices 60") via the communication I / F 50. The control circuit 42 has a memory. The memory stores a program (arithmetic processing program) for executing the estimation process described later.

[0028] Various devices 60 perform tasks such as creating environmental maps using point clouds and self-localization (SLAM (Simultaneous Localization and Mapping)) using scan matching algorithms (NDT (Normal Distributions Transform), ICP (Iterative Closest Point), etc.).

[0029] A-2. Signal processing in the TOF measuring device 40: In this embodiment, the photodetector 30 (light-receiving unit 32) has a light-receiving surface 32A in which a plurality of light-receiving elements are arranged in an array-like linear (one-dimensional) or planar (two-dimensional) configuration. In this embodiment, the light-receiving element is a SPAD, which is an example of a photon-counting type photodetector. The SPAD responds with a predetermined probability (e.g., 20%) when a photon is incident on it, and outputs one pulse when it detects a photon.

[0030] In the light-receiving unit 32 that utilizes SPADs, one pixel in the image acquired based on the light-receiving signal from the SPADs (hereinafter referred to as the "received image") is defined by the "SPAD unit number M" and the "SPAD integration count U". The SPAD unit number M is the number of adjacent SPADs on the light-receiving surface 32A. For example, in a configuration where multiple SPADs are arranged two-dimensionally on the light-receiving surface 32A, the SPAD unit number M is 9 (=3×3) or 16 (=4×4). The larger the SPAD unit number M, the higher the resolution of the received image. The SPAD integration count U is the number of times the output value of each SPAD is integrated at predetermined sampling timings. A larger SPAD integration count U means a longer integration time for the SPAD output values. The larger the SPAD integration count U, the lower the frame rate of the received image (the number of images (frames) that make up one second of video). The TOF measurement device 40 generates a histogram for each pixel based on the output values ​​of the SPADs that constitute each pixel.

[0031] A-3. Estimation process of the timing of reception of reflected light L2 and the reflectance of the object W to be measured: Figure 2 is a flowchart showing the measurement process performed by the TOF measuring device 40 and the control circuit 42. In this measurement process, the timing of reception of reflected light L2 and the reflectance of the object to be measured W are estimated.

[0032] (Estimation of the timing of reception of reflected light L2): As shown in Figure 2, the TOF measuring device 40 performs a histogram generation process (S110) to generate a histogram based on the output values ​​from multiple SPADs. The TOF measuring device 40 sequentially stores the output values ​​from the multiple SPADs in a predetermined memory area. At predetermined sampling timings, the TOF measuring device 40 reads the output values ​​from the multiple SPADs recorded in the memory area and sequentially generates a histogram for each pixel. Based on a comparison of the sequentially generated histograms with a signal detection threshold, the TOF measuring device 40 extracts a histogram that includes the signal waveform of reflected light L2. In this embodiment, the signal detection threshold is the same value as the determination threshold for determining the presence or absence of reflected light L2, but it may be a lower value than the determination threshold.

[0033] Next, the TOF measuring device 40 acquires a first arrival timing T1 and a second arrival timing T2 in the histogram containing the signal waveform of the extracted reflected light L2 (S120). The first arrival timing T1 is the timing when the waveform of the histogram first reaches the intermediate value Lh, and the second arrival timing T2 is the timing when the waveform of the histogram next reaches the intermediate value Lh. The intermediate value Lh is the value between the highest value (corresponding to the peak of the signal waveform of the reflected light L2) and the lowest value (corresponding to the signal waveform of ambient light) of the waveform of the histogram. Furthermore, it is preferable that the intermediate value Lh is the value obtained by adding a predetermined percentage of the height of the difference between the highest and lowest values ​​to the lowest value. In this embodiment, the predetermined percentage is 1 / 2, but it is not limited to this, and may be, for example, 3 / 4.

[0034] Next, the TOF measuring device 40 performs a light reception timing estimation process (S130). The TOF measuring device 40 estimates the light reception timing of the reflected light L2 based on the first arrival timing T1 and the second arrival timing T2. For example, the light reception timing of the reflected light L2 is determined by adding a value obtained by multiplying the time difference ΔT between the first arrival timing T1 and the second arrival timing T2 by a predetermined time ratio to the first arrival timing T1.

[0035] Thereafter, the TOF measurement device 40 measures the distance to the measurement target W based on the light reception timing, and outputs information corresponding to the distance to the utilization device 60 (S140). As described above, the TOF measurement device 40 can measure the distance to the measurement target W by the following formula A. <Formula A> Distance (m) = [A × "Bin number corresponding to the first arrival timing T1" + B × ("Bin number corresponding to the second arrival timing T2" + BG intensity)] + (peak intensity) + F] × F A, B: weighting coefficients E: overall offset coefficient (for example, a correction coefficient for canceling the deviation of the light projection timing, etc.) F: coefficient for converting from the Bin number of the histogram to the distance (m) to the measurement target W Note that A, B, E, and F can be appropriately changed according to changes in the solid difference of the measurement device 10, the surrounding environment, etc.

[0036] (Estimation of the reflectivity of the measurement target W): Next, the control circuit 42 executes a process for estimating the reflectivity of the measurement target W. The reflectivity ρ of the measurement target W can be estimated using the following formula B (LiDAR equation). <Formula B> P RX = P TX ·ρ·(D RX / 2R) 2 ·γ P RX : incident light quantity of the reflected light L2 P TX : emitted light quantity of the emitted light L1 ρ: reflectivity of the measurement target W D RX : diameter of the light receiving surface 32A R: distance to the measurement target W γ: light transmittance of the optical system (light projection optical system 24 and light receiving optical system 34) That is, if the incident light quantity P RX of the reflected light L2 can be estimated, the reflectivity ρ of the measurement target W can be estimated from the above formula B.

[0037] The control circuit 42 estimates the peak intensity of the incident light amount of the reflected light L2 based on the peak intensity of the histogram (SPAD output value) and the following power function (Equation D) (S150). Specifically, the peak intensity of the incident light amount of the reflected light L2 is estimated using the following Equation D. The control circuit 42 is an example of an arithmetic unit. <Equation D> Incident light amount of the reflected light = 10 (a×受光素子からの出力値+b) ※ a and b are coefficients

[0038] FIG. 3 is an explanatory diagram showing the relationship between the incident light amount of the reflected light L2 and the peak intensity of the histogram (SPAD output value). In FIG. 3, a graph (dotted line graph) of a power function (the above Equation D) with the SPAD output value as the power exponent X and the incident light amount of the reflected light L2 as the radical Y is shown. In the present embodiment, the numerical range of the SPAD output value (power exponent X) is greater than -1 and less than 1.

[0039] As shown in FIG. 3, in a measuring device using a photon counting type light receiving element (SPAD), unlike a measuring device using an analog output type light receiving element, the correlation between the incident light amount of the reflected light L2 and the peak intensity of the histogram (the dotted line graph in FIG. 3) is non-linear. Therefore, in the present embodiment, the numerical range of the SPAD output value is divided into a plurality of numerical regions (the first numerical region E1 to the sixth numerical region E6). For each numerical region, a linear approximation formula of the graph of the power function in each numerical region is obtained. In the present embodiment, the numerical widths of the first numerical region E1 to the sixth numerical region E6 are the same as each other.

[0040] Specifically, the plurality of numerical regions are as follows. "The first numerical region E1" Numerical range: -1 < X ≤ -0.68, Linear approximation formula: Y = 0.3X + 0.4 "The second numerical region E2" Numerical range: -0.68 < X ≤ -0.33, Linear approximation formula: Y = 0.7X + 0.7 "The third numerical region E3" Numerical range: -0.33 < X ≤ 0, Linear approximation formula: Y = 1.6X + 1.0 "Fourth Numerical Region E4" Numerical range: 0 < X ≤ 0.33, Linear approximation formula: Y = 3.4X + 0.9 "Fifth Numerical Region E5" Numerical range: 0.33 < X ≤ 0.68, Linear approximation formula: Y = 7.4X - 0.5 "Sixth Numerical Region E6" Numerical range: 0.68 < X ≤ 1, Linear approximation formula: Y = 15.9X - 6.3

[0041] The control circuit 42 estimates the incident light quantity of the reflected light L2 by arithmetic processing using different linear approximation formulas according to which of the plurality of numerical regions E1 to E6 the SPAD output value belongs to. In the present embodiment, the control circuit 42 is, for example, an FPGA in which a plurality of logic circuits are integrated, and is configured to be able to perform arithmetic operations using the linear approximation formulas of each of the plurality of numerical regions E1 to E6. FIG. 4 is an explanatory diagram showing the implementation configuration of the FPGA in the control circuit 42.

[0042] As shown in Figure 4, the control circuit 42 includes a check unit 81, an input unit 83, six arithmetic circuits 71 to 76, a selector 82, and an output unit 84. The first arithmetic circuit 71 performs a first calculation using the linear approximation formula (Y=0.3X+0.4) of the first numerical domain E1 on the SPAD output value (exponent X) input to the input unit 83 to calculate the incident light amount (root Y) of reflected light L2. The second arithmetic circuit 72 performs a second calculation using the linear approximation formula (Y=0.7X+0.7) of the second numerical domain E2 on the SPAD output value (exponent X) input to the input unit 83 to calculate the incident light amount (root Y) of reflected light L2. The third arithmetic circuit 73 performs a third calculation using the linear approximation formula (Y=1.6X+1.0) in the third numerical domain E3 on the SPAD output value (exponent X) input to the input unit 83, and calculates the amount of incident light (root Y) of reflected light L2. The fourth arithmetic circuit 74 performs a fourth calculation using the linear approximation formula (Y=3.4X+0.9) in the fourth numerical domain E4 on the SPAD output value (exponent X) input to the input unit 83, and calculates the amount of incident light (root Y) of reflected light L2. The fifth arithmetic circuit 75 performs a fifth calculation using the linear approximation formula (Y=7.4X-0.5) in the fifth numerical domain E5 on the SPAD output value (exponent X) input to the input unit 83, and calculates the amount of incident light (root Y) of reflected light L2. The fifth arithmetic circuit 75 performs a sixth arithmetic operation on the SPAD output value (exponent X) input to the input unit 83, using the linear approximation formula (Y = 15.9X - 6.3) in the sixth numerical domain E6, to calculate the amount of incident light (root Y) of reflected light L2.

[0043] In the control circuit 42, when the input unit 83 receives the input of a SPAD output value (exponent X), the input SPAD output value is transmitted to all six arithmetic circuits 71 to 76. Each arithmetic circuit 71 to 76 performs calculation processing based on the input SPAD output value, regardless of whether the input SPAD output value belongs to the numerical domain targeted by that arithmetic circuit 71 to 76, and outputs the calculation result to the selector 82. The check unit 81 determines which of the multiple numerical domains E1 to E6 the SPAD output value input to the input unit 83 belongs to. The check unit 81 transmits identification information of the numerical domain to which the SPAD output value input to the input unit 83 belongs to to the selector 82. Based on the above identification information, the selector 82 activates only the calculation result from the arithmetic circuit corresponding to the numerical domain to which the SPAD output value input to the input unit 83 belongs among the calculation results output from the six arithmetic circuits 71 to 76, and outputs it to the output unit 84. For example, if the SPAD output value input to the input unit 83 belongs to the third numerical domain E3, only the calculation result of the third arithmetic circuit 73 is output via the output unit 84.

[0044] Subsequently, the TOF measuring device 40 measures the peak intensity of the incident light amount (incident light amount P) of the reflected light L2 estimated in the S150 process. RX Based on the distance (R) measured in S140 and the above equation B (LiDAR equation), the reflectance ρ of the object W to be measured is estimated (S160), and the process returns to S110.

[0045] A-4. Effects of this embodiment: In this embodiment, the numerical range of the SPAD output value is divided into multiple numerical domains. The control circuit 42 calculates the power root based on the linear approximation formula of the power function graph in each numerical domain. Therefore, according to this embodiment, the power root Y can be calculated without requiring, for example, calculations of logarithmic or exponential functions.

[0046] On the other hand, as a method that does not use functions or other arithmetic processing, it is conceivable to use a reference table. The reference table stores data on the correspondence between the exponent X and the root Y in the power function, and the controller searches the reference table for the root Y corresponding to the input exponent X and outputs it. However, such a configuration has the disadvantage of requiring a large amount of memory capable of storing a reference table with a huge amount of data. In contrast, according to this embodiment, the memory capacity can be reduced compared to a configuration that uses a reference table, for example.

[0047] In the above embodiment, multiple arithmetic circuits receive an input exponent X, perform arithmetic processing based on the exponent X, and output to the selector 82. The selector 82 activates only the calculation results from the arithmetic circuits corresponding to the numerical domain to which the input SPAD output value belongs, and outputs them to the output unit 84. In this configuration, there is no need for a configuration to select the destination of the input exponent X, and because there is no selection process, the arithmetic processing of each arithmetic circuit can be executed earlier.

[0048] B. Variations: The technologies disclosed herein are not limited to the embodiments described above and can be modified in various forms without departing from their essence, for example, the following modifications are possible.

[0049] The configuration of the measuring device 10 in the above embodiment is merely an example and can be modified in various ways.

[0050] In the flowchart of the measurement process in the above embodiment, for example, the process at S160 does not need to be executed. In the above embodiment, the numerical range of the exponent X (SPAD output value) is divided into six parts, but it is not limited to this, and may be divided into any other number of parts. Note that increasing the number of divisions in the numerical range of the exponent X reduces the error between the graph of the exponent function and the linear approximation line, thereby increasing the calculation accuracy of the root Y.

[0051] In the above embodiment, the numerical widths of at least two of the plurality of numerical regions may be made different from each other. For a numerical region that requires particularly high accuracy, the calculation accuracy of the square root Y can be improved by dividing it finely. Also, in the above embodiment, the numerical range of the exponent X was -1 < X < 1, but it is not limited to this.

[0052] In the above embodiment, for example, it may be determined which of the plurality of numerical regions E1 to E6 the SPAD output value (exponent X) input to the input unit 83 belongs to, and the SPAD output value may be transmitted only to the arithmetic circuit corresponding to the numerical region to which the SPAD output value input to the input unit 83 belongs. For example, when the SPAD output value input to the input unit 83 belongs to the fifth numerical region E5, only the fifth arithmetic circuit 75 may receive the SPAD output value and execute arithmetic processing on the SPAD output value. In this case, it is possible to avoid causing other arithmetic circuits to execute unnecessary arithmetic processing.

[0053] In the above embodiment, the present invention is applied to the arithmetic processing of the power function for obtaining the incident light amount of the reflected light. However, the present invention is not limited to this, and the present invention can also be applied to other power functions.

Explanation of Reference Numerals

[0054] 10: Measuring device 20: Light projector 22: Light source 24: Light projection optical system 26: Light projection control device 28: Current source 30: Light receiver 32: Light receiving unit 32A: Light receiving surface 34: Light receiving optical system 40: TOF measuring device 42: Control circuit 60: Utilization device 71 to 76: Arithmetic circuits 81: Check unit 82: Selector 83: Input unit 84: Output unit

Claims

1. Exponentiation function (Y = A X A calculation device that calculates the power root Y of a given value (where A is a constant and X is within a specified range of values), An input section into which input data representing the exponent X is input, A first arithmetic circuit that performs a first arithmetic operation based on a linear approximation formula of the graph of the power function in a first numerical domain within the numerical range of the exponent X, A second arithmetic circuit that performs a second arithmetic process based on a linear approximation formula of the graph of the exponentiation function in a second numerical domain different from the first numerical domain within the aforementioned numerical range, A selector that outputs output data showing the root Y calculated by the first arithmetic circuit when the exponent X indicated by the input data input to the input unit belongs to the first numerical domain, and outputs output data showing the root Y calculated by the second arithmetic circuit when the exponent X indicated by the input data input to the input unit belongs to the second numerical domain, A computing device equipped with the following features.

2. The arithmetic device according to claim 1, An arithmetic unit in which the numerical width of the first numerical area and the numerical width of the second numerical area are different from each other.

3. The arithmetic device according to claim 1, The selector is If the exponent X indicated by the input data input to the input unit belongs to the first numerical domain, the first arithmetic circuit is made to execute the first arithmetic process, and the second arithmetic circuit is not made to execute the second arithmetic process. An arithmetic device that, when the exponent X indicated by the input data input to the input unit belongs to the second numerical domain, causes the second arithmetic circuit to perform the second arithmetic process, and does not cause the first arithmetic circuit to perform the first arithmetic process.

4. The arithmetic device according to claim 1, Both the first arithmetic circuit and the second arithmetic circuit are configured to perform arithmetic processing on the exponent X indicated by the input data input to the input unit, The selector is If the exponent X indicated by the input data input to the input unit belongs to the first numerical domain, output data indicating the power root Y calculated by the first arithmetic circuit is output. An arithmetic device that outputs output data indicating the power exponent X shown by the input data input to the input unit, when the exponent X shown by the input data belongs to the second numerical domain, the second arithmetic circuit calculates the power root Y and outputs output data indicating the power root Y.

5. A floodlight that emits light, A light receiver having a light-receiving element that receives reflected light that returns after light emitted from the light emitter is reflected back to the object to be measured, A measuring device comprising a controller, The controller includes the arithmetic unit described in any one of claims 1 to 4, The aforementioned controller, The received light data, which indicates the output value from the light-receiving element, is input to the input unit. The output value is used as the exponent X, and the arithmetic unit is instructed to calculate the root Y of the exponentiation function. A measuring device that estimates the amount of incident light reflected by the light receiver based on the output data from the calculation device.

6. Exponentiation function (Y = A X A program for calculating the power root Y of a given value (where A is a constant and X is within a specified range of values), On the computer, Enter the input data representing the exponent X, If the exponent X indicated by the input data falls within the first numerical range of the exponent X, a first calculation process based on the linear approximation formula of the graph of the exponentiation function in the first numerical range is executed, and output data indicating the power root Y calculated by the first calculation process is output. A calculation processing program that, if the exponent X indicated by the input data belongs to a second numerical domain different from the first numerical domain, performs a second calculation process based on a linear approximation formula of the graph of the exponentiation function in the second numerical domain, and outputs output data indicating the root Y calculated by the second calculation process.

7. Exponentiation function (Y = A X A computer-readable recording medium containing a program for calculating the root Y of a given number (where A is a constant and X is within a specified range of numbers), On the computer, Enter the input data representing the exponent X, If the exponent X indicated by the input data falls within the first numerical range of the exponent X, a first calculation process based on the linear approximation formula of the graph of the exponentiation function in the first numerical range is executed, and output data indicating the power root Y calculated by the first calculation process is output. A computer-readable recording medium storing a calculation processing program, which, when the exponent X indicated by the input data belongs to a second numerical domain different from the first numerical domain, performs a second calculation process based on a linear approximation formula of the graph of the exponentiation function in the second numerical domain, and outputs output data indicating the power root Y calculated by the second calculation process.