AC / DC converter

Abstract

To realize an inexpensive yet high-performance AC / DC converter. [Solution] The bridgeless PFC circuit 20 includes a filter circuit 30 including a reactor 32, first to fourth switching elements S1 to S4 which are switched and switched by a controller 14 according to the polarity of the AC, and an output capacitor 29. The controller 14 has a peak current control unit 60 which performs peak current mode control, and the peak current control unit 60 controls the peak current command value iinv corresponding to the positive or negative polarity of the AC by switching the first analog switch 63A. * .p,-iinv * The value .p is input to the slope compensator 61, and the measured values ​​iinv and -iinv of the positive or negative reactor current are input to the comparator 62 by switching the second analog switch 63B.

Description

[Technical Field]

[0001] The disclosed technology relates to a bidirectional AC / DC converter. [Background technology]

[0002] In recent years, the electrification of automobiles, such as electric vehicles and hybrid vehicles, has been remarkable. These vehicles that run on electricity are equipped with high-output batteries as their power source. In order to charge these batteries, these vehicles are also equipped with on-board chargers (OBCs) that convert AC power, which is the commercial power source, into DC power.

[0003] Many OBCs (Out-of-Bass Converters) use AC / DC converters equipped with a Power Factor Correction (PFC) circuit to improve the power factor drop caused by distortion of the input current waveform (for example, Patent Document 1). Among PFC circuits, bridgeless PFC circuits are widely used to improve efficiency by replacing the diodes in the lossy full-wave rectifier circuit with switching elements (MOSFETs).

[0004] Within bridgeless PFC circuits, totem-pole type PFC circuits, which include two switching elements connected in series, are widely used. In AC / DC converters equipped with totem-pole type PFC circuits, average current mode control is generally employed as the control method for switching the switching elements on and off.

[0005] However, average current mode control has the disadvantage that if the reactor capacity is small, the current control becomes unstable, requiring a larger reactor. Furthermore, since the switching frequency is fundamentally the same as the control frequency, it is difficult to increase the switching frequency, which is another disadvantage.

[0006] In AC / DC converters, conversion efficiency can be improved by configuring a full-bridge circuit with switching elements and switching the switching pattern according to the polarity of the AC voltage. However, in this method, the zero-crossing point where the polarity of the AC voltage switches is generally determined, and the switching pattern is switched based on that determination.

[0007] However, in such cases, current distortion is likely to occur during switching. To solve this problem, a circuit using a predetermined bidirectional element instead of a switching element has been proposed (Patent Document 2). [Prior art documents] [Patent Documents]

[0008] [Patent Document 1] Japanese Patent Publication No. 2021-069253 [Patent Document 2] Japanese Patent Publication No. 2021-125905 [Overview of the project] [Problems that the invention aims to solve]

[0009] One possible solution to the aforementioned disadvantages of average current mode control is to adopt peak current mode control. By adopting peak current mode control, the pulsation of the reactor current can be made larger compared to average current mode control, and the current control remains relatively stable even with a small reactor capacity, thus allowing for a smaller reactor size.

[0010] However, peak current mode control requires slope compensation. For this reason, it is widely used in DC / DC converters that handle DC power where the voltage polarity does not change, but in AC / DC converters where the voltage polarity changes periodically, average current mode control is almost always used, as mentioned above.

[0011] Furthermore, in an AC / DC converter, noise is generated due to switching control, and thus reduction thereof is desired. Particularly when implemented in an OBC, it is also required that both charging operation and discharging operation can be performed, that these operations can be switched continuously (seamlessly), and that the power factor can be controlled to be constant according to requirements.

[0012] Therefore, in this specification, in an AC / DC converter including a totem-pole type bridgeless PFC circuit, a technique that enables resolution of these problems and realization of requirements will be disclosed.

Means for Solving the Problems

[0013] The disclosed technique relates to an AC / DC converter that includes a converter mechanism including a bridgeless type PFC circuit and a controller that controls the converter mechanism and performs bidirectional conversion between alternating current and direct current.

[0014] The bridgeless type PFC circuit includes a pair of input-side wirings that input the alternating current, a pair of output-side wirings that output the direct current, a filter circuit that is disposed on the input-side wirings and includes at least one reactor, a first leg, a second leg, and a third leg that are connected in parallel between the pair of output-side wirings, a first switching element and a second switching element and a third switching element and a fourth switching element that are serially disposed on each of the first leg and the second leg such that the energization direction is from the positive electrode side to the negative electrode side and the switching operation and the switching operation according to the polarity of the alternating current are performed by the controller, and an output-side capacitor that is disposed on the third leg.

[0015] One output end of the input-side wiring is connected to an intermediate portion between the first switching element and the second switching element in the first leg, and the other output end of the input-side wiring is connected to an intermediate portion between the third switching element and the fourth switching element in the second leg.

[0016] The converter mechanism includes an input voltage sensor located in the input wiring that measures the AC input voltage and outputs it to the controller, an output voltage sensor located in the output wiring that measures the DC output voltage and outputs it to the controller, and a current sensor located in the input wiring that measures the reactor current flowing through the reactor and outputs it to the controller.

[0017] The controller has a peak current control unit that outputs a control signal to turn the first switching element and the second switching element on and off by executing peak current mode control. The peak current control unit includes a slope compensator that takes a predetermined peak current command value as input and outputs a predetermined compensation command value, and a comparator that compares the measured value of the reactor current with the compensation command value, and is configured to output the control signal based on the comparison result of the comparator.

[0018] The peak current control unit further includes a first analog switch and a second analog switch that switch in conjunction with each other to correspond to the positive or negative polarity of the AC, and an inverting circuit that reverses the positive or negative polarity of the measured value of the reactor current. By switching the first analog switch, the peak current command value corresponding to the positive or negative polarity is input to the slope compensator, and by switching the second analog switch, the measured value of the reactor current, whether positive or negative, is input to the comparator.

[0019] In other words, this AC / DC converter includes a predetermined bridgeless PFC circuit and is configured to convert bidirectionally between AC and DC. Therefore, the power factor can be efficiently improved. Furthermore, since the controller has a predetermined peak current control unit and performs switching operations in peak current mode control, the reactor can be made smaller.

[0020] Furthermore, the peak current control unit further includes a first analog switch, a second analog switch, and an inverting circuit to correspond to the positive or negative polarity of the AC current. By switching the first analog switch, a peak current command value corresponding to the positive or negative polarity is input to the slope compensator, and by switching the second analog switch, a measured value of the positive or negative reactor current is input to the comparator.

[0021] This allows peak current mode control to be performed for AC power whose polarity changes between positive and negative, using a commercially available slope compensator compatible with DC power and an analog switch. Consequently, the reactor can be miniaturized using only off-the-shelf components, enabling the provision of an inexpensive and high-performance AC / DC converter.

[0022] The filter circuit may also include two reactors arranged in series with the first input wiring, and one input capacitor arranged on a wire connecting the intermediate portion between the two reactors in the first input wiring to the second input wiring.

[0023] In other words, an LCL type filter is applied to the filter circuit. This allows for miniaturization of the reactor and suppression of switching noise, as will be explained later.

[0024] The filter circuit may further include a third reactor, the third reactor being positioned on the intermediate side of the overhead line relative to the input capacitor.

[0025] In other words, an LLCL type filter is applied to the filter circuit. This allows for a smaller reactor and effectively suppresses switching noise.

[0026] The controller includes a DC bus voltage control unit that inputs the command value of the output voltage and the measured value of the output voltage sensor and outputs a command value of the reactor current so that the output voltage becomes a set DC bus voltage; a limiter that limits the command value of the reactor current, with an upper limit that caps out above a predetermined positive value and a lower limit that caps out below a predetermined negative value; a peak current command value setting unit that inputs the limited command value of the reactor current output from the limiter; and a reactive current control unit that calculates a command value of reactive current according to a predetermined operating power factor and outputs it to the peak current command value setting unit, wherein the peak current command value setting unit sets the peak current command value from both the limited command value of the reactor current and the command value of the reactive current.

[0027] This allows for seamless and smooth control of both charging and discharging operations. Furthermore, because it is equipped with a reactive power control function, constant power factor control can be achieved. [Effects of the Invention]

[0028] The disclosed technology makes it possible to realize a high-performance AC / DC converter suitable for in-vehicle chargers without using complex and expensive circuits. [Brief explanation of the drawing]

[0029] [Figure 1] This is a schematic diagram illustrating an example of the application of the disclosed technology. [Figure 2] This is a circuit diagram showing a bidirectional bridgeless PFC circuit. [Figure 3A] This is a diagram illustrating the specific operation of an AC / DC converter. [Figure 3B] This is a diagram illustrating the specific operation of an AC / DC converter. [Figure 4A] This is a block diagram of the high-speed control circuit. [Figure 4B] This figure shows a summary of the equations used in the calculations of the control circuit shown in Figure 4A. [Figure 5]It is a block diagram of a control circuit in a peak current control unit. [Figure 6] It is a setting table of a look-up table possessed by a determination unit. [Figure 7A] It is a diagram showing a switching pattern by peak current mode control. [Figure 7B] It is a diagram showing a switching pattern by peak current mode control. [Figure 8] It is a block diagram of a control circuit on the low-speed side. [Figure 9] It is a diagram for explaining a filter circuit suitable for an AC / DC converter. [Figure 10] It is a table summarizing design examples of constants of each type of filter circuit. [Figure 11] It is a board diagram of each type of filter circuit. [Figure 12A] It is a diagram showing the result of simulation. [Figure 12B] It is a diagram showing the result of simulation. [Figure 12C] It is a diagram showing the result of simulation. [Figure 13] It is a diagram showing the result of simulation. [Figure 14] It is a diagram showing the result of simulation.

Mode for Carrying Out the Invention

[0030] Hereinafter, the disclosed technology will be described. However, the following description is merely illustrative in nature. Each component of the circuit is also provided with a predetermined symbol together with an alphanumeric code for identifying it. For the sake of convenience, there may be cases where only that symbol is used for explanation or illustration. Capital letters such as the "I" for current represent its maximum value (amplitude value), and small letters such as the "i" for current represent its instantaneous value.

[0031] <Overview of AC / DC Converter> Figure 1 shows an example of the application of the disclosed technology to an on-board charger 3 (OBC). The on-board charger 3 is installed in a vehicle 1 that runs on electricity, such as an electric vehicle or a hybrid vehicle, together with a high-voltage, high-output battery 4 for driving, such as several hundred volts.

[0032] The upper diagram of Figure 1 shows the vehicle 1 and commercial power supply 2 during charging. The commercial power supply 2 outputs high-voltage AC voltages (commercial grid voltages) such as 100V and 200V. By connecting the commercial power supply 2 and the vehicle 1 with a cable, the battery 4 is charged. The onboard charger 3 intervenes between the battery 4 and the commercial power supply 2 during this process, converting the AC power into DC power corresponding to the battery 4.

[0033] Furthermore, this on-board charger 3 is configured to also output in the reverse direction. For example, the on-board charger 3 can convert the DC power obtained from the discharge of the battery 4 into a predetermined AC power and output it. Power can be supplied from the battery 4 to an external AC power system via the on-board charger 3.

[0034] As shown in the middle diagram of Figure 1, the on-board charger 3 consists of an isolated DC / DC converter 5, an AC / DC converter 6, and the like. The disclosed technology is applied to this AC / DC converter 6.

[0035] The AC / DC converter 6 performs bidirectional conversion between alternating current (AC) and direct current (DC). Specifically, the AC / DC converter 6 takes the AC voltage from the commercial power supply 2 (commercial grid voltage eac) as input and converts it to a DC output voltage (DC bus voltage: Vdc) for output. This corresponds to the charging operation of the battery 4. The AC / DC converter 6 also takes the DC bus voltage Vdc as input and converts it to an AC voltage (eac) for output. This corresponds to the discharging operation from the battery 4.

[0036] Furthermore, although the AC / DC converter 6 performs bidirectional conversion, its primary function is charging. Discharging, where the input / output direction is opposite to charging, is secondary. Therefore, in this explanation, the AC side will be referred to as the input, and the DC side as the output.

[0037] The DC / DC converter 5 is a device that converts one DC voltage to another. The DC / DC converter 5 is connected to the output side of the AC / DC converter 6. The DC / DC converter 5 performs boost or buck operation and outputs bidirectionally. In other words, the DC / DC converter 5 interposes itself between the AC / DC converter 6 and the battery 4, enabling the charging and discharging of the battery 4, whose voltage changes.

[0038] The DC / DC converter 5 receives a DC bus voltage Vdc as input and converts it to a predetermined DC voltage Vhv for output. This corresponds to charging the battery 4. The DC / DC converter 5 also converts the predetermined DC voltage Vhv to a predetermined DC bus voltage Vdc for output. This corresponds to discharging the battery 4.

[0039] From the viewpoint of power conversion stability, it is preferable to control the DC bus voltage Vdc between the DC / DC converter 5 and the AC / DC converter 6 to a constant value. Therefore, in the example on-board charger 3, the DC bus voltage Vdc is set to a predetermined value (e.g., 400V).

[0040] As shown in the lower part of Figure 1, the AC / DC converter 6 comprises a converter mechanism 13 and a controller 14 that controls the converter mechanism 13. The converter mechanism 13 includes a current sensor 10, a first input voltage sensor 11a, a second input voltage sensor 11b, an output voltage sensor 12, and a bidirectional bridgeless PFC circuit (hereinafter also simply referred to as the PFC circuit 20).

[0041] The current sensor 10 is a Hall element type sensor constructed using a Hall element. This type of sensor is well known. The current sensor 10 can detect the direction and magnitude of the current with high precision by utilizing the Hall effect. The current sensor 10 is installed at a predetermined position on the input wiring 21, which will be described later (see Figure 2).

[0042] The current sensor 10 directly measures the current (reactor current iinv) flowing through the reactor 27 and outputs it to the controller 14. The current sensor 10 measures the reactor current iinv flowing toward the output side, that is, the current flowing in the charging direction, as positive (the reactor current iinv flowing in the reverse direction, that is, the current flowing in the discharge direction, is measured as negative).

[0043] The first input voltage sensor 11a and the second input voltage sensor 11b are also installed at predetermined positions on the input wiring 21, which will be described later (see Figure 2). The first input voltage sensor 11a directly measures the commercial power grid voltage eac input to the AC / DC converter 6 and outputs it to the controller 14.

[0044] Note that the first input voltage sensor 11a is not essential. It is sufficient for the controller 14 to acquire information about the commercial power grid voltage eac input to the AC / DC converter 6, specifically information about the phase, period, and amplitude of the AC voltage.

[0045] The second input voltage sensor 11b is located on the output side of the input wiring 21, beyond the linkage switch 26, which will be described later. The second input voltage sensor 11b directly measures the AC voltage (input voltage einv) applied to the output side of the input wiring 21 beyond the linkage switch 26 and outputs it to the controller 14.

[0046] After startup, as will be described later, the phase, period, and amplitude of the commercial power grid voltage eac and the input voltage einv coincide (eac = einv). Therefore, the measured values ​​of the first input voltage sensor 11a and the second input voltage sensor 11b after startup will be the same.

[0047] The output voltage sensor 12 is installed at a predetermined position on the output wiring 22, which will be described later (see Figure 2). The output voltage sensor 12 directly measures the DC bus voltage Vdc output from the AC / DC converter 6 and outputs it to the controller 14.

[0048] Based on the measured values ​​from these sensors, the controller 14 outputs a drive voltage to the two switching elements S1 and S2 of the PFC circuit 20 to control them on and off. In other words, the controller 14 switches between energized (on) and de-energized (off) states of these switching elements S1 and S2 at predetermined timings to perform the switching operation.

[0049] The controller 14 also switches the two switching elements S3 and S4 of the PFC circuit 20 on and off according to the polarity of the AC, based on the measured values ​​of these sensors. The on / off operation of switching elements S1 and S2 is fast, while the on / off operation of switching elements S3 and S4 is slow.

[0050] The controller 14 further controls the on / off state of the linkage switch 26 based on the measured values ​​of these sensors. Specifically, when the AC / DC converter 6 is started, the controller 14 switches the linkage switch 26 from an electrically disconnected state (off) to an electrically connected state (on) at a predetermined timing.

[0051] (PFC circuit) Figure 2 shows the PFC circuit 20 of the AC / DC converter 6.

[0052] The PFC circuit 20 includes a pair of input wirings 21 (grounded N input wiring 21a and ungrounded L input wiring 21b), a pair of output wirings 22 (negative N output wiring 22a and positive P output wiring 22b), a first leg 23, a second leg 24, and a third leg 25, a filter circuit 30, a plurality of switching elements 28 (first switching element S1, second switching element S2, third switching element S3, fourth switching element S4), an output capacitor (Cdc) 29, and a linkage switch 26 (Sw).

[0053] A pair of input wirings 21 are located on the commercial power supply 2 side, and the commercial grid voltage eac is input to their input terminals (L and N). On the other hand, a pair of output wirings 22 are located on the battery 4 side, and the DC bus voltage Vdc is output from their output terminals (P and N).

[0054] The linkage switch 26 is located near the input terminals (L and N) of the pair of input wirings 21. The linkage switch 26 is configured to be switchable by on / off control between a state in which the pair of input wirings 21 are electrically connected (on) and a state in which the pair of input wirings 21 are electrically disconnected (off).

[0055] The filter circuit 30 is located on the output side of the linkage switch 26 and between the pair of input wirings 21. As shown in Figure 2, the filter circuit 30 of this embodiment includes one input capacitor 31 (Cinv) and one reactor 32 (Linv) (a so-called LC type).

[0056] Specifically, the reactor 32 is located in the L input wiring 21b (corresponding to the first input wiring). A connecting wire 33 is connected between the part of the L input wiring 21b that is on the input side of the reactor 32 and the N input wiring 21a (corresponding to the second input wiring). The input capacitor 31 is located on this connecting wire 33. Note that the connecting wire 33 may also be located on the output side of the reactor 32.

[0057] The first leg 23, the second leg 24, and the third leg 25 are connected in parallel between a pair of output wirings 22a and 22b. The third leg 25 is located on the output side of the first leg 23 and the second leg 24. The output capacitor 29 is located on the third leg 25.

[0058] The first switching element S1 and the second switching element S2 are arranged in series in the first leg 23, starting from the positive terminal side of the P output wiring 22b. The third switching element S3 and the fourth switching element S4 are arranged in series in the second leg 24, starting from the positive terminal side of the P output wiring 22b.

[0059] Each of the first to fourth switching elements 28 is composed of a known MOSFET or the like having gate, source, and drain terminals. It turns on by applying a predetermined driving voltage to the gate terminal. The first to fourth switching elements 28 are arranged such that the current conduction direction when on is from the positive electrode side of the P output side wiring 22b to the negative electrode side of the N output side wiring 22a.

[0060] Each switching element 28 includes a freewheel diode 28a connected in antiparallel. Therefore, when each switching element 28 is off, current can flow through each switching element 28 only in a predetermined direction (from the negative electrode side to the positive electrode side) through this freewheel diode 28a.

[0061] The output end of the L input side wiring 21b is connected to an intermediate portion between the first switching element S1 and the second switching element S2 in the first leg 23. The output end of the N input side wiring 21a is connected to an intermediate portion between the third switching element S3 and the fourth switching element S4 in the second leg 24.

[0062] <Operation by Specific Control of AC / DC Converter> Referring to FIGS. 3A and 3B, the specific operation of the AC / DC converter 6 under the control of the controller 14 will be described. In each figure, a load R (corresponding to the DC / DC converter 5) is simply illustrated together with the PFC circuit 20.

[0063] As described above, when starting the AC / DC converter 6, the controller 14 switches the serial switch 26 from off to on at a predetermined timing. Thereby, the commercial system voltage eac is input to the AC / DC converter 6, and the AC / DC converter 6 becomes in a charge / dischargeable state.

[0064] Figure 3A shows the operation during charging. The upper and lower figures on the left (a1, a2) show the operation when the polarity of the input voltage einv is positive (sin(θinv)≧0) (positive half-cycle). The upper and lower figures on the right (b1, b2) show the operation when the polarity of the input voltage einv is negative (sin(θinv)<0) (negative half-cycle).

[0065] The third switching element S3 and the fourth switching element S4 are switched according to the polarity of the input voltage einv. That is, during a positive half-cycle, the third switching element S3 is turned off and the fourth switching element S4 is turned on. During a negative half-cycle, the third switching element S3 is turned on and the fourth switching element S4 is turned off.

[0066] Then, switching operations are performed in the first switching element S1 and the second switching element S2, and these first switching element S1 and second switching element S2 are alternately turned on and off at predetermined timings. As a result, a predetermined current path is formed through which the input current (iac = iinv) flows.

[0067] Specifically, as shown in (a1), when the polarity of the input voltage einv is positive, when the first switching element S1 is turned off and the second switching element S2 is turned on, an input current iinv flows in from the L input wiring 21b. This input current iinv then flows through a current-carrying path consisting of the intermediate part of the first leg 23, the second switching element S2, the N output wiring 22a, the fourth switching element S4 (freewheeling diode 28a), the intermediate part of the second leg 24, and the N input wiring 21a, as indicated by the dashed arrow Ya1.

[0068] As shown in (a2), when the polarity of the input voltage einv is positive, and the first switching element S1 turns on and the second switching element S2 turns off, the input current iinv flowing in from the L input wiring 21b flows through a current-carrying path consisting of the intermediate part of the first leg 23, the first switching element S1 (freewheeling diode 28a), the P output wiring 22b, the load R and output capacitor Cdc, the N output wiring 22a, the fourth switching element S4 (freewheeling diode 28a), the intermediate part of the second leg 24, and the N input wiring 21a, as indicated by the dashed arrow Ya2.

[0069] As shown in (b1), when the polarity of the input voltage einv is negative, when the first switching element S1 turns on and the second switching element S2 turns off, an input current iinv flows in from the N input wiring 21a. This input current iinv then flows through a current-carrying path consisting of the intermediate part of the second leg 24, the third switching element S3 (freewheeling diode 28a), the N output wiring 22a, the first switching element S1, the intermediate part of the first leg 23, and the L input wiring 21b, as indicated by the dashed arrow Yb1.

[0070] As shown in (b2), when the polarity of the input voltage einv is negative, and the first switching element S1 is off and the second switching element S2 is on, the input current iinv flowing in from the N input wiring 21a flows through a current-carrying path consisting of the intermediate part of the second leg 24, the third switching element S3 (freewheeling diode 28a), the P output wiring 22b, the load R and output capacitor Cdc, the N output wiring 22a, the second switching element S2 (freewheeling diode 28a), the intermediate part of the first leg 23, and the L input wiring 21b, as indicated by the dashed arrow Yb2.

[0071] Figure 3B shows the operation during discharge. The upper and lower figures on the left (c1, c2) represent the operation when the polarity of the input voltage einv is positive (sin(θinv)≧0) (positive half-cycle). The upper and lower figures on the right (d1, d2) represent the operation when the polarity of the input voltage einv is negative (sin(θinv)<0) (negative half-cycle).

[0072] The third switching element S3 and the fourth switching element S4 are switched according to the polarity of the input voltage einv. That is, during a positive half-cycle, the third switching element S3 is turned off and the fourth switching element S4 is turned on. During a negative half-cycle, the third switching element S3 is turned on and the fourth switching element S4 is turned off.

[0073] Then, switching operations are performed in the first switching element S1 and the second switching element S2, and these first switching element S1 and second switching element S2 are alternately turned on and off at predetermined timings. As a result, a predetermined current path through which the input current iinv flows is formed.

[0074] Specifically, as shown in (c1), when the polarity of the input voltage einv is positive, and the first switching element S1 is turned off and the second switching element S2 is turned on, the input current iinv flowing in from the L input wiring 21b flows through a current-carrying path consisting of the intermediate part of the first leg 23, the second switching element S2, the N output wiring 22a, the fourth switching element S4 (freewheeling diode 28a), the intermediate part of the second leg 24, and the N input wiring 21a, as indicated by the dashed arrow Yc1.

[0075] As shown in (c2), when the polarity of the input voltage einv is positive, if the first switching element S1 turns on and the second switching element S2 turns off, the voltage difference between the input voltage einv and the output voltage Vdc (Vdc > einv) creates a current path consisting of the N input wiring 21a, the middle section of the second leg 24, the fourth switching element S4, the N output wiring 22a, the load R and output capacitor Cdc, the P output wiring 22b, the first switching element S1 (freewheel diode 28a), the middle section of the first leg 23, and the L input wiring 21b. As a result, a discharge current flows in the reverse direction through the reactor Linv.

[0076] As shown in (d1), when the polarity of the input voltage einv is negative, and the first switching element S1 turns on and the second switching element S2 turns off, the input current iinv flowing in from the N input wiring 21a flows through a current-carrying path consisting of the intermediate part of the second leg 24, the third switching element S3 (freewheeling diode 28a), the N output wiring 22a, the first switching element S1, the intermediate part of the first leg 23, and the L input wiring 21b, as indicated by the dashed arrow Yd1.

[0077] As shown in (d2), when the polarity of the input voltage einv is negative, and the first switching element S1 is turned off and the second switching element S2 is turned on, the voltage difference between the input voltage einv and the output voltage Vdc (Vdc > einv) causes a current path to be formed, as shown by the dashed arrow Yd2, consisting of the N input wiring 21a, the middle section of the second leg 24, the third switching element S3 (freewheeling diode 28a), the P output wiring 22b, the load R and output capacitor Cdc, the N output wiring 22a, the second switching element S2 (freewheeling diode 28a), the middle section of the first leg 23, and the L input wiring 21b. As a result, a discharge current flows in the reverse direction through the reactor Linv.

[0078] <Controller control circuit> (Basic control circuit for high speed) As described above, the controller 14 switches the first switching element S1 and the second switching element S2 at high speed. An example of a block diagram of the control circuit of the controller 14 for this purpose is shown in Figure 4A. Figure 4B shows the equations used in the calculations of these control circuits.

[0079] Figure 4A shows a control circuit that has a reactive power control function in addition to general active power control. The controller 14 includes a DC bus voltage control unit 40, a peak current command value setting unit 50, a peak current control unit 60, a limiter 70, and a reactive current control unit 69.

[0080] The DC bus voltage control unit 40 controls the output voltage Vdc so that it becomes the set DC bus voltage. The DC bus voltage control unit 40 receives the command value Vdc for the output voltage. * The measured value Vdc of the output voltage measured by the output voltage sensor 12 is input.

[0081] Then, the DC bus voltage control unit 40 outputs a command value for the reactor current (first input side current command value Iinv) corresponding to the maximum value of the reactor current (iinv). * The output is Vdc. The measured value of the output voltage Vdc is used as a feedback value, and the DC bus voltage control unit 40 sets the command value Vdc to Vdc. * PID control is performed to match the first input side current command value Iinv * Output to limiter 70.

[0082] Limiter 70 has an upper limit (+Iinv.lim) that caps out above a predetermined value on the positive side, and a lower limit (-Iinv.lim) that caps out below a predetermined value on the negative side. As mentioned above, the current flowing in the charging direction is positive, and the current flowing in the discharging direction is negative, so Limiter 70 corresponds to both charging and discharging operations and sets the reactor current command value (first input side current command value Iinv * ) restrict.

[0083] As upper and lower limits, for example, the maximum value of the rated current of the commercial power supply 2 (e.g., approximately 20A) may be set, taking into account the rating of the onboard charger 3. The first input side current command value Iinv is limited in magnitude between the upper and lower limits by the limiter 70. * This is input to the peak current command value setting unit 50.

[0084] The peak current command value setting unit 50 consists of a phase-synchronization circuit 51, a multiplier 52, an adder 53, etc., and sets the first input current command value Iinv based on the measured values ​​of the first input voltage sensor 11a and / or the second input voltage sensor 11b and the measured value of the output voltage sensor 12. * From the predetermined peak current command value iinv * Set the .p file.

[0085] Specifically, first, the first input side current command value Iinv * is input to the multiplier 52, and based on the phase of the input side voltage einv, it is converted into a command value of the reactive current corresponding to the instantaneous value (the second input side current command value iinv * ). That is, the measured value of the input side voltage einv measured by the second input side voltage sensor 11b is input to the phase synchronization circuit 51. Based on that measured value, the phase angle θinv is obtained. And from that phase angle θinv, a predetermined signal (phase signal: sin(θinv)) is obtained.

[0086] That phase signal sin(θinv) is output from the phase synchronization circuit 51 and input to the multiplier 52. In the multiplier 52, the first input side current command value Iinv * is multiplied by the phase signal sin(θinv). By doing so, the second input side current command value corresponding to that instantaneous value (iinv * ) is calculated. The second input side current command value corresponds to the active power Pac. Therefore, here, that second input side current command value (instantaneous value iinv * ) is taken as the current command value (active component current command value) ip * corresponding to the active power Pac. The active component current command value ip * is output to the current command value integrator 69b described later.

[0087] The reactive current control unit 69 is set to correspond to the reactive power Qac, and calculates a command value of the reactive current (reactive component current command value iQ * ) according to a predetermined operating power factor PF. In FIG. 4B, expressions (4) to (12) related to that calculation are shown.

[0088] In these equations, Pac in equation (6) corresponds to the active power of the commercial power supply 2 input to the AC / DC converter 6. Tinv corresponds to the period Tac of the active power Pac. Tinv is obtained from the phase-locked circuit 51, as shown in Figure 4A. Einv.rms in equation (4) corresponds to the RMS value of the voltage of the active power Pac. Iinv.rms in equation (5) corresponds to the RMS value of the current of the active power Pac. Sac in equation (7) corresponds to the apparent power. Qac in equation (8) corresponds to the reactive power.

[0089] In the phase-locked circuit 51, a predetermined signal (second phase signal: cos(θinv)) is obtained from the phase angle θinv. This second phase signal cos(θinv) is output from the phase-locked circuit 51 and input to the second multiplier 69a. In the second multiplier 69a, the reactive current command value (maximum value) IQ is determined. * The second phase signal cos(θinv) is multiplied to this. As a result, the reactive current command value iQ is obtained as the command value of the current corresponding to the reactive power Qac. * This is calculated.

[0090] Here, the reactive current command value (maximum value) IQ * Qac is the command value of the reactive power Qac * It is calculated by equation (9). FQ corresponds to the definition of reactive power Qac (leading reactive power and lagging reactive power) and is determined by equations (10) and (11). Note that in the case of control using leading reactive power, a suppression effect on the voltage drop of commercial power supply 2 is obtained. In the case of control using lagging reactive power, a suppression effect on the voltage rise of commercial power supply 2 is obtained.

[0091] Command value of reactive power Qac * In equation (12), the command value PF is the operating power factor PF. * This can be obtained by setting [the appropriate parameter].

[0092] The reactive current command value iQ is calculated by the reactive current control unit 69. *This is output to the peak current command value setting unit 50. Then, the current command value integrator 69b provided in the peak current command value setting unit 50 sets the effective current command value ip * and the reactive current command value iQ * From both sides, the command value for the current corresponding to the apparent power Sac is the third input side current command value iinv * Calculate.

[0093] In the adder 53, the current command value iinv on the third input side is * By adding the current correction amount Δiinv, the peak current command value iinv input to the peak current control unit 60 is determined. * .p is set. The current correction amount Δiinv is an estimate of the pulsating component of the reactor current and is obtained by equation (1) shown in Figure 4B.

[0094] In equations (1) to (3) shown in Figure 4B, Linv is the inductance of the filter circuit 30. As will be described later, a PWM method that changes the duty cycle is used for the switching operation of the first switching element S1 and the second switching element S2. TPWM is a periodic signal that indicates the timing corresponding to the switching period (a predetermined constant value) in that PWM control (see Figures 7A and 7B).

[0095] In equation (2), Ks is the slope value used for slope compensation in the peak current mode control described later. In equation (3), d is the ratio of the input voltage to the output voltage. The measured value of the output voltage sensor 12 is used to calculate Ks and d.

[0096] The peak current control unit 60 controls the timing of turning the first switching element S1 and the second switching element S2 on and off by peak current mode control. Specifically, the peak current control unit 60 receives a peak current command value iinv *Along with .p, the measured value iinv of the reactor current measured by the current sensor 10 is input as its feedback value. The peak current control unit 60 also receives TPWM, Ks, TZRO, etc. TZRO is the first set signal that indicates the timing corresponding to 0 degrees (360 degrees) of the switching period in PWM control.

[0097] As a result, the peak current control unit 60 outputs control signals Q1 and Q2 that indicate the timing for turning the first switching element S1 and the second switching element S2 on and off.

[0098] This control circuit enables control that maintains a constant power factor according to both charging and discharging power. Moreover, by combining it with peak current mode control, it is possible to stably track the power factor with a simple circuit configuration without current feedback control. That is, the third input side current command value iinv * By simply inputting this to the peak current control unit 60, a current waveform corresponding to the apparent power Sac can be generated. Active power Pac and reactive power Qac can be freely controlled, and constant power factor control can be achieved with a simple circuit configuration.

[0099] (Details of the peak current control unit) Figure 5 shows a block diagram of the control circuit in the peak current control unit 60. Figure 6 shows the setting table for the lookup table of the determination unit 67, which will be described later.

[0100] Figure 7A shows the switching pattern under peak current mode control during charging. Figure 7B shows the switching pattern under peak current mode control during discharge. Figure 7A(a) is the switching pattern during a positive half-cycle, and Figure 7A(b) is the switching pattern during a negative half-cycle. On the other hand, Figure 7B(a) is the switching pattern during a negative half-cycle, and Figure 7B(b) is the switching pattern during a positive half-cycle.

[0101] Slope compensation is essential for peak current mode control. In response to this, this controller 14 is designed to enable slope compensation even in the AC / DC converter 6 using inexpensive commercially available electronic components.

[0102] In other words, while electronic components such as ICs and microcontrollers that perform slope compensation (slope compensation components) are commercially available, these slope compensation components are developed for DC / DC converters that handle DC power. For this reason, these slope compensation components are structured to only be capable of processing signals for positive slope compensation.

[0103] In contrast, since the AC / DC converter 6 handles alternating current power whose polarity changes between positive and negative, the controller 14 also requires signal processing for negative slope compensation. Therefore, simply using commercially available slope compensation components as they are will not enable peak current mode control in the controller 14.

[0104] In contrast, the controller 14 includes, in addition to a slope compensator 61 and a comparator 62 (comparator) corresponding to positive polarity, a first analog switch 63A and a second analog switch 63B and an inverting amplifier circuit 65 to correspond to the positive or negative polarity of AC power.

[0105] Therefore, in the case of this controller 14, peak current mode control can be performed using commercially available slope compensation components in the slope compensator 61. This allows peak current mode control to be performed with a simple and inexpensive circuit configuration. As a result, stable operation can be achieved even when the reactor 32 is miniaturized.

[0106] Specifically, the peak current control unit 60 includes a slope compensator 61, a comparator 62, a first analog switch 63A, a second analog switch 63B, an inverting amplifier circuit 65, a PWM control unit 66, a determination unit 67, a high-speed gate driver 68, and the like.

[0107] The first analog switch 63A and the second analog switch 63B each have two switching contacts (A contact and B contact) on their input side. These switching contacts switch in conjunction with each other (both being A contacts or both being B contacts). When the A contact is active, a position signal "1" is output to the controller 14, and when the B contact is active, a position signal "0" is output to the controller 14.

[0108] The B contact of the first analog switch 63A receives a positive peak current control command value iinv * .p is input. Meanwhile, the A contact of the first analog switch 63A receives a negative peak current command value -iinv * .p is input. The output side of the first analog switch 63A is connected to the slope compensator 61. Switching of the first analog switch 63A sets the positive peak current control command value iinv * .p and negative peak current command value -iinv * Either of the .p values ​​is input to the slope compensator 61.

[0109] The slope compensator 61 also receives Ks and the pulsed first set signal TZRO and the second set signal Trip as inputs. Ks is the positive peak current control command value iinv * This corresponds to a predetermined slope value applied to .p. Ks is generally used to suppress the occurrence of low-frequency oscillations that occur when the duty cycle exceeds 50%.

[0110] As shown in Figures 7A and 7B, the first set signal TZRO is output at a timing corresponding to 0 degrees of the switching period. The second set signal Trip is output at a timing corresponding to the upper limit (peak) of the positive and negative reactor currents iinv and -iinv.

[0111] The first set signal TZRO is input from the PWM control unit 66 to the slope compensator 61 based on the periodic signal TPWM. The first set signal TZRO is also output to the determination unit 67. The second set signal Trip is fed back after the output from the comparator 62. Based on these first set signal TZRO and second set signal Trip, the slope compensator 61 sets the slope compensation to the positive and negative reactor currents iinv and -iinv.

[0112] Specifically, the slope compensator 61 controls the positive peak current command value iinv * Based on .p and Ks, the positive peak current command value iinv * A slope is applied to .p and a predetermined compensation command value is output to the input terminal (minus) of the comparator 62 (the sloped dashed line portion in Figures 7A and 7B(a)). The slope compensator 61 also applies a negative peak current command value -iinv * Based on .p and Ks, the negative peak current command value -iinv * A slope is applied to .p and a predetermined compensation command value is output to the input terminal (minus) of the comparator 62 (the sloped dashed line portion in Figures 7A and 7B(b)).

[0113] The comparator 62 receives a compensation command value corresponding to the positive or negative polarity, along with measured values ​​of the reactor current iinv and -iinv corresponding to the positive or negative polarity, at its input terminal (positive), and compares them.

[0114] Specifically, the input terminal (positive) of comparator 62 is connected to the output side of the second analog switch 63B. The measured value of the positive reactor current iinv is input to the B contact of the second analog switch 63B. On the other hand, the A contact of the second analog switch 63B is connected to an inverting amplifier circuit 65 that inverts the sign of the measured value of the reactor current iinv.

[0115] The inverting amplifier circuit 65 receives a measured value of the positive reactor current iinv. As a result, the measured value of the negative reactor current -iinv output by the inverting amplifier circuit 65 is input to the normally open (A) contact of the second analog switch 63B. In other words, by switching the second analog switch 63B, the measured values ​​of the positive or negative reactor currents iinv and -iinv are input to the comparator 62.

[0116] The comparator 62 compares the compensation command value corresponding to the positive or negative polarity with the measured values ​​of the reactor currents iinv and -iinv. When the comparator 62 finds that the compensation command value matches the measured values ​​of the reactor currents iinv and -iinv (the matching portion in Figures 7A and 7B(a)), it outputs a second set signal Trip as the comparison result. The second set signal Trip is fed back to the slope compensator 61. The second set signal Trip is also output to the determination unit 67.

[0117] The determination unit 67 has a lookup table configured as shown in the table in Figure 6. The lookup table includes two types: one for charging and one for discharging.

[0118] The determination unit 67 determines the first set signal TZRO and the second set signal Trip based on the phase signal sin(θinv) input from the phase-locking circuit 51, the position signals Sp(1 or 0) of the first analog switch 63A and the second analog switch 63B, and the lookup table. Based on this, the determination unit 67 outputs control signals (first control signal Q1 and second control signal Q2) for turning the first switching element S1 and the second switching element S2 on and off.

[0119] Specifically, as shown in Figure 7A(a), during a positive half-cycle during charging (phase signal sin(θinv) is 0 or greater), and as shown in Figure 7B(a), during a negative half-cycle during discharge (phase signal sin(θinv) is less than 0), the position signals Sp of the first analog switch 63A and the second analog switch 63B are "0".

[0120] When the second set signal Trip is input, the determination unit 67 outputs a first control signal Q1 in a high state (1) and a second control signal Q2 in a low state (0). On the other hand, when the first set signal TZRO is input, the determination unit 67 outputs a first control signal Q1 in a low state and a second control signal Q2 in a high state.

[0121] As shown in Figure 7A(b), during a negative half-cycle during charging (phase signal sin(θinv) is less than 0), and as shown in Figure 7B(b), during a positive half-cycle during discharge (phase signal sin(θinv) is 0 or greater), the position signals Sp of the first analog switch 63A and the second analog switch 63B are "1".

[0122] When the second set signal Trip is input, the determination unit 67 outputs the first control signal Q1 in a low state and the second control signal Q2 in a high state. When the first set signal TZRO is input, the determination unit 67 outputs the first control signal Q1 in a high state and the second control signal Q2 in a low state.

[0123] As shown in Figure 5, the first control signal Q1 and the second control signal Q2 output by the determination unit 67 are input to the high-speed gate driver 68. A predetermined dead time Td is also input to the high-speed gate driver 68.

[0124] The high-speed gate driver 68 turns the first switching element S1 on and off based on the first control signal Q1, and turns the second switching element S2 on and off based on the second control signal Q2. Specifically, when the first control signal Q1 is high, it outputs a drive voltage to the first switching element S1 to turn it on. When the first control signal Q1 is low, it does not output a drive voltage to the first switching element S1 and turns it off. Similarly, the second switching element S2 is turned on or off depending on the state of the second control signal Q2.

[0125] (Slow-speed control circuit) To achieve both charging and discharging operations, the controller 14 switches the third switching element S3 and the fourth switching element S4 as described above. An example of a block diagram of the low-speed control circuit of the controller 14 for this purpose is shown in Figure 8.

[0126] The low-speed control circuit consists of a second comparator 90, a third comparator 91, a negation circuit 92, and a low-speed gate driver 93. The second comparator 90 and the third comparator 91 are each input to a phase signal sin(θinv) obtained from the phase-locking circuit 43a.

[0127] The second comparator 90 and the third comparator 91 are each input to predetermined judgment signals +A and -A, which have opposite signs. "A" is a numerical value in the range of 0 to 1. The ideal value of A is 0, but to avoid noise near the zero crossing, a value near 0 is preferable (for example, 0.01).

[0128] The second comparator 90 and the third comparator 91 each compare the phase signal sin(θinv) with their respective decision signals. Then, each of the second comparator 90 and the third comparator 91 outputs a signal of 0 or 1 depending on the relative magnitudes of the phase signal sin(θinv) and their respective decision signals.

[0129] The second comparator 90 outputs the signal (third control signal Q3) as is to the low-speed gate driver 93. On the other hand, the third comparator 91 outputs the signal (fourth control signal Q4) inverted through the negation circuit 92 to the low-speed gate driver 93. As a result, the third control signal Q3 and the fourth control signal Q4 are different from each other (0 or 1). A predetermined dead time Td is also input to the low-speed gate driver 93.

[0130] The low-speed gate driver 93 turns the third switching element S3 on and off based on the third control signal Q3, and turns the fourth switching element S4 on and off based on the fourth control signal Q4.

[0131] (A modified example of a filter circuit) In the embodiment described above, the filter circuit 30 was of the LC type. From the viewpoint of miniaturization and noise reduction, the LC type may be replaced with an LCL type or an LLCL type. Figure 9 shows the respective filter circuits 30 of the LCL type and LLCL type.

[0132] The LCL type filter circuit 30 includes two reactors 32 (Linv, L2) arranged in series with the L input wiring 21b, and one input capacitor 31 (C inv) arranged with a connecting wire 33 that connects the intermediate portion between the two reactors Linv, L2 in the L input wiring 21b to the N input wiring 21a.

[0133] The LLCL type filter circuit 30 further includes a third reactor 32 (Lf) in addition to the LCL type filter circuit 30. This third reactor Lf is positioned at an intermediate location between the input capacitor C inv in the overhead line 33.

[0134] Figure 10 shows an example of the constant design for each type of filter circuit 30. The capacitance of the input capacitor C inv is the same in each type of filter circuit 30. The inductance of each reactor Linv,L2 in the LCL type is half that of the reactor Linv in the LC type, but since the LCL type has two reactors 32, the total inductance is the same (240 μH).

[0135] On the other hand, the LLCL type has three reactors 32, but each reactor 32 can be made small, and the total inductance is smaller than the other two types (141.6 μH). In other words, the capacitance of the reactors 32 can be reduced by about 41%. The reactors 32 can be made smaller, and the filter circuit 30 can be made smaller.

[0136] The constants of each of these filter circuits 30 can be designed using equations (13) to (16) shown at the bottom of Figure 9. fc is the cutoff frequency. fr is the resonant frequency of the filter circuit 30. fs is the switching frequency.

[0137] Figure 11 shows the Bode plots at the input and output of each type of filter circuit 30 shown in Figure 10. The LCL type exhibits greater attenuation of noise components than the LC type in the high-frequency range. Therefore, the LCL type can suppress switching noise more effectively than the LC type.

[0138] On the other hand, the LLCL type has the advantage of being able to attenuate the noise component of switching noise by adjusting the constants of Lf and Cinv. That is, as shown in Figure 11, in the LLCL type, a noise component attenuation peak can be obtained near the switching frequency fs.

[0139] Therefore, by adjusting the constants of Lf and Cinv to obtain such an attenuation peak, switching noise can be effectively suppressed. This confirmed that the noise component of switching noise can be attenuated by approximately 20 dB or more compared to the other two types of filter circuits 30. The relationship between fr and fs in the LLCL type follows equation (16).

[0140] <Verification of effects through simulation> (Verification 1) To verify the effectiveness of the three filter circuits 30 described above, simulations were performed. Each filter circuit 30 with the configuration and design shown in Figures 9 and 10 was used in the simulations. The main parameters used in each simulation are as follows:

[0141] Input voltage (einv): 240V / 60Hz DC load: 4kW Output capacitor (Cdc) capacitance: 2200μF Output voltage (Vdc): 400V.

[0142] Figure 12A shows the simulation results for the LC type filter circuit 30. Figure 12B shows the simulation results for the LCL type filter circuit 30. Figure 12C shows the simulation results for the LLCL type filter circuit 30.

[0143] It was confirmed that a stable waveform of the reactor current iinv could be obtained in all of the filter circuits 30. In addition, the total harmonic distortion (THDi) of the input current iac during charging was analyzed for each filter circuit 30. As a result, the THDi of the LC type filter circuit 30 was 0.94%, the THDi of the LCL type filter circuit 30 was 1.76%, and the THDi of the LLCL type filter circuit 30 was 1.69%.

[0144] Based on these results, among the three types of filter circuits 30 described above, the LCL type is preferred over the LC type, and the LLCL type is more preferred as the filter circuit 30 to be applied to the AC / DC converter 6.

[0145] (Verification 2) A simulation was conducted to verify whether the LLCL-type filter circuit 30 could be charged and discharged seamlessly, that is, whether the switching between discharge and charge operations could be performed smoothly and continuously. An example of the simulation results is shown in Figure 13.

[0146] Figure 13(a) shows the transition from discharge operation to charge operation, and Figure 13(b) shows the transition from charge operation to discharge operation. The transition from discharge operation to charge operation occurs at timing t1, and the transition from charge operation to discharge operation occurs at timing t2. In both cases, the operating power factor was set to 1.

[0147] It was confirmed that the input voltage einv waveform switches smoothly and continuously between the input current iac during discharge, which has the opposite phase, and the input current iac during charging, which has the same phase. It was also confirmed that the DC bus voltage Vdc switches without significant fluctuations.

[0148] (Verification 3) To verify whether the reactive power control function allows for seamless charging and discharging, a simulation was conducted. An example of the simulation results is shown in Figure 14.

[0149] In the simulation, the operating power factor was set to 0.8, and the system switched from charging to discharging. The switch occurred at timing t1. It was confirmed that seamless charging and discharging were possible even with the operating power factor set to 0.8, and that stable constant power factor control could be achieved.

[0150] Thus, the following effects can be obtained with the disclosed technology. • Peak current mode control can be performed with a simple circuit configuration. • By employing peak current mode control, the reactor capacity can be reduced. By selecting a filter circuit, the reactor capacitance can be further reduced, and switching noise can also be suppressed. • Seamless charging and discharging operations can be achieved even with high distortion rates in the commercial power grid voltage EAC. • Reactive power control can be performed with relatively simple control methods, enabling constant power factor control.

[0151] The disclosed technology is not limited to the embodiments described above, but also encompasses various other configurations. For example, in the embodiments, an analog switch and an inverting circuit were used to correspond to the negative polarity of the AC in order to perform peak current mode control with a simple and inexpensive circuit configuration, but peak current mode control may also be performed using two current sensors corresponding to the positive and negative polarities, respectively. [Explanation of symbols]

[0152] 1 vehicle 2 Commercial power supply 3 On-board charger 4 Batteries 5 DC / DC Converters 6 AC / DC Converters 10 Current Sensor 11a First input voltage sensor 11b Second input voltage sensor 12 Output voltage sensor 13 Converter mechanism 14 Controllers 20. Bridgeless PFC Circuit 21 Input side wiring 22 Output wiring 23 Leg 1 24 Leg 2 25 Third Leg 26-link switch 28 switching elements 28a Freewheeling Diode 29 Output capacitor 30 Filter Circuits 31 Input capacitor 32 Reactors 33 Construction line 40 DC bus voltage control unit 50 Peak current command value setting unit 51 Phase-locked circuit 52 Multipliers 53 Adder 60 Peak current control unit 61 Slope Compensator 62 Comparators 63A First Analog Switch 63B Second Analog Switch 65. Inverting Amplifier Circuit (Inverting Circuit) 66 PWM Control Unit 67 Judgment section 68 Gate Driver 69 Reactive current control unit 70 Limiter 90 Second comparator 91 Third comparator 92 Negation circuit 93 Low-speed gate driver

Claims

1. An AC / DC converter comprising a converter mechanism including a bridgeless PFC circuit and a controller for controlling the converter mechanism, which performs bidirectional conversion between AC and DC, The aforementioned bridgeless PFC circuit is The pair of input wirings that receive the AC current, The pair of output wirings that output DC, Arranged in the aforementioned input wiring, a filter circuit including at least one reactor, A first leg, a second leg, and a third leg are connected in parallel between the pair of output wirings, Each of the first and second legs is provided with a first switching element, a second switching element, a third switching element, and a fourth switching element, which are arranged in series such that the current flow direction is from the positive terminal to the negative terminal, and which are switched and reconfigured by the controller according to the polarity of the AC. The output side capacitor is located in the third leg, One output terminal of the input wiring is connected to the intermediate portion between the first switching element and the second switching element in the first leg, and the other output terminal of the input wiring is connected to the intermediate portion between the third switching element and the fourth switching element in the second leg. The converter mechanism is An input voltage sensor is located in the aforementioned input wiring and measures the AC input voltage and outputs it to the controller, An output voltage sensor is located in the output wiring and measures the DC output voltage and outputs it to the controller, The system includes a current sensor, which is located in the input wiring and measures the reactor current flowing through the reactor and outputs it to the controller, The controller has a peak current control unit that outputs a control signal to turn the first switching element and the second switching element on and off by executing peak current mode control. The peak current control unit includes a slope compensator that inputs a predetermined peak current command value and outputs a predetermined compensation command value, and a comparator that compares the measured value of the reactor current with the compensation command value, and is configured to output the control signal based on the comparison result of the comparator. The peak current control unit, in order to correspond to the positive or negative polarity of the AC, A first analog switch and a second analog switch that switch in conjunction with each other, The system further includes an inverting circuit that reverses the sign of the measured value of the reactor current, An AC / DC converter in which, by switching the first analog switch, the peak current command value corresponding to positive or negative polarity is input to the slope compensator, and by switching the second analog switch, the measured value of the positive or negative reactor current is input to the comparator.

2. In the AC / DC converter according to claim 1, The aforementioned filter circuit Two reactors arranged in series with the first input wiring, An AC / DC converter having one input capacitor located on a wire connecting the intermediate portion between the two reactors in the first input wiring and the second input wiring.

3. In the AC / DC converter according to claim 2, The filter circuit further comprises a third reactor, An AC / DC converter in which the third reactor is located on the intermediate side of the overhead line compared to the input capacitor.

4. In the AC / DC converter according to any one of claims 1 to 3, The aforementioned controller, A DC bus voltage control unit receives the command value of the output voltage and the measured value of the output voltage sensor as input and outputs the command value of the reactor current so that the output voltage becomes the set DC bus voltage. An upper limit is set on the positive side, which caps out above a predetermined value, and a lower limit is set on the negative side, which caps out below a predetermined value, thereby limiting the command value of the reactor current. A peak current command value setting unit that inputs a limited command value of the reactor current output from the limiter, A reactive current control unit calculates a command value for reactive current according to a predetermined operating power factor and outputs it to the peak current command value setting unit, It has, An AC / DC converter in which the peak current command value setting unit sets the peak current command value from both the limited command value of the reactor current and the command value of the reactive current.

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