Oscillator manufacturing method

The method addresses frequency deviation and terminal disconnection issues in TCXO manufacturing by incorporating a control circuit with memory and correction circuits for precise frequency adjustment and diagnosis, ensuring stable oscillation and reliable post-dicing measurement.

JP2026093543APending Publication Date: 2026-06-09SEIKO EPSON CORP

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
SEIKO EPSON CORP
Filing Date
2024-11-28
Publication Date
2026-06-09

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Abstract

The present invention provides a method for manufacturing an oscillator 1 that can accurately detect a faulty oscillator 1. [Solution] The method for manufacturing the oscillator 1 includes the steps of: preparing a wafer substrate 100 comprising a base substrate 5 on which a control circuit 2 and an external terminal 50 are arranged, a vibrating element 3, and a lid 4 that houses the vibrating element 3 together with the base substrate 5; a first measurement step of supplying a first signal S1 to the control circuit 2 via the external terminal 50 to measure the frequency of the oscillator 1; storing temperature compensation data as correction information used in the correction circuit 40 in a storage unit 20 to adjust the frequency of the oscillator 1 so that it becomes a first frequency; separating the wafer substrate 100 into individual pieces for each oscillator 1 consisting of a vibrating element 3, a control circuit 2, and an external terminal 50; a second measurement step of measuring the frequency of the oscillator 1; and a step of comparing the frequency of the oscillator 1 measured in the second measurement step with the first frequency to diagnose a fault in the oscillator 1.
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Description

Technical Field

[0001] The present invention relates to a method for manufacturing an oscillator.

Background Art

[0002] Patent Document 1 discloses a method for manufacturing a temperature-compensated crystal oscillator (TCXO) in which frequency-temperature characteristics are measured in a wafer state, temperature compensation data is written into a storage element provided in an IC element, and then the wafer is diced.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, after dicing, there is a risk that the oscillation frequency may deviate. Also, in the case of Patent Document 1, there is a problem that when dicing, the measurement terminals are disconnected, so the oscillation frequency cannot be measured after dicing.

Means for Solving the Problems

[0005] A method for manufacturing an oscillator according to one aspect of the present invention includes the steps of: preparing a structure comprising a control circuit having a memory unit and a correction circuit, a base board on which terminals connected to the control circuit are arranged, a vibrating element arranged in correspondence with the control circuit and constituting an oscillator together with the control circuit, and a lid that houses the vibrating element together with the base board; a first measurement step of supplying a signal to the control circuit via the terminals to measure the frequency of the oscillator; a step of storing correction information used in the correction circuit in the memory unit according to the measured frequency and adjusting the frequency of the oscillator so that it becomes a first frequency; a step of separating the structure into individual pieces for each oscillator consisting of the vibrating element, the control circuit, and the terminals; a second measurement step of supplying the signal to the control circuit via the terminals to measure the frequency of the oscillator; and a step of comparing the frequency of the oscillator measured in the second measurement step with the first frequency to diagnose a fault in the oscillator. [Brief explanation of the drawing]

[0006] [Figure 1] A schematic diagram showing the general configuration of the group of devices used in the method for manufacturing an oscillator according to Embodiment 1. [Figure 2A] An enlarged perspective view of an oscillator mounted on a wafer substrate, as seen from the Lid substrate side. [Figure 2B] An enlarged perspective view of an oscillator mounted on a wafer substrate, as seen from the base substrate side. [Figure 3] A cross-sectional view along line AA in Figure 2A. [Figure 4] A diagram illustrating the functional configuration of an oscillator. [Figure 5] A flowchart illustrating the manufacturing method of an oscillator. [Figure 6] A flowchart showing the details of the base substrate preparation process. [Figure 7] A flowchart showing the details of the first measurement process. [Figure 8] A flowchart showing the details of the adjustment process. [Figure 9] A flowchart showing the details of the second measurement process. [Figure 10]A timing chart showing examples of input and output signals of the measurement unit. [Figure 11] A diagram showing measurement conditions. [Figure 12] A diagram showing the temperature characteristics of the frequency of the oscillator.

Embodiments for Carrying Out the Invention

[0007] In the embodiments of the present invention, the components shown in each drawing may be shown with different scale dimensions in order to be easy to view. In the drawings, three axes of an X-axis, a Y-axis, and a Z-axis that are orthogonal to each other may be shown.

[0008] In the following description, the tip side of the arrow of the three axes may be described as the "plus side" and the base end side of the arrow may be described as the "minus side". A direction parallel to the X-axis may be described as the "X-axis direction", a direction parallel to the Y-axis may be described as the "Y-axis direction", and a direction parallel to the Z-axis may be described as the "Z-axis direction".

[0009] In the following, "plan view" means looking at an object from the plus side in the Z-axis direction of the object or from the minus side in the Z-axis direction. The plus side in the Z-axis direction may be described as "above", and the minus side in the Z-axis direction may be described as "below".

[0010] The description of the upper surface of a certain configuration indicates the surface on the plus side in the Z-axis direction of the said configuration. For example, the "upper surface of the substrate" indicates the surface on the plus side in the Z-axis direction of the substrate. ​​​​​​​​​​​​​​​ 1.1. Schematic Configuration of the Apparatus Group Used in the Manufacturing Method of the Oscillator FIG. 1 is a configuration diagram showing the schematic configuration of the apparatus group used in the manufacturing method of the oscillator 1 according to Embodiment 1.

[0013] As shown in FIG. 1, the apparatus group used in the manufacturing method of the oscillator 1 according to Embodiment 1 includes an inspection apparatus 200 and a manufacturing apparatus 300. The inspection apparatus 200 includes a measuring apparatus 210, a probe card 220, probes 230, provers 240, a computer 250, a tray 260, a temperature adjustment apparatus (not shown), and a temperature sensor, and measures the frequency of the oscillator 1, adjusts the frequency of the oscillator 1, and diagnoses faults of the oscillator 1 in the state of the oscillator 1 being on the wafer substrate 100 or in the state of being diced. The manufacturing apparatus 300 includes a film forming apparatus, an etching apparatus, a substrate bonding apparatus, a scribing apparatus, etc., and manufactures and dices the wafer substrate 100 on which a plurality of oscillators 1 are formed. In the present embodiment, the wafer substrate 100 is an example of a structure.

[0014] 1.2. Configuration of the Oscillator FIG. 2A is an enlarged perspective view of the oscillator 1 provided on the wafer substrate 100 as viewed from the lid body 4 side, and FIG. 2B is an enlarged perspective view of the oscillator 1 provided on the wafer substrate 100 as viewed from the mother substrate 5 side. FIG. 3 is a cross-sectional view taken along the line A-A of FIG. 2A. FIG. 4 is a functional configuration diagram of the oscillator 1.

[0015] The wafer substrate 100 includes a base substrate 5w, a Lid substrate 4w bonded to the base substrate 5w, and a vibration element 3 disposed between the base substrate 5w and the Lid substrate 4w. In the present embodiment, both the base substrate 5w and the Lid substrate 4w are formed by processing silicon wafers.

[0016] A plurality of oscillators 1 corresponding to the number of vibration elements 3 are formed on the wafer substrate 100. The wafer substrate 100 is diced at the position of the dicing line DL to be diced into individual oscillators 1.

[0017] The oscillator 1 comprises a base plate 5, a vibrating element 3 positioned on the upper surface of the base plate 5, and a cover 4 that covers the vibrating element 3 and is joined to the upper surface of the base plate 5. In such an oscillator 1, the base plate 5 and the cover 4 form a package that houses the vibrating element 3, and the vibrating element 3 is housed in a housing space S.

[0018] 1.2.1. Configuration of the master board 5 As shown in Figure 2B, external terminals 50 are provided on the lower surface of the base board 5. In this embodiment, the external terminals 50 include four external terminals 51, 52, 53, and 54. As shown in Figure 3, the external terminal 50 is electrically connected to the electrode pad 71p of the wiring layer 72 via the contact hole 76.

[0019] The base substrate 5 has a silicon substrate 6, a semiconductor circuit 7 provided on the lower surface 6b side of the silicon substrate 6, and an external terminal 50 provided on the lower surface side of the semiconductor circuit 7. The external terminal 50 and the semiconductor circuit 7 are electrically connected via an electrode pad 71p. The external terminal 50 also serves as a measurement terminal in the process performed by the inspection device 200 (see Figure 1).

[0020] The silicon substrate 6 is formed by slicing a base substrate 5w made of a silicon wafer. The silicon substrate 6 may also be formed from a wafer made of a semiconductor material other than silicon, such as Ge, GaP, GaAs, or InP.

[0021] The silicon substrate 6 has through holes 61 that penetrate the upper surface 6a and the lower surface 6b. The through holes 61 can be formed, for example, by RIE (reactive ion etching). This makes it possible to form through holes 61 with a high aspect ratio.

[0022] An insulating film 60 is formed on the upper surface 6a and the lower surface 6b of the silicon substrate 6. The insulating film 60 is made of, for example, silicon oxide (SiO2). The insulating film 60 can also be formed by, for example, sputtering.

[0023] The semiconductor circuit 7 includes a control circuit 2 having a memory unit 20 and a correction circuit 40, which will be described later. The semiconductor circuit 7 has a plurality of elements 70 formed on the lower surface 6b of the silicon substrate 6 and a laminate 71 stacked on the lower surface 6b of the silicon substrate 6.

[0024] The laminate 71 has a wiring layer 72 formed on the lower surface 6b of the silicon substrate 6, an insulating layer 73 formed on the lower surface of the wiring layer 72, a passivation film 74 formed on the lower surface of the insulating layer 73, and a terminal layer 75 formed on the lower surface of the passivation film 74.

[0025] The wiring layer 72 electrically connects multiple elements 70 to each other via wiring, contact holes, or through electrodes contained within the wiring layer 72, thereby forming a semiconductor circuit 7. The elements 70 are, for example, transistors, resistors, capacitive elements, etc. The wiring layer 72 may consist of multiple layers.

[0026] In this way, by forming the semiconductor circuit 7 on the silicon substrate 6, the space of the silicon substrate 6 can be effectively utilized. Furthermore, since the semiconductor circuit 7 can be integrally formed on the silicon substrate 6, the oscillator 1 can be miniaturized. In particular, by forming the semiconductor circuit 7 on the lower surface 6b side of the silicon substrate 6, the area in which the semiconductor circuit 7 can be formed is wider compared to when the semiconductor circuit 7 is formed on the upper surface 6a side, because there is no junction area with the cover 4. Therefore, the design freedom of the semiconductor circuit 7 is increased. Note that the semiconductor circuit 7 may also be formed on the upper surface 6a side of the silicon substrate 6.

[0027] The terminal layer 75 has a plurality of external terminals 50 for connecting the semiconductor circuit 7 to external devices, including the inspection device 200.

[0028] Wiring 8 is provided in the through hole 61. Wiring 8 is electrically connected to the electrode pad 72p of the wiring layer 72 on the lower surface 6b side of the silicon substrate 6, and electrically connected to the bonding member B on the upper surface 6a side of the silicon substrate 6. The bonding member B is electrically connected to the excitation electrode of the vibrating element 3.

[0029] Wiring 8 has a first wiring 81 and a second wiring 82. The first wiring 81 is filled into the through hole 61 and positioned to fill the bottom of the through hole 61. The second wiring 82 is electrically connected to the first wiring 81 by overlapping it from above.

[0030] An organic resin film 63 is provided between the inner circumferential surface of the through hole 61 and the first wiring 81. The organic resin film 63 has insulating properties and insulates the first wiring 81 from the silicon substrate 6.

[0031] In a plan view, the organic resin film 64 is provided between the second wiring 82, which overlaps with the bonding member B, and the upper surface 6a of the silicon substrate 6. The organic resin film 64 functions as a stress-relieving layer that alleviates the stress generated when the vibrating element 3 is pressed and compressed against the bonding member B.

[0032] 1.2.2. Structure of Lid 4 The lid 4 has a bottomed recess 41 that opens on its lower surface and houses the vibration element 3 inside. The lid 4 is joined to the upper surface of the base substrate 5, that is, the upper surface 6a of the silicon substrate 6, via a bonding member 11 on its lower surface. The bonding member 11 is made of, for example, gold. Bonding members 11 made of gold are provided on the joining surfaces of the lid 4 and the base substrate 5, and the bonding members 11 are joined to each other by activation bonding. This creates a housing space S for housing the vibration element 3 between the lid 4 and the base substrate 5.

[0033] The containment space S is airtight and under reduced pressure, preferably closer to a vacuum. This reduces viscous resistance and improves the oscillation characteristics of the vibrating element 3. However, the atmosphere of the containment space S is not particularly limited.

[0034] The cover 4 is made by framing a Lid substrate 4w made of a silicon wafer. Thus, both the cover 4 and the silicon substrate 6 are made of silicon. Therefore, the coefficients of linear expansion of the cover 4 and the silicon substrate 6 are equal, the generation of thermal stress caused by thermal expansion is suppressed, and an oscillator 1 with excellent vibration characteristics is obtained. Furthermore, since the oscillator 1 can be formed by a semiconductor process, the oscillator 1 can be manufactured with high precision and miniaturized. Note that the cover 4 may be formed from a wafer made of a semiconductor material other than silicon, such as Ge, GaP, GaAs, or InP.

[0035] 1.2.3. About Vibration Element 3 The vibrating element 3 is a quartz crystal oscillator. Alternatively, the vibrating element 3 may be a SAW (Surface Acoustic Wave) resonator, other piezoelectric oscillators, or MEMS (Micro Electro Mechanical Systems) oscillators.

[0036] As the substrate material for the vibrating element 3, piezoelectric materials such as piezoelectric single crystals like quartz, lithium tantalate, or lithium niobate, piezoelectric ceramics such as lead zirconate titanate, or silicon semiconductor materials can be used. As a means of exciting the vibrating element 3, either a piezoelectric effect or electrostatic drive using Coulomb force may be used.

[0037] 1.2.4. Functional configuration of oscillator 1 As shown in Figure 4, in this embodiment, the control circuit 2 is configured to include an oscillation control circuit 10, a memory unit 20, a measurement unit 30, a correction circuit 40, a digital control circuit 91, a temperature sensor 92, a regulator circuit 93, a serial interface (I / F) circuit 94, and an output circuit 95. The control circuit 2 is electrically connected to an external terminal 50 (see Figure 3) and is also electrically connected to the vibration element 3 via wiring 8 and a connecting member B.

[0038] The external terminal 50 includes a power terminal VDD, a ground terminal GND, a terminal TS1 to which a first signal S1 determining the frequency measurement period Tm (see Figure 10) is input, terminals SCL and SDA for serial communication, and an output terminal OUT. In Figure 4, terminals TS1 and the output terminal OUT are provided as separate terminals from terminals SCL and SDA, but these terminals may be common terminals. The wiring 8 includes the XO terminal and the XI terminal, and the connecting member B is a bump on which the vibration element 3 is mounted.

[0039] The regulator circuit 93 generates a constant voltage that serves as the power supply voltage or reference voltage for some or all of the oscillator control circuit 10, measurement unit 30, correction circuit 40, digital control circuit 91, output circuit 95, etc., based on the power supply voltage supplied from the VDD terminal.

[0040] The serial interface circuit 94 is a circuit that serves as an interface for communication between the oscillator 1 and external devices, including the test device 200. The serial interface circuit 94 is, for example, a circuit that performs I2C communication.

[0041] The storage unit 20 includes a non-volatile memory 21 and a register 22. The register 22 can store information transmitted by an external device via terminal SDA and serial interface circuit 94. The register 22 can also output the information stored in the register 22 to an external device via terminal SDA and serial interface circuit 94.

[0042] The non-volatile memory 21 is a memory circuit for storing various control data, and may be, for example, various rewritable non-volatile memories such as EEPROM (Electrically Erasable Programmable Read-Only Memory) or flash memory, or various non-rewritable non-volatile memories such as one-time PROM (One Time Programmable Read Only Memory).

[0043] The digital control circuit 91 can store information stored in the register 22 in the non-volatile memory 21, and can also store information stored in the non-volatile memory 21 in the register 22.

[0044] The non-volatile memory 21 stores temperature compensation data (0th-order temperature compensation data, ..., nth-order temperature compensation data) for controlling the correction circuit 40 that corrects the temperature characteristics of the vibration element 3. Since the 0th-order temperature compensation data is temperature-independent data, the frequency at the reference temperature is adjusted by this 0th-order temperature compensation data. n is a positive integer value. Furthermore, the non-volatile memory 21 may also store data for controlling the output circuit 95, etc. In this embodiment, the temperature compensation data is an example of correction information.

[0045] The temperature compensation data is calculated in the adjustment process S6 of the oscillator 1, described later, and is used to correct the frequency-temperature characteristics of the oscillator 1. The temperature compensation data is a value used to cause the correction circuit 40 to output a voltage corresponding to each of the 0th to nth order components of the frequency-temperature characteristics of the oscillation signal CLK. For example, if the vibration element 3 is an AT-cut quartz crystal oscillator, the frequency-temperature characteristics exhibit a cubic curve, so an integer value of 3 or greater is selected for n. The temperature compensation data may include compensation data for all orders from 0th to nth, or it may include compensation data for only some of the orders from 0th to nth.

[0046] Various data, including temperature compensation data, stored in the non-volatile memory 21 are transferred from the non-volatile memory 21 to the register 22 when the control circuit 2 is powered on (when the voltage at the VDD terminal rises from 0V to the desired voltage), and are held in the register 22. Then, the temperature compensation data (0th-order temperature compensation data, ..., nth-order temperature compensation data) held in the register 22 is input to the correction circuit 40.

[0047] The oscillation control circuit 10 is a circuit that controls the oscillation of the vibrating element 3. Specifically, the oscillation control circuit 10 amplifies the output signal of the vibrating element 3 and feeds it back to the vibrating element 3, causing the vibrating element 3 to oscillate, and outputs an oscillation signal CLK based on the oscillation of the vibrating element 3. In this embodiment, the oscillation control circuit 10 is equipped with a variable capacitance element for temperature adjustment, and the frequency of the oscillation signal CLK output from the oscillation control circuit 10 can be changed by changing the voltage applied to the variable capacitance element.

[0048] The output voltage of the correction circuit 40 is configured to be applied to the variable capacitance element, and by applying a voltage to the variable capacitance element that cancels out the frequency change of the oscillation signal CLK due to temperature, temperature compensation is performed so that the frequency does not change with respect to temperature changes within a predetermined range.

[0049] The temperature sensor 92 is a thermosensitive element that outputs a signal (for example, a voltage corresponding to the temperature) corresponding to the ambient temperature. The temperature sensor 92 may be positive polarity, where the output voltage is higher as the temperature increases, or negative polarity, where the output voltage is lower as the temperature increases. It is desirable that the temperature sensor 92 changes its output voltage as linearly as possible with respect to temperature changes within the desired temperature range in which the operation of the oscillator 1 is guaranteed. In this embodiment, the output voltage corresponding to the temperature detected by the temperature sensor 92 is input to the digital control circuit 91 via an analog-to-digital conversion circuit (not shown).

[0050] The measurement unit 30 is a circuit that measures information corresponding to the frequency of the oscillation signal CLK output from the oscillation control circuit 10. In this embodiment, the measurement unit 30 is composed of a counter. In this embodiment, the information corresponding to the frequency of the oscillation signal CLK is the number of pulses Np of the oscillation signal CLK.

[0051] The measurement unit 30 is a counter that counts the number of pulses of the oscillation signal CLK, and can be implemented by, for example, a known circuit in which frequency divider circuits are connected in series. The number of frequency divider circuits connected should be the number necessary to represent the number of bits indicating the count value.

[0052] The measurement unit 30 receives the oscillation signal CLK and the first signal S1 input from terminal TS1. In this embodiment, the first signal S1 is a signal having a pulse width that indicates the time length of the measurement period Tm. The pulse width of the first signal S1, i.e., the measurement period Tm, is precisely determined by the internal clock of the inspection device 200 with a known frequency. Therefore, in this embodiment, the frequency of the oscillator 1 can be precisely determined by the number of pulses Np / measurement period Tm.

[0053] When a first signal S1, which determines the measurement period Tm of the oscillation signal CLK, is input from an external source via terminal TS1, the measurement unit 30 counts the number of pulses Np of the oscillation signal CLK output during the measurement period Tm. In this embodiment, the first signal S1 is an example of a signal supplied to the control circuit 2 via external terminal 50.

[0054] In other words, the measurement unit 30 includes a circuit in which the oscillation signal CLK is input to the frequency divider circuit during the period when the first signal S1 is input to the measurement unit 30 (the period when it is at a high level), and the oscillation signal CLK is not input to the frequency divider circuit during the period when the first signal S1 is not input to the measurement unit 30. Such a circuit can be realized by various known configurations. Furthermore, each frequency divider circuit in the measurement unit 30 is configured to reset the count value to 0 by a reset signal RS. The output of each frequency divider circuit becomes a bit value indicating the count value.

[0055] When the frequency of the oscillation signal CLK of oscillator 1 is measured, the number of pulses, which is information corresponding to the frequency, is written to register 22. The data written to register 22 is written to non-volatile memory 21. Also, when the inspection device 200 reads from register 22, the number of pulses is output from register 22 to the inspection device 200 via terminal SDA and serial interface circuit 94.

[0056] The digital control circuit 91 is a processor that performs various digital processing. These various digital processing processes include control processing for the correction circuit 40 and processing for measuring the frequency of the oscillation signal CLK.

[0057] In the control processing for the correction circuit 40, the digital control circuit 91 outputs a control signal to instruct the 0th-order temperature compensation voltage to the nth-order temperature compensation voltage based on the 0th-order temperature compensation data to the nth-order temperature compensation data stored in the register 22.

[0058] Based on the control signal from the digital control circuit 91, the correction circuit 40 generates a voltage (temperature compensation voltage) to compensate for the frequency-temperature characteristics of the vibration element 3 and applies it to one end of a variable capacitance element (not shown) that functions as a load capacitance for the oscillation control circuit 10.

[0059] As a result, the oscillation frequency of the oscillation control circuit 10 is controlled to be approximately constant regardless of temperature. In this embodiment, the correction circuit 40 is configured to include a 0th-order voltage generation circuit 40-0 to nth-order voltage generation circuits 40-n and an adder circuit 42.

[0060] The zero-order voltage generation circuits 40-0 to n-order voltage generation circuits 40-n each generate zero-order temperature compensation voltages to n-order temperature compensation voltages to compensate for the zero-order to n-order components of the frequency-temperature characteristics of the vibration element 3, respectively, in response to a control signal from the digital control circuit 91.

[0061] The summing circuit 42 adds the 0th-order temperature compensation voltages to the nth-order temperature compensation voltages generated by the 0th-order voltage generation circuit 40-0 to the nth-order voltage generation circuit 40-n, respectively, and outputs the result. The output voltage of this summing circuit 42 becomes the output voltage (temperature compensation voltage) of the correction circuit 40.

[0062] The output circuit 95 receives the oscillation signal CLK output by the oscillation control circuit 10, generates an oscillation signal CLK for external output, and outputs it externally via the OUT terminal. For example, the frequency division ratio and output level of the oscillation signal CLK in the output circuit 95 may be controlled by control data held in the register 22.

[0063] The oscillator 1 configured as described above functions as a voltage-controlled, temperature-compensated oscillator (VC-TCXO (Voltage Controlled Temperature Compensated Crystal Oscillator) if the oscillator element 3 is a crystal oscillator) that outputs an oscillation signal CLK of a constant frequency regardless of temperature within a desired temperature range.

[0064] 1.3. Manufacturing method of oscillator 1 Next, the manufacturing method of oscillator 1 will be explained with reference to the drawings. Figure 5 is a flowchart showing the manufacturing method of oscillator 1. Figure 6 is a flowchart detailing the base substrate preparation process S1. Figure 7 is a flowchart detailing the first measurement process S5. Figure 8 is a flowchart detailing the adjustment process S6. Figure 9 is a flowchart detailing the second measurement process S8. Figure 10 is a timing chart showing examples of input and output signals of the measurement unit 30. Figure 11 is a diagram showing an example of measurement condition Cy. Figure 12 is a diagram showing the temperature characteristics of the frequency of oscillator 1.

[0065] As shown in Figure 5, the method for manufacturing the oscillator 1 includes a step S1 for preparing a base substrate 5w, a step S2 for preparing a Lid substrate 4w, a step S3 for joining the base substrate 5w and the Lid substrate 4w to form a wafer substrate 100, a step S4 for forming external terminals 50, a first measurement step S5 for measuring each oscillator 1 in the state of the wafer substrate 100, a step S6 for adjusting the frequency of each oscillator 1, a step S7 for separating the wafer substrate 100 into individual pieces, a second measurement step S8 for measuring the frequency of the separated oscillators 1, and a step S9 for diagnosing whether or not there is a malfunction in the oscillator 1.

[0066] In this embodiment, steps S1, S2, S3, S4, and S7 are carried out using the manufacturing apparatus 300, and steps S5, S6, S8, and S9 are carried out using the inspection apparatus 200.

[0067] <Base board preparation process> As shown in Figure 6, the base substrate preparation step S1 includes a step S11 for forming semiconductor circuits 7 on a silicon substrate 6 made of a silicon wafer, a step S12 for forming wiring 8 and the like, and a step S13 for mounting the vibration element 3 on the base substrate 5w.

[0068] In step S11, a semiconductor circuit 7 including the control circuit 2 is formed on the lower surface 6b side of the silicon substrate 6, that is, on the lower surface side of the base substrate 5w.

[0069] In step S12, a through-hole 61 (see Figure 3) is formed on the upper surface 6a side of the silicon substrate 6, that is, on the upper surface side of the base substrate 5w, to expose the electrode pad 72p. The first wiring 81 is then filled into the through-hole 61 to form a through-electrode. A second wiring 82 is also formed on the upper surface side of the base substrate 5w to form wiring 8 that is electrically connected to the semiconductor circuit 7. A bonding member B, acting as a bump, is formed on the upper surface of the wiring 8.

[0070] In step S13, the vibration element 3 is mounted on the joining member B, and the vibration element 3 is electrically connected to the semiconductor circuit 7.

[0071] Returning to Figure 5, in step S2, multiple recesses 41 are formed in the Lid substrate 4w. In step S3, the base substrate 5w and the Lid substrate 4w are joined to form the wafer substrate 100. In this embodiment, the base substrate 5w and the Lid substrate 4w are joined in a vacuum atmosphere. In other words, the housing space S in which the vibrating element 3 is housed is under reduced pressure.

[0072] Multiple oscillators 1 are formed on the wafer substrate 100. In this embodiment, the size of the oscillator 1 in plan view is 1 mm × 0.8 mm, and tens of thousands of oscillators 1 are formed on one side of the wafer substrate 100.

[0073] In step S4, external terminals 50 are formed on the lower surface of the wafer substrate 100. The external terminals 50 have a larger area than the electrode pads 71p when viewed from above. The lower surface of the external terminals 50 is plated. The plating is Ni / Pb / Au plating, Ni / Au plating, or SnD / Ag plating. Alternatively, solder printing may be performed instead of plating. Alternatively, solder balls may be placed instead of plating. Step S4 may be performed between steps S11 and S12.

[0074] In the first measurement step S5, which will be described later, the number of measurements is high, so the number of times the probe 230 touches down on the external terminal 50 is also high. Therefore, by applying a surface treatment to the external terminal 50, such as plating, damage to the external terminal 50 can be suppressed even if the probe 230 touches down many times.

[0075] <First measurement process> In the first measurement step S5 shown in Figure 7, the temperature characteristics of the oscillator 1's frequency are measured. The first measurement step S5 includes steps S51 to S56. In the first measurement step S5, the oscillator 1 on the wafer substrate 100 is electrically connected to the inspection device 200. Measurement by the inspection device 200 becomes possible when the probe 230 of the inspection device 200 touches down on the external terminal 50 of the oscillator 1. The inspection device 200 is designed to measure multiple oscillators 1 in a single measurement.

[0076] In step S51, the oscillator 1 is set to test mode. The oscillator 1 has a normal mode and a test mode. The normal mode is a mode in which the oscillator 1 outputs the oscillation signal CLK or a signal generated based on the oscillation signal CLK from the OUT terminal, while the test mode is a mode for measuring frequency, etc.

[0077] In step S52, the temperature of the oscillator 1 formed on the wafer substrate 100 is adjusted to a predetermined measurement temperature. In this embodiment, the temperature characteristics of the oscillator 1's frequency are measured at multiple temperatures. The measurement temperatures are, for example, 0°C, 25°C, 50°C, and 95°C. If the oscillator 1 is a simple package crystal oscillator (SPXO), measurement at only one temperature is sufficient. An SPXO refers to an oscillator that directly utilizes the frequency stability of a crystal without temperature compensation or temperature control.

[0078] In step S53, the measurement conditions are set. Figure 11 shows an example of measurement conditions. When the correction circuit 40 (see Figure 4) includes zero-order voltage generation circuits 40-0 to third-order voltage generation circuits 40-3, the zero-order to third-order shown in Figure 11 indicates whether or not correction is performed in the zero-order voltage generation circuit 40-0 to third-order voltage generation circuits 40-3, and the magnitude of the correction.

[0079] For example, no correction is applied to the order indicated by "-" in Figure 11. Therefore, under measurement condition C1, no correction is applied to any of the 0th-order voltage generation circuits 40-0 to 3rd-order voltage generation circuits 40-3. In other words, the number of pulses Np of the oscillation signal CLK output during the measurement period Tm is not corrected.

[0080] In Figure 11, the order indicated as "maximum" represents the maximum voltage that can be output by the voltage generation circuit of that order, and the correction is performed accordingly. For example, under measurement condition C2, the maximum voltage that can be output by the 0th-order voltage generation circuit 40-0 is output, and no correction is performed on the 1st-order voltage generation circuits 40-1 to 3rd-order voltage generation circuits 40-3.

[0081] In Figure 11, the order indicated as "minimum" represents the minimum voltage that can be output by the voltage generation circuit of that order, and the correction is performed accordingly. For example, under measurement condition C5, the minimum voltage that can be output by the primary voltage generation circuit 40-1 is output, and no correction is performed on the zeroth-order voltage generation circuit 40-0, the second-order voltage generation circuit 40-2, and the third-order voltage generation circuit 40-3.

[0082] As described above, in this embodiment, conditions are defined for not correcting any of the 0th-order voltage generation circuits 40-0 to 3rd-order voltage generation circuits 40-3, for correcting only one of them with the maximum voltage, and for correcting only one of them with the minimum voltage. In total, nine measurement conditions are defined, namely measurement conditions C1 to C9.

[0083] Returning to Figure 7, in step S54, the frequency of oscillator 1 is measured. In this embodiment, the measurement unit 30 measures the number of pulses Np of the oscillation signal CLK. As shown in Figure 10, the measurement unit 30 receives the oscillation signal CLK. The oscillation signal CLK is a pulse signal that alternates between high and low levels at regular intervals. In this embodiment, the measurement unit 30 counts the number of times the pulse signal becomes high within the measurement period Tm indicated by the first signal S1 as the number of pulses Np.

[0084] When counting begins, a reset signal RS is input from the digital control circuit 91 to the measurement unit 30, and the measurement unit 30 is reset by this reset signal RS. Subsequently, when the first signal S1 is input to the measurement unit 30, counting by each frequency divider circuit of the measurement unit 30 begins.

[0085] In Figure 10, the outputs of each frequency divider circuit are shown as Q0 to QN. The numerical value appended to Q is a natural number and corresponds to the bits of the count value. That is, in the example shown in Figure 10, the count value is represented by the (N+1) digits from the value of the first bit Q0 to the value of the (N+1)th bit QN. The value of N is not limited, but it is set to a number sufficient to count the number of pulses Np within the measurement period Tm.

[0086] The number of pulses Np is counted over a period when the first signal S1 is at a high level. After the measurement period Tm has elapsed, when the first signal S1 changes to a low level, the digital control circuit 91 acquires the number of pulses Np from the measurement unit 30 and stores it in the register 22. Once the number of pulses Np is stored in the register 22, it is stored in the non-volatile memory 21. With this configuration, even if the power to the oscillator 1 is turned off, the measured number of pulses Np is retained in the storage unit 20 and can be read out when the power is turned on again.

[0087] The above process is performed for each of the multiple oscillators 1 formed on the wafer substrate 100. That is, the number of pulses Np, which is the measurement result at the same temperature and under the same measurement conditions, is acquired for each oscillator 1 and stored in the register 22 and non-volatile memory 21 of each oscillator 1.

[0088] In step S55, the inspection device 200 determines whether or not measurements have been taken under all measurement conditions. If it is determined in step S55 that measurement has not been completed under all measurement conditions, the process returns to step S53 and repeats the process from step S53 onward. If it is determined that measurement has been completed under all measurement conditions, the process proceeds to step S56.

[0089] With the above configuration, the number of pulses Np corresponding to the frequency of the oscillation signal CLK is measured for each measurement condition. That is, the measurement unit 30 measures the number of pulses Np for each of the measurement conditions C1 to C9 at a predetermined measurement temperature. The digital control circuit 91 then stores the measurement results in predetermined addresses in the register 22 and the non-volatile memory 21. In this embodiment, the addresses where the measurement results for each temperature and measurement condition are stored are predetermined, and the inspection device 200 can obtain measurement results for any temperature and measurement condition by specifying the address to be read.

[0090] In step S56, the inspection device 200 determines whether or not measurements have been taken at all of the predetermined measurement temperatures. If it is determined in step S56 that measurements have not been taken at all of the predetermined measurement temperatures, the process returns to step S52 and the processing from step S52 onward is repeated. If it is determined that measurements have been taken at all of the predetermined measurement temperatures, the process exits the first measurement step S5 and proceeds to the adjustment step S6.

[0091] <Adjustment process> As shown in Figure 8, the adjustment step S6 includes a step S61 for generating compensation data and a step S62 for storing the compensation data. In the adjustment step S6, the frequency of each oscillator 1 is adjusted to a predetermined reference frequency. In this embodiment, the predetermined reference frequency is an example of a first frequency.

[0092] In step S61, the inspection device 200 first acquires the number of pulses Np for each temperature and measurement condition. Since the number of pulses Np for each temperature and measurement condition is stored at a predetermined address in the register 22 of the oscillator 1, the inspection device 200 reads out these pulses Np by specifying the address.

[0093] The digital control circuit 91 of oscillator 1 acquires the number of pulses Np stored at the address to be read and outputs it to the inspection device 200 via the serial interface circuit 94. The read number of pulses Np is stored in a storage medium (not shown) of the inspection device 200, associated with the temperature and measurement conditions. The inspection device 200 acquires the number of pulses Np for all of the multiple oscillators 1, for all temperatures and measurement conditions.

[0094] Next, the inspection device 200 converts the number of pulses Np into frequency. Specifically, the inspection device 200 obtains the frequency by dividing the number of pulses Np by the measurement period Tm. Here again, the inspection device 200 obtains the frequency for all of the multiple oscillators 1 at all temperatures and measurement conditions.

[0095] Next, the inspection device 200 obtains the zeroth to third-order coefficients. Specifically, in this example, the relationship between the frequency of the oscillation signal CLK and the temperature is assumed to be expressed by a third-order equation. Therefore, the inspection device 200 assumes that the frequency F can be expressed as a function of the temperature T as shown in equation (1). F=aT 3 +bT 2 +cT+d···(1) Note that a, b, c, and d are the cubic coefficient, quadratic coefficient, linear coefficient, and zero-degree coefficient, respectively.

[0096] The inspection device 200 obtains a cubic equation that approximates the relationship between frequency and temperature, based on the frequency obtained from the number of pulses Np measured under each measurement condition and the temperature. Figure 12 is a graph plotting the frequencies of temperatures T1 to T4 under measurement condition C1. In the graph shown in Figure 12, the horizontal axis represents temperature and the vertical axis represents frequency. Measurement condition C1 is the temperature characteristic of the frequency of the oscillation signal CLK without correction by the correction circuit 40. Therefore, by using the frequencies for the four temperatures measured under measurement condition C1, a cubic equation can be identified using known approximations, and this can be considered as the temperature characteristic of the frequency of the oscillation signal CLK.

[0097] If we denote the coefficients of the cubic equation obtained by this approximation as a1, b1, c1, and d1, then the cubic equation for frequency F can be expressed as equation (2). F=a1T 3 +b1T 2 +c1T+d1···(2) The solid line shown in Figure 12 represents the result of plotting equation (2) on a graph.

[0098] Under measurement condition C1, the frequency of the oscillation signal CLK has a temperature characteristic as shown in equation (2). Therefore, if the correction circuit 40 can provide the oscillation control circuit 10 with the inverse characteristic of this characteristic, i.e., the characteristic shown in equation (3), then the temperature characteristic of equation (2) can be canceled out. F=-a1T 3 -b1T 2 -c1T-d1···(3)

[0099] The inspection device 200 determines the correction coefficients for performing the cancellation described above. Specifically, the inspection device 200 assumes that -d1 in equation (3), identified based on the measurement results of measurement condition C1, is the zero-order coefficient, -c1 is the first-order coefficient, -b1 is the second-order coefficient, and -a1 is the third-order coefficient. The inspection device 200 obtains the zero-order to third-order coefficients for all of the multiple oscillators 1.

[0100] Next, the inspection device 200 generates 0th-order temperature compensation data to 3rd-order temperature compensation data. Specifically, the inspection device 200 identifies the temperature compensation voltages required to realize each of the 0th-order coefficients to 3rd-order coefficients, and identifies the temperature compensation data required to output these temperature compensation voltages.

[0101] Therefore, the inspection device 200 uses the measurement results from measurement conditions C2 to C9 to determine the temperature compensation voltages required to achieve the 0th to 3rd order coefficients. Specifically, the inspection device 200 uses measurement conditions C2 and C3 to determine the 0th order temperature compensation voltage. The measurement result for measurement condition C2 is the result when the maximum possible voltage output is output in the 0th order voltage generation circuit 40-0, and no correction is performed in the 1st order voltage generation circuits 40-1 to 3rd order voltage generation circuits 40-3. The measurement result for measurement condition C3 is the result when the minimum possible voltage output is output in the 0th order voltage generation circuit 40-0, and no correction is performed in the 1st order voltage generation circuits 40-1 to 3rd order voltage generation circuits 40-3.

[0102] Therefore, by performing an approximation similar to that in equation (3) based on the frequency obtained from the number of pulses, which is the measurement result under measurement condition C2, the correction coefficient dmax can be obtained when the maximum possible voltage output by the zero-order voltage generation circuit 40-0 is output. Also, by performing an approximation similar to that in equation (3) based on the frequency obtained from the number of pulses, which is the measurement result under measurement condition C3, the correction coefficient dmin can be obtained when the minimum possible voltage output by the zero-order voltage generation circuit 40-0 is output.

[0103] These correction coefficients dmax and dmin allow us to determine the range of correction coefficients that can be changed by the zero-order voltage generation circuit 40-0. In other words, the range of correction coefficients that can be changed by the zero-order voltage generation circuit 40-0 is in the range of dmin to dmax.

[0104] The zero-order temperature compensation data is a value within a predetermined range. By changing this zero-order temperature compensation data from the maximum value to the minimum value, the correction coefficient can be changed within the range of dmax to dmin.

[0105] Furthermore, the change in the correction coefficient in response to changes in the zero-order temperature compensation data can be considered to be a linear change. Therefore, by comparing the zero-order coefficient "-d1" with the range of the correction coefficient from dmin to dmax, it is possible to identify the zero-order temperature compensation data necessary to output the zero-order temperature compensation voltage corresponding to the zero-order coefficient "-d1".

[0106] The inspection device 200 performs the same process as described above for the primary to tertiary coefficients. That is, the inspection device 200 identifies the primary temperature compensation data using measurement conditions C4 and C5, identifies the secondary temperature compensation data using measurement conditions C6 and C7, and identifies the tertiary temperature compensation data using measurement conditions C8 and C9.

[0107] In step S62, the inspection device 200 writes the 0th-order temperature compensation data to the 3rd-order temperature compensation data to a predetermined address in the oscillator 1. That is, the inspection device 200 outputs a command to the oscillator 1 to store each temperature compensation data at the predetermined address.

[0108] The digital control circuit 91 acquires the command via the SDA terminal and the serial interface circuit 94, and stores each temperature compensation data at the address indicated by the command. The inspection device 200 performs processes S61 and S62 on all of the oscillators 1 formed on the wafer substrate 100. Through these processes, the frequency of each oscillator 1 is adjusted to a predetermined reference frequency.

[0109] Returning to Figure 5, in step S7, the wafer substrate 100 is separated into individual oscillators 1. Using a scribe device, the wafer substrate 100 is cut along the dividing line DL (see Figure 2A, etc.) to separate it into individual oscillators 1.

[0110] <Second measurement process> In the second measurement step S8, the frequency of the individualized oscillator 1 is measured. In the following description, the frequency of the individualized oscillator 1 measured in the second measurement step S8 will be referred to as the second frequency. As shown in Figure 9, the second measurement step S8 includes the step S81 of applying a load to the oscillator 1 and the step S82 of measuring the frequency of the oscillator 1.

[0111] In step S81, a load test is performed on the oscillator 1. Examples of load tests include PCT (Pressure Cooker Test), HAST (High Accelerated Stress Test), and HTS (High Temperature Storage Test). By performing a load test, defects in the oscillator 1, specifically poor airtightness of the housing space S, can be efficiently identified. Note that the load test step S81 may be omitted.

[0112] In step S82, the frequency (second frequency) of the individualized oscillator 1 is measured. Step S82 is carried out in the same manner as step S54 described above. Step S82 can be carried out at a single measurement temperature, for example, room temperature. In step S82, in order to improve the efficiency of the measurement, multiple oscillators 1 are arranged on a tray 260 (see Figure 1) and the measurement is performed.

[0113] Returning to Figure 5, in step S9, the presence or absence of faults in the individualized oscillator 1 is diagnosed. First, the inspection device 200 reads the number of pulses Np from the register 22 of the oscillator 1 and converts the number of pulses Np into a frequency. The converted frequency is the frequency of the oscillator 1 (second frequency) measured in step S82.

[0114] Next, the converted frequency (second frequency) is compared with the predetermined reference frequency (first frequency) described above, and the presence or absence of a fault is diagnosed based on the magnitude of the difference between the first frequency and the second frequency. In this embodiment, the difference between the frequency of oscillator 1 (second frequency) measured in step S82 and the first frequency, i.e., the predetermined value, is a few ppm of the first frequency.

[0115] The inspection device 200 diagnoses oscillator 1 as faulty if the difference between the frequency (second frequency) and the first frequency measured in process S82 is greater than several ppm of the first frequency, and diagnoses oscillator 1 as good if the difference between the frequency (second frequency) and the first frequency measured in process S82 is within several ppm of the first frequency.

[0116] When the oscillator 1 is separated from the wafer substrate 100, if airtightness defects occur in the housing space S of the oscillator 1, the frequency of the oscillator 1 (second frequency) measured in step S82 will shift by several ppm of the first frequency. Therefore, by setting a predetermined value to several ppm of the first frequency, oscillators 1 that have suffered airtightness defects due to the separation process can be accurately identified.

[0117] As described above, the manufacturing method of the oscillator 1 of this embodiment provides the following advantages. The manufacturing method of the oscillator 1 of this embodiment comprises steps S1 to S4, which are steps to prepare a wafer substrate 100 as a structure comprising a control circuit 2 having a memory unit 20 and a correction circuit 40, a base substrate 5 on which an external terminal 50 as a terminal connected to the control circuit 2 is arranged, a vibrating element 3 arranged corresponding to the control circuit 2 and constituting the oscillator 1 together with the control circuit 2, and a cover 4 that houses the vibrating element 3 together with the base substrate 5; a first measurement step S5 in which a first signal S1 as a signal is supplied to the control circuit 2 via the external terminal 50 to measure the frequency of the oscillator 1; and according to the measured frequency, The process includes: an adjustment step S6, which involves storing temperature compensation data as correction information used in the correction circuit 40 in the storage unit 20 and adjusting the oscillator 1 so that its frequency becomes a first frequency; a step S7, which involves separating the wafer substrate 100 into individual pieces for each oscillator 1, which consists of a vibration element 3, a control circuit 2, and an external terminal 50; a step 82 of the second measurement step S8, which involves supplying a first signal S1 to the control circuit 2 via the external terminal 50 to measure the frequency of the oscillator 1; and a step S9, which involves comparing the frequency of the oscillator 1 (second frequency) measured in step 82 of the second measurement step S8 with the first frequency to diagnose a fault in the oscillator 1.

[0118] As described above, the manufacturing method of the oscillator 1 in this embodiment involves measuring the frequency of the oscillator 1 using the external terminal 50 while the wafer substrate 100 is in its original state, storing correction information in the oscillator 1 to adjust the frequency of the oscillator 1 to the first frequency, then separating the wafer substrate 100 into individual pieces, and again measuring the frequency of the oscillator 1 (second frequency) using the external terminal 50 of the separated oscillator 1. Based on the frequency of the oscillator 1 (second frequency) measured in step 82 of the second measurement step S8 and the first frequency, a fault diagnosis of the oscillator 1 is performed. Therefore, even if an airtight seal defect occurs in the oscillator 1 during the individualization process, the faulty oscillator 1 can be detected with high accuracy.

[0119] In step S9, which is the process for diagnosing a malfunction in the manufacturing method of the oscillator 1 of this embodiment, if the difference between the frequency of the oscillator 1 (second frequency) measured in step 82 of the second measurement step S8 and the first frequency is greater than a predetermined value of several ppm of the first frequency, the oscillator 1 is judged to be malfunctioning. If the difference is within a predetermined value of several ppm of the first frequency, the oscillator 1 is judged to be functioning normally. Therefore, even if an airtight seal defect occurs in the oscillator 1 during the individualization process, the faulty oscillator 1 can be detected with high accuracy.

[0120] In the manufacturing method of the oscillator 1 of this embodiment, the control circuit 2 has a measurement unit 30 as a counter, and when a first signal S1 corresponding to the frequency measurement period Tm is supplied from an external terminal 50, the measurement unit 30 performs a count based on the first signal S1, and the storage unit 20 stores the result of the count.

[0121] Thus, the measurement period Tm is based on the first signal S1 supplied from the external terminal 50. The measurement unit 30 then performs a count based on the first signal S1, and the frequency of the oscillator 1 can be accurately determined by the count result.

[0122] In the first measurement step S5 of the manufacturing method of the oscillator 1 of this embodiment, the frequency of the oscillator 1 is measured at multiple temperatures, and in the adjustment step S6, the correction information is temperature compensation data. Therefore, the manufacturing method of the oscillator 1 in this embodiment can be a suitable manufacturing method for a temperature-compensated crystal oscillator (TCXO).

[0123] In the manufacturing method of the oscillator 1 of this embodiment, the model used in the correction circuit 40 is a polynomial, and the correction information is a correction coefficient used in the polynomial. Therefore, according to the manufacturing method of the oscillator 1 of this embodiment, it is possible to manufacture an oscillator 1 that can perform accurate temperature compensation.

[0124] In the manufacturing method of the oscillator 1 of this embodiment, after the individualization step S7 and before the second measurement step S82, a step S81 is provided in which a load is applied to the oscillator 1. Thus, by performing the process S81 of applying a load to the oscillator 1 before the second measurement process S82, oscillators 1 with defects in the bonding between the base substrate 5 and the cover 4, that is, oscillators 1 in which the housing space S is in an atmospheric state, can be efficiently identified. Therefore, the market quality of oscillators 1 manufactured by the manufacturing method of this embodiment can be improved. In other words, the defect rate of oscillators 1 after sale can be reduced.

[0125] In the manufacturing method of the oscillator 1 of this embodiment, in steps S1 to S4, which are steps for preparing the wafer substrate 100, the external terminals 50 of the master substrate 5 are plated.

[0126] In this way, by plating the external terminal 50, damage to the external terminal 50 can be suppressed even if the probe 230 touches down on the external terminal 50 many times during the first measurement step S5 and the second measurement step S8.

[0127] Although preferred embodiments have been described above, the present invention is not limited to the embodiments described above. The configuration of each part of the present invention can be replaced with any configuration that performs a similar function to the embodiments described above, and any configuration can be added. [Explanation of symbols]

[0128] 1...Oscillator, 2...Control circuit, 3...Vibration element, 4...Lid, 5...Master substrate, 5w...Base substrate, 6...Silicon substrate, 6a...Top surface, 6b...Bottom surface, 7...Semiconductor circuit, 8...Wiring, 81...First wiring, 82...Second wiring, 10...Oscillation control circuit, 11...Bonding member, 20...Memory unit, 21...Non-volatile memory, 22...Register, 30...Measurement unit, 40...Correction circuit, 40-0...0th-order voltage generation circuit, 40-1...1st-order voltage generation circuit, 40-2...2nd-order voltage generation circuit, 40-3...3rd-order voltage generation circuit, 40-n...nth-order voltage generation circuit, 41...Recess, 42...Adding circuit, 50, 51, 52, 53, 54...External terminals, 60...Insulating film, 61...Through hole, 63...Organic resin film, 64...Organic resin film, 70...Element, 71...Laminate, 71p...Electrode pad, 72...Wiring layer, 72p...Electrode pad, 73...Insulating layer, 74...Passivation film, 75...Terminal layer, 76...Contact hole, 91...Digital control circuit, 92...Temperature sensor, 93...Regulator circuit, 94...Serial interface circuit, 95...Output circuit, 100...Wafer substrate, 200...Inspection device, 210...Measurement device, 220...Probe card, 230...Probe, 240...Prober, 250...Computer, 260...Tray, 300...Manufacturing device, C1, C2, C3, C4, C5, C6, C8, C9...Measurement conditions, T1...Temperature, TS1...Terminal.

Claims

1. A step of preparing a structure comprising: a control circuit having a memory unit and a correction circuit; a master board on which terminals connected to the control circuit are arranged; a vibrating element arranged in correspondence with the control circuit and constituting an oscillator together with the control circuit; and a lid that houses the vibrating element together with the master board; A first measurement step involves supplying a signal to the control circuit via the terminal to measure the frequency of the oscillator, The process involves storing correction information used in the correction circuit in the storage unit according to the measured frequency, and adjusting the oscillator so that the frequency becomes the first frequency. For each oscillator consisting of the vibration element, the control circuit, and the terminals, the process of separating the structure into individual pieces, A second measurement step involves supplying the signal to the control circuit via the terminal to measure the frequency of the oscillator, A step of diagnosing a fault in the oscillator by comparing the frequency of the oscillator measured in the second measurement step with the first frequency, A method for manufacturing an oscillator equipped with the following features.

2. In the fault diagnosis step, if the difference between the frequency of the oscillator measured in the second measurement step and the first frequency is greater than a predetermined value, the oscillator is judged to be faulty; if it is within the predetermined value, the oscillator is judged to be normal. A method for manufacturing an oscillator according to claim 1.

3. The control circuit has a counter, and when the signal corresponding to the measurement period of the frequency is supplied from the terminal, the counter performs a count based on the signal, and the storage unit stores the result of the count. A method for manufacturing an oscillator according to claim 1.

4. In the first measurement step, the frequency of the oscillator is measured at multiple temperatures. In the adjustment process described above, the correction information is temperature compensation data. A method for manufacturing an oscillator according to claim 1.

5. The model used in the aforementioned correction circuit is a polynomial, The correction information is the correction coefficient used in the polynomial. A method for manufacturing an oscillator according to claim 1.

6. After the step of separating the components and before the second measurement step, the oscillator is subjected to a load-applying step. A method for manufacturing an oscillator according to claim 1.

7. In the process of preparing the aforementioned structure, the terminals of the base substrate are plated. A method for manufacturing an oscillator according to claim 1.