Semiconductor equipment

Abstract

To provide a semiconductor device with a large memory capacity per unit area. [Solution] In a semiconductor device, each memory cell of a plurality of memory cells has first and second transistors 11 and 12, and a capacitive element 14. The gate of the first transistor of the first memory cell of the plurality of memory cells is connected to one of the source or drain of the second transistor and one of the electrodes of the first capacitive element. The source or drain of the first transistor is connected to one of the source or drain of the first transistor of the second memory cell of the plurality of memory cells. The second transistor has an oxide semiconductor, and the channel length direction of each first transistor and the channel length direction of each second transistor are substantially perpendicular.

Claims

1. The substrate has memory cells on top of it. The memory cell comprises a first transistor, a second transistor, and a capacitive element. The first transistor comprises a cylindrical semiconductor having a height perpendicular to the upper surface of the substrate, and a first conductive layer. The cylindrical semiconductor has a channel-forming region, The first conductive layer has the function of being the gate electrode of the first transistor, one of the electrodes of the capacitive element, and one of the source electrode or drain electrode of the second transistor. The aforementioned second transistor has an oxide semiconductor layer, an insulating layer, and a second conductive layer. The oxide semiconductor layer has a channel formation region, The insulating layer has a region located above the first conductive layer and a region located above the oxide semiconductor layer, and functions as a gate insulating layer for the second transistor. The second conductive layer has a region located above the insulating layer and functions as the gate electrode of the second transistor. The semiconductor device wherein the first conductive layer has a region in contact with the side surface of the oxide semiconductor layer and a region in contact with the top surface.

2. In claim 1, The second transistor has a third conductive layer, The third conductive layer has a region that functions as either a source electrode or a drain electrode, A semiconductor device wherein the third conductive layer has a region in contact with a cylindrical conductor having height in a direction perpendicular to the upper surface of the substrate.

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