Multilayer electronic components
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SAMSUNG ELECTRO MECHANICS CO LTD
- Filing Date
- 2025-08-26
- Publication Date
- 2026-06-16
AI Technical Summary
【0010】 本発明の様々な効果の一つは、積層型電子部品の反り強度が改善されたことである。
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Figure 2026097717000001_ABST
Abstract
Claims
1. A body comprising a dielectric layer and internal electrodes arranged alternately with the dielectric layer in a first direction, including first and second surfaces facing each other in the first direction, third and fourth surfaces connected to the first and second surfaces and facing each other in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing each other in a third direction, The external electrode includes a first electrode layer disposed on the main body and connected to the internal electrode, and a second electrode layer disposed on the first electrode layer, The external electrodes include a first external electrode positioned on the third surface and extending to parts of the first and second surfaces, and a second external electrode positioned on the fourth surface and extending to parts of the first and second surfaces. When each region of the first and second external electrodes that extends and is arranged on a part of the first and second surfaces is considered a band portion, the ratio of the maximum dimension BW of each band portion in the second direction to the average dimension BL of the main body in the second direction (BW / BL) satisfies 14.9% ≤ BW / BL < 50.0%. The band portion includes a first region in which the second electrode layer is arranged to be in contact with the main body, and the average surface roughness Ra1 of the main body in the first region satisfies 0 nm < Ra1 ≤ 158 nm, wherein the multilayer electronic component.
2. Each of the band portions includes a second region in which the first electrode layer is arranged to be in contact with the main body, and the average surface roughness Ra2 of the main body in the second region satisfies 158 nm < Ra2, as described in claim 1.
3. Each band portion includes a third region in which the second electrode layer is arranged in contact with the first electrode layer, and the average surface roughness Ra3 of the first electrode layer in the third region satisfies 0 < Ra3 ≤ 158 nm, as described in claim 1.
4. The stacked electronic component according to claim 1, wherein BW satisfies 850 μm ≤ BW.
5. The stacked electronic component according to claim 1, wherein the first electrode layer comprises a first conductive metal and glass.
6. The stacked electronic component according to claim 1, wherein the second electrode layer comprises a second conductive metal and a resin.
7. The stacked electronic component according to claim 1, wherein the external electrode includes a third electrode layer disposed on the second electrode layer.
8. The stacked electronic component according to claim 1, wherein the average dimension (td) of the dielectric layer in the first direction and the average dimension (te) of the internal electrode in the first direction satisfy 2 × te < td.
9. The stacked electronic component according to claim 1, wherein the average dimension of the stacked electronic component in the second direction is 3.2 mm or more, and the average dimension in the third direction is 1.6 mm or more.