Multilayer ceramic capacitor

Abstract

To provide a multilayer ceramic capacitor with improved moisture resistance reliability. [Solution] The laminate 2 has an inner layer 6 in which a dielectric layer 4 and an internal electrode layer 5 are stacked in the stacking direction T, and an outer layer 7A provided so as to sandwich the inner layer 6 in the stacking direction T, and an outer electrode 3 provided on each of the two end faces and connected to the internal electrode layer 5, wherein the length L1 dimension of the inner layer 6 at the end in the stacking direction T is larger than the length L2 dimension of the inner layer 6 at the center in the stacking direction T, the outer layer 7A has an outer layer projection 71 that protrudes from the inner layer 6 in the length direction L, and in a cross section extending in the length direction L and the stacking direction T, the area near the boundary between the outer layer 7A and the inner layer 6 at the end face is stepped.

Description

Technical Field

[0001] The present invention relates to a multilayer ceramic capacitor.

Background Art

[0002] A multilayer ceramic capacitor is one of the electronic components constituting an electronic device and is one of the most important electronic components. In recent years, in smartphones, automobiles, etc., the diversification of functions has advanced, and the need for improving the quality, particularly the moisture resistance, of multilayer ceramics has been increasing further. However, in a conventional multilayer ceramic capacitor, the external electrode is thick at the central portion in the stacking direction and relatively thin on the outer layer portion side in the stacking direction (see Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] [[ID=3让5]]When the external electrode becomes thin on the outer layer portion side in the stacking direction, the resistance to moisture intrusion from the external electrode surface to the inner layer portion becomes insufficient, and the moisture resistance reliability as a multilayer ceramic capacitor deteriorates.

[0005] An object of the present invention is to provide a multilayer ceramic capacitor with improved moisture resistance reliability.

Means for Solving the Problems

[0006] It should be noted that there is an error in the original text you provided. The text "積層方向の外層部側において外部電極が薄くなると、外部電極表面から内層部への水分侵入に対して耐性が不十分となり、積層セラミックコンデンサとしての耐湿信頼性が悪化する。" contains a wrong character "让" in the translation result. The correct translation should be: "When the external electrode becomes thin on the outer layer portion side in the stacking direction, the resistance to moisture intrusion from the external electrode surface to the inner layer portion becomes insufficient, and the moisture resistance reliability as a multilayer ceramic capacitor deteriorates."To solve the above problems, the present invention provides a multilayer ceramic capacitor comprising: an inner layer portion in which a dielectric layer and an internal electrode layer are stacked in the stacking direction; an outer layer portion provided so as to sandwich the inner layer portion in the stacking direction; a laminate including two main surfaces facing each other in the stacking direction; two side surfaces facing each other in the width direction intersecting the stacking direction; and two end faces facing each other in the length direction intersecting the stacking direction and the width direction; and an outer electrode provided on each of the two end faces and connected to the internal electrode layer, wherein the length dimension L1 at the end of the inner layer portion in the stacking direction is greater than the length dimension L2 at the central part of the inner layer portion in the stacking direction; the outer layer portion has an outer layer projection that protrudes from the inner layer portion in the length direction; and in a cross section extending in the length direction and the stacking direction, the area near the boundary between the outer layer portion and the inner layer portion at the end face is stepped. [Effects of the Invention]

[0007] According to the present invention, it is possible to provide a multilayer ceramic capacitor with improved moisture resistance reliability. [Brief explanation of the drawing]

[0008] [Figure 1] This is a perspective view of a multilayer ceramic capacitor 1 according to an embodiment. [Figure 2] This is a cross-sectional view of the multilayer ceramic capacitor 1 along the line II-II in Figure 1. [Figure 3] This is a cross-sectional view of the multilayer ceramic capacitor 1 along the line III-III in Figure 1. [Figure 4] This is an enlarged view of the upper left part of Figure 2. [Figure 5] This flowchart shows an example of a manufacturing method for a multilayer ceramic capacitor 1 according to an embodiment. [Figure 6] This is a diagram of a comparative configuration of the multilayer ceramic capacitor 100 corresponding to Figure 2. [Figure 7] This table shows the verification results of the effect of multilayer ceramic capacitor 1. [Modes for carrying out the invention]

[0009] Embodiments of the present invention will be described below. Figure 1 is a perspective view of a multilayer ceramic capacitor 1 according to an embodiment. Figure 2 is a cross-sectional view of the multilayer ceramic capacitor 1 along the line II-II in Figure 1. Figure 3 is a cross-sectional view of the multilayer ceramic capacitor 1 along the line III-III in Figure 1.

[0010] The multilayer ceramic capacitor 1 comprises a laminate 2 and a pair of external electrodes 3 provided at both ends of the laminate 2. The laminate 2 also has an inner layer 6 in which dielectric layers 4 and internal electrode layers 5 are alternately stacked.

[0011] In the following description, the orientation of the multilayer ceramic capacitor 1 is expressed as follows: the direction in which the internal electrode layer 5 and the dielectric layer 4 are stacked is referred to as the stacking direction T. The direction intersecting the stacking direction T and on which the pair of external electrodes 3 are provided is referred to as the length direction L. The direction intersecting both the length direction L and the stacking direction T is referred to as the width direction W. In this embodiment, the length direction L, the width direction W, and the stacking direction T are orthogonal to each other.

[0012] The laminate 2 further comprises an outer layer 7A provided so as to sandwich the inner layer 6 in the stacking direction T, and a side gap 7B provided so as to sandwich the inner layer 6 from the width direction W.

[0013] (Laminate 2) The laminate 2 has two main surfaces A opposite to the stacking direction T, two end surfaces C opposite to the length direction L, and two side surfaces B opposite to the width direction W. The two main surfaces A include a first main surface A1 and a second main surface A2, the two end surfaces C include a first end surface C1 and a second end surface C2, and the two side surfaces B include a first side surface B1 and a second side surface B2.

[0014] In this embodiment, the edges R1 between two adjacent faces and the corners between three adjacent faces of the laminate 2 are rounded (R). This helps to suppress chipping at the angular parts of the laminate 2.

[0015] (Inner layer portion 6) In the embodiment, the inner layer portion 6 is the portion from the internal electrode layer 5 closest to the first main surface A1 to the internal electrode layer 5 closest to the second main surface A2. FIG. 4 is an enlarged view of the upper left part of FIG. 2. As shown in FIGS. 2 and 4, the dimension L1 in the length direction L of the inner layer portion 6 on the main surface A side in the stacking direction T is larger than the dimension L2 in the length direction L of the inner layer portion 6 at the central portion in the stacking direction T. It is preferable that L1 is 100.1% or more and 102% or less of L2.

[0016] (Dielectric layer 4) The dielectric layer 4 contains, for example, barium titanate as a main component and contains, for example, Mg and Mn as sub-components, but is not particularly limited thereto.

[0017] (Internal electrode layer 5) The internal electrode layer 5 includes a first internal electrode layer 5A exposed on the first end face C1 and a second internal electrode layer 5B exposed on the second end face C2.

[0018] As shown in FIG. 2, the internal electrode layer 5 includes a facing portion 52 that faces each other between the first internal electrode layer 5A and the second internal electrode layer 5B, and does not face each other between the first internal electrode layer 5A and the second internal electrode layer 5B, and is drawn out from the facing portion 52 to one of the first end face C1 or the second end face C2 side. The direction in which the lead-out portion 51 extends is different between the first internal electrode layer 5A and the second internal electrode layer 5B, and is drawn out alternately to the first end face C1 side and the second end face C2 side. The end of the lead-out portion 51 of the first internal electrode layer 5A is exposed on the first end face C1 and is electrically connected to the first external electrode 3A. The end of the lead-out portion 51 of the second internal electrode layer 5B is exposed on the second end face C2 and is electrically connected to the second external electrode 3B. That is, the dielectric layer 4 provided with the first internal electrode layer 5A exposed on the first end face C1 and the dielectric layer 4 provided with the second internal electrode layer 5B exposed on the second end face C2 are alternately stacked. Then, charges are accumulated between the facing portions 52 of the first internal electrode layer 5A and the second internal electrode layer 5B adjacent to each other in the stacking direction T, and it functions as a capacitor

[0019] (T2 > 2×T1) As shown in FIGS. 2 and 4, in the embodiment, the dimension in the stacking direction T between the opposing portion 52 of the first internal electrode layer 5A and the opposing portion 52 of the second internal electrode layer 5B adjacent to the first internal electrode layer 5A at the center in the length direction L of the laminate 2 is T1, and the dimension in the stacking direction T between the lead-out portion 51 of the first internal electrode layer 5A and the lead-out portion 51 of the first internal electrode layer 5A adjacent to the lead-out portion 51 of the first internal electrode layer 5A on the first end face side in the length direction L of the laminate 2 is T2. When this is the case, T2 > 2×T1.

[0020] (Outer layer portion 7A) The outer layer portion 7A is disposed on the first main surface A1 side and the second main surface A2 side of the inner layer portion 6 so as to sandwich the inner layer portion 6 in the stacking direction T. The main material of the outer layer portion 7A is preferably barium titanate, calcium zirconate, etc., and preferably contains Si, V, Mn, Mg, Ni as additives.

[0021] (Outer layer protruding portion 71) The outer layer portion 7A has an outer layer protruding portion 71 that protrudes in the length direction L more than the inner layer portion 6. The outer layer protruding portion 71 is provided on the inner layer portion 6 side rather than the first main surface A1 or the second main surface A2. In the outer layer protruding portion 71, the portion where the dimension in the length direction L is the largest is defined as the maximum outer layer protruding portion 71A.

[0022] In the cross-section extending in the length direction L and the stacking direction of the stacked ceramic capacitor 1 of the embodiment, the vicinity of the boundary between the outer layer portion 7A and the inner layer portion 6 at the end face C is in a stepped shape. The stepped shape means a shape in which, as shown in FIG. 4, the distance t2 from the inner layer portion 6 in the stacking direction T of the maximum outer layer protruding portion 71A is within 70% of the maximum dimension t1 in the stacking direction T of the outer layer protruding portion 71. In the embodiment, the dimension t1 in the stacking direction T of the outer layer portion 7A is substantially constant except for the portion of the outer layer protruding portion 71.

[0023] The distance in the length direction L from the inner layer portion 6 to the maximum outer layer protruding portion 71A, that is, the protruding amount L4 of the outer layer protruding portion 71, is preferably 1.50 μm or more and 15.00 μm or less, and more preferably 3.00 μm or more and 10.00 μm or less.

[0024] As will be explained in detail later, if the protrusion amount L4 is less than 1.50 μm, the thickness of the external electrode 3 cannot be sufficiently secured, moisture intrusion occurs, and good moisture resistance cannot be obtained. If the protrusion amount L4 is 1.50 μm or more, moisture resistance improves, and if it is 3.00 μm or more, moisture resistance improves further, and good moisture resistance can be obtained.

[0025] When the protrusion amount L4 is 15.00 μm or less, the rate of structural defects between the outer layer 7A and the inner layer 6, caused by residual stress remaining between them during sintering, is within an acceptable range. Furthermore, when the protrusion amount L4 is 10 μm or less, the possibility of structural defects occurring is further reduced.

[0026] Furthermore, the fact that the outer layer protrusion 71 is provided can be rephrased as follows: The maximum dimension L3 of the outer layer 7A in the longitudinal direction L is greater than the maximum dimension L1 of the inner layer 6 in the longitudinal direction L. The inner layer 6 is smaller in the longitudinal direction L than the outer layer 7A. The outer layer 7A extends in the longitudinal direction L beyond the internal electrode layer 5.

[0027] (Side gap section 7B) The side gaps 7B are located on the first side B1 and the second side B2 of the inner layer 6 in the laminate 2, respectively. The side gaps 7B may consist of one layer, or it may consist of two or more layers, including the inner layer closest to the inner layer 6 and the outer layer closest to the side.

[0028] In this embodiment, the side gap portion 7B is manufactured from the same material as the dielectric layer 4, but the material and composition of the side gap portion 7B may differ from those of the dielectric layer 4. The thickness of the side gap is preferably 1 μm or more and 50 μm or less.

[0029] Although not shown in the diagram, the length L dimension of the side gap portion 7B and the inner layer portion 6 are approximately the same, while the outer layer portion 7A protrudes in the length L dimension more than the side gap portion 7B and the inner layer portion 6. In other words, the length L dimension of the outer layer portion 7A is larger than the length L dimension of the inner layer portion 6 and the side gap portion 7B, while the length L dimension of the side gap portion 7B and the inner layer portion 6 are approximately the same. As shown in Figure 3, the edges of the internal electrode layer 5 in the width direction W have little variation in position in the width direction W, and the amount of displacement in the width direction W is between 0.1 μm and 1 μm. Therefore, the electrical characteristics are good.

[0030] (External electrode 3) The external electrode 3 has a first external electrode 3A and a second external electrode 3B and is connected to the internal electrode layer 5. The first external electrode 3A is positioned on the first end face C1 and extends further to the first main surface A1, the second main surface A2, the first side surface B1 and the second side surface B2. The second external electrode 3B is positioned on the second end face C2 and extends further to the first main surface A1, the second main surface A2, the first side surface B1 and the second side surface B2.

[0031] (1st external electrode 3A) The first external electrode 3A comprises a first base electrode layer 30A and a first plating layer 31A. The first base electrode layer 30A is connected to the first internal electrode layer 5A. The first base electrode layer 30A is positioned on the first end face C1 and on the first main surface A1, the second main surface A2, the first side surface B1, and the second side surface B2.

[0032] The first plating layer 31A includes a first Ni plating layer 31Aa disposed on the first underlay electrode layer 30A and a first Sn plating layer 31Ab disposed on the first Ni plating layer 31Aa.

[0033] (Second external electrode 3B) The second external electrode 3B comprises a second base electrode layer 30B and a second plating layer 31B. The second base electrode layer 30B is connected to the second internal electrode layer 5B. The second base electrode layer 30B is positioned on the second end face C2 and on the first main face A1, the second main face A2, the first side surface B1, and the second side surface B2.

[0034] The second plating layer 31B includes a second Ni plating layer 31Ba disposed on the second underlay electrode layer 30B and a second Sn plating layer 31Bb disposed on the second Ni plating layer 31Ba.

[0035] In the following, if it is not necessary to distinguish between the first external electrode 3A and the second external electrode 3B, they will be referred to collectively as external electrode 3. If it is not necessary to distinguish between the first base electrode layer 30A and the second base electrode layer 30B, they will be referred to collectively as base electrode layer 30. If it is not necessary to distinguish between the first plating layer 31A and the second plating layer 31B, they will be referred to collectively as plating layer 31. If it is not necessary to distinguish between the first Ni plating layer 31Aa and the second Ni plating layer 31Ba, they will be referred to collectively as Ni plating layer 31a. If it is not necessary to distinguish between the first Ni plating layer 31Ab and the second Ni plating layer 31Bb, they will be referred to collectively as Ni plating layer 31b.

[0036] (Base electrode layer 30) The base electrode layer 30 has a metal component and a glass component, or a metal component and a ceramic component. In this embodiment, the base electrode layer 30 contains Cu as the metal component. The maximum thickness (length L) of the base electrode layer 30 is, for example, about 5 μm to 40 μm.

[0037] As shown in Figure 2, in a cross-section passing through the length direction L and the stacking direction T at the center of the width direction W, when the thickness of the base electrode layer 30 at the center of the stacking direction T of the inner layer 6 (dimension in the length direction L) is L6 and the thickness of the base electrode layer 30 at the end of the stacking direction T of the inner layer 6 (dimension in the length direction L) is L5, in this embodiment, L5 is preferably 65% ​​to 95% of L6, and more preferably 70% to 90%.

[0038] If the thickness of the base electrode layer 30, L5, is less than 65% of L6, it may not be possible to completely prevent moisture from entering the inner layer 6 from the outer surface of the outer electrode 3. However, if L5 is 65% or more of L6, the outer electrode 3 can have sufficient thickness throughout its entire surface, and moisture can be prevented from entering the inner layer 6 from the outer surface of the outer electrode 3. Furthermore, if L5 is 70% or more of L6, moisture intrusion can be completely prevented.

[0039] Furthermore, if L5 becomes too large relative to L6, the outer layer protrusion L4 becomes too large, which increases the residual stress between the outer layer 7A and the inner layer 6 generated during sintering, potentially leading to structural defects between the outer layer 7A and the inner layer 6. However, when L5 is 95% or less of L6, structural defects between the outer layer 7A and the inner layer 6 may occur, but this is within an acceptable range, and when L5 is 90% or less of L6, the possibility of structural defects occurring is further reduced.

[0040] Based on the above, in the preferred range where L5 is 65% to 95% of L6, both improved moisture resistance and suppression of structural defects can be satisfied, and in the more preferred range where L5 is 70% to 90% of L6, both improved moisture resistance and suppression of structural defects can be satisfied more effectively.

[0041] (Plating layer 31) The Ni plating layer 31a prevents the underlying electrode layer 30 from being corroded by solder when mounting ceramic electronic components. The Sn plating layer 31b improves the wettability of the solder when mounting the multilayer ceramic capacitor 1. Note that the plating layer 31 is not limited to a two-layer structure, but may also be a one-layer structure or a structure of three or more layers.

[0042] (Method for manufacturing a multilayer ceramic capacitor 1) Next, a method for manufacturing the multilayer ceramic capacitor 1 according to the embodiment will be described. Figure 5 is a flowchart showing an example of a method for manufacturing the multilayer ceramic capacitor 1 according to the embodiment.

[0043] (Lamination process S1 of the inner layer) First, a ceramic green sheet for the inner layer is prepared, which is made by forming a ceramic slurry into a sheet. The ceramic slurry contains, for example, barium titanate as the main component, and, for example, Mg and Mn as minor components, as well as organic components of organic compounds. Then, a conductive paste is applied to the ceramic green sheet for the inner layer to create a material sheet on which the pattern of the inner electrode layer 5 is printed. Next, multiple material sheets are stacked so that the pattern of the inner electrode layer 5 is offset by half a pitch in the length direction L between adjacent material sheets.

[0044] (T2 > 2 × T1) In this case, the portion of the internal electrode layer 5 that becomes the opposing portion 52 is continuously stacked in the stacking direction T. On the other hand, in the portion of the internal electrode layer 5 that becomes the drawout portion 51, portions where the internal electrode layer 5 of the inner layer ceramic green sheet exists and portions where the internal electrode layer 5 of the inner layer ceramic green sheet does not exist are stacked alternately. Therefore, the number of stacked internal electrode layers 5 in the stacking direction T of the portion that becomes the drawout portion 51 is half the number of stacked internal electrode layers 5 in the stacking direction T of the portion that becomes the opposing portion 52.

[0045] Therefore, in this embodiment, a paste 4a having the same composition as the inner layer ceramic green sheet is applied to the region of the inner layer ceramic green sheet where the internal electrode layer 5 is not present. As a result, when manufactured as a multilayer ceramic capacitor 1 as shown in Figure 4, the paste 4a can compensate for the thickness difference due to the reduction in the number of internal electrode layers 5 in the area where the lead portion 51 is located, as shown in Figure 4.

[0046] As a result, as described above, when T1 is the dimension in the stacking direction T between the opposing portion 52 of the first internal electrode layer 5A and the opposing portion 52 of the second internal electrode layer 5B adjacent to the first internal electrode layer 5A at the center of the length L of the laminate 2, and T2 is the dimension in the stacking direction T between the pull-out portion 51 of the first internal electrode layer 5A and the pull-out portion 51 of the first internal electrode layer 5A adjacent to the pull-out portion 51 of the first internal electrode layer 5A at the first end face side in the length L of the laminate 2, then T2 > 2 × T1.

[0047] Unlike the embodiment, if paste 4a is not applied and the thickness of the internal electrode layer 5 is not compensated for in areas where the internal electrode layer 5 is absent, the region that becomes the lead portion 51 will have a thinner thickness in the stacking direction T towards the end face C compared to the region that becomes the opposing portion 52, and will curve towards the end face C. If the degree of this curvature is significant, it may degrade the electrical characteristics of the multilayer ceramic capacitor, such as its resistance.

[0048] However, in this embodiment, T2 > 2 × T1, and the region of the lead-out portion 51 is formed so as not to bend as possible, thus reducing the possibility of degrading the electrical characteristics of the multilayer ceramic capacitor, such as its resistance.

[0049] Furthermore, by shaping the area of ​​the pull-out portion 51 so that it does not curve as much as possible, the degree of curvature of the outer layer portion 7A is also reduced. Therefore, it becomes easier to secure the thickness L5 of the base electrode layer 30 at the end of the inner layer portion 6 in the lamination direction T. Thus, due to the presence of the outer layer protrusion portion 71, the stepped shape, and the small degree of curvature at the corners between the length direction L and the lamination direction T in the laminate 2, better moisture resistance reliability can be ensured.

[0050] (Outer layer lamination process S2) A mother block is formed by stacking outer layer ceramic green sheets, which will form the outer layer 7A, on both sides of a stack of material sheets. In this embodiment, the outer layer ceramic green sheet contains barium titanate, calcium zirconate, etc. as main components and Mg, Mn as secondary components, similar to the inner layer ceramic green sheet, and also contains organic components of organic compounds, but is not limited to these. However, the content of the main components in the outer layer ceramic green sheet is greater than the content of the main components in the inner layer ceramic green sheet. The content of organic components in the outer layer ceramic green sheet is less than the content of organic components in the inner layer ceramic green sheet.

[0051] (Pressing process S3) Next, the mother block is pressed to heat-bond each layer. The press may be a rigid press or a hydrostatic press.

[0052] (Cutting process S4) The mother block is cut along the cutting line to manufacture a rectangular stacked chip. At this time, the internal electrode layer 5 is exposed at both ends in the width direction W, and the positions of the ends of the internal electrode layer 5 in the width direction W are aligned.

[0053] (Side gap formation process S5) Next, a ceramic green sheet for the side gap is fabricated using the same material as the ceramic green sheet for the inner layer, but with approximately equal ratios of organic and inorganic components. This ceramic green sheet for the side gap is then attached to both sides of the laminated chip. The laminated chip with the ceramic green sheets attached also has a rectangular parallelepiped shape.

[0054] (1st firing step S6) A laminated chip with a ceramic green sheet for the side gap attached is fired at a predetermined temperature to form a laminate 2. At this time, the ceramic green sheet for the outer layer has a higher inorganic component than the ceramic green sheet for the inner layer. Therefore, the outer layer 7A shrinks less after firing than the inner layer 6, and protrusions 70 are formed on the outer layer 7A that protrude more than the inner layer 6.

[0055] As shown in Figure 3, even in a cross-section passing through the width direction W and the stacking direction T, the outer layer 7A protrudes slightly from the inner layer 6 after sintering. However, since the side gap portion 7B, which is located outside the width direction W of the outer layer 7A, shrinks more than the outer layer 7A, the amount of protrusion of the outer layer 7A is canceled out by the shrinkage of the side gap portion 7B, and the cross-sectional shape of the laminate 2 passing through the width direction W and the stacking direction T remains approximately rectangular.

[0056] (Base electrode layer formation step S7) Next, a dipping method is used to apply a base electrode layer paste containing conductive metal and glass, which will become the external electrodes 3, to the end face C of the laminate 2. The base electrode layer paste is also applied to the first main surface A1, the second main surface A2, the first side surface B1, and the second side surface B2 of the laminate 2. At this time, due to surface tension, the base electrode layer paste 30 does not conform to the abrupt shape changes at the corners of the laminate 2, and as a result, it covers the outer layer protrusions 71 and takes on an overall rounded shape.

[0057] (Second firing process S8) Subsequently, the laminate 2, to which the paste for the base electrode layer has been applied, is fired again at a predetermined temperature. This forms the base electrode layer 30 on the laminate 2.

[0058] (Plating layer formation process S9) Next, a Ni plating layer 31a is formed on the outer periphery of the base electrode layer 30 so as to cover the base electrode layer 30. Then, a Sn plating layer 31b is formed on the outer periphery of the Ni plating layer 31a so as to cover the Ni plating layer 31a.

[0059] The multilayer ceramic capacitor 1 of the embodiment is manufactured through the above process. The multilayer ceramic capacitor 1 of the embodiment has the following advantages.

[0060] (Effects of having the outer layer projection 71) Figure 6 is a diagram of a comparative form of the multilayer ceramic capacitor 100 corresponding to Figure 2. In Figure 6, the same parts as in Figure 2 are denoted by the same reference numerals. Unlike the multilayer ceramic capacitor 1 of the embodiment, the comparative form of the multilayer ceramic capacitor 100 does not have an outer layer projection 71 that protrudes in the longitudinal direction L from the inner layer 6.

[0061] As described above, when applying the base electrode layer paste, the base electrode layer paste does not conform to the abrupt shape changes at the corners of the laminate 2 due to surface tension, and instead becomes rounded at the corners. Consequently, in the comparative configuration, as shown in Figure 5, the thickness L6' of the base electrode layer 30 at the center in the lamination direction T is sufficient, but the thickness L5' of the base electrode layer 30 at the ends of the inner layer 6 in the lamination direction T is considerably thinner compared to the embodiment. Therefore, at the ends of the inner layer 6 in the lamination direction T, the distance from the surface of the outer electrode 3 to the inner electrode layer 5 becomes shorter, making it easier for moisture to penetrate, and good moisture resistance reliability cannot be obtained.

[0062] However, as shown in Figures 2 and 4, in this embodiment, the outer layer portion 7A has an outer layer projection 71 that protrudes in the length direction L from the inner layer portion 6. As a result, the difference between the thickness L6 of the base electrode layer 30 at the center of the stacking direction T in a cross section passing through the length direction L and the stacking direction T at the center of the width direction W, and the thickness L5 of the inner layer portion 6 at the end in the stacking direction T, becomes smaller compared to the comparative embodiment. Therefore, the moisture intrusion path from the surface of the outer electrode 3 to the inner electrode layer 5 is lengthened, making it more difficult for moisture to penetrate, and improving the moisture resistance reliability of the multilayer ceramic capacitor 1.

[0063] (Verification results of the effect of multilayer ceramic capacitor 1) Next, we will describe the results of an experiment conducted to verify the effect of the multilayer ceramic capacitor 1 of the embodiment. Figure 7 is a table showing the verification results of the effect of the multilayer ceramic capacitor 1.

[0064] First, by changing the ratio of inorganic and organic components contained in the outer layer 7A, we fabricated multilayer ceramic capacitors 1 of Examples 1 to 7, in which the protrusion amount L4 of the outer layer protrusion 71 differs, and a comparative example multilayer ceramic capacitor 100 in which the outer layer does not protrude.

[0065] For the comparative example multilayer ceramic capacitor 100, the ratio of organic to inorganic components was made the same so that the shrinkage rate before and after firing was the same for the ceramic green sheet for the inner layer and the ceramic green sheet for the outer layer.

[0066] Both the multilayer ceramic capacitor 1 of the embodiment and the multilayer ceramic capacitor 100 of the comparative embodiment have dimensions of 3.2 mm in the length direction L, 2.5 mm in the width direction W, and 2.5 mm in the stacking direction T.

[0067] (Protrusion amount L4) The multilayer ceramic capacitor was polished from the side to expose a cross-section passing through the length direction L and the stacking direction T at the center of the width direction W. This cross-section was observed using an optical microscope, and the protrusion amount L4, which is the distance in the length direction L between the inner layer 6 and the maximum outer layer protrusion 71A, was measured. The inner layer 6 used as the measurement reference was defined as the portion of the inner layer 6 that is in contact with the outer layer 7A.

[0068] (L5 / L6) Furthermore, the thickness of the base electrode layer 30 at the center of the inner layer 6 in the lamination direction T (dimension L in the length direction) L6, and the thickness of the base electrode layer 30 at the end of the inner layer 6 in the lamination direction T (dimension L in the length direction) L5 were measured. In addition, the ratio of L5 to L6 ((L5 / L6) × 100) was calculated.

[0069] In Example 1, the protrusion amount L4 was 1.50 μm, and the ratio of L5 to L6 was 65%. In Example 2, the protrusion amount L4 was 3.00 μm, and the ratio of L5 to L6 was 70%. In Example 3, the protrusion amount L4 was 5.00 μm, and the ratio of L5 to L6 was 75%. In Example 4, the protrusion amount L4 was 7.00 μm, and the ratio of L5 to L6 was 80%. In Example 5, the protrusion amount L4 was 9.00 μm, and the ratio of L5 to L6 was 85%. In Example 6, the protrusion amount L4 was 10.00 μm, and the ratio of L5 to L6 was 90%. In Example 7, the protrusion amount L4 was 11.00 μm, and the ratio of L5 to L6 was 95%. In Comparative Example 1, the protrusion amount L4 was 0.00 μm, and the ratio of L5 to L6 was 30%.

[0070] (Humidity resistance test (n=72)) (1) These multilayer ceramic capacitors were mounted on a circuit board, and a voltage of 2.5V was applied to the circuit board with the mounted multilayer ceramic capacitors for 2000 hours at a humidity of 85% and a temperature of 85°C. (2) Subsequently, the insulation resistance of these multilayer ceramic capacitors was measured at room temperature, a test voltage of 10V, and an application time of 60s. Multilayer ceramic capacitors with an insulation resistance of 0.114MΩ or less were counted as defective products due to moisture resistance, and the moisture resistance defect rate was calculated.

[0071] As a result, as shown in Figure 7, the moisture resistance failure rate in Comparative Example 1 was 5 / 72. In Example 1, the moisture resistance failure rate was 1 / 72. In Examples 2 to 7, the moisture resistance failure rate was 0 / 72.

[0072] Based on the above, it was verified that Examples 1 to 7, in which the protrusion amount L4 was 1.50 μm or more and the ratio of L5 to L6 was 65% or more, exhibited better moisture resistance compared to Comparative Example 1. Furthermore, it was verified that Examples 2 to 7, in which the protrusion amount L4 was 3.00 μm and the ratio of L5 to L6 was 70% or more, exhibited even better moisture resistance.

[0073] (Internal structural defect test (n=100)) Multilayer ceramic capacitors were polished from the side to expose a cross-section passing through the length direction L and the stacking direction T at the center of the width direction W. The presence or absence of cracks between the inner layer 6 and the outer layer 7A in this cross-section was confirmed using an optical microscope, and the number of samples in which cracks occurred was counted to determine the structural defect occurrence rate.

[0074] As shown in Figure 7, the structural defect rate in Comparative Example 1 was 0 out of 100. The structural defect rate in Examples 1 to 7 was 0 out of 100. In Example 7, the structural defect rate increased slightly, but remained within the acceptable range of 2 out of 100.

[0075] Based on the above, it was verified that the structural defect rate in Examples 1 to 7 was within an acceptable range. Furthermore, it was verified that when the protrusion amount L4 was 15.00 μm, i.e., when L5 was 95% of L6, some structural defects occurred between the outer layer 7A and the inner layer 6 due to residual stress remaining between them during sintering, but this was within an acceptable range. When the protrusion amount L4 was 10 μm or less, i.e., when L5 was 90% or less of L6, the structural defect rate was 0 out of 100 pieces, and it was verified that the possibility of structural defects occurring was further reduced.

[0076] Thus, from the viewpoint of achieving both moisture resistance reliability and structural defect suppression effect, it was verified that the protrusion amount L4 is preferably 1.50 μm or more and 15.00 μm or less (L5 being 65% or more and 95% or less of L6), and more preferable than 3.00 μm or more and 10.00 μm or less (L5 being 70% or more and 90% or less of L6).

[0077] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and various modifications are possible. For example, the main component of the internal dielectric layer, outer layer, or side gap may be calcium zirconate, and the minor components may be other than Mg and Mn. Also, as described above, the side gap portion 7B may be a single layer, or it may be two or more layers including an inner layer closest to the innermost layer 6 and an outer layer closest to the side. Furthermore, the plating layer 31 is not limited to a two-layer structure, but may be a one-layer structure or a structure of three or more layers. [Explanation of Symbols]

[0078] A Main surface B side C end face 1. Multilayer ceramic capacitor 2 Laminate 3 External electrode 4. Dielectric layer 4a Paste 5 Internal electrode layer 6. Inner layer 7A Outer layer 7B Side gap section 30 Base electrode layer 31 Plating layer 51 Drawer section 52 Opposing part 71 Outer layer protrusion 71A Maximum outer layer protrusion 100 Multilayer Ceramic Capacitors

Claims

1. An inner layer in which a dielectric layer and an internal electrode layer are stacked in the stacking direction, The inner layer is sandwiched between outer layers in the stacking direction, Two main surfaces opposite to each other in the stacking direction, Two sides facing each other in the width direction intersecting the stacking direction, A laminate including two end faces that are opposite to each other in the longitudinal direction and intersect the stacking direction and the width direction, The device comprises external electrodes provided on each of the two end faces and connected to the internal electrode layer, The lengthwise dimension L1 at the end of the inner layer in the stacking direction is The inner layer portion is larger than the lengthwise dimension L2 at the center in the stacking direction, The outer layer portion has an outer layer projection that protrudes from the inner layer portion in the longitudinal direction, In the cross-section extending in the longitudinal direction and the stacking direction, the area near the boundary between the outer layer and the inner layer at the end face has a stepped shape. Multilayer ceramic capacitor.

2. The distance L4 in the longitudinal direction from the inner layer to the outer layer projection that protrudes the most in the longitudinal direction is 3 μm or more and 10 μm or less. The multilayer ceramic capacitor according to claim 1.

3. The aforementioned external electrode is It comprises a base electrode disposed on the end face and a plating layer disposed on the outside of the base electrode, In the cross-sections extending in the longitudinal direction and the stacking direction, The lengthwise dimension L5 of the base electrode at the end of the inner layer in the stacking direction is 70% or more and 90% or less of the lengthwise dimension L6 of the base electrode at the center of the inner layer in the stacking direction. The multilayer ceramic capacitor according to claim 1.

4. The two aforementioned end faces are the first end face and the second end face, The internal electrode layer comprises a first internal electrode layer drawn out to the first end face and a second internal electrode layer drawn out to the second end face. The first internal electrode layer has a first opposing portion facing the second internal electrode layer and a first leading portion not facing the second internal electrode layer. The second internal electrode layer has a second opposing portion facing the first internal electrode layer and a second leading portion not facing the first internal electrode layer. The dimension of the dielectric layer between the first internal electrode layer and the second internal electrode layer in the stacking direction at the center of the longitudinal direction of the laminate is T1. When the dimension in the stacking direction between adjacent first extension portions on the first end face is T2, then T2 > 2 × T1. The multilayer ceramic capacitor according to claim 1.

5. The laminate has side gaps arranged to sandwich the inner layer and the outer layer in the width direction, and the outer layer protrudes more than the side gaps in the length direction. The multilayer ceramic capacitor according to claim 1.

6. The outer layer projection is provided on the side of the inner layer that is closer to the main surface than the stacking direction. The multilayer ceramic capacitor according to claim 1.

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