Semiconductor equipment

The laminated structure with a metal oxide film and insulating film addresses charge trapping issues in oxide semiconductor transistors, ensuring stable electrical characteristics and enhanced reliability by trapping charges away from the oxide semiconductor interface.

JP2026097881APending Publication Date: 2026-06-16SEMICON ENERGY LAB CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
SEMICON ENERGY LAB CO LTD
Filing Date
2026-02-24
Publication Date
2026-06-16

AI Technical Summary

Technical Problem

Transistors using oxide semiconductors face issues with charge trapping at the interface between the active layer and the interface stabilization layer, leading to unreliable electrical characteristics and fluctuations in threshold voltage.

Method used

A laminated structure is introduced where a metal oxide film, composed of the same components as the oxide semiconductor film, is interposed between the insulating films to trap charges at the interface, preventing them from accumulating at the oxide semiconductor film, and an insulating film is used to trap charges at the interface with the metal oxide film, thereby maintaining a stable electrical state.

Benefits of technology

This structure effectively suppresses charge trapping, leading to stable electrical properties and improved reliability of semiconductor devices by preventing malfunctions and maintaining consistent transistor performance.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention provides stable electrical properties to semiconductor devices using oxide semiconductors, thereby increasing their reliability. [Solution] In a transistor 310 including an oxide semiconductor film, metal oxide films 407 and 404, which have the same components as the oxide semiconductor film, are laminated on the upper and lower surfaces of the oxide semiconductor film 403. Furthermore, insulating films 409 and 402, which have different components from the metal oxide film and the oxide semiconductor film, are provided in contact with the surface of the metal oxide film that is in contact with the oxide semiconductor film. In addition, the oxide semiconductor film 403 used in the active layer of the transistor is purified and electrically made i-type (intrinsic) by heat treatment, which removes impurities such as hydrogen, water, hydroxyl groups or hydrides from the oxide semiconductor, and by supplying oxygen, which is the main component material constituting the oxide semiconductor that is simultaneously reduced by the impurity removal process.
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Description

[Technical Field]

[0001] This invention relates to semiconductor devices and methods for manufacturing semiconductor devices.

[0002] In this specification, a semiconductor device refers to a device that can function by utilizing semiconductor properties. This term encompasses a wide range of electronic devices, including electro-optical devices, semiconductor circuits, and electronic equipment. [Background technology]

[0003] A technology for constructing transistors using semiconductor thin films formed on a substrate having an insulating surface. It is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (display devices), etc. It is widely applied in electronic devices. Silicon is used as a semiconductor thin film applicable to transistors. While condensate semiconductor materials are widely known, oxide semiconductors are attracting attention as another material. Yes, they are.

[0004] For example, as the active layer of a transistor, the electron carrier concentration is 10 18 / cm 3 Less than Amorphous oxide containing indium (In), gallium (Ga), and zinc (Zn) is used. A transistor is disclosed (see Patent Document 1).

[0005] Transistors using oxide semiconductors are more efficient than transistors using amorphous silicon. Although it has a fast operating speed and is easier to manufacture than transistors using polycrystalline silicon, However, it is known that its electrical characteristics are prone to fluctuation and its reliability is low. For example, optical BT The threshold voltage of the transistor fluctuates before and after testing. In contrast to this, the patent References 2 and 3 describe the threshold voltage shift of a transistor using an oxide semiconductor. To suppress this, an interface is provided on at least one surface of the upper or lower surface of the oxide semiconductor layer. A technique for preventing charge trapping at the interface of an oxide semiconductor layer using a stabilizing layer is disclosed. It is. [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2006-165528 [Patent Document 2] Japanese Patent Publication No. 2010-16347 [Patent Document 3] Japanese Patent Publication No. 2010-16348 [Overview of the project] [Problems that the invention aims to solve]

[0007] However, the transistors disclosed in Patent Document 2 or Patent Document 3 have an interface stabilization layer. Therefore, a layer having the same properties as the gate insulating layer and the protective layer is used, and the state of the interface with the active layer Because the state cannot be maintained properly, charge trapping occurs at the interface between the active layer and the interface stabilization layer. It is difficult to suppress the rupture. In particular, the interface stabilization layer and the active layer have equivalent band gaps. If present, charge accumulation can easily occur.

[0008] Therefore, it cannot be said that transistors using oxide semiconductors are yet sufficiently reliable. I can't say.

[0009] In light of these problems, we aim to provide stable electrical properties to semiconductor devices using oxide semiconductors. One of the objectives is to improve reliability. [Means for solving the problem]

[0010] One aspect of the disclosed invention is that an insulating film such as a gate insulating film or a protective insulating film and an oxide semiconductor film do not directly contact each other, and between them, a metal oxide film exists in contact with them, and the metal oxide film is made of the same components as the oxide semiconductor film, which is the technical idea . That is, one aspect of the disclosed invention is a structure in which an insulating film made of components different from those of the metal oxide film and the oxide semiconductor film, the metal oxide film, and the oxide semiconductor film are laminated . Here, "the same components as the oxide semiconductor film" means containing one or more metal elements selected from the constituent elements of the oxide semiconductor film .

[0011] By having such a laminated structure, it is possible to sufficiently suppress charges such as those generated due to the operation of the semiconductor device from being trapped at the interface between the above-mentioned insulating film and the oxide semiconductor film . This effect is achieved by arranging a metal oxide film composed of a material compatible with the oxide semiconductor film in contact with the oxide semiconductor film, so that charges that may be generated due to the operation of the semiconductor device are suppressed from being trapped at the interface between the oxide semiconductor film and the metal oxide film, and further, by arranging an insulating film composed of a material that can form a charge trapping center at the interface in contact with the metal oxide film , it is possible to trap the above-mentioned charges at the interface between the metal oxide film and the insulating film, which is due to a mechanism . That is, only with the metal oxide film, it becomes difficult to suppress the trapping of charges at the interface with the oxide semiconductor film in a situation where a large amount of charges are generated. By providing an insulating film in contact with the metal oxide film , charges are preferentially trapped at the interface between the metal oxide film and the insulating film, and acid

[0012] This makes it possible to suppress charge trapping at the interface between the oxide semiconductor film and the metal oxide film. Thus, the effect of one aspect of the disclosed invention is that the insulating film, the metal oxide film, and the oxidation This is due to a structure in which a material semiconductor film and an oxide semiconductor film are stacked, and the metal oxide film and oxide semiconductor film are stacked. It can be said that this is a different kind of effect from the layered structure of body membranes.

[0013] Furthermore, it suppresses charge trapping at the interface of the oxide semiconductor film, and the charge trapping centers are located in the oxide semiconductor film. The aforementioned effect of keeping the conductive film away from the semiconductor device suppresses malfunctions in the semiconductor device. This allows us to control and improve the reliability of semiconductor devices.

[0014] Furthermore, based on the mechanism described above, it is desirable that the metal oxide film has sufficient thickness. When the metal oxide film is thin, the effect of charges trapped at the interface between the metal oxide film and the insulating film is This is because it can become larger. For example, metal oxide films are thicker than oxide semiconductor films. It is preferable to do so.

[0015] Furthermore, the insulating metal oxide film is used with the source electrode and drain electrode and the oxide semiconductor film. Since it is formed in a manner that does not interfere with the connection, the source electrode or drain electrode and the oxide semiconductor Compared to the case where a metal oxide film is present between the body membrane and the surface, this prevents an increase in resistance. This can suppress the degradation of the transistor's electrical characteristics.

[0016] Furthermore, in the thin-film formation process of oxide semiconductors, the stoichiometric composition may be affected by factors such as an excess or deficiency of oxygen. If there is a misalignment of these components, or if hydrogen or water that forms electron donors is mixed in, the electrical conductivity will change. It changes. This phenomenon is electrical for transistors using oxide semiconductors. These are factors that cause variations in properties. Therefore, hydrogen, water, hydroxyl groups, or hydrides (hydrogen compounds and Impurities such as (also known as) are intentionally removed from oxide semiconductors, and the impurity removal process... At the same time, the supply of oxygen, which is the main component material that makes up oxide semiconductors, decreases. Therefore, the oxide semiconductor film is made highly pure and electrically i-type (intrinsic).

[0017] Type i (intrinsic) oxide semiconductors are created by removing hydrogen, an n-type impurity, from an oxide semiconductor, and then acid... By purifying the semiconductor to a high degree so that it contains as few impurities as possible other than the main component of the semiconductor, type i ( This refers to an intrinsic oxide semiconductor, or an oxide semiconductor that is very close to type i (intrinsic). ru.

[0018] Furthermore, in the process of converting the oxide semiconductor film to type i, gold, which has the same components as the oxide semiconductor film, It is also possible to simultaneously convert the group oxide film to type i. In one embodiment of the disclosed invention, oxidation The metal oxide films provided on the upper and lower surfaces of the semiconductor film are free from impurities such as water and hydrogen. It is desirable that the metal oxide film be reduced in size and electrically i-typed.

[0019] Transistors with highly purified oxide semiconductor films have threshold voltage and on-current, etc. The electrical characteristics show almost no temperature dependence. Furthermore, the transistor characteristics are not affected by photodegradation. The fluctuations are minimal.

[0020] A semiconductor device according to one aspect of the present invention includes a gate electrode, a gate insulating film covering the gate electrode, and a gate A first metal oxide film is provided in contact with the insulating film, and a gate is in contact with the first metal oxide film. An oxide semiconductor film is provided in the region overlapping with the electrode, and the source electrode is in contact with the oxide semiconductor film. and drain electrode, second metal oxide film in contact with oxide semiconductor film, and second metal oxide A semiconductor device having an insulating film covering a film.

[0021] Furthermore, in the semiconductor device described above, the second metal oxide film is the source electrode and the drain electrode. Preferably, it covers and is provided in contact with the first metal oxide film, and the oxide semiconductor film is the It is more preferable that it is surrounded by a metal oxide film 1 and a second metal oxide film.

[0022] Furthermore, in the semiconductor device described above, at least a portion of the upper surface of the oxide semiconductor film is a source electric The electrode and drain electrode may be in contact with each other, in which case the channel of the oxide semiconductor film Even if the longitudinal side edge and the longitudinal side edge of the first metal oxide film coincide, good.

[0023] Alternatively, in the semiconductor device described above, at least one of the upper surfaces of the source electrode and the drain electrode The part may be in contact with the oxide semiconductor film, and in this case, the channel of the oxide semiconductor film The side edge in the channel length direction and the side edge in the channel length direction of the second metal oxide film coincide. That's good too.

[0024] Furthermore, in any of the above semiconductor devices, the first metal oxide film and the second metal oxide The film is preferably composed of the constituent elements of an oxide semiconductor film.

[0025] Furthermore, in any of the above semiconductor devices, the first metal oxide film and the second metal oxide The energy gap of the film is preferably larger than the energy gap of the oxide semiconductor film. stomach.

[0026] Furthermore, in any of the above semiconductor devices, the first metal oxide film and the second metal oxide The energy at the lower end of the conduction band of the film is higher than the energy at the lower end of the conduction band of the oxide semiconductor film. It is preferable to do so.

[0027] Furthermore, in any of the above semiconductor devices, the first metal oxide film and the second metal oxide The film is preferably composed of gallium oxide, and the constituent elements of the first metal oxide film are It is more preferable that the ratio and the ratio of the constituent elements of the second metal oxide film are equal.

[0028] Furthermore, any of the above semiconductor devices may have a conductive film on the oxide film. .

[0029] Furthermore, the transistor is determined by the distance between the source electrode and the drain electrode as described above. The channel length L is between 10 nm and 10 μm, for example, 0.1 μm to 0.5 μm. This is possible. Of course, the channel length L may be 1 μm or more. Also, the channel The filament width W can also be set to 10 nm or more. [Effects of the Invention]

[0030] One embodiment of the present invention makes it possible to fabricate a transistor having stable electrical characteristics.

[0031] Furthermore, one embodiment of the present invention is a semiconductor device having a transistor with good electrical characteristics and high reliability. A structure can be created. [Brief explanation of the drawing]

[0032] [Figure 1] A plan view and a cross-sectional view showing one embodiment of a semiconductor device. [Figure 2] Band diagrams for transistors having oxide semiconductor films and metal oxide films. [Figure 3] A diagram showing one aspect of a semiconductor device. [Figure 4] A diagram illustrating an example of the manufacturing process for a semiconductor device. [Figure 5] A diagram illustrating an example of the manufacturing process for a semiconductor device. [Figure 6] A diagram illustrating one form of semiconductor device. [Figure 7] A diagram illustrating one form of semiconductor device. [Figure 8] A diagram illustrating one form of semiconductor device. [Figure 9] A diagram illustrating one form of semiconductor device. [Figure 10] A diagram showing electronic equipment. [Modes for carrying out the invention]

[0033] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is... Not limited to the following description, the form and details can be modified in various ways, as any person skilled in the art would know. It is easily understood. Furthermore, the present invention shall be interpreted as being limited to the contents of the embodiments described below. It is not something that can be done.

[0034] The ordinal numbers "1st" and "2nd" are used for convenience only and do not necessarily indicate the order of processes or stacking. This does not indicate that. Furthermore, in this specification, the proper nouns used to specify the invention are not used to indicate that. This does not indicate a title.

[0035] (Embodiment 1) In this embodiment, one form of semiconductor device and a method for manufacturing a semiconductor device is shown using Figures 1 to 5. I will explain.

[0036] <Example of semiconductor device configuration> Figure 1 shows a cross-sectional view and a plan view of a bottom-gate type transistor as an example of a semiconductor device. Figure 1(A) is a plan view, and Figures 1(B) and 1(C) are A- in Figure 1(A). These are cross-sectional views relating to sections B and CD. Note that in Figure 1(A), to avoid complexity, Therefore, a part of the components of transistor 310 (for example, the second metal oxide film 407) The "do)" is omitted.

[0037] The transistor 310 shown in Figure 1 has a gate electrode 401 on a substrate 400 having an insulating surface. , gate insulating film 402, first metal oxide film 404, oxide semiconductor film 403, source electrode Includes 405a, drain electrode 405b, second metal oxide film 407, and insulating film 409 .

[0038] In the transistor 310 shown in Figure 1, the second metal oxide film 407 is located on the source electrode 40 5a and drain electrode 405b are covered, and the first metal oxide film 404 and oxide semiconductor are covered. It is provided in contact with the film 403. Also, as shown in Figures 1(B) and 1(C), the second The metal oxide film 407 and the first metal oxide film 404 are separated by an oxide semiconductor film 403. They are in contact in a region where there is no contact. In other words, the oxide semiconductor film 403 is in contact with the first metal oxide film 4 It is provided surrounded by 04 and the second metal oxide film 407.

[0039] Here, the first metal oxide film 404 and the second metal oxide film 407 have an oxide semiconductor film 4 It is desirable to use an oxide with the same components as 03. Specifically, the structure of the oxide semiconductor film It is preferable to use a film containing an oxide of one or more metallic elements selected from the constituent elements. Such materials have good compatibility with the oxide semiconductor film 403, and this is used with the first metal oxide film 40 By using it in 4 or the second metal oxide film 407, the interface with the oxide semiconductor film is improved. This is because it can be maintained. In other words, the above material can be used as the first metal oxide film 404 or the second By using it in the metal oxide film 407, the interface between the oxide semiconductor film and the metal oxide film in contact with it (Here, the interface between the first metal oxide film 404 and the oxide semiconductor film 403, or the second Suppresses charge trapping at the interface between the metal oxide film 407 and the oxide semiconductor film 403. It is possible.

[0040] Furthermore, the first metal oxide film 404 and the second metal oxide film 407 are both oxide semiconductor films. Since it is a film made of the same components as 403, in regions where the oxide semiconductor film 403 does not exist When a configuration is used in which they come into contact, the adhesion can be improved. Also, the first metal oxide The ratio of the constituent elements of the material film 404 is equal to the ratio of the constituent elements of the second metal oxide film 407. That would be preferable.

[0041] Furthermore, since the oxide semiconductor film 403 is used as the active layer, the first metal oxide film 404 and The energy gap of the second metal oxide film 407 is equal to the energy of the oxide semiconductor film 403. It is required to be larger than the gap. Also, the first metal oxide film 404 and the oxide semiconductor Between the films 403, or between the second metal oxide film 407 and the oxide semiconductor film 403, At the very least, carriers should not leak out of the oxide semiconductor film 403 at room temperature (20°C). The formation of an energy barrier of a certain degree is required. For example, the first metal oxide film 404 or the second The energy between the lower end of the conduction band of the metal oxide film 407 and the lower end of the conduction band of the oxide semiconductor film 403 Energy difference, or the valence of the first metal oxide film 404 or the second metal oxide film 407 The energy difference between the upper end of the sub-band and the upper end of the valence band of the oxide semiconductor film 403 is less than 0.5 eV. It is desirable for the voltage to be above 0.7 eV, and even more desirable if it is above 0.7 eV. Also, below 1.5 eV. It would be desirable to have it.

[0042] Specifically, for example, when using an In-Ga-Zn-O based material for the oxide semiconductor film 403... In combination, a material containing gallium oxide is used to form the first metal oxide film 404 and the second metal oxide film. A gallium oxide film 407 should be formed. Note that gallium oxide and In-Ga-Zn-O based materials are used. When contact is made, the energy barrier is approximately 0.8 eV on the conduction band side and approximately 0 eV on the valence band side. The value becomes 0.9eV.

[0043] Gallium oxide is also written as GaOx, and it is formed when oxygen is in excess of the stoichiometric ratio. It is preferable to set a value for x. For example, it is preferable to set the value of x to be between 1.4 and 2.0. Furthermore, it is more preferable to set the value of x to between 1.5 and 1.8. However, the gallium oxide film Among them are group 3 elements such as yttrium, group 4 elements such as hafnium, and group 1 elements such as aluminum. This involves including impurity elements other than hydrogen, such as Group 3 elements, Group 14 elements like silicon, and nitrogen. Therefore, the energy gap of gallium oxide can be widened to improve its insulating properties. The energy gap of a gallium oxide film without the aforementioned impurities is 4.9 eV, but the impurities mentioned above are present. For example, by including more than 0% but less than 20 atomic percent, the energy gap can be reduced to 6 eV. It can be enlarged to a certain extent.

[0044] Furthermore, from the perspective of reducing the sources of charge generation and trapping centers, hydrogen in metal oxide films It is desirable that impurities such as water are sufficiently reduced. This concept is based on oxide semiconductors. This approach shares common ground with the idea of ​​reducing impurities in body membranes.

[0045] Furthermore, the gate insulating film 402 and insulating film 409 have a first metal oxide film 404 and a second metal A material in which charge trapping centers can be formed at the interface when brought into contact with the oxide film 407. It is preferable to use such a material. Such a material is used for the gate insulating film 402 and insulating film 409. As a result, the charge is at the interface between the gate insulating film 402 and the first metal oxide film 404, or the insulating film. Because it is trapped at the interface between film 409 and the second metal oxide film 407, the first metal oxide film 4 Charge trapping at the interface between 04 and the oxide semiconductor film 403, or with the second metal oxide film 407 This makes it possible to sufficiently suppress charge trapping at the interface of the oxide semiconductor film 403.

[0046] Specifically, the gate insulating film 402 and insulating film 409 contain silicon oxide, silicon nitride, and acid Aluminum oxide, aluminum nitride, and mixtures thereof are used in single layers or in laminates. It is sufficient if there is a gallium oxide in the first metal oxide film 404 or the second metal oxide film 407. When using materials containing um, the gate insulating film 402 and insulating film 409 contain silicone oxide. It is preferable to use materials such as silicon nitride. Also, the first metal oxide film 404 and the second Due to the relationship with the metal oxide film 407, the energy of the gate insulating film 402 and insulating film 409 The gap is the energy gap between the first metal oxide film 404 and the second metal oxide film 407. It is preferable that it be larger than P.

[0047] Furthermore, at the interface between the gate insulating film 402 and the first metal oxide film 404, or the insulating film 409 If a charge trapping center can be formed at the interface between the first and second metal oxide film 407 However, the materials for the gate insulating film 402 and insulating film 409 do not need to be limited to those mentioned above. , the interface between the gate insulating film 402 and the first metal oxide film 404, or the insulating film 409 and the A treatment may be performed to form charge trapping centers at the interface between the metal oxide film 407 and the 2. Examples of such processes include plasma treatment and elemental doping (such as ion implantation). be.

[0048] An additional insulator may be provided on transistor 310. Also, source electrode 4 In order to electrically connect 05a and the drain electrode 405b to the wiring, the gate insulating film 40 2. The first metal oxide film 404, the second metal oxide film 407, the insulating film 409, etc., have openings. A mouth may be formed. Also, above the oxide semiconductor film 403, a second gate may be formed. It may also have an electrode. Furthermore, the oxide semiconductor film 403 may be processed in an island-like manner. While desirable, it is not necessary for them to be processed into island shapes.

[0049] Figure 2 shows the transistor 310 described above, that is, the gate insulating film I1 from the gate electrode GE side. , first metal oxide film MO1, oxide semiconductor film OS, second metal oxide film MO2 and insulation This is a schematic diagram of the energy bands in a structure with bonded film I2. Figure 2 shows the insulating bands. Assuming an ideal situation where the film, metal oxide film, and oxide semiconductor film are all intrinsic, , as gate insulating film I1 and insulating film I2, silicon oxide (band gap Eg 8eV~9 (eV) is used as the first metal oxide film MO1 and the second metal oxide film MO2, respectively, and gallium oxide is used. (Band gap Eg 4.9eV) is used as the oxide semiconductor film OS, In-Ga-Zn-O This shows the case using a non-single-crystal film (band gap Eg 3.15 eV). Oh, the energy difference between the vacuum level and the lower end of the conduction band of silicon oxide is 0.95 eV, The energy difference between the vacuum level and the lower end of the conduction band of gallium is 3.5 eV, and In-Ga-Z The energy difference between the vacuum level and the lower end of the conduction band in an nO-based non-single crystal film is 4.3 eV.

[0050] As shown in Figure 2, the gate electrode GE side (channel side) of the oxide semiconductor film OS has an oxide Energy barriers of approximately 0.8 eV and 0.95 eV exist at the interface between the semiconductor and the metal oxide. Similarly, on the back channel side (opposite the gate electrode GE) of the oxide semiconductor film OS Also, at the interface between the oxide semiconductor and the metal oxide, there are energies of approximately 0.8 eV and approximately 0.95 eV. A barrier exists. Such an energy barrier exists at the interface between an oxide semiconductor and a metal oxide. Because the presence of a wall hinders the movement of carriers at that interface, carriers It moves within the oxide semiconductor without moving from the oxide semiconductor to the metal oxide. (See Figure 2) As shown, the oxide semiconductor film OS, the metal oxide film, and the insulating film are oxidized by the oxide semiconductor film. Materials with a band gap that increases in steps compared to semiconductors (insulators compared to metal oxide films) When the band gap is larger, such beneficial results are obtained when the band gap is sandwiched between the band gaps. It can be obtained.

[0051] Figures 3(A) through 3(G) show examples of transistor configurations different from those shown in Figure 1.

[0052] The transistor 320 shown in Figure 3(A) has a gate electrode 401 and a gate insulating plate on the substrate 400. Edge film 402, first metal oxide film 404, oxide semiconductor film 403, source electrode 405a, Figure 1 shows the drain electrode 405b, the second metal oxide film 407, and the insulating film 409. It is the same as transistor 310 shown. Transistor 320 shown in Figure 3(A) and Figure 1 The difference from the transistor 310 shown is that the source electrode 405a and drain electrode 405b This is the position where the oxide semiconductor film 403 and the transistor 310 are connected. After forming the oxide semiconductor film 403, the source electrode 405a and drain electrode 405b are formed. As a result, at least a portion of the upper surface of the oxide semiconductor film 403 is made of the source electrode 405a and While the drain electrode 405b is in contact with the source electrode 40, the transistor 320 is in contact with the source electrode 40 After forming 5a and the drain electrode 405b, the oxide semiconductor film 403 is formed, Even if not, a portion of the upper surface of the source electrode 405a and the drain electrode 405b is an oxide semiconductor film. It is in contact with 403. The other components are the same as in Figure 1. For details, see Figure 1. You can refer to the relevant information.

[0053] The transistor 330 shown in Figure 3(B) has a gate electrode 401 and a gate insulating plate on the substrate 400. Edge film 402, first metal oxide film 404, oxide semiconductor film 403, source electrode 405a, Figure 1 shows the drain electrode 405b, the second metal oxide film 407, and the insulating film 409. This is common to transistor 310 shown. In transistor 330 shown in Figure 3(B) In that the first metal oxide film 404 is processed in an island-like manner, the transient shown in Figure 1 It differs from the Ta310.

[0054] In transistor 330, the second metal oxide film 407 is located between the source electrode 405a and the Covering the rain electrode 405b and in contact with the oxide semiconductor film 403 and the gate insulating film 402 It is provided. The other components are the same as in Figure 1. For details, see Figure 1. The relevant information can be taken into consideration.

[0055] The transistor 340 shown in Figure 3(C) has a second metal oxide film 407 that is processed in an island shape. In this respect, it differs from transistor 320 shown in Figure 3(A), and other components... The same applies as in Figure 3(A). In transistor 340, the second metal oxide film 4 07 is provided in contact with the oxide semiconductor film 403.

[0056] The transistors 350, 360, 370, and 380 shown in Figures 3(D) to 3(G) are as described above. For the configuration of transistors 310, 320, 330, and 340, the insulating film 40 is used for each. A conductive film 410 is placed on the region that overlaps with the channel formation region of the oxide semiconductor film 403. This is the configuration provided. For other components, see Figure 1 or Figures 3(A) to 3(C). It is similar to that.

[0057] <Example of the transistor manufacturing process> The following describes the transistor fabrication process shown in Figure 1 or Figure 3(A), using Figure 4 or Figure 5. Let me explain with an example.

[0058] <Manufacturing process for transistor 310> Using Figures 4(A) to 4(E), an example of the manufacturing process for the transistor 310 shown in Figure 1 is described below. I will explain about this.

[0059] First, a conductive film is formed on a substrate 400 having an insulating surface, and then a first photolithography is performed. The gate electrode 401 is formed by the process. The resist mask is shaped by the inkjet method. It may be done. If the resist mask is formed by the inkjet method, a photomask is not used. Therefore, manufacturing costs can be reduced.

[0060] There are no major restrictions on the substrates that can be used for the substrate 400 having an insulating surface, however In both cases, it is necessary that the material has sufficient heat resistance to withstand subsequent heat treatment. For example, Substrates such as lath substrates, ceramic substrates, quartz substrates, and sapphire substrates can be used. Furthermore, if it has an insulating surface, it can be a single-crystal semiconductor substrate such as silicon or silicon carbide, multi Crystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, and SOI substrates are used. It is also possible to do so, and semiconductor elements may be provided on these substrates.

[0061] Furthermore, a flexible substrate may be used as the substrate 400. When using a flexible substrate, The transistor containing the oxide semiconductor film 403 may be directly fabricated on the substrate, or other fabrication substrates may be used. A transistor containing an oxide semiconductor film 403 was fabricated on a plate, and then peeled off and transferred to a flexible substrate. This may be done. In addition, in order to peel and transfer from the fabricated substrate to the flexible substrate, the fabricated substrate and the oxide may be used. It is preferable to provide a delamination layer between the transistor containing the semiconductor film 403 and the film itself.

[0062] An insulating film that serves as the base film may be provided between the substrate 400 and the gate electrode 401. The base film is It has the function of preventing the diffusion of impurity elements from the substrate 400, silicon nitride film, silicon oxide One or more films selected from silicon film, silicon nitride film, or silicon oxide film It can be formed by a laminated structure.

[0063] Furthermore, the gate electrode 401 is made of molybdenum, titanium, tantalum, tungsten, and aluminum. Metal materials such as copper, neodymium, scandium, or alloy materials mainly composed of these materials are used. They can be formed as a single layer or by lamination.

[0064] Next, a gate insulating film 402 is formed on the gate electrode 401 (Figure 4(A)). The edge film 402 is brought into contact with the first metal oxide film 404, thereby generating an electric charge at its interface. It is desirable to use a material in which trapping centers can be formed. Such a material is used for the gate insulating film 4 By using 02, the charge is transferred to the interface between the gate insulating film 402 and the first metal oxide film 404. Charge trapping occurs at the interface between the first metal oxide film 404 and the oxide semiconductor film 403. This will allow for sufficient suppression.

[0065] Specifically, the gate insulating film 402 can be a silicon oxide film, a silicon nitride film, or a silicon nitride film. Silicon film, silicon nitride film, aluminum oxide film, aluminum nitride film, nitrided oxide film Aluminum film, aluminum nitride film, or hafnium oxide film, etc., in a single layer or stacked It can be formed in layers, and the oxide semiconductor film 403 or the first metal oxide film 404 is different from The film will consist of different components. In the subsequent heat treatment process for the oxide semiconductor film 403, In order to efficiently remove impurities such as hydrogen and moisture from the first metal oxide film 404, It is preferable that the first metal oxide film 402 be a silicon oxide film. Due to its contact with 4, the energy gap of the gate insulating film 402 is the same as that of the first metal oxide film 4 It is desirable that the energy gap be larger than that of O4.

[0066] Furthermore, a charge trapping center is formed at the interface between the gate insulating film 402 and the first metal oxide film 404. If possible, then it is not necessary to limit the material of the gate insulating film 402 to those mentioned above. No. Also, at the interface between the gate insulating film 402 and the first metal oxide film 404, charge trapping occurs. It is permissible to perform processes that shape the mind. Such processes include, for example, plasma treatment. There are processes such as elemental addition (ion implantation, etc.).

[0067] There are no particular limitations on the method for fabricating the gate insulating film 402, but for example, plasma CVD or spa The gate insulating film 402 can be fabricated using a film deposition method such as the taring method.

[0068] Next, a first metal oxide film 404 is formed on the gate insulating film 402 (Figure 4(B)). The first metal oxide film 404 uses an oxide having the same components as the oxide semiconductor film 403. It is desirable to do so. Such materials are compatible with oxide semiconductor film 403, and this is the first By using it in the metal oxide film 404, the interface with the oxide semiconductor film can be kept in good condition. Because it is possible. In other words, by using the above-mentioned material for the first metal oxide film 404, the Suppresses charge trapping at the interface between the metal oxide film 404 and the oxide semiconductor film 403. It is possible.

[0069] Furthermore, the energy gap of the first metal oxide film 404 is the energy of the oxide semiconductor film 403. It is required to be larger than the energy gap. Also, the first metal oxide film 404 and the oxide Between the semiconductor films 403, at least at room temperature (20°C), the oxide semiconductor film 403 The formation of an energy barrier sufficient to prevent carrier leakage is required.

[0070] Furthermore, from the perspective of reducing the sources of charge generation and trapping centers, hydrogen in metal oxide films It is desirable that impurities such as water are sufficiently reduced. This concept is based on oxide semiconductors. This approach shares common ground with the idea of ​​reducing impurities in body membranes.

[0071] Furthermore, in order to move the charge trapping center away from the oxide semiconductor film 403, the first metal oxide Preferably, the film 404 has a sufficient thickness. Specifically, the first metal oxide film is The film thickness is preferably greater than 10 nm and less than or equal to 100 nm.

[0072] There are no particular limitations on the method for fabricating the first metal oxide film 404. For example, plasma CVD or The first metal oxide film 404 can be fabricated using a film deposition method such as puttering. Furthermore, in terms of preventing contamination by hydrogen, water, etc., sputtering is a suitable method. On the other hand, in terms of improving film quality, methods such as plasma CVD are suitable.

[0073] Next, an oxide semiconductor film with a thickness of 3 nm to 30 nm is placed on the first metal oxide film 404. 403 is formed by sputtering. If the thickness of the oxide semiconductor film 403 is made too large... (For example, if the film thickness is 50 nm or more, there is a risk that the transistor will become normally-on.) Therefore, it is preferable to use the above-mentioned film thickness. Note that the gate insulating film 402 and the first metallic acid The oxide film 404 and the oxide semiconductor film 403 are deposited continuously without exposure to the atmosphere. It is preferable to do so.

[0074] Furthermore, before depositing the oxide semiconductor film 403 by sputtering, an argon gas is introduced. Inverted sputtering is performed to generate plasma by introducing a material, and the material adheres to the surface of the first metal oxide film 404. It is preferable to remove the powdery substance (also called particles or debris) present. This process involves applying a voltage to the substrate, forming plasma near the substrate, and modifying the surface of the substrate. This is the method. Note that other gases such as nitrogen, helium, or oxygen may be used instead of argon. .

[0075] The oxide semiconductor used in the oxide semiconductor film 403 is an In-S quaternary metal oxide. n-Ga-Zn-O oxide semiconductors and ternary metal oxides such as In-Ga-Zn-O Oxide semiconductors, In-Sn-Zn-O based oxide semiconductors, In-Al-Zn-O based oxide semiconductors Conductors, Sn-Ga-Zn-O oxide semiconductors, Al-Ga-Zn-O oxide semiconductors, S n-Al-Zn-O oxide semiconductors and binary metal oxides such as In-Zn-O oxides Semiconductors, Sn-Zn-O oxide semiconductors, Al-Zn-O oxide semiconductors, Zn-Mg- O-based oxide semiconductors, Sn-Mg-O-based oxide semiconductors, In-Mg-O-based oxide semiconductors, I n-Ga-O oxide semiconductors, and single-system metal oxides such as In-O oxide semiconductors and Sn -O-based oxide semiconductors, Zn-O-based oxide semiconductors, etc., can be used. Also, the above acid The ionized semiconductor may contain SiO2. Here, for example, an In-Ga-Zn-O based oxide. A semiconductor is an oxide film containing indium (In), gallium (Ga), and zinc (Zn). This means that the stoichiometric ratio is not particularly important. Also, elements other than In, Ga, and Zn It may contain elements.

[0076] Furthermore, the oxide semiconductor film 403 has the chemical formula InMO3(ZnO) m (m>0) Thin films can be used. Here, M is selected from Ga, Al, Mn, and Co. or indicates multiple metallic elements. For example, M could be Ga, Ga and Al, Ga and Mn, or Examples include Ga and Co.

[0077] In this embodiment, the oxide semiconductor film 403 is an In-Ga-Zn-O based oxide semiconductor film. The film is deposited by sputtering using a film deposition target. Also, oxide semiconductor film 40 3 is under a noble gas (typically argon) atmosphere, an oxygen atmosphere, or a mixture of noble gas and oxygen. It can be formed by sputtering in a suitable atmosphere.

[0078] To fabricate an In-Ga-Zn-O film as oxide semiconductor film 403 using the sputtering method. For example, a target composition ratio such as In2O3:Ga2O3:ZnO=1: A target for oxide semiconductor film deposition in a 1:1 [molar ratio] ratio can be used. This target material and composition are not limited to this, for example, In2O3:Ga2O3:ZnO A target for oxide semiconductor film deposition with a molar ratio of 1:1:2 may also be used.

[0079] Furthermore, when using an In-Zn-O system material as an oxide semiconductor, the combination of targets used The ratio is the ratio of atoms, In:Zn = 50:1 to 1:2 (converted to a molar ratio, In2O3: ZnO = 25:1 to 1:4), preferably In:Zn = 20:1 to 1:1 (converted to molar ratio) Then In2O3:ZnO=10:1~1:2), more preferably In:Zn=15: The ratio is 1 to 1.5:1 (which translates to a molar ratio of In2O3:ZnO = 15:2 to 3:4). For example, the target used to form In-Zn-O oxide semiconductors has an atomic ratio of In: Given Zn:O=X:Y:Z, let Z>1.5X+Y.

[0080] Furthermore, the packing density of the target for oxide semiconductor film deposition is preferably 90% or more and 100% or less. The fill density is between 95% and 99.9%. A target for oxide semiconductor film deposition with a high fill density is used. By doing so, the deposited oxide semiconductor film 403 can be made into a dense film.

[0081] The sputtering gas used when depositing the oxide semiconductor film 403 is hydrogen, water, hydroxyl group Alternatively, it is preferable to use a high-purity gas from which impurities such as hydrides have been removed.

[0082] The deposition of the oxide semiconductor film 403 is carried out by holding the substrate 400 in a deposition chamber that is maintained under reduced pressure. The process is carried out with the substrate temperature set to 100°C or higher and 600°C or lower, preferably 200°C or higher and 400°C or lower. By depositing a film while heating the substrate 400, the deposited oxide semiconductor film 403 contains This reduces the concentration of impurities. Furthermore, it reduces damage caused by sputtering. Then, while removing residual moisture in the deposition chamber, sputter gas from which hydrogen and moisture have been removed is introduced. Then, an oxide semiconductor film 403 is deposited on the substrate 400 using the above target. To remove residual moisture, an adsorption-type vacuum pump, such as a cryopump or ion pump, is used. It is preferable to use a pump, a titanium sublimation pump. Also, the exhaust means is A cryopump may be used to add a cold trap to the pump. The deposition chamber is, for example, a compound containing hydrogen atoms, such as water (H2O) (more preferably) Since substances such as compounds containing carbon atoms are exhausted, oxide semiconductors deposited in the deposition chamber are affected. The concentration of impurities in the body membrane 403 can be reduced.

[0083] An example of film deposition conditions is a distance of 100 mm between the substrate and the target, and a pressure of 0.6 Pa. The conditions applied are a DC power supply of 0.5kW and an oxygen atmosphere (oxygen flow rate ratio of 100%). It can be done. Furthermore, when using a pulsed DC power supply, powdery substances (particles) generated during film formation can be produced. This method is preferable because it reduces (also known as) the film thickness distribution and becomes more uniform.

[0084] Subsequently, it is desirable to perform a heat treatment (first heat treatment) on the oxide semiconductor film 403. This first heat treatment removes excess hydrogen (water and hydroxyl groups) from the oxide semiconductor film 403. ) removes defects, adjusts the structure of the oxide semiconductor film 403, and lowers the defect levels in the energy gap. It can be reduced. Furthermore, this first heat treatment reduces the first metal oxide film 404 It is also possible to remove excess hydrogen (including water and hydroxyl groups). The temperature of the first heat treatment is , 250℃ to 700℃, preferably 450℃ to 600℃, or substrate distortion It will be considered less than 1.

[0085] Heat treatment involves, for example, introducing the workpiece into an electric furnace using a resistance heating element, and performing the treatment under a nitrogen atmosphere. This can be carried out under conditions of 450°C for 1 hour. During this time, the oxide semiconductor film 403 is not exposed to the atmosphere. Prevent leakage and ensure that no water or hydrogen is introduced.

[0086] Heat treatment equipment is not limited to electric furnaces; it also utilizes heat conduction or thermal radiation from a heated medium such as gas. A device that heats the object to be processed may be used. For example, GRTA (Gas Rap id Thermal Anneal) equipment, LRTA (Lamp Rapid The RTA (Rapid Thermal Annealing) for devices such as thermal annealing equipment. ) The device can be used. The LRTA device uses halogen lamps and metal halide lamps. xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, high-pressure mercury lamps This device heats the object to be processed by radiating light (electromagnetic waves) emitted from lamps such as fountains. A GRTA apparatus is a device that performs heat treatment using high-temperature gas. The gas used is argon. Noble gases such as nitrogen, or inert gases that do not react with the material being treated by heat treatment. It is used.

[0087] For example, as a first heat treatment, the object to be treated is placed in a heated inert gas atmosphere for several minutes. After interheating, a GRTA treatment may be performed in which the workpiece is removed from the inert gas atmosphere. Using GRTA treatment enables high-temperature heat treatment in a short time. Furthermore, the heat resistance temperature of the workpiece... It can be applied even under temperature conditions exceeding [a certain degree]. Furthermore, during the process, an inert gas is used, along with oxygen. You may switch to a gas containing [the specified substance]. Perform the first heat treatment in an oxygen-containing atmosphere. This is because it can reduce defect levels in the energy gap caused by oxygen deficiency. .

[0088] The inert gas atmosphere can be nitrogen or a noble gas (helium, neon, argon, etc.). It is desirable to apply an atmosphere whose main component is ( ) and which does not contain water, hydrogen, etc. For example, nitrogen, helium, neon, argon, and other noble gases introduced into heat treatment equipment. The purity should be 6N (99.9999%) or higher, preferably 7N (99.99999%) or higher. That is, the impurity concentration should be 1 ppm or less, preferably 0.1 ppm or less.

[0089] In any case, the first heat treatment reduces impurities, resulting in a type i (intrinsic semiconductor) or type i By forming an oxide semiconductor film 403 that is extremely close to the original, an extremely excellent transient is achieved. It is possible to achieve this.

[0090] By the way, the heat treatment described above (the first heat treatment) has the effect of removing hydrogen, water, etc. This heat treatment can also be called a dehydration treatment or a dehydrogenation treatment. The dehydrogenation treatment is performed at a timing such as after the oxide semiconductor film 403 has been processed into an island shape. It is also possible to carry this out in [location]. Furthermore, such dehydration and dehydrogenation treatments can be performed in one go. You can go multiple times, not just once.

[0091] Next, the oxide semiconductor film 403 is transformed into island-shaped oxide semiconductors by a second photolithography process. It is preferable to process it into a body film 403 (Figure 4(C)). Also, island-shaped oxide semiconductor film 403 A resist mask for forming the resist mask may be formed by an inkjet method. Since the inkjet method does not require the use of a photomask, manufacturing costs can be reduced. Here, the etching of the oxide semiconductor film 403 can be done by dry etching or wet etching. "Chingu" is also acceptable, and both can be used.

[0092] Furthermore, in the second photolithography process, in addition to the oxide semiconductor film 403, the first gold By forming a pattern of the oxide film 404, the transistor 33 shown in Figure 3(B) is formed. It can be set to 0. In transistor 330, the pattern of the oxide semiconductor film 403 By performing the formation of the first metal oxide film 404 and the pattern formation of the first metal oxide film 404 using the same mask, The side edge of the oxide semiconductor film 403 in the channel length direction and the channel of the first metal oxide film 404 The lateral end in the longitudinal direction coincides with the .

[0093] Next, source electrodes and drains are placed on the first metal oxide film 404 and the oxide semiconductor film 403. A conductive film is formed to create an in-electrode (including wiring formed from the same layer). Examples of conductive films used for the source and drain electrodes include Al, Cr, Cu, and Ta. A metal film containing elements selected from Ti, Mo, and W, or a metal composed of the above-mentioned elements. Nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film), etc. can be used. It can be done. Also, Ti, Mo, etc. can be placed on either the underside or the upper side or both sides of a metal film such as Al or Cu. High melting point metal films such as W or metal nitride films thereof (titanium nitride film, molybdenum nitride film, A configuration in which tungsten nitride films are stacked may also be used. Furthermore, the source electrode and drain electrode The conductive film used for the electrode may be formed from a conductive metal oxide. These are indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), and i Indium tin oxide alloy (In2O3-SnO2, abbreviated as ITO), indium acid Zinc alloy (In2O3-ZnO) or these metal oxide materials containing silicon oxide You can use the one that was set up.

[0094] A third photolithography step forms a resist mask on the conductive film, and selectively extracts the residue. After forming the source electrode 405a and drain electrode 405b by ching, resist mass Remove the purple pigment. For exposure during resist mask formation in the third photolithography step, use purple pigment. External beams, KrF laser light, or ArF laser light are recommended. On the oxide semiconductor film 403, adjacent The distance between the lower end of the matching source electrode 405a and the lower end of the drain electrode 405b is determined later The channel length L of the transistor formed is determined. Note that channel length L = 25 nm For exposures of less than a certain wavelength, for example, ultra-ultraviolet light with extremely short wavelengths of a few nanometers to a few tens of nanometers ( Using Extreme Ultraviolet in the third photolithography step Exposure during resist mask formation is recommended. Ultraviolet exposure offers high resolution and depth of field. The degree is also large. Therefore, it is possible to miniaturize the channel length L of the transistor that is formed later. This capability allows for faster circuit operation.

[0095] Furthermore, in order to reduce the number of photomasks and processes used in the photolithography process, The resist mask formed by a multi-tone mask, which is an exposure mask where the light has multiple intensities, is formed by the light. The etching process may be performed using a mask. A resist mask formed using a multi-gradation mask. The ske will have a shape with multiple film thicknesses, and its shape can be further deformed by etching. Because it can do this, it can be used in multiple etching processes that process different patterns. Therefore, a single multi-tone mask can accommodate at least two different patterns. This allows for the formation of a resist mask. Therefore, the number of exposure masks can be reduced. Furthermore, the corresponding photolithography process can also be reduced, thus simplifying the overall process.

[0096] Furthermore, during the etching of the conductive film, the oxide semiconductor film 403 is etched and fragmented. It is desirable to optimize the etching conditions to avoid this. However, only the conductive film It is difficult to obtain the condition of etching without etching the oxide semiconductor film 403 at all. Furthermore, during etching of the conductive film, only a portion of the oxide semiconductor film 403 is etched, for example. For example, 5 to 50% of the thickness of the oxide semiconductor film 403 is etched, and grooves (recesses) are formed. It can also become an oxide semiconductor film 403.

[0097] Next, plasma treatment is performed using a gas such as N2O, N2, or Ar, and the exposed material is then... Adsorbed water and other substances adhering to the surface of the oxide semiconductor film 403 may be removed. Plasma treatment is performed. If this is done, the oxide semiconductor film 403 will not be exposed to the atmosphere immediately following the plasma treatment. It is desirable to form a second metal oxide film 407 that comes into contact with the first film.

[0098] Next, the source electrode 405a and the drain electrode 405b are covered, and an oxide semiconductor film 4 A second metal oxide film 407 is formed in contact with a portion of 03 (Figure 4(D)).

[0099] The second metal oxide film 407 is a film made of the same components as the oxide semiconductor film 403, and the oxide It is preferable to use an oxide containing the main component material of the semiconductor film 403. Such materials are oxide It has good compatibility with the semiconductor film 403, and by using this as the second metal oxide film 407, acid This is because it can maintain a good state at the interface with the ionized semiconductor film. In other words, the above-mentioned material By using the second metal oxide film 407, the second metal oxide film 407 and the oxide semiconductor This makes it possible to suppress charge trapping at the interface with film 403.

[0100] The energy gap of the second metal oxide film 407 is equal to the energy of the oxide semiconductor film 403. It is required to be larger than the gap. Also, the second metal oxide film 407 and the oxide semiconductor Between the films 403, at least at room temperature (20°C), the oxide semiconductor film 403 is separated from the film. The formation of an energy barrier sufficient to prevent the flow of air is required.

[0101] The second metal oxide film 407 is formed using a method that does not introduce impurities such as water and hydrogen. Preferably, if the second metal oxide film 407 contains hydrogen, the oxide semiconductor of that hydrogen Intrusion into the body membrane 403, or extraction of oxygen from the oxide semiconductor film 403 by hydrogen, occurs. The back channel of the oxide semiconductor film 403 becomes low-resistance (n-type), and the parasitic channel A layer may form. Therefore, the second metal oxide film 407 should contain as much hydrogen as possible. To ensure a non-toxic film is formed, it is important not to use hydrogen in the film deposition method.

[0102] Therefore, it is preferable that the second metal oxide film 407 be formed by sputtering. The sputtering gas used when forming the film includes hydrogen, water, hydroxyl groups, or hydrides. It is preferable to use a high-purity gas from which pure substances have been removed.

[0103] Furthermore, in order to move the charge trapping center away from the oxide semiconductor film 403, a second metal oxide Preferably, the film 407 has a sufficient thickness. Specifically, the second metal oxide film 40 For 7, a film thickness greater than 10 nm and less than or equal to 100 nm is preferable.

[0104] Next, an insulating film 409 is formed on the second metal oxide film 407 (Figure 4(E)). Insulating film 4 For 09, an inorganic insulating film is used, such as a silicon oxide film, a silicon oxide nitride film, and an aluminum oxide film. Oxidation insulating films such as aluminum film, aluminum oxide nitride film, or silicon nitride film, silicon oxide nitride film A single layer of nitride insulating film such as a ricon film, aluminum nitride film, or aluminum nitride oxide film, or For this, lamination can be used. For example, using the sputtering method, the second metal oxide film 407 A layer of silicon oxide film and silicon nitride film is formed sequentially from the side.

[0105] Next, the oxide semiconductor film 403 is partially (channel-forming region) connected to the second metal oxide film 407. It is preferable to perform the second heat treatment while the materials are in contact. The temperature of the second heat treatment is 250°C or higher. The temperature should be below 00°C, preferably between 450°C and 600°C, or below the strain point of the substrate.

[0106] The second heat treatment involves nitrogen, oxygen, and ultra-dry air (with a water content of 20 ppm or less, preferably 1 (air) at ppm or less, more preferably 10 ppb or less, or noble gas (argon, helix) It is fine to carry it out in an atmosphere such as (m), but not in an atmosphere such as nitrogen, oxygen, ultra-dry air, or noble gas. It is preferable that the surrounding air does not contain water, hydrogen, etc. Also, nitrogen introduced into the heat treatment device The purity of oxygen or noble gas is 6N (99.9999%) or higher, preferably 7N (99.9999%). The impurity concentration should be 9999% or higher (i.e., 1 ppm or less, preferably 0.1 ppm or less). It is preferable to do so.

[0107] In the second heat treatment, the oxide semiconductor film 403 and the second metal oxide film 407 are in contact. It is heated in that state. Therefore, the dehydration (or dehydrogenation) process described above is performed simultaneously Oxygen, one of the main components of oxide semiconductors, which may decrease in quantity, Oxygen can be supplied from the second metal oxide film 407 containing oxygen to the oxide semiconductor film 403. This makes it possible to reduce the number of charge trapping centers in the oxide semiconductor film 403. This process purifies the oxide semiconductor film 403, which is then electrically converted to type i (intrinsic), thereby forming a highly purified oxide semiconductor film 403. This can be done. In addition, this heat treatment can be performed on the first metal oxide film 404 or the second metal The oxide film 407 can also be purified by removing impurities at the same time.

[0108] In this embodiment, the second heat treatment is performed after the formation of the insulating film 409, but the second The timing of the heat treatment is not particularly limited as long as it is performed after the formation of the second metal oxide film 407. Yes. For example, a second heat treatment may be performed after the formation of the second metal oxide film 407. Or when the insulating film 409 is formed by laminating, for example, a silicon oxide film and a silicon nitride film a silicon oxide film may be formed on the second metal oxide film 407 followed by a second heat treatment, and then a silicon nitride film may be formed. Or, a second heat treatment may be performed following the first heat treatment or the second heat treatment may be combined with the first heat treatment or the first heat treatment may be combined with the second heat treatment.

[0109] As described above, by applying at least one of the first heat treatment and the second heat treatment, the oxide semiconductor film 403 can be purified to a high purity so that it contains as few impurities other than its main component as possible. In the highly purified oxide semiconductor film 403, carriers derived from donors are extremely few (close to zero), and the carrier concentration is less than 1×10 14 / cm 3 preferably less than 1×10 12 / cm 3 more preferably less than 1×10 11 / cm 3 and less.

[0110] The transistor 310 is formed through the above steps (Fig. 4(E)). The transistor 310 intentionally excludes impurities such as hydrogen, moisture, hydroxyl groups or hydrides (also referred to as hydrogen compounds) from the oxide semiconductor film 403 and is a transistor including the highly purified oxide semiconductor film 403. Therefore, the transistor 310 has suppressed electrical characteristic variations and is electrically stable.

[0111] Note that after forming the insulating film 409, by further providing a conductive film 410 on the insulating film 409, Fig. ​​A transistor 350 as shown in 3(D) can be formed. The conductive film 410 is the gate electrode It can be formed using the same materials and processes as electrode 401. The conductive film 410 is an oxide semiconductor By positioning it in a location that overlaps with the channel formation region of the body membrane 403, transistor 350 In a bias-thermal stress test (hereinafter referred to as the BT test) to investigate the reliability of, To further reduce the change in the threshold voltage of transistor 350 before and after the BT test, Yes, it is possible. Furthermore, the conductive film 410 may have the same potential as the gate electrode 401, or it may have a different potential. It can also be used as a second gate electrode. It may be GND, 0V, or in a floating state.

[0112] Although not shown in the diagram, an additional protective insulating film may be formed to cover transistor 350. i. As a protective insulating film, silicon nitride film, silicon oxide nitride film, or aluminum nitride, etc. It can be used.

[0113] Furthermore, a planar insulating film may be provided on transistors 310 and 350. For example, heat-resistant materials such as acrylic, polyimide, benzocyclobutene, polyamide, and epoxy. Organic materials having the above properties can be used. In addition to the above organic materials, low dielectric constant materials (lo wk materials), siloxane resins, PSG (phosphorus glass), BPSG (phosphorus boron glass) ) etc. can be used. good.

[0114] <Transistor 320 Manufacturing Process> Using Figures 5(A) to 5(C), the manufacturing process of the transistor 320 shown in Figure 3(A) is described below. Let me give you an example.

[0115] Similar to the process shown in FIG. 4(A), a gate electrode 401 and a gate electrode 40 are formed on the substrate 400, a gate insulating film 402 covering the gate electrode 40 1, and a first metal oxide film 404 provided in contact with the gate insulating film 402. After that, a conductive film for forming a source electrode and a drain electrode ( including wiring formed in the same layer as this) is formed on the first metal oxide film 404. A resist mask is formed on the conductive film by a second photolithography process, and selective etching is performed to form the source electrode 405a and the drain electrode 405b, and then the resist mask is removed (FIG. 5(A)).

[0116] Next, an oxide semiconductor film 403 with a film thickness of 3 nm or more and 30 nm or less is formed on the first metal oxide film 404, the source electrode 405a, and the drain electrode 405b by sputtering.

[0117] Before forming the oxide semiconductor film 403 by sputtering, it is preferable to perform reverse sputtering in which argon gas is introduced to generate plasma, and remove powdery substances (referred to as particles or dust) adhering to the surface of the first metal oxide film 404, the source electrode 405a or the drain electrode 405b. Note that nitrogen, helium , oxygen, etc. may be used instead of the argon atmosphere.

[0118] Thereafter, it is desirable to perform a heat treatment (first heat treatment) on the oxide semiconductor film 403. By this first heat treatment, excess hydrogen (including water and hydroxyl groups) in the oxide semiconductor film 403 is removed, the structure of the oxide semiconductor film 403 is adjusted, and the defect levels in the energy gap can be reduced. Furthermore, by this first heat treatment, in the first metal oxide film 404 ​​​​​​​ It is also possible to remove excess hydrogen (including water and hydroxyl groups). The temperature of the first heat treatment is , 250°C or higher and 700°C or lower, preferably 450°C or higher and 600°C or lower, or the distortion of the substrate is less than the specified value.

[0119] Next, the oxide semiconductor film 403 is processed into an island-shaped oxide semiconductor film 403 by a third photolithography process (Fig. 5(B)). Also, a resist mask for forming the island-shaped oxide semiconductor film 403 may be formed by an inkjet method. When the resist mask is formed by the inkjet method, since a photomask is not used, the manufacturing cost can be reduced. Note that the first heat treatment of the oxide semiconductor film 403 can also be performed after the pattern formation of the oxide semiconductor film 403. However, the oxide semiconductor film 403 does not necessarily have to be patterned.

[0120] Next, plasma treatment using a gas such as N2O, N2, or Ar may be performed to remove adsorbed water or the like attached to the surface of the exposed oxide semiconductor film 403. When plasma treatment is performed, it is desirable to form the second metal oxide film 407 in contact with the oxide semiconductor film 403 without exposing it to the atmosphere following the plasma treatment.

[0121] Next, a second metal oxide film 407 that covers the source electrode 405a and the drain electrode 405b and is in contact with the oxide semiconductor film 4 03 is formed. Then, an insulating film 409 is formed on the second metal oxide film 407.

[0122] Next, it is preferable to perform a second heat treatment on the oxide semiconductor film 403 while it is in contact with the second metal oxide film 407. The temperature of the second heat treatment is 250°C or higher and 700°C or lower, preferably 45 The temperature should be between 0°C and 600°C, or below the strain point of the substrate.

[0123] The second heat treatment involves nitrogen, oxygen, and ultra-dry air (with a water content of 20 ppm or less, preferably 1 (air) with a concentration of ppm or less, preferably 10 ppb or less, or a noble gas (argon, helium, etc.) The procedure can be carried out under the following atmospheres: nitrogen, oxygen, ultra-dry air, or noble gases. It is preferable that the solution does not contain water, hydrogen, etc. Also, nitrogen and oxygen are introduced into the heat treatment device. , or the purity of the noble gas is 6N (99.9999%) or higher, preferably 7N (99.999%). The impurity concentration should be 99% or higher (i.e., 1 ppm or less, preferably 0.1 ppm or less). This is preferable.

[0124] In the second heat treatment, the oxide semiconductor film 403 and the second metal oxide film 407 are in contact. It is heated in that state. Therefore, the dehydration (or dehydrogenation) process described above is performed simultaneously Oxygen, one of the main components of oxide semiconductors, which may decrease in quantity, Oxygen can be supplied from the second metal oxide film 407 containing oxygen to the oxide semiconductor film 403. This makes it possible to reduce the number of charge trapping centers in the oxide semiconductor film 403. This process purifies the oxide semiconductor film 403, which is then electrically converted to type i (intrinsic), thereby forming a highly purified oxide semiconductor film 403. This can be done. In addition, this heat treatment can be performed on the first metal oxide film 404 or the second metal The oxide film 407 can also be purified by removing impurities at the same time.

[0125] Transistor 320 is formed by the above process (Figure 5(C)). Transistor 320 is, Impurities such as hydrogen, water, hydroxyl groups, or hydrides (also called hydrogen compounds) are removed from oxide semiconductors. A transistor that intentionally excludes from the film and includes a highly purified oxide semiconductor film 403 . Therefore, the transistor 320 has suppressed fluctuations in electrical characteristics and is electrically stable .

[0126] In addition, in this embodiment, a second heat treatment is performed after the formation of the insulating film 409. However, the timing of the second heat treatment is not particularly limited as long as it is after the formation of the second metal oxide film 407 .

[0127] Further, after forming the oxide semiconductor film 403, the second metal oxide film 407 is formed without patterning the oxide semiconductor film 403, and the second metal oxide film 407 and the oxide semiconductor film 403 are patterned using the same mask, whereby the transistor 340 shown in FIG. 3(C) can be formed. In the transistor 340, by performing the patterning of the oxide semiconductor film 403 and the patterning of the second metal oxide film 407 using the same mask, the side end portions in the channel length direction of the oxide semiconductor film 403 and the side end portions in the channel length direction of the second metal oxide film 407 coincide. In this case, the first heat treatment may be performed before the formation of the second metal oxide film 407, or the first heat treatment may be performed after continuously forming the oxide semiconductor film 403 and the second metal oxide film 407. Alternatively, the second heat treatment may be performed after the first heat treatment, or the first heat treatment may be combined with the second heat treatment, or the second heat treatment may be combined with the first heat treatment . . 407, or the first heat treatment may be performed after continuously forming the oxide semiconductor film 403 and the second metal oxide film 407, or the second heat treatment may be performed after the first heat treatment, or the first heat treatment may be combined with the second heat treatment, or the second heat treatment may be combined with the first heat treatment . . .

[0128] As described above, by applying at least one of the first heat treatment and the second heat treatment, the oxide semiconductor film 403 can be highly purified so as to contain as few impurities other than its main components as possible Yes, it is possible. In the highly purified oxide semiconductor film 403, carriers originating from the donor are extremely abundant. The carrier concentration is low (close to zero), and is 1 × 10⁻⁶ 14 / cm 3 Less than 1 × 10 12 / cm 3 Less than 1 × 10 11 / cm 3 It is less than.

[0129] Furthermore, after forming the insulating film 409 in Figure 5(C), a conductive film 410 is further applied on the insulating film 409. By providing this, the transistor 360 shown in Figure 3(E) can be formed. Conductive film 410 can be formed using the same material and process as gate electrode 401.

[0130] As described above, the transistor according to this embodiment has an upper and lower surface portion of the oxide semiconductor film. A metal oxide film made of the same components as the oxide semiconductor film is laminated on the surface, and further metal oxide In a physical film, the surface in contact with the oxide semiconductor film and the surface facing it are made of a metal oxide film and an oxide semiconductor film. An insulating film made of a different component from the body film is provided in contact with it. A metal oxide film composed of compatible materials exists in contact with an oxide semiconductor film. By doing so, electric charges that may be generated due to the operation of semiconductor devices, etc., interact with the oxide semiconductor film and metal. It suppresses trapping at the interface with the oxide film, and furthermore, prevents the formation of charge trapping centers at the interface. By having an insulator made of a suitable material in contact with a metal oxide film, This allows the aforementioned charge to be trapped at the interface between the metal oxide film and the insulator. Therefore, the effect of charge on the oxide semiconductor film can be mitigated, This can suppress transistor threshold fluctuations caused by charge traps.

[0131] Furthermore, the oxide semiconductor film used in the active layer of the transistor is subjected to heat treatment to remove hydrogen and moisture. By removing impurities such as hydroxyl groups or hydrides (also called hydrogen compounds) from oxide semiconductors, Furthermore, the main component material constituting the oxide semiconductor is simultaneously reduced by the impurity removal process. By supplying oxygen, the product is purified to a high degree and electrically converted to type i (intrinsic). Yes. Transistors containing such highly purified oxide semiconductor films exhibit electrical characteristic fluctuations. It is suppressed and electrically stable.

[0132] Furthermore, when charge is trapped at the interface of an oxide semiconductor film, the threshold voltage of the transistor becomes Shifting (for example, if a positive charge is trapped on the back channel side, the transistor shifts The key voltage shifts in the negative direction, and one of the factors causing this charge trapping is positive ions. A model of the movement and trapping of atoms (or the atoms causing it) can be assumed. In transistors using oxide semiconductors, water is used as such a cation source. Elementary atoms are a possibility. In the disclosed invention, a highly purified oxide semiconductor is used, and also this Because it employs a configuration in which the metal oxide film and insulating film are in contact with each other, the above model Even charge trapping caused by hydrogen, which is anticipated in such a system, can be suppressed. It is believed that this can occur when the ionization rate of hydrogen is, for example, around 10%.

[0133] As described above, the present invention provides a semiconductor device using an oxide semiconductor having stable electrical properties. This makes it possible to provide highly reliable semiconductor devices.

[0134] The configurations and methods described in this embodiment are compatible with the configurations and methods described in other embodiments. They can be used in any combination.

[0135] (Embodiment 2) A semiconductor device (display device and) having a display function using the transistor exemplified in Embodiment 1. It is also possible to manufacture (also known as) a part or the whole of a drive circuit including a transistor. This can be integrally formed on the same substrate as the pixel section, thereby forming a system-on-panel.

[0136] In Figure 6(A), the pixel portion 4002 provided on the first substrate 4001 is surrounded by A sealing material 4005 is provided and sealed by the second substrate 4006. Figure 6( In A), the region surrounded by the sealing material 4005 on the first substrate 4001 and These are formed in different regions on a separately prepared substrate using a single-crystal semiconductor film or a polycrystalline semiconductor film. A scan line drive circuit 4004 and a signal line drive circuit 4003 are implemented. The signal line drive circuit 4003 and the scan line drive circuit 4004 or the pixel unit 4002 are supplied The various signals and potentials are transmitted via FPC (Flexible Printed Circuit). It is supplied from t)4018a and 4018b.

[0137] In Figures 6(B) and 6(C), the pixel portion 4002 is provided on the first substrate 4001. A sealing material 4005 is provided so as to surround the scan line drive circuit 4004. Furthermore, a second substrate 4006 is provided on the pixel section 4002 and the scan line driving circuit 4004. Therefore, the pixel section 4002 and the scan line driving circuit 4004 are connected to the first substrate 4001. The display element is sealed together with the material 4005 and the second substrate 4006. Figure 6 In (B) and Figure 6(C), the sealing material 4005 on the first substrate 4001 surrounds A single-crystal semiconductor film or polycrystalline film is placed on a separately prepared substrate in a region different from the area where the film is being made. A signal line driving circuit 4003 formed from a semiconductor film is mounted. Figures 6(B) and 6( In C), a separately formed signal line drive circuit 4003 and a scan line drive circuit 4004 are used. The various signals and potentials supplied to the pixel unit 4002 are supplied from the FPC 4018. ru.

[0138] Furthermore, in Figures 6(B) and 6(C), a signal line drive circuit 4003 is formed separately, and the first An example of implementation on board 4001 is shown, but the configuration is not limited to this. Scan line driving The circuit may be formed and implemented separately, or it may be part of the signal line drive circuit or part of the scan line drive circuit. It is also acceptable to form and implement only the relevant part separately.

[0139] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG(Ch ip On Glass) method, wire bonding method, or TAB (Tape A Methods such as utmost bonding can be used. Figure 6(A) shows C This is an example of implementing the signal line drive circuit 4003 and the scan line drive circuit 4004 using the OG method. Figure 6(B) shows an example of implementing the signal line drive circuit 4003 using the COG method, and Figure 6(C) shows an example of implementing the signal line drive circuit 4003 using the COG method. This is an example of implementing the signal line drive circuit 4003 using the TAB method.

[0140] Furthermore, the display device includes a panel in which the display elements are sealed, and a controller on the panel. Includes modules with ICs and other components mounted on them.

[0141] In this specification, the term "display device" refers to an image display device, a display device, or an optical display device. This refers to the power source (including lighting equipment). It also refers to connectors, such as FPC or TAB tape. A module with TCP attached, a TAB tape, or a printed circuit board at the end of the TCP. An IC (integrated circuit) is directly mounted to the provided module or display element using the COG method. All modules that have been modified shall also be included in the display device.

[0142] Furthermore, the pixel section and scanning line driving circuit provided on the first substrate have multiple transistors. Therefore, the transistor shown as an example in Embodiment 1 can be applied.

[0143] Display elements provided in a display device include liquid crystal elements (also called liquid crystal display elements) and light-emitting elements ( A light-emitting element (also called a light-emitting display element) can be used. The light-emitting element is activated by current or voltage. This category includes elements whose brightness is controlled, specifically inorganic EL (Electroluminescent) elements. This includes Luminescence, organic EL, etc. It also includes electronic inks and other electrically powered materials. Display media where the contrast changes depending on the application can also be used.

[0144] One form of a semiconductor device will be explained using Figures 7 to 9. Figures 7 to 9 are derived from Figure 6. This corresponds to the cross-sectional view in MN of B).

[0145] As shown in Figures 7 to 9, the semiconductor device has connection terminal electrodes 4015 and terminal electrodes 4016 It has, and the connecting terminal electrode 4015 and terminal electrode 4016 are terminals of FPC4018 It is electrically connected via an anisotropic conductive film 4019.

[0146] The connecting terminal electrode 4015 is formed from the same conductive film as the first electrode layer 4030, and the terminal electrode 4 016 is the source electrode and drain electrode of transistors 4010 and 4011. It is formed from the same conductive film.

[0147] Furthermore, the pixel section 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001 are, It has multiple transistors, and in Figures 7 to 9, the transistors included in the pixel section 4002 The transistor 4010 and the transistor 4011 included in the scan line drive circuit 4004 are shown as examples. Yes, they are.

[0148] In this embodiment, transistors 4010 and 4011 are defined as in Embodiment 1. The transistors shown can be applied. Transistor 4010, Transistor 4 011 exhibits suppressed electrical characteristic fluctuations and is electrically stable. Therefore, Figures 7 to 7 As shown in 9, the semiconductor device of this embodiment can provide a highly reliable semiconductor device. ru.

[0149] The transistor 4010 provided in the pixel section 4002 is electrically connected to the display element, and the display The panel is constructed. The display elements are not particularly limited as long as they can display information, and various display elements can be used. It can be used.

[0150] Figure 7 shows an example of a liquid crystal display device using liquid crystal elements as display elements. In Figure 7, the display elements The child liquid crystal element 4013 consists of a first electrode layer 4030, a second electrode layer 4031, and liquid crystal. It includes layer 4008. Furthermore, it functions as an alignment film, sandwiching the liquid crystal layer 4008. Layers 4032 and 4033 are provided. The second electrode layer 4031 is on the second substrate 4006 side. A first electrode layer 4030 and a second electrode layer 4031 are connected via a liquid crystal layer 4008. It has a layered structure.

[0151] Furthermore, the spacer 4035 is obtained by selectively etching the insulating film, and the liquid crystal layer 400 It is provided to control the film thickness (cell gap) of 8. This example shows the use of a columnar spacer 4035, but a spherical spacer may also be used.

[0152] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. Depending on the conditions, the liquid crystal material can be classified into cholesteric phase, smectic phase, cubic phase, and chi. It exhibits the ranematic phase, isotropic phase, etc.

[0153] Alternatively, a liquid crystal exhibiting a blue phase without an alignment layer may be used. The blue phase is one of the liquid crystal phases. Yes, as the temperature of a cholesteric liquid crystal is increased, it transitions from the cholesteric phase to the isotropic phase. This is the phase that appears earlier. The blue phase only appears within a narrow temperature range, so improving the temperature range is necessary. To achieve this, a liquid crystal composition containing 5% or more by weight of a chiral agent is used in the liquid crystal layer. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response time of 1 msec or less. Furthermore, because it is optically isotropic, orientation processing is unnecessary, and it has low dependence on viewing angle. Since it is not necessary to provide a rubbing treatment, the rubbing treatment does not need to be performed. This prevents electrostatic discharge (ESD) damage, reducing defects and damage to liquid crystal displays during the manufacturing process. This makes it possible to improve the productivity of liquid crystal display devices.

[0154] Furthermore, the resistivity of liquid crystal materials is 1 × 10⁻⁶ 9 The value is Ω·cm or greater, preferably 1 × 10⁻⁶. 1 1 It is Ω·cm or greater, and more preferably 1 × 10⁻⁶ 12 It is greater than Ω·cm. The resistivity values ​​in the detailed specifications shall be those measured at 20°C.

[0155] The size of the retention capacitance provided in a liquid crystal display device depends on the regeneration of the transistors arranged in the pixel area. The current and other factors are taken into consideration and the settings are configured to maintain the charge for a predetermined period. High-purity oxidation By using a transistor having a physical semiconductor film, the liquid crystal capacitance in each pixel is It is sufficient to provide a holding capacity having a size of 1 / 3 or less, preferably 1 / 5 or less of the capacity. ru.

[0156] The transistor using the highly purified oxide semiconductor film used in this embodiment is in the off state. The current value (off-current value) in this case can be reduced. Therefore, electrical signals such as image signals The retention time can be extended, and the write interval can also be set to be longer when the power is on. This reduces the frequency of refresh operations, thus lowering power consumption. It plays.

[0157] Furthermore, the transistor using the highly purified oxide semiconductor film used in this embodiment is relatively Because a relatively high field-effect mobility can be obtained, high-speed driving is possible. Therefore, liquid crystal display device By using the above-mentioned transistors in the pixel section, high-quality images can be provided. Furthermore, the above transistors are manufactured on the same substrate, either in the drive circuit section or the pixel section. This allows for a reduction in the number of components in a liquid crystal display device.

[0158] LCD displays include TN (Twisted Nematic) mode and IPS (In-Place Printed Display). lane-Switching) mode, FFS (Fringe Field Switching) mode ching) mode, ASM(Axially Symmetric aligned) Micro-cell mode, OCB (Optical Compensated B) irefringence) mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. You can use modes such as UID Crystal.

[0159] Furthermore, normally black type liquid crystal display devices, such as those employing vertical alignment (VA) mode, A transmissive liquid crystal display device may also be used. Here, the vertical alignment mode refers to the liquid crystal display panel. This is a type of method for controlling the arrangement of crystal molecules, and when no voltage is applied, it controls the arrangement of crystal molecules on the panel surface. This is a method in which liquid crystal molecules are oriented vertically. Several vertical orientation modes can be listed. However, for example, MVA (Multi-Domain Vertical Alignment) nt) mode, PVA (Patterned Vertical Alignment) You can use modes such as ASV (Advanced Super View) mode. Yes, it is possible. Also, a pixel can be divided into several subpixel regions, and each region can be processed separately. Multi-domainization or multi-domain design is devised to tilt the molecules in that direction. You can use the method that is suggested.

[0160] Furthermore, in a display device, the black matrix (light-shielding layer), polarizing member, phase difference member, and reflector are used. Optical components (optical substrates) such as protective members are provided as appropriate. For example, polarizing substrates and phase difference substrates Circularly polarized light from a plate may be used. Also, backlights, sidelights, etc., may be used as light sources. It's okay to be there.

[0161] Furthermore, multiple light-emitting diodes (LEDs) are used as backlights, and a time-division display system is used. It is also possible to perform (field sequential drive method). By applying a color drive method, color display can be achieved without using a color filter. It is possible.

[0162] Furthermore, the display method used in the pixel area may be a progressive or interlaced method. It is possible. Also, when displaying in color, the color elements controlled by pixels are RGB (R is It is not limited to the three colors (red, green, and blue). For example, RGBW (where W represents white). Alternatively, some models add one or more colors such as yellow, cyan, or magenta to RGB. The size of the display area may differ for each dot of the color element. However, the present invention is a This is not limited to display devices with a red display, but is applicable to display devices with a monochrome display. It's also possible.

[0163] Furthermore, as a display element included in the display device, an electroluminescent light-emitting element is used. It can be applied to light-emitting devices that utilize electroluminescence. They are distinguished by whether they are organic or inorganic compounds, and generally the former are organic E The latter is called an L element, and the latter an inorganic EL element.

[0164] Organic EL elements emit electrons and holes from a pair of electrodes when a voltage is applied to the light-emitting element. Each is injected into a layer containing a luminescent organic compound, and an electric current is passed through it. Through the recombination of electrons and holes, the luminescent organic compound forms an excited state. It emits light when the excited state returns to the ground state. From this mechanism, such emission Optical devices are called current-excited light-emitting devices.

[0165] Inorganic electroluminescent (EL) elements are classified into dispersed inorganic EL elements and thin-film inorganic EL elements based on their element configuration. They are classified as such. Dispersive inorganic EL elements have a light-emitting layer in which particles of light-emitting material are dispersed in a binder. The luminescence mechanism utilizes donor and acceptor levels, and the donor-acceptor level is the key to this process. This is a receptor recombination type light emission. Thin-film inorganic EL elements sandwich the light-emitting layer between dielectric layers. Furthermore, it has a structure where it is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. This is a localized light emission. Here, we will explain using an organic EL element as the light-emitting element. ru.

[0166] A light-emitting element only needs to have at least one of its pair of electrodes transparent in order to extract light. Then, a transistor and a light-emitting element are formed on the substrate, and light is extracted from the side opposite to the substrate. Top-side emission, bottom-side emission which extracts light from the substrate side, and the substrate side and the side opposite the substrate. There is a light-emitting element with a double-sided emission structure that extracts light from it, and any light-emitting element with an emission structure is applicable. It is possible.

[0167] Figure 8 shows an example of a light-emitting device using a light-emitting element as a display element. The light-emitting element 4 is the display element. 513 is electrically connected to transistor 4010 located in pixel section 4002. The configuration of the light-emitting element 4513 is a first electrode layer 4030, an electroluminescent layer 4511, and a second electric The stacked structure of the polar layer 4031 is shown, but is not limited to the configuration shown. The configuration of the light-emitting element 4513 can be appropriately changed to match the direction of the emitted light.

[0168] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material. In particular, photosensitive resin Using a lipid material, an opening is formed on the first electrode layer 4030, and the side walls of the opening are continuous. It is preferable to form the surface so that it is an inclined surface with curvature.

[0169] Even if the electroluminescent layer 4511 consists of a single layer, it is configured to be stacked with multiple layers. It's fine either way.

[0170] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 4513, the second electrode layer A protective film may be formed on 4031 and the partition wall 4510. The protective film may be silicon nitride. Films, silicon nitride films, DLC films, etc. can be formed. Also, the first substrate 400 1. The space sealed by the second substrate 4006 and the sealing material 4005 is filled with a filler material 45 14 is provided and sealed. In this way, it is highly airtight and does not expose to the outside air, and gas removal Protective films with minimal defects (laminated films, UV-curing resin films, etc.) and cover materials It is preferable to package (enclose) them in this way.

[0171] In addition to inert gases such as nitrogen and argon, filler material 4514 can also be UV-curing resin. Thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic, and poly Mid, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (E Tylene vinyl acetate can be used. For example, nitrogen can be used as a filler. stomach.

[0172] Additionally, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plate) may be placed on the emission surface of the light-emitting element. Even if optical films such as phase difference plates (λ / 4 plate, λ / 2 plate) and color filters are appropriately provided, That's good. Alternatively, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, on the surface irregularities. An anti-glare treatment can be applied to further diffuse reflected light and reduce glare.

[0173] Furthermore, it is also possible to provide electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display device (electrophoretic display), and it is a paper-like material. It offers the same readability, lower power consumption compared to other display devices, and a thin and light form factor. It has the advantage of being such.

[0174] Electrophoresis display devices can take various forms, but one is a first particle with a positive charge and Multiple microcapsules containing a second particle having a negative charge are in the solvent or solute. It is a dispersed substance, and by applying an electric field to the microcapsules, the microcapsules Move the particles in the cell in opposite directions and display only the color of the particles that have gathered on one side. Therefore, the first or second particle contains dye and moves in the absence of an electric field. It is immovable. Also, the color of the first particle and the color of the second particle are different (including colorless). )

[0175] Thus, electrophoretic devices can detect the movement of substances with high dielectric constants into high electric field regions. This display utilizes a mild dielectrophoretic effect.

[0176] When the above microcapsules are dispersed in a solvent, it is called an electronic ink. This electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0177] The first and second particles in the microcapsules are made of conductive material, insulating material, and semiconductor material. Conductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, electro Using a material selected from chromochromic materials, magnetophoretic materials, or a composite material thereof. Just be there.

[0178] Furthermore, a display device using the twist ball display method can also be applied as electronic paper. Yes, it is possible. The twist ball display method uses spherical particles painted in white and black as display elements. It is placed between the first electrode layer and the second electrode layer, which are electrode layers, and the first electrode layer and the second This method of display is achieved by creating a potential difference in the electrode layer to control the orientation of spherical particles. ru.

[0179] Figure 9 shows an active-matrix electronic paper as one form of semiconductor device. Figure 9 This electronic paper is an example of a display device that uses a twist-ball display method.

[0180] A first electrode layer 4030 connected to transistor 4010, and provided on the second substrate 4006 Between the second electrode layer 4031 and the first electrode layer 4031, there is a black region 4615a and a white region 4615b. A spherical particle 4613 is provided, which includes a cavity 4612 filled with liquid around it. The spherical particles 4613 are surrounded by a filler material 4614 such as resin. Second electrode Layer 4031 corresponds to the common electrode (counter electrode). The second electrode layer 4031 has a common potential line and It is electrically connected.

[0181] In Figures 7 to 9, the first substrate 4001 and the second substrate 4006 are made of glass. In addition to stainless steel substrates, flexible substrates can also be used, such as translucent plastics. A substrate such as a acrylic sheet can be used. As for plastics, FRP (Fiberglass Plastic) can be used. s-Reinforced Plastics) sheets, PVF (Polyvinyl Fluoride) Film, polyester film, or acrylic resin film can be used. Also, a sheet with a structure in which aluminum foil is sandwiched between PVF film or polyester film. You can also use this.

[0182] The insulating layer 4021 can be formed using an inorganic insulating material or an organic insulating material. Acrylic resin, polyimide, benzocyclobutene resin, polyamide, epoxy resin, etc. The use of a heat-resistant organic insulating material is suitable as a planar insulating film. In addition to organic insulating materials, low-dielectric constant materials (low-k materials), siloxane resins, PSG (Lithium Stabilizer) Materials such as glass (e.g., BPSG (limboron glass)) can be used. An insulating layer may be formed by stacking multiple insulating films made of the material.

[0183] The method for forming the insulating layer 4021 is not particularly limited and may be done by sputtering, depending on the material. Pin coating method, dipping method, spray coating, droplet ejection method (inkjet method, screen (Printing, offset printing, etc.), roll coating, curtain coating, knife coating Coatings and the like can be used.

[0184] A display device displays images by transmitting light from a light source or display element. Therefore, the image is displayed by transmitting light. Thin films such as substrates, insulating films, and conductive films provided in the base part are all sensitive to light in the visible light wavelength range. It is made to be light-transmitting.

[0185] A first electrode layer and a second electrode layer (pixel electrode layer, common electrode layer, pair) that apply voltage to the display element. In the electrode layer (also called the direct electrode layer), the direction of the light to be extracted, the location where the electrode layer is provided, and Transmittance and reflectivity can be selected based on the pattern structure of the electrode layer.

[0186] The first electrode layer 4030 and the second electrode layer 4031 are made of indium acid containing tungsten oxide. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide Indium tin oxide containing titanium oxide, ITO, indium zinc oxide, silicon oxide A translucent conductive material such as indium tin oxide with added material can be used.

[0187] Furthermore, the first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum. (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (N) b) Tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium Metals such as titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag), Alternatively, it can be formed using one or more types of alloys or nitrides thereof. Cut.

[0188] Furthermore, the first electrode layer 4030 and the second electrode layer 4031 are made of conductive polymer (conductive polymer It can be formed using a conductive composition containing (also called mer). For example, a so-called π-electron conjugated conductive polymer can be used. or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, or copolymers or derivatives thereof consisting of two or more aniline, pyrrole, and thiophene. Examples include conductors.

[0189] Furthermore, transistors are susceptible to damage from static electricity, etc., therefore, a protection circuit for the drive circuit is necessary. It is preferable to provide this. The protection circuit is preferably constructed using nonlinear elements.

[0190] As described above, by applying the transistor exemplified in Embodiment 1, a highly reliable semiconductor can be obtained. A device can be provided. Note that the transistors exemplified in Embodiment 1 are shown in the table above. This includes not only semiconductor devices with display functions, but also power devices and LSIs mounted in power supply circuits. Semiconductor integrated circuits, semiconductor devices with image sensor functions for reading information about objects, etc. It can be applied to semiconductor devices with various functions.

[0191] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. That is the case.

[0192] (Embodiment 3) The semiconductor devices disclosed herein are applicable to a variety of electronic devices (including amusement machines). This is possible. As an electronic device, for example, a television set (television, or television Receivers (also called receivers), computer monitors, digital cameras, digital video cameras Cameras such as LA, digital photo frames, and mobile phones (also called mobile phones or mobile phone devices). ), portable game consoles, personal digital assistants, sound playback devices, large game machines such as pachinko machines, etc. Examples include the semiconductor device described in the above embodiment. I will reveal it.

[0193] Figure 10(A) shows a notebook-type personal computer, consisting of a main unit 3001 and a casing 300 2. It consists of a display unit 3003, a keyboard 3004, etc. Embodiment 1 Alternatively, by applying the semiconductor device shown in 2, a highly reliable notebook-type personal computer can be created. It can be used as a computer.

[0194] Figure 10(B) shows a personal digital assistant (PDA), and the main unit 3021 has a display unit 3023, An external interface 3025 and operation buttons 3024, etc. are provided. A stylus 3022 is available as an accessory for use. The semiconductor device shown in Embodiment 1 or 2. By applying this, a more reliable personal digital assistant (PDA) can be created.

[0195] Figure 10(C) shows an example of an e-book. For example, the e-book 2700 has a casing 27 It consists of two enclosures, 01 and enclosure 2703. Enclosures 2701 and 2703 are It is integrated with the shaft portion 2711, and the shaft portion 2711 is used as the axis for opening and closing operations. This configuration allows it to function like a physical book.

[0196] The display unit 2705 is incorporated into the housing 2701, and the display unit 2707 is incorporated into the housing 2703. It is included. Display units 2705 and 2707 are also configured to display a continuation screen. Yes, or you can configure it to display different screens. For example, text is displayed in the display unit on the right (display unit 2705 in Figure 10(C)), and the table on the left... An image can be displayed on the display unit (display unit 2707 in Figure 10(C)). Embodiment 1 Alternatively, by applying the semiconductor device shown in 2, a highly reliable e-book 2700 can be obtained. It is possible.

[0197] Furthermore, Figure 10(C) shows an example in which the housing 2701 is equipped with an operating section, etc. For example, The enclosure 2701 is equipped with a power supply 2721, operation keys 2723, speaker 2725, etc. It is possible to turn pages using operation key 2723. Note that it is the same as the display unit of the casing. The enclosure may also be configured to include a keyboard, pointing device, etc. on its surface. On the back and sides, there are external connection terminals (earphone jack, USB terminal, etc.), a recording medium insertion slot, etc. It may also be configured to include the following. Furthermore, the e-book 2700 has the function of an electronic dictionary. It can also be structured in this way.

[0198] Furthermore, the e-book 2700 may be configured to transmit and receive information wirelessly. By wireless means, The system will be configured to allow users to purchase and download desired book data from an e-book server. It is also possible.

[0199] Figure 10(D) shows a mobile phone, which consists of two housings, housing 2800 and housing 2801. The enclosure 2801 contains a display panel 2802, a speaker 2803, and a microphone. 2804, pointing device 2806, camera lens 2807, external connection terminal It is equipped with 2808, etc. Also, the 2800 housing has a solar cell for charging mobile phones. It features a 2810 chip, an external memory slot 2811, and other components. The antenna is located on the casing 28. 01 It is built into the inside. Applying the semiconductor device shown in Embodiment 1 or 2 This can result in a more reliable mobile phone.

[0200] Furthermore, the display panel 2802 is equipped with a touch panel, and the image displayed in Figure 10(D) is Multiple operation keys 2805 are shown with dotted lines. Note that the output is from solar cell 2810. A boost circuit is also implemented to increase the voltage to the voltage required for each circuit.

[0201] The display panel 2802 changes its display orientation as appropriate depending on the usage mode. Since the camera lens 2807 is located on the same plane as the 2802, video calls are possible. Speaker 2803 and microphone 2804 are not limited to voice calls, but also video calls. Recording and playback are possible. Furthermore, the casings 2800 and 2801 slide apart, as shown in the diagram. As shown in 10(D), it can be changed from an unfolded state to an overlapping state, making it suitable for carrying around. Further miniaturization is possible.

[0202] External connection terminal 2808 can be connected to various cables such as AC adapters and USB cables. It is capable of charging and data communication with personal computers, etc. By inserting a recording medium into memory slot 2811, it becomes possible to store and move larger amounts of data. ru.

[0203] Furthermore, even if it has infrared communication capabilities, television reception capabilities, etc. in addition to the above functions good.

[0204] Figure 10(E) shows a digital video camera, consisting of a main unit 3051, a display unit (A) 3057, Eyepiece 3053, operation switch 3054, display unit (B) 3055, battery 3056 It is composed of the following. Applying the semiconductor device shown in Embodiment 1 or 2 This makes for a more reliable digital video camera.

[0205] Figure 10(F) shows an example of a television system. The television system 9600 is, The display unit 9603 is integrated into the housing 9601. The display unit 9603 displays video. It is possible to do so. In addition, here the stand 9605 supports the housing 9601. This shows the configuration. By applying the semiconductor device shown in Embodiment 1 or 2, This can be used to create a highly reliable television system 9600.

[0206] The television unit 9600 is operated using the control switches on the housing 9601 and a separate remote control. This can be done using the control unit. Furthermore, the remote control unit can be accessed from the said remote control unit. The configuration may also include a display unit that shows the information to be output.

[0207] The television system 9600 will consist of a receiver, modem, and other components. It can receive more general television broadcasts, and furthermore, it can connect via a modem, either wired or wirelessly. By connecting to the communication network, one-way (sender to receiver) or two-way communication is possible. It is also possible to communicate information (between a sender and a receiver, or between receivers, etc.).

[0208] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. That is the case. [Explanation of Symbols]

[0209] 310 transistors 320 transistors 330 transistors 340 transistors 350 transistors 360 transistors 400 circuit boards 401 Gate Shutdown 402 Gate Insulator 403 Oxide semiconductor film 404 First metal oxide film 405a Source electrode 405b Drain electrode 407 Second metal oxide film 409 Insulating film 410 Conductive film

Claims

[Claim 1] Terminal gate and, The gate insulating film covering the gate electrode, A first metal oxide film provided in contact with the gate insulating film, An oxide semiconductor film is provided in a region that is in contact with the first metal oxide film and overlaps with the gate electrode, Source electrode and drain electrode in contact with the oxide semiconductor film, A second metal oxide film in contact with the aforementioned oxide semiconductor film, An insulating film covering the second metal oxide film, Semiconductor device.