Target yield correction method, correction device, and computer-readable recording medium

Abstract

The present invention provides a target yield correction method, a correction device, and a computer-readable recording medium. [Solution] The target yield correction method includes the steps of: acquiring multiple yields and multiple dimensions of a specific product on multiple wafers; dividing the yields based on these dimensions to generate multiple groups; calculating the average yield of each group; calculating the average yield and dimensions to generate multiple defect density values; inputting the defect density values ​​into a machine learning model, and having the machine learning model remove defect density values ​​that do not conform to a predetermined rule. The process includes the steps of generating a defect density curve based on the remaining defect density value, and generating multiple target yields by calculating the defect density curve and dimensions, with each target yield corresponding to one of the dimensions.

Description

[Technical Field]

[0001] The present invention relates to a correction method, and more particularly to a method for correcting the target yield. [Background technology]

[0002] The standard yield of general products is determined based on the defect density (D0) value at the wafer manufacturing plant. However, since the D0 value is constant, estimating the yield of all products using the D0 value may be inaccurate. [Overview of the project] [Problems that the invention aims to solve]

[0003] The present invention aims to provide a target yield correction method, a correction device, and a computer-readable recording medium. [Means for solving the problem]

[0004] One embodiment of the present invention provides a method for correcting target yield. This method includes the steps of obtaining multiple yields and multiple dimensions of a specific product on multiple wafers, wherein each wafer has multiple dies and each die has a specific product; dividing the yields based on the dimensions to generate multiple groups; calculating the average yield for each group; calculating the average yield and dimensions to generate multiple defect density values; inputting the defect density values ​​into a machine learning model, and having the machine learning model remove any defect density values ​​that do not conform to a predetermined rule; generating a defect density curve based on the remaining defect density values; and calculating the defect density curve and dimensions to generate multiple target yields, wherein each target yield corresponds to one of the dimensions.

[0005] The present invention further provides a correction device. The correction device comprises an input memory, an output memory, a memory circuit, and a processing circuit. The input memory is used to store multiple yields and multiple dimensions of a specific product on multiple wafers. Each wafer has multiple dies, and each die has a specific product. The output memory is used to store multiple target yields. The memory circuit stores a machine learning model. The processing circuit reads the yields and dimensions stored in the input memory and divides the yields based on different dimensions to generate multiple groups. The processing circuit calculates the average yield for each group and generates multiple defect density values ​​by calculating the average yield and dimensions. The processing circuit reads the machine learning model stored in the memory circuit and inputs the defect density values ​​into the machine learning model. The machine learning model removes defect density values ​​that do not conform to a predetermined rule. Furthermore, it generates a defect density curve based on the remaining defect density values ​​and generates a target yield by calculating the defect density curve and dimensions. Each target yield corresponds to one of the dimensions. The processing circuit stores the generated target yields in the output memory.

[0006] The correction method of the present invention can be implemented via the correction device of the present invention. The correction device may be hardware or firmware capable of performing a specific function, or it may be recorded on a recording medium in the form of program code (program) and implemented in combination with specific hardware. When the program code is read into and executed by an electronic device, processor, computer, or machine, the electronic device, processor, computer, or machine functions as the correction device of the present invention. [Effects of the Invention]

[0007] This invention makes it possible to calculate a more accurate defect density curve and target yield by using a machine learning model to exclude inappropriate defect density values. [Brief explanation of the drawing]

[0008] [Figure 1] This is a flowchart of the target yield correction method of the present invention. [Figure 2] This figure shows an example of defect density values. [Figure 3] This diagram shows the correspondence between defect density values ​​and dimensions of specific products with different manufacturing specifications. [Figure 4] This is a schematic diagram of the correction device of the present invention. [Modes for carrying out the invention]

[0009] To provide a clearer understanding of the object, features, and advantages of the present invention, examples are given below and described in detail in conjunction with the accompanying drawings. This specification provides several examples to illustrate different embodiments of the present invention and describes the technical features of each. The arrangement of components in the examples is for illustrative purposes only and does not limit the present invention. Furthermore, some reference numerals in the drawings of the examples are duplicated for the sake of brevity of explanation and do not imply any relationship between different examples.

[0010] Figure 1 is a flowchart of the target yield correction method of the present invention. The target yield correction method of the present invention can exist as program code (program). The program code (program) may be stored on a computer-readable recording medium. When a device reads the computer-readable recording medium and executes the program code (program), the device functions as the correction device of the present invention.

[0011] First, the average yield of multiple wafers is calculated (step S110). In this embodiment, step S110 comprises steps S111 to S113. In step S111, multiple yields and multiple dimensions for a specific product are obtained from multiple wafers. In some embodiments, each wafer has multiple dies, and each die has a specific product. The present invention does not limit the type of specific product. Any circuit on a die can be a specific product. For example, a specific product may be a memory such as SRAM or flash memory, or a functional circuit such as an ADC or DAC.

[0012] In one possible embodiment, after a wafer manufacturing plant has completed the wafer manufacturing process for each batch, the IC design company performs a chip probe (CP) test on each wafer in each batch and obtains the yield of each wafer. For example, suppose each batch contains 25 wafers. In this case, in step S111, the yield of a specific product (e.g., SRAM) can be collected from 10 batches of wafers (250 wafers in total). The dimensions of a specific product may be the same on wafers in the same batch, but may differ from the dimensions of a specific product on wafers in a different batch. Therefore, in step S111, multiple yields and multiple dimensions of a specific product are collected from multiple wafers.

[0013] Next, the yield is divided based on dimensions to generate multiple groups (step S112). In one possible embodiment, yields of the same dimensions are classified into the same group. For example, suppose a specific product in the first batch of wafers has a first dimension, a specific product in the second batch of wafers has a second dimension, a specific product in the third batch of wafers has a first dimension, a specific product in the fourth batch of wafers has a second dimension, and a specific product in the fifth batch of wafers has a third dimension. In this case, in step S112, the yield of the specific product in the first batch (e.g., 85%) and the yield of the specific product in the third batch (e.g., 90%) are classified into the first group. Furthermore, the yield of the specific product in the second batch (97%) and the yield of the specific product in the fourth batch (97%) are classified into the second group, and the yield of the specific product in the fifth batch (e.g., 94%) is classified into the third group.

[0014] The average yield for each group is calculated (step S113). For example, if the yields for the first group are 85% and 90%, after calculation in step S113, the average yield for the first group will be 87.5%. Similarly, if the yields for the second group are 97% and 97%, after calculation in step S113, the average yield for the second group will be 97%.

[0015] Next, the average yield and dimensions are calculated to generate multiple defect density values ​​(step S120). The present invention does not limit the method for calculating the average yield and dimensions in step S120. In one possible embodiment, step S120 uses algorithms such as the Poisson model, Murphy model, Exponential model, or Seeds model to calculate the average yield and dimensions and generate multiple defect density (D0) values. For example, these models define a relationship between yield (Y), dimensions (A), and defect density (D0) values ​​(e.g., Y = 1 / (1 + A * D0) in the Seeds model). Therefore, in step S120, the defect density (D0) value can be calculated by working backward from this relationship based on the average yield and dimensions and substituting the average yield and corresponding dimensions for each group.

[0016] Figure 2 shows an example of calculating the defect density value in step S120. This example explains how to calculate the corresponding defect density value from a specific yield and dimensional range. Assume that after the calculation in step S120, defect density values ​​211 to 213 are obtained. As shown in the figure, the dimensions of the specific product are 4 μm 2 ~5μm 2 If the product falls within this range and the yield is 94% or higher, the defect density value 211 is obtained by the calculation in step S120. The dimensions of the specific product are 5 μm 2 ~6μm 2 If the product falls within this range and the yield is 94% or higher, the defect density value 212 is obtained by the calculation in step S120. The dimensions of the specific product are 6 μm 2 ~7μm 2 If the result falls within this range and the yield is in the range of 90% to 92%, the defect density value 213 is obtained by the calculation in step S120. Note that Figure 2 shows an example of step S120 and is a different embodiment from the example shown in Figure 3.

[0017] FIG. 3 is a diagram showing the correspondence between the defect density values and dimensions of specific products having different manufacturing specifications calculated in step S120. Suppose that specific product 311 has the first manufacturing specification. For example, specific product 311 is manufactured by a 43-layer photomask process. Specific products 321 and 322 have the second manufacturing specification. For example, specific products 321 and 322 are manufactured by a 44-layer photomask process.

[0018] In FIG. 3, the defect density value of specific product 311 is approximately 0.35. The defect density values of specific products 321 and 322 are in the range of approximately 0.25 to 0.3. The defect density values of specific products 331 to 334 are approximately 0.2 or less. In the present embodiment, specific products 311, 321 to 322, and 331 to 334 are the same type of product, for example, SRAM.

[0019] Next, defect density values that do not conform to a predetermined rule are removed from these defect density values (step S130). In one possible embodiment, the defect density values obtained in step S120 are input into a machine learning model. The machine learning model removes defect density values that do not conform to a predetermined rule among the defect density values.

[0020] Taking FIG. 3 as an example, the number of mask layers of specific products 321 and 322 (for example, 44 layers) is less than that of specific products 331 to 334 (for example, 45 layers). In the semiconductor manufacturing process, the defect density (D0) is related to the complexity of the manufacturing process. The fewer the number of layers in the photomask process, the fewer the number of steps in the manufacturing process and the fewer the opportunities for defects to be introduced. Generally, the more layers in the photomask process, the more opportunities for defects to be introduced, so the defect density value tends to be higher. Therefore, theoretically, the defect density values of specific products 321 and 322 should be smaller than those of specific products 331 to 334. However, in FIG. 3, the defect density values of specific products 321 and 322 are larger than those of specific products 331 to 334. Since the defect density values of specific products 321 and 322 are inappropriate expressions, the machine learning model removes the defect density values of specific products 321 and 322.

[0021] Furthermore, the dimension of the specific product 311 (less than 4 μm 2 is smaller than the dimensions of the specific products 331 to 334 (more than 4 μm 2 ). Theoretically, the defect density value of the specific product 311 should be smaller than the defect density values of the specific products 331 to 334. However, in reality, the defect density value of the specific product 311 is larger than the defect density values of the specific products 331 to 334. Also, the number of mask layers of the specific product 311 (for example, 43 layers) is less than that of the specific products 331 to 334 (for example, 45 layers). Theoretically, the defect density value of the specific product 311 should be smaller than the defect density values of the specific products 331 to 334. However, in reality, the defect density value of the specific product 311 is larger than the defect density values of the specific products 331 to 334. Since the defect density value of the specific product 311 violates these two rules, it can be determined that the defect density value belongs to an ineligible expression. Therefore, the machine learning model removes the defect density value of the specific product 311.

[0022] In other embodiments, the influencing factors of the defect density value include the product dimension (chip area), the dimension of the memory cell, the process rule (cell rule, or version) (for example, 0.18 process, 0.16 process, 0.075 process), and the number of masks. For example, the larger the product dimension or the more the number of masks, the larger the defect density value of the product. Therefore, the machine learning model determines whether the defect density value generated in step S120 is reasonable based on the influencing factors of the defect density value, and removes unreasonable defect density values.

[0023] Next, a defect density curve is generated based on the remaining defect density values ​​(step S140). Using Figure 3 as an example, since the machine learning model has removed the defect density values ​​for products 311, 321, and 322, only the defect density values ​​for products 331 to 334 remain. Therefore, step S140 generates a defect density curve (baseline curve) 340 based on the defect density values ​​of products 331 to 334. Note that the defect density curve 340 may be calculated, for example, by approximating the defect density values ​​of each product 331 to 334.

[0024] The defect density curve 340 and its dimensions are calculated, and then multiple target yields are generated using the defect density curve 340 and the dimensions of a specific product (step S150). After removing unreasonable defect density values ​​(e.g., outliers due to test errors) in step S130, the defect density curve 340 more accurately reflects the reasonable defect density performance of the product. Specifically, in one embodiment, the yield model used in step S120 (e.g., Y=1 / (1+A*D0)) can be used again. The corrected defect density (D0) value corresponding to the desired dimension (A) is read (or calculated) from the defect density curve 340, and then the "target yield" (Y) corresponding to that dimension is calculated by substituting the dimension (A) and the corrected defect density (D0) value obtained from the curve into the yield model. For example, if the defect density value before removal was 0.47 (yield 90%), and the reasonable defect density value based on the curve 340 after removal is 0.15, then substituting this into the model and recalculating will yield a more realistic "target yield," such as 95%. In this embodiment, each target yield corresponds to one of these dimensions. In some embodiments, steps S110 to S150 are repeated to sequentially incorporate new products conforming to a predetermined rule into the statistics, dynamically modifying the defect density curve 340 and bringing the target yield closer to the actual product yield.

[0025] For example, suppose a wafer manufacturer advertises a yield of 95% for a specific product in a given batch of wafers. However, testing reveals that the yield of that specific product in the batch of wafers is actually 90%. However, during the testing process, the yield of the specific product may decrease due to overkill caused by insufficient stability of the test equipment or probe card, or due to errors during the testing process (debug). Therefore, a 90% yield is not necessarily reasonable.

[0026] To determine a reasonable target yield, in step S110, the average yield of the wafer is first obtained, and then, using a specific algorithm, multiple defect density values ​​are calculated based on the average yield and product dimensions (step S120). A machine learning model is used to remove defect density values ​​that indicate an unsuitable representation. Using the defect density values ​​that indicate a suitable representation, a reasonable target yield for the product at different dimensions is calculated. By continuously refining the target yield, it can be brought closer to the actual yield of the product and the current state of the manufacturing process.

[0027] In other embodiments, when classifying these yields based on different dimensions of the product in step S112, low yields below a threshold are further removed. For example, if the yield of some wafers out of 250 wafers is less than 60% as an outlier, that yield means it has low reference value. Therefore, in step S112, excessively low yields are removed. In one possible embodiment, step S112 inputs the multiple yields and multiple dimensions obtained in step S111 into a machine learning model. The machine learning model analyzes these yields, removes yields that are too low, and then classifies the remaining yields according to the dimensions to generate multiple groups.

[0028] In some embodiments, using the plurality of target yields generated in step S150, it is determined whether a specific product in the plurality of measured wafers is qualified. In this example, based on the dimensions of the specific product of the measured wafer, one is selected from the plurality of target yields as a specific target yield. For example, if the dimension of the specific product of the measured wafer is 4 μm 2 in this case, since each target yield in step S150 corresponds to a specific dimension, the target yield with a dimension of 4 μm 2 is selected as the specific yield. By selecting an appropriate target yield based on the product dimension, it is possible to avoid misjudging a qualified product as a defective product.

[0029] Next, it is determined whether the yield of the specific product of the measured wafer exceeds the specific target yield. Among a large number of measured wafers, if the yield of the specific product of the first measured wafer is below the specific target yield, the first measured wafer is highlighted. In one embodiment, for the highlighted first measured wafer, an analysis improvement process is executed to identify the cause of the yield decrease.

[0030] On the other hand, among a large number of measured wafers, if the yield of the specific product of the second measured wafer does not fall below the specific target yield, the yield and dimension of the specific product of the second measured wafer are input into the machine learning model. The machine learning model corrects the defect density value based on the yield and dimension of the specific product of the second measured wafer. Since the machine learning model sequentially incorporates the yields and dimensions of specific products that conform to the rules, the accuracy of the target yield can be improved.

[0031] In one possible embodiment, the machine learning model is trained before it is used. For example, training data is input to the machine learning model, and the model is trained to remove defect density values ​​that do not conform to a predetermined rule. In one possible embodiment, the training data includes multiple sample dimensions, multiple mask quantities, and multiple process specifications. The machine learning model constructs multiple associations (corrections) between these sample dimensions, mask quantities, and process specifications. After the training is complete, the machine learning model identifies and removes defect density values ​​that do not conform to a predetermined rule from among the multiple defect density values ​​based on these associations. In another embodiment, the training data includes an outlier threshold. In this case, the machine learning model constructs a removal rule based on the outlier threshold and removes outlier yields in step S112.

[0032] Figure 4 is a schematic diagram of the correction device of the present invention. As shown in the figure, the correction device 400 includes an input memory 410, a processing circuit 420, an output memory 430, and a storage circuit 440. The data stored in the input memory 410 is the data used by the machine learning model to generate the target yield.

[0033] For example, the input memory 410 stores the product number NUM, which is, for example, SRAM or flash. The input memory 410 further stores the product chip area AA, for example, the dimensions (dimensional data) of the SRAM. In another embodiment, the input memory 410 stores the product yield by wafer YIE for a particular product on multiple wafers. In this case, all dies on each wafer have the particular product. The yield for the particular product is the yield of the corresponding wafer. Therefore, each wafer has one yield. In some embodiments, the input memory 410 further stores the product mask layers MAS and the product used cell size / version VER, for example, 90 nanometers and 55 nanometers. In other embodiments, the input memory 410 further stores the process node NOD.

[0034] The processing circuit 420 reads the yield YIE and product dimensions AA stored in the input memory 410, and classifies the yield YIE of multiple wafers based on the product dimensions AA to generate multiple groups. In one possible embodiment, the processing circuit 420 reads the machine learning model ML stored in the memory circuit 440 and inputs the yield YIE and product dimensions AA into the machine learning model ML. In this case, the machine learning model ML classifies the remaining yields after removing the outlier yields.

[0035] In some embodiments, the processing circuit 420 calculates the average yield for each yield group and inputs the average yield and product dimensions AA to a machine learning model ML. The machine learning model ML calculates the average yield and product dimensions AA and generates a plurality of defect density (D0) values. In one possible embodiment, the processing circuit 420 inputs the plurality of defect density (D0) values ​​to the machine learning model ML. The machine learning model ML calculates the relationship between the plurality of defect density (D0) values ​​and product dimensions AA and generates a defect density curve CUR.

[0036] The machine learning model ML removes defect density (D0) values ​​that do not conform to a predetermined rule. For example, in Figure 3, products 321 and 322 have fewer mask layers (e.g., 44 layers) than products 331-334 (e.g., 45 layers), yet their defect density values ​​are higher than those of products 331-334. This indicates that the defect density values ​​of products 321 and 322 do not conform to the predetermined rule. Therefore, the machine learning model ML removes the defect density values ​​of products 321 and 322.

[0037] The machine learning model ML generates a defect density curve CUR based on the remaining defect density values ​​(defect density values ​​for products 331-334 shown in Figure 3). In one possible embodiment, the processing circuit 420 writes the defect density curve CUR to the output memory 430. In other embodiments, the processing circuit 420 inputs the defect density curve CUR and product dimensions AA to the machine learning model ML. The machine learning model ML calculates the defect density curve CUR and product dimensions AA and generates multiple target yield TARs. In this embodiment, each target yield corresponds to one of the multiple product dimensions AA. Furthermore, the processing circuit 420 can write the target yield TARs to the output memory 430.

[0038] In some embodiments, the machine learning model ML determines, based on the target yield TAR, whether the yield of subsequent products can reach the corresponding target yield. If the yield of a particular product on a wafer does not meet the corresponding target yield, the machine learning model ML highlights that wafer and outputs the highlight result LSS to the output memory 430. Therefore, test personnel or test equipment can determine which wafers have abnormalities based on the data in the output memory 430, and can analyze and process the abnormal wafers to identify the cause of the yield reduction.

[0039] The correction method of the present invention, a particular form thereof, or a part thereof may exist in the form of program code. The program code (program) may be stored on a floppy disk, optical disk, hard disk, or other machine-readable (e.g., computer-readable) storage medium. It may also exist as a computer program product, not limited to its external form. When the program code is read and executed by a machine (e.g., a computer), the machine is used to participate in the correction device of the present invention. Furthermore, the program code may also be transmitted via a transmission medium such as wires, cables, optical fibers, or any other transmission form. When the program code is received, read, and executed by a machine (e.g., a computer), the machine is used to participate in the correction device of the present invention. When implemented in a general-purpose processing unit, the program code, in combination with the processing unit, provides operation as a unique device similar to an application-specific logic circuit (ASIC). The step of reading the program code (program) into a computer and having the computer execute it includes the steps in Figure 1.

[0040] Unless otherwise specified, all terms used herein (including technical and scientific terms) should be interpreted in accordance with the general understanding of a person ordinary in the art. Furthermore, unless explicitly stated, definitions of terms should be interpreted in accordance with the definitions in general dictionaries and in accordance with their meanings in the relevant art literature, and not in an idealistic or overly formal manner. Terms such as "first," "second," etc., may be used to describe various components, but these components are not limited by these terms. These terms are used simply to distinguish one component from another. In the claims, terms such as "first," "second," etc., are used merely as symbols and are not intended to impose a numerical limitation on the subject matter.

[0041] Although the present invention has been disclosed with preferred embodiments as described above, this does not limit the invention. Those with ordinary skill in the art can make some modifications and alterations without departing from the spirit and scope of the invention. For example, the systems, apparatus, or methods described in the embodiments of the present invention can be implemented as specific embodiments of hardware, software, or a combination of hardware and software. Therefore, the scope of protection of the present invention is defined by the claims described below. [Explanation of Symbols]

[0042] 211~213...Defect density values Products 311, 321-322, 331-334… 340…Defect density curve 400... Correction device 410...Input memory 420… Processing circuit 430…Output memory 440...Memory circuit NUM…Product model number AA…Product dimensions YIE... Yield MAS… Mask Quantity VER…Process Version NOD…Process parameter ML... Machine Learning Model CUR…Defect Density Curve TAR…Target Yield LOSS… Highlight results

Claims

1. A method for correcting target yield, This is a process for obtaining multiple yields and multiple dimensions of a specific product on multiple wafers, wherein each wafer has multiple dies, and each die has a specific product. A step of dividing the yield based on the aforementioned dimensions and generating multiple groups, The process of calculating the average yield for each group, A step of calculating the average yield and the dimensions and generating a plurality of defect density values, The process involves inputting the defect density values ​​into a machine learning model, and the machine learning model removing the defect density values ​​that do not conform to a predetermined rule. A process to generate a defect density curve based on the remaining defect density value, The process involves calculating the defect density curve and the dimensions to generate multiple target yields, where each target yield corresponds to one of the dimensions. A method for correcting target yield, characterized by having the following:

2. The step of dividing the yield based on the dimensions and generating the groups is as follows: A step of removing low yields below a threshold from the aforementioned yield, A step of dividing the remaining yield based on the aforementioned dimensions and generating the aforementioned groups, The target yield correction method according to claim 1, characterized by having the following:

3. The step of dividing the yield based on the dimensions and generating the groups is as follows: The process of inputting the aforementioned yield into a machine learning model, The target yield correction method according to claim 2, characterized by having the following:

4. A step of inputting training data into the machine learning model, training the machine learning model, and removing defect density values ​​from the defect density values ​​that do not conform to the predetermined rule, The target yield correction method according to claim 3, characterized by having the following:

5. The aforementioned training data includes multiple sample dimensions, multiple mask quantities, and multiple process standards. The target yield correction method according to claim 4, characterized in that the machine learning model establishes multiple relationships between the sample dimensions, the mask quantity, and the process standard, and identifies defect density values ​​that do not conform to the predetermined rule from among the defect density values ​​based on the relationships.

6. A step of selecting one of the target yields as a specific target yield based on the dimensions of the specific product of multiple wafers to be measured, A step of determining whether the yield of the specific product of the wafer under measurement exceeds the specific target yield, If the yield of a specific product on the first wafer to be measured falls below the specific target yield, the first wafer to be measured is highlighted. The target yield correction method according to claim 1, characterized by having the following:

7. A step of performing an analysis and improvement process on the first wafer to be measured, The target yield correction method according to claim 6, characterized by having the following:

8. If the yield of the specific product in the second wafer to be measured does not fall below the specific target yield, the yield and dimensions of the specific product in the second wafer to be measured are input into the machine learning model. The target yield correction method according to claim 6, characterized in that the machine learning model modifies the defect density value based on the yield and dimensions of the second wafer under measurement.

9. Used to store multiple yields and dimensions of a specific product on multiple wafers, each wafer having multiple dies, and each die having an input memory for the specific product, An output memory used to store multiple target yields, A memory circuit for storing machine learning models, and The circuit includes a processing circuit that reads the yield and dimensions stored in the input memory and generates multiple groups by classifying the yield based on the dimensions, The processing circuit calculates the average yield for each group, and generates multiple defect density values ​​by calculating the average yield and the dimensions. The processing circuit reads the machine learning model stored in the memory circuit and inputs the defect density value into the machine learning model. The machine learning model removes defects from the defect density values ​​that do not conform to a predetermined rule. The machine learning model generates a defect density curve based on the remaining defect density value, calculates the defect density curve and the dimensions to generate the target yield, and each target yield corresponds to one of the dimensions. The processing circuit is a correction device characterized by storing the target yield in the output memory.

10. A recording medium that can be read by a computer, The step of loading the program stored on the recording medium into the computer and having the computer execute it is: A process for obtaining multiple yields and multiple dimensions of a specific product on multiple wafers, wherein each wafer has multiple dies, and each die has the specific product. A step of dividing the yield based on the aforementioned dimensions to generate multiple groups, A process for calculating the average yield of each of the aforementioned groups, A step of calculating the average yield and the dimensions and generating a plurality of defect density values, A step of inputting the defect density values ​​into a machine learning model, and having the machine learning model remove any defects from the defect density values ​​that do not conform to a predetermined rule. A process for generating a defect density curve based on the remaining defect density value. This process involves calculating the defect density curve and the dimensions to generate a plurality of target yields, where each target yield corresponds to one of the dimensions. A computer-readable recording medium characterized by including the following:

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