Pixel circuit

Abstract

Improve the control of light-emitting diodes. [Solution] The pixel circuit includes a constant current circuit, a pulse width modulation circuit, a light-emitting diode, a current control switch transistor on the path of the light-emitting current flowing through the light-emitting diode from the constant current circuit, and a bypass switch transistor connected to the anode and cathode of the light-emitting diode and synchronously controlled with the current control switch transistor. The current control switch transistor is turned ON and then OFF by a first pulse signal based on the pulse control signal from the pulse width modulation circuit. The bypass switch transistor is turned OFF and then ON by a second pulse signal based on the pulse control signal from the pulse width modulation circuit.

Description

Technical Field

[0001] The present disclosure relates to a pixel circuit.

Background Art

[0002] In a display device using micro LEDs (Light Emitting Diodes), a PWM (Pulse Width Modulation) driving method for modulating the emission time to display intermediate gradations is used. Among PWM driving methods, an analog PWM driving method that analogously changes the emission pulse width according to gradation data has been becoming common in recent years.

[0003] A pixel circuit for analog PWM driving includes a CCG (Constant Current generation) unit, a PWM unit, and a switch. The CCG unit generates a constant current, the PWM unit compares a gradation data voltage representing gradation data with a ramp voltage and converts it into a pulse signal, and the switch turns on and off the current generated by the CCG unit according to the pulse signal from the PWM unit.

[0004] In analog PWM driving, the driving current is ideally required to be a rectangular pulse, but in a real circuit, the fall of the current is sluggish, and due to the finite fall transition time, there is a limit in the low gradation display range. Shortening this fall transition time is one of the important issues.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

[0006] In PWM driving of LEDs, there is a need for a technology that can improve the falling edge sluggishness in the pulse waveform of the drive current. [Means for solving the problem]

[0007] One aspect of the present disclosure is a pixel circuit for controlling the emission of light-emitting diodes, comprising: a constant current circuit; a pulse width modulation circuit; a current control switch transistor on the path of the light-emitting current flowing through the light-emitting diode supplied by the constant current circuit; and a bypass switch transistor connected to the anode of the light-emitting diode and synchronously controlled with the current control switch transistor. The current control switch transistor is turned ON and then OFF by a first pulse signal based on a pulse control signal from the pulse width modulation circuit. The bypass switch transistor is turned OFF and then ON by a second pulse signal based on the pulse control signal from the pulse width modulation circuit, thereby controlling the emission period of the light-emitting diode. [Effects of the Invention]

[0008] According to one aspect of this disclosure, the falling edge sluggishness in the pulse waveform of the drive current of a light-emitting diode can be improved. [Brief explanation of the drawing]

[0009] [Figure 1] A schematic diagram shows the configuration of a pixel circuit according to one embodiment of this disclosure. [Figure 2] This is a timing chart illustrating the drive control (light emission control) of a micro-LED during a single frame period. [Figure 3] This shows the relationship between the control signal PWM_CNTL, the ramp voltage VSWEEP, and the grayscale data voltage PWM_DATA. [Figure 4] Figure 1 schematically shows the waveform of the light-emitting current in the pixel circuit and the waveform of the light-emitting current in the circuit with the bypass switch removed from the pixel circuit. [Figure 5] Shows a detailed configuration example of a pixel circuit. [Figure 6A] It is a sequence diagram showing the time change of signals in a pixel circuit within one frame. [Figure 6B] Shows the details of the signal waveforms of the two graphs in FIG. 6. [Figure 7] Shows an example graph of the waveforms of emission currents at different gradation levels. [Figure 8] It is a graph for explaining the difference in emission current waveforms between the related art and an embodiment of the present disclosure. [Figure 9] In Embodiment 2, it is a timing chart for explaining the drive control (emission control) of a micro LED during one frame period. [Figure 10] Shows a circuit configuration example of a pixel circuit according to an embodiment of the present disclosure that enables the timing chart shown in FIG. 9. [Figure 11] It is a diagram for explaining the change in the emission current waveform with respect to the change in the threshold voltage Vth of a bypass switch which is an N-type thin film transistor. [Figure 12A] It is a graph showing the relationship between the threshold voltage Vth of the bypass switch and the time difference (T2 - T1) in the graph of FIG. 11. [Figure 12B] It is a graph showing the relationship between the control voltage VBG of the bypass switch and the threshold voltage Vth. [Figure 13] Shows a circuit configuration example of a pixel circuit according to the third embodiment. [Figure 14] Shows the time change of some signals in the pixel circuit. [Figure 15] It is a plan view showing a configuration example of a micro LED display device. [Figure 16] It is a perspective view schematically showing a display portion of a micro LED display device.

MODE FOR CARRYING OUT THE INVENTION

[0010] One aspect of the present disclosure describes a pixel circuit for controlling the light emission of a micro LED (Light Emitting Diode). The pixel circuit causes the micro LED to emit light during a light emission period having a length corresponding to gradation data in one frame period, and stops the light emission of the micro LED in other periods. A longer light emission period means higher luminance of the micro LED.

[0011] One embodiment of the present disclosure controls the light emission period (luminance) of a micro LED by PWM (Pulse Width Modulation) control according to gradation data. The method of driving a micro LED by PWM (PWM driving) causes the micro LED to emit light by supplying a pulse drive current (also referred to as a light emission current or an LED current) having a pulse width corresponding to gradation data to the micro LED. The pulse width is the period between the median values of the rise and fall of the pulse drive current, and a longer pulse width means a longer light emission period, that is, higher luminance. In the low gradation region, the drive current can be composed of a steep rising waveform and a gentler falling waveform without reaching the maximum value at high gradation.

[0012] In analog PWM driving, the waveform of the drive current is ideally required to be rectangular. However, in an actual circuit, there is a finite falling transition period (transition region) in which the current fall is sluggish and the drive current value gradually decreases. During the falling transition period, the drive current gradually decreases.

[0013] The emission wavelength of a micro LED shifts to a shorter wavelength as the drive current density increases, and then shifts to the longer wavelength side as the drive current density further increases. Also, the external quantum efficiency (EQE) of a micro LED significantly decreases at low drive current densities. For example, when the supply period of the drive current in the low gradation is composed only of the falling transition period, in particular, the adverse effect on the light emission of the micro LED becomes large. Therefore, shortening this falling transition period is one of the important issues in PWM driving of micro LEDs.

[0014] A pixel circuit according to one aspect of this disclosure includes a constant current circuit, a PWM circuit, a current control switch, and a bypass switch. The constant current circuit generates a constant current. The PWM circuit generates a pulse signal from grayscale data. The PWM circuit generates a pulse signal by, for example, comparing a grayscale data voltage representing grayscale data with a ramp voltage. The current control switch turns the current flowing from the constant current circuit to the micro-LED on or off in response to the pulse signal from the PWM circuit.

[0015] The bypass switch is turned ON / OFF in the bypass path between the anode and cathode of the microLED. When the bypass switch is ON, the anode and cathode of the microLED conduct outside the microLED, and when the bypass switch is OFF, the anode and cathode are disconnected outside the microLED.

[0016] The pixel circuit controls the ON / OFF states of the bypass switch and current control switch using a control signal (PWM_CNTL) output from the PWM circuit. The slow fall of the light-emitting current occurs because the transition from ON to OFF of the current control switch is gradual. This is partly due to the long transition time of the PWM_CNTL signal. The bypass switch speeds up the interruption of the light-emitting current flowing to the microLED by allowing the current from the constant current circuit to bypass the path that passes through the slowly changing current control switch. <Embodiment 1>

[0017] Figure 1 schematically shows the configuration of a pixel circuit according to one embodiment of the present disclosure. The display area of ​​the display device includes a plurality of pixel circuits 10 arranged in a predetermined manner, for example, in a matrix. The pixel circuit 10 includes a micro(μ)LED 11, a constant current circuit 14, a PWM circuit 12, a current control switch 16, and a bypass switch 18. The color of the microLED 11 of all pixel circuits 10 may be the same, and the display area can include microLED 11 (pixels) of different colors, for example, red, blue, and green. Pixels of different colors are sometimes called sub-pixels.

[0018] The micro LED 11 includes an anode 111 and a cathode 112. A constant power supply voltage PVEE is applied to the cathode 112 of the micro LED 11. The internal configuration of the constant current circuit 14 and the PWM circuit 12 is arbitrary.

[0019] The constant current circuit 14 generates a constant current. A current control switch 16 is located between the micro LED 11 and the constant current circuit 2. The current control switch 16 is a thin-film transistor, and in the configuration example shown in Figure 1, it is a P-type thin-film transistor. The active layer of the P-type thin-film transistor can be formed using, for example, low-temperature polysilicon.

[0020] In the configuration example shown in Figure 1, the source of the current control switch 16 is connected to the terminal of the constant current circuit 14, and the drain is connected to the anode 111 of the micro LED 11. The current control switch 16 is positioned on the path of the current flowing from the constant current circuit 14 through the micro LED 11 to the power supply line that provides the power supply voltage PVEE, and switches that path ON / OFF.

[0021] The current control switch 16 may be placed between the micro LED 11 and the power line supplying the power supply voltage PVEE. The current control switch 16 may also be an N-type thin-film transistor.

[0022] The bypass switch 18 is positioned on the bypass path between the anode 111 and cathode 112 of the micro-LED 11. In the configuration example shown in Figure 1, the bypass switch 18 is an N-type thin-film transistor, with its drain connected to the anode 111 of the micro-LED 11 and its source connected to the cathode 112 of the micro-LED 11. The active layer of the N-type thin-film transistor can be formed using, for example, an oxide semiconductor or low-temperature polysilicon. The source of the bypass switch 18 may be connected to any negative power supply other than the cathode 112.

[0023] The bypass switch 18 is switched ON / OFF in the bypass path between the anode 111 and cathode 112 of the micro LED 11. When the bypass switch 18 is ON, the anode 111 and cathode 112 of the micro LED conduct outside the micro LED 11. When the bypass switch 18 is OFF, the anode 111 and cathode 112 are disconnected outside the micro LED 11.

[0024] The constant current circuit 14 includes an input terminal for the power supply voltage PVDD and an input terminal for current value data PAM_DATA, which indicates the output current value. The power supply voltage PVDD is higher than the power supply voltage PVEE. The current output from the constant current circuit 14 is turned ON / OFF by the current control switch 16.

[0025] The PWM circuit 12 generates and outputs a control signal PWM_CNTL from the grayscale data voltage PWM_DATA. The PWM circuit 12 includes a terminal to which the grayscale data voltage PWM_DATA is input and a terminal to which the ramp voltage VSWEEP is input. The ramp voltage VSWEEP is a voltage (signal) that increases or decreases linearly over time, and the grayscale data voltage PWM_DATA has a voltage value corresponding to the grayscale of the pixels in the video frame.

[0026] The PWM circuit 12 further includes a terminal to which the power supply voltage VH2 is input and a terminal to which the power supply voltage PWM_VEE is input. The power supply voltage VH2 and PWM_VEE correspond to the H level and L level of the control signal PWM_CNTL from the PWM circuit 12, respectively. The PWM circuit 12 compares the grayscale data voltage PWM_DATA, which represents the grayscale data, with the ramp voltage VSWEEP to generate the control signal PWM_CNTL, which is a pulse signal.

[0027] The current control switch 16 and the bypass switch 18 are turned on and off in response to the control signal PWM_CNTL from the PWM circuit 12. In the configuration example shown in Figure 1, the path from the PWM circuit 12 to the gate of the current control switch 16 consists only of wiring, and there are no resistors, capacitors, or thin-film transistors. Similarly, the path from the PWM circuit 12 to the gate of the bypass switch 18 consists only of wiring, and there are no resistors, capacitors, or thin-film transistors.

[0028] A circuit element (excluding wiring) may be present between the output terminal of the PWM circuit 12 and the gates of the current control switch 16 and / or the bypass switch 18. For example, the current control switch 16 and the bypass switch 18 may be composed of thin-film transistors of different polarities (P-type or N-type), and the control signal PWM_CNTL from the PWM circuit 12 may be input to the gate of one of the switches via an inverter. In other configuration examples, a delay circuit may be present between the PWM circuit 12 and the current control switch 16 or the bypass switch 18.

[0029] Figure 2 is a timing chart illustrating the drive control (light emission control) of the micro LED 11 during a single frame period. From the perspective of controlling the pixel circuit 10, the single frame period PF can be divided into three periods. The single frame period is the period for displaying one frame of image from external video data.

[0030] During the first period P1, data voltages are written to the pixel circuit 10, and at that time, the data voltages are corrected with respect to the threshold voltage Vth of the thin-film transistor. Specifically, the Vth-corrected grayscale data voltage PWM_DATA is written to the PWM circuit 12, and the Vth-corrected current value data PAM_DATA is written to the constant current circuit 14.

[0031] The second period P2, following the first period P1, is the light-emitting period. During this period, a light-emitting current is supplied to the micro-LED 11, causing it to emit light. The third period P3, following the second period, is the non-light-emitting period. During this period, the micro-LED 11 does not emit light. Period P1 is also a non-light-emitting period, and the micro-LED 11 is not emitting light. The longer the light-emitting period, the higher the brightness of the micro-LED 11.

[0032] The light-emitting current IE flowing from the constant current circuit 14 to the micro LED 11 has a constant maximum current value (Imax) and a high-level pulse shape with a low level as the reference level. The maximum current value Imax is specified by the current value data PAM_DATA.

[0033] As shown in Figure 2, the pulse shape of the light-emitting current IE has a steep rising edge (start edge) and a falling edge (end edge) that changes more gradually (blunter) than the rising edge. The time of the rising edge (at a specific point) coincides with the start time of the light-emitting period P2, and the time when the light-emitting current IE becomes almost zero coincides with the end time of the light-emitting period P2. Note that the slope of the edge may be defined, for example, by the slope of the inflection point.

[0034] Referring to the pixel circuit 10 shown in Figure 1, the light-emitting current IE is controlled by the current control switch 16 and the bypass switch 18. Furthermore, the current control switch 16 and the bypass switch 18 are controlled ON / OFF by the control signal PWM_CNTL from the PWM circuit 12. In the configuration examples shown in Figures 1 and 2, the current control switch 16 and the bypass switch 18 are synchronously controlled.

[0035] Furthermore, in this configuration example, the same control signal PWM_CNTL is input to the current control switch 16 and the bypass switch 18, and they are mutually exclusive (reciprocal) ON / OFF controlled. That is, when one of the current control switch 16 and the bypass switch 18 is ON, the other is OFF, and when one is OFF, the other is ON. They switch ON / OFF simultaneously. The switching of the current control switch 16 and the bypass switch 18 roughly coincides with the start and end of the light emission period.

[0036] In the example shown in Figure 2, the control signal PWM_CNTL has a low-level pulse shape with a high level being the reference level. The pulse shape of the control signal PWM_CNTL has a steep falling edge (start edge) and a rising edge (end edge) that changes more gradually (blunted) than the falling edge. The end edge of the control signal PWM_CNTL may be gentler than the end edge of the light emission current IE.

[0037] Here, we will explain the principle of pulse width control of the control signal PWM_CNTL using the grayscale data voltage PWM_DATA corresponding to the grayscale level. Figure 3 shows the relationship between the control signal PWM_CNTL31, the ramp voltage VSWEEP32, and the grayscale data voltage PWM_DATA33. In the graph of Figure 3, the horizontal axis represents time and the vertical axis represents voltage. In Figure 3, the control signal PWM_CNTL31 shows an ideal waveform 31, but the actual waveform has a blunt rising edge, as shown in Figure 2.

[0038] The ramp voltage VSWEEP32 decreases linearly from the start of the illumination period P2. The ramp voltage may also increase linearly. The gradation data voltage PWM_DATA33 has a predetermined voltage set for each gradation level, and each predetermined voltage for each gradation level is a constant voltage. Lower gradation data voltages PWM_DATA33 correspond to higher gradation levels. The intersection of the ramp voltage VSWEEP32 and the gradation data voltage PWM_DATA33 coincides with the rising edge of the control signal PWM_CNTL. Thus, the PWM circuit 12 uses the input ramp voltage VSWEEP to generate the control signal PWM_CNTL from the gradation data voltage PWM_DATA.

[0039] As explained with reference to Figures 1 and 2, the pixel circuit 10 includes a bypass switch 18 in addition to the current control switch 16. The bypass switch 18 has the function of making the falling edge of the light-emitting current IE steeper.

[0040] Figure 4 schematically shows the waveform of the light-emitting current IE in the pixel circuit 10 shown in Figure 1, and the waveform of the light-emitting current in the circuit with the bypass switch 18 removed from the pixel circuit 10. In the graph of Figure 4, the horizontal axis represents time, and the vertical axis represents the current value. Line 41 shows the waveform of the light-emitting current in the circuit with the bypass switch 18 removed from the pixel circuit 10. Line 42 shows the waveform of the light-emitting current IE in the pixel circuit 10 shown in Figure 1.

[0041] As described above, a bypass switch 18 is connected between the anode and cathode of the micro LED 11, and the bypass switch 18 and the current control switch 16 are controlled ON / OFF by the output (PWM_CNTL) of the PWM circuit 12. Furthermore, the bypass switch 18 and the current control switch 16 are driven ON / OFF mutually.

[0042] One of the reasons for the slow fall of the light-emitting current shown by line 41 is the gradual transition of the current control switch 16 from the ON state to the OFF state. This is due to the long transition time of the control signal PWM_CNTL from the PWM circuit 12, as explained with reference to Figure 2.

[0043] As can be seen from the comparison of waveforms 42 and 41 in Figure 4, the bypass switch 18 speeds up the interruption of the light-emitting current flowing to the micro LED 11 by bypassing the slowly changing current of the current control switch 16.

[0044] Figure 5 shows a detailed configuration example of the pixel circuit 10. The PWM circuit 12 consists of seven thin-film transistors (hereinafter also simply referred to as transistors) and two capacitive elements. The constant current circuit 14 consists of five thin-film transistors and one capacitive element. The number of transistors and capacitances in each of the two circuits 12 and 14 are arbitrary and may be common or different between the two circuits 12 and 14. In addition, these may include other types of circuit elements, such as resistive elements.

[0045] In Figure 5, the PWM circuit 12 includes transistors M11-M17 and capacitors C11 and C12. Transistors M11-M17 are P-type thin-film transistors and are switch transistors.

[0046] The source of transistor M11 is supplied with the power supply voltage VH2, and its drain is connected to the source of transistor M13 and either the source or drain of transistor M12. Note that the source and drain of a transistor are reversed depending on the direction of the current flowing through it. Source / drain refers to either the source or the drain. The control signal PWM_EM is input to the gate of transistor M11.

[0047] The gate of transistor M12 is input with the scan signal PWM_S2. One of its source / drain is connected to the source / drain of transistors M11 and M13, and the other is input with the grayscale data voltage PWM_DATA.

[0048] The gate of transistor M13 is connected to one end of capacitor C11 and to the source / drain of transistors M14 and M15. The other end of capacitor C11 is input to the ramp voltage VSWEEP. The source of transistor M13 is connected to the drains of transistors M11 and M12, and its drain is connected to one of the source / drain of transistor M14 and to the source of transistor M16.

[0049] The gate of transistor M14 is input with the scan signal PWM_S2. One source / drain of transistor M14 is connected to the source / drain of transistors M13 and M16, and the other is connected to the gate of transistor M13 and the source / drain of transistor M15.

[0050] The gate of transistor M15 is input with the scan signal PWM_S1. One of the source / drain terminals of transistor M15 is connected to the gate of transistor M13 and the source / drain terminal of transistor M14, while the other terminal is input with a constant reference voltage PWM_VREF.

[0051] The gate of transistor M16 receives the control signal PWM_EM. The drain of transistor M16 is connected to the source of transistor M17. The control signal PWM_CNTL is output from node N1 between transistors M16 and M17.

[0052] The gate of transistor M17 receives the control signal PWM_SE. The drain of transistor M17 receives a negative constant potential VSE. Capacitor C12 is connected between the source and drain of transistor M17. The control signal PWM_SE becomes low level before the writing of the grayscale data voltage PWM_DATA, turning transistor M17 ON and setting the potential of node N1 to VSE. Capacitor C12 has the function of maintaining the potential of node N1.

[0053] The grayscale data voltage PWM_DATA is written to capacitor C11 via transistors M12, M13, and M14. Subsequently, the descending ramp voltage VSWEEP is input to C11, and transistor M13 is kept in the OFF state until its gate voltage matches VH2-Vth. During this time, the potential of node N1 is held at potential VSE by capacitor C12. When the gate voltage of transistor M13 falls below VH2-Vth, transistor M13 turns ON, VH2 is output to node N1, and a pulsed control signal PWM_CNTL is output. The principle of this operation is equivalent to the principle of the control signal PWM_CNTL, which changes according to the difference between the grayscale data voltage PWM_DATA and the ramp voltage VSWEEP, as explained with reference to Figure 3.

[0054] The constant current circuit 14 includes transistors M21-M25 and capacitor C21. Transistors M21-M25 are P-type transistors, and all transistors except transistor M23 are switch transistors.

[0055] The gate of transistor M21 is input with the control signal PAM_EM. The source of transistor M21 is input with a constant power supply voltage PVDD, and its drain is connected to either the source or drain of transistor M22 and to the source of transistor M23.

[0056] The gate of transistor M22 receives the scan signal PAM_S2. The source / drain of transistor M22 receives the current value data PAM_DATA.

[0057] The gate of transistor M23 is connected to the source / drain of capacitor C21 and transistors M24 and M25. The drain of transistor M23 is connected to the output node N2 of the constant current circuit 14.

[0058] The gate of transistor M24 is input with the scan signal PAM_S2. One source / drain of transistor M24 is connected to the output node N2 of the constant current circuit 14, and the other is connected to the gate of transistor M23, capacitor C21, and the source / drain of transistor M25.

[0059] The gate of transistor M25 is input to the scan signal PAM_S1. One of the source / drain terminals of transistor M25 is input to a constant reference voltage PAM_VREF, and the other is connected to the gate of transistor M23, capacitor C21, and the source / drain terminals of transistor M24.

[0060] The current value data PAM_DATA is written to capacitor C21 via transistors M22, M23, and M24. Transistor M23 outputs a current corresponding to the voltage of capacitor C21 to output node N2.

[0061] The current control switch 16 is a P-type transistor, with its source connected to the output node N2 of the constant current circuit 14 and its drain connected to the source of transistor M31. The gate of the current control switch 16 is input to the control signal PWM_CNTL from the PWM circuit 12.

[0062] A P-type transistor M31 is connected between the anode of the micro-LED 11 and the current control switch 16. Transistor M31 is a switch, and the control signal PAM_EM is input to its gate. The source is connected to the drain of the current control switch 16, and the drain is connected to the anode of the micro-LED 11.

[0063] Transistor M32 is a switch, and the scan signal PAM_S2 is input to its gate. Transistor M32 is a P-type transistor. The source of transistor M32 is connected to the anode of micro LED 11, and a constant power supply potential PVEE is supplied to its drain.

[0064] The bypass switch 18 is an N-type transistor, and its source and drain are connected to the anode and cathode of the micro LED 11, respectively. The gate of the bypass switch 18 is input to the control signal PWM_CNTL from the PWM circuit 12.

[0065] The current control switch 16 is composed of a P-type transistor, and the bypass switch 18 is composed of an N-type transistor with the opposite conductivity. Therefore, the current control switch 16 and the bypass switch 18 are exclusively switched ON / OFF by the control signal PWM_CNTL. Note that both the bypass switch M18 and the transistor M32 have an anode reset function for the micro LED 11. Therefore, transistor M32 may be omitted.

[0066] Figure 6A is a sequence diagram showing the time variation of the signal in the pixel circuit 10 within one frame. In graphs 51-56, the horizontal axis represents time and the vertical axis represents voltage. Graph 51 shows the time variation of the control signal group (CC) of the constant current circuit 14. Graph 52 shows the time variation of the control signal group (PWM) of the PWM circuit 12. In Figure 6A, graphs 51 and 52 schematically show the time variation of multiple control signals, respectively. Details of the signal groups during the period indicated by the dashed circle 510 in graph 51 and the period indicated by the dashed circle 520 in graph 52 are shown in Figure 6B.

[0067] Graph 53 shows the time variation of the lamp voltage VSWEEP input to the PWM circuit 12. Graph 54 shows the time variation of the control signal PWM_CNTL output from the PWM circuit 12. Graph 55 shows the time variation of the anode voltage of the micro LED 11. Graph 56 shows the time variation of the drive current (light emission current) of the micro LED 11.

[0068] Figure 6B shows the time evolution of the signal group during the period indicated by the dashed circle 510 in Graph 51 and the signal group during the period indicated by the dashed circle 520 in Graph 52. In Graphs 510 and 520, the horizontal axis represents time, and the vertical axis represents the voltage of the signal.

[0069] Graph 510 shows the time variation of the control signal group (CC) of the constant current circuit 14. In graph 510, line 511 shows the time variation of signal PAM_S1, line 512 shows the time variation of signal PAM_S2, and line 513 shows the time variation of signal PAM_EM.

[0070] Signal PAM_S1 (line 511) is a pulse signal that transitions from a high level to a low level at time t1 and changes from a low level to a high level at time t2. Signal PAM_S2 (line 512) is a pulse signal that transitions from a high level to a low level at time t2 and returns from a low level to a high level at time t3. Signal PAM_EM (line 513) is a pulse signal that transitions from a high level to a low level at time t9 and changes from a low level to a high level at a predetermined time during one frame period (not shown). In one example, the pulse width of signals PAM_S1 and PAM_S2 is one horizontal period.

[0071] Graph 520 shows the time variation of the control signal group (PWM) of the PWM circuit 12. In graph 520, line 521 shows the time variation of signal PWM_S1, line 522 shows the time variation of signal PWM_S2, line 523 shows the time variation of signal PWM_SE, and line 524 shows the time variation of signal PWM_EM.

[0072] Signal PWM_S1 (line 521) is a pulse signal that transitions from a high level to a low level at time t4 and changes from a low level to a high level at time t5. Signal PWM_S2 (line 522) is a pulse signal that transitions from a high level to a low level at time t5 and returns from a low level to a high level at time t6. Signal PWM_SE (line 523) is a pulse signal that transitions from a high level to a low level at time t6 and returns from a low level to a high level at time t7. Signal PWM_EM (line 524) is a pulse signal that transitions from a high level to a low level at time t8 and changes from a low level to a high level at a predetermined time during one frame period (not shown). In this example, the pulse width of signals PWM_S1, PWM_S2, and PWM_SE is 1 horizontal period.

[0073] Figure 7 shows an example of a graph of the emission current waveform at different grayscale levels. In the graph, the horizontal axis represents time and the vertical axis represents the emission current. The rising edge 601 is common to the emission current waveforms at different grayscale levels. Line 602 shows the waveform at the maximum grayscale level of 255. Line 610 shows the maximum value of the emission current at all grayscale levels.

[0074] As the grayscale level increases, the time from the rising edge 601 to the falling edge increases. The amount of charge supplied in one frame period increases with increasing grayscale level. The maximum value of the emission current for some low grayscale levels may be smaller than this maximum value 610. That is, their emission current waveforms may consist only of the falling edge portion. For example, the emission current for low grayscale levels may rise to a value smaller than the maximum value 610 and then gradually decrease thereafter.

[0075] Figure 8 is a graph illustrating the difference in light emission current waveforms between the related technology and one embodiment of the present disclosure. In the graph, the horizontal axis represents the grayscale level, and the vertical axis represents the maximum value of the light emission current. The solid line 651 shows the relationship between grayscale and the maximum value of the light emission current in the pixel circuit 10 including the bypass switch 18 shown in Figure 1. The dashed line 652 shows the relationship between grayscale and the maximum value of the light emission current in the pixel circuit of the related technology, with the bypass switch 18 removed from the pixel circuit 10.

[0076] Comparing the two waveforms 651 and 652, it can be seen that the pixel circuit 10 of one embodiment of the present disclosure can secure a higher maximum current down to lower grayscale levels compared to pixel circuits of related technologies. At lower grayscale levels, the light emission current rises to a current value smaller than the maximum current value at higher grayscale levels and immediately begins to decrease. At higher grayscale levels, the light emission current rises to a constant maximum current value, maintains that value for a predetermined period, and then begins to decrease on the falling edge.

[0077] As described above, the pixel circuit 10 in one embodiment of the present disclosure controls the bypass switch 18 with the same control signal PWM_CNTL as the current control switch 16, and turns the bypass switch 18 ON in accordance with the different light emission OFF times for each grayscale. The bypass switch 18 makes it possible to secure a high current maximum even down to lower grayscales by making the falling edge of the light emission current steeper.

[0078] Embodiment 1 synchronously controls the current control switch and the bypass switch with a control signal based on the control signal PWM_CNTL from the PWM circuit 12. Embodiment 1 controls the current control switch 16 and the bypass switch 18 with the same control signal PWM_CNTL. The ON state and OFF state of the current control switch 16 and the bypass switch 18 are mutually exclusive and change simultaneously. <Embodiment 2>

[0079] For example, as explained with reference to Figure 2, the above embodiment applies the same control signal PWM_CNTL to the gates of the current control switch 16 and the bypass switch 18 to exclusively control them ON / OFF. In other words, in the above embodiment, when the current control switch 16 is turned ON, the bypass switch 18 is turned OFF, and when the current control switch 16 is turned OFF, the bypass switch 18 is turned ON.

[0080] One embodiment of the present disclosure described below involves turning on the bypass switch at a time different from the time the current control switch is turned off. Specifically, the bypass switch is turned on before the time the current control switch is turned off. This makes the fall of the light-emitting current steeper. However, the present disclosure does not exclude designs in which the bypass switch is turned on after the time the current control switch is turned off.

[0081] Figure 9 is a timing chart illustrating the drive control (light emission control) of the micro-LED 11 during one frame period. The main points to explain are the differences from the timing chart shown in Figure 2. Unless otherwise specified, the explanation in Figure 2 can be applied.

[0082] In the timing chart shown in Figure 2, the time when the bypass switch 18 turns ON and the time when the current control switch 16 turns OFF are the same. In the timing chart shown in Figure 9, the time T1 when the bypass switch 28 turns ON and the time T2 when the current control switch 16 turns OFF are different.

[0083] Specifically, the time T1 when the bypass switch 28 is turned ON precedes the time T2 when the current control switch 16 is turned OFF. This control can increase the proportion of the bypassed current. This makes the falling edge of the light-emitting current steeper, bringing the current waveform closer to an ideal rectangular waveform. Note that in the timing chart shown in Figure 9, the falling edge of the control signal PWM_CNTL is almost vertical, so the time when the current control switch 16 is turned ON and the time when the bypass switch 28 is turned OFF are (effectively) the same time T0.

[0084] The control timing of the current control switch 16 and the bypass switch 28 shown in Figure 9 can be achieved, for example, by lowering the absolute value of the threshold voltage Vth of the thin-film transistor constituting the bypass switch 28 or by increasing the channel width of the thin-film transistor, thereby increasing the current driving capability of the bypass switch 28.

[0085] The following describes how to adjust the control timing by adjusting the threshold voltage Vth of the bypass switch 28. Figure 10 shows an example of the circuit configuration of a pixel circuit 20 according to one embodiment of this disclosure, which enables the timing chart shown in Figure 9. The following mainly describes the differences from the pixel circuit 10 shown in Figure 5. Unless otherwise specified, the explanation in Figure 5 may be applied.

[0086] The pixel circuit 20 includes a bypass switch 28 having a dual-gate structure instead of the bypass switch 18 in Figure 5. The dual-gate structure includes a top gate and a bottom gate that sandwich the channel region in the stacking direction. One end of the charge-retaining capacitor C31 is connected to the back gate 281 of the bypass switch 28. The back gate 281 is either the top gate or the bottom gate. The other end of the charge-retaining capacitor C31 is connected to the cathode of the micro-LED 11.

[0087] The control voltage VBG is written to the charge-retaining capacitor C31, which then holds that voltage. The N-type transistor switch M35 may be ON during the period when the control voltage VBG is written to the charge-retaining capacitor C31, and OFF at other times. Switch M35 is switched ON / OFF by the control signal SBG, and the control voltage VBG is written to the charge-retaining capacitor C31 via the ON switch M35.

[0088] The control voltage VBG is the back gate bias of the bypass switch 28. The threshold voltage Vth of the bypass switch 28 changes according to the back gate bias. For example, in an N-type thin-film transistor, increasing the back gate bias in the positive direction decreases the threshold voltage Vth. The display device including the pixel circuit 20 can achieve the desired waveform of the falling edge of the light-emitting current by writing the control voltage VBG, which has been set to an optimal value in advance, to the charge-holding capacitor C31.

[0089] Furthermore, in the manufacturing of the display device, it is possible to correct display unevenness in the display area by using a two-dimensional brightness measurement camera in conjunction with the back gate bias to fine-tune the light emission time for each pixel. In the pixel circuit 20, transistor M32 is omitted, but the pixel circuit 20 may include transistor M32.

[0090] Figure 11 illustrates the change in the light-emitting current waveform in response to a change in the threshold voltage Vth of the bypass switch 28, which is an N-type thin-film transistor. In Figure 11, the period for data writing immediately preceding the light-emitting period P2 is omitted from the illustration. Time T2 is the time when the current control switch 16 is turned OFF, and time T1 is the time when the bypass switch 28 is turned ON.

[0091] Graph 71 shows the time variation of the light-emitting current in each of the pixel circuits 20, including bypass switches 28 with different threshold voltages Vth. Graph 71 also shows the light-emitting current waveform in the pixel circuit 20 with the bypass switches 28 removed.

[0092] In Graph 71, the horizontal axis represents time, and the vertical axis represents the emission current value. Line 711 shows the emission current waveform in the pixel circuit 20 of Figure 10, excluding the bypass switch 28. Other lines, including line 712, show the emission current waveform in the pixel circuit 20 including the bypass switch 28 with a threshold voltage Vth. Line 712 is the current waveform due to the state change of the current control switch 16 and the bypass switch 28 in Figure 11.

[0093] Graph 71 shows the change in the light emission current waveform when the threshold voltage Vth of the bypass switch 28 is changed from 4.5V to 0.5V. As the threshold voltage Vth decreases, time T1 becomes earlier. That is, the difference between time T2 and time T1 becomes larger. As a result, the falling edge time of the light emission current becomes earlier as the threshold voltage Vth decreases. Also, the slope of the falling edge of the light emission current becomes steeper as the threshold voltage Vth decreases.

[0094] Figure 12A is a graph showing the relationship between the threshold voltage Vth of the bypass switch 28 and the time difference (T2-T1) in graph 71 of Figure 11. Figure 12B is a graph showing the relationship between the control voltage VBG (back gate bias) of the bypass switch 28 and the threshold voltage Vth. As shown in Figure 12A, the time difference (T2-T1) increases as the threshold voltage Vth of the bypass switch 28 decreases. In other words, time T1 becomes earlier. As shown in Figure 12B, the threshold voltage Vth decreases as the back gate bias increases. Note that the relationship between the threshold voltage Vth and the time difference (T2-T1) and the relationship between the back gate bias and the threshold voltage Vth in a P-type thin-film transistor are the opposite of those in an N-type thin-film transistor.

[0095] The synchronous control of the current control switch and the bypass switch is common to both Embodiment 1 and Embodiment 2. That is, the difference between the ON time of the bypass switch and the OFF time of the current control switch is constant (including 0), and the difference between the OFF time of the bypass switch and the ON time of the current control switch is constant (including 0). In addition, in Embodiment 1 and Embodiment 2, the bypass switch is turned ON before (or simultaneously with) the current control switch is turned OFF.

[0096] Alternatively, the current control switch may have a dual-gate structure instead of the bypass switch. The time at which the current control switch is turned OFF can be adjusted by the threshold voltage of the current control switch. The timing of the state changes of the current control switch and / or bypass switch may be adjusted by the circuit configuration instead of characteristic values ​​such as the threshold voltage and channel width of the thin-film transistor.

[0097] For example, a delay circuit may be inserted between the output of the PWM circuit 12 and the current control switch. The delay circuit delays the change in the control signal input to the current control switch (falling or rising edge) compared to the change in the control signal input to the bypass switch. The signal from the delay circuit is a control signal based on the control signal PWM_CNTL. Referring to the example in Figure 11, the current control switch changes to ON after the bypass switch changes to OFF, and the light emission period P2 begins. Subsequently, the current control switch changes to OFF after the bypass switch changes to ON.

[0098] As described above, Embodiment 2 synchronously controls the current control switch 16 and the bypass switch 28 with a control signal based on the control signal PWM_CNTL from the PWM circuit 12. The synchronous control in Embodiment 2 turns on the bypass switch 28 and turns off the current control switch 16 at different times to end the light emission period.

[0099] More specifically, in Embodiment 2, the current control switch 16 is turned OFF after the bypass switch 28 is turned ON. The same control signal PWM_CNTL may be input to the current control switch 16 and the bypass switch 28, and the relationship between their control timings can be adjusted, for example, by the threshold voltage of the bypass switch 28. <Embodiment 3>

[0100] In the third embodiment, all thin-film transistors in the pixel circuit are thin-film transistors of the same conductivity type. This simplifies the manufacturing process. In the pixel circuit configuration example described below, all thin-film transistors are P-type thin-film transistors. All thin-film transistors may also be N-type thin-film transistors.

[0101] Figure 13 shows an example of the circuit configuration of a pixel circuit 30 according to one embodiment of the present disclosure. The differences from the pixel circuit 10 shown in Figure 5 will be explained below. Unless otherwise specified, the explanation in Figure 5 may be applied.

[0102] In the pixel circuit 30, the bypass switch 38 is made of a P-type thin-film transistor. The pixel circuit 30 includes an inverter 40 that generates the control signal BYP_CNTL for the bypass switch 38. The inverter 40 generates the control signal BYP_CNTL from the control signal PWM_CNTL from the PWM circuit 12. The control signal BYP_CNTL is input to the gate of the bypass switch 38. The control signal BYP_CNTL is a signal with the polarity inverted relative to the control signal PWM_CNTL.

[0103] The inverter 40 includes transistors M41, M42, and M43, which are switches. These are P-type thin-film transistors. The inverter 40 further includes a capacitor C41. The control signal PWM_CNTL is input to the gate of transistor M41. A constant power supply voltage VDD2 is supplied to the source of transistor M41, and its drain is connected to output node N5. Output node N5 is connected to the gate of bypass switch 38, which supplies the control signal BYP_CNTL to the gate of bypass switch 38.

[0104] A constant potential (negative potential) VSE is supplied to the drain of diode-connected transistor M42, and its source is connected to the gate of transistor M43. A constant potential VSE is supplied to the drain of transistor M43, and its source is connected to output node N5. One end of capacitor C41 is connected to the gate of transistor M43, and the other end is connected to output node N5. The potential (voltage) VSE can be shared with the VSE of PWM circuit 12. The power supply voltage VDD2 can also be shared with VH2 of PWM circuit 12 or PVDD of constant current circuit 14, but for reasons described later, it is more convenient to use a separate power supply and allow for independent adjustment.

[0105] Although transistor M32 is omitted in pixel circuit 30, pixel circuit 30 may include transistor M32. The configuration of the PWM circuit 12 and constant current circuit 14 is the same as that of pixel circuit 10 shown in Figure 5. The current control switch 16 is also a P-type thin-film transistor.

[0106] Figure 14 shows the time variation of several signals in the pixel circuit 30. Graph 81 shows the time variation of the lamp voltage VSWEEP. The horizontal axis represents time, and the vertical axis represents voltage. Graph 82 shows the time variation of the control signals PWM_CNTL and BYP_CNTL. The horizontal axis represents time, and the vertical axis represents voltage. Line 821 shows the waveform of the control signal PWM_CNTL. The group of lines indicated by the dashed circle 821 shows the waveform of the control signal BYP_CNTL at different power supply voltages VDD2. Specifically, Graph 83 shows the time variation of the light-emitting current. The horizontal axis represents time, and the vertical axis represents current. Graph 83 shows a group of waveforms of the light-emitting current at different power supply voltages VDD2.

[0107] Time T1 indicates the time when the bypass switch 38 is turned ON at a specific power supply voltage VDD2. Time T2 indicates the time when the current control switch 16 is turned OFF. Similar to Embodiment 2, the current control switch 16 is turned OFF after the bypass switch 38 is turned ON. Note that, as in Embodiment 1, times T1 and T2 may be the same time.

[0108] By changing the voltage value of VDD2 of the inverter 40, the time difference between time T1 and time T2 can be adjusted to select the optimal operating conditions. For example, by adjusting the power supply voltage VDD2 of the inverter 40, the current control switch 16 and the bypass switch 38 can be controlled to satisfy the condition that time T2 > time T1.

[0109] In Graph 82, the dashed circle 822 shows the waveform transformation of the control signal BYP_CNTL when the power supply voltage VDD2 of the inverter 40 is changed from 3.0V to -1.0V. As the power supply voltage VDD2 decreases, the maximum potential of BYP_CNTL decreases and the pulse width narrows. As a result, the turn-on time T1 of the P-type bypass switch 38 becomes earlier, and as shown in Graph 83, the pulse width of the light-emitting current narrows and the slope of the falling edge becomes steeper.

[0110] As described above, Embodiment 3 synchronously controls the current control switch and the bypass switch with a control signal based on the control signal PWM_CNTL from the PWM circuit 12. In Embodiment 3, the control signal PWM_CNTL is input to the gate of the current control switch 16, and the inverted signal of the control signal PWM_CNTL is input to the gate of the bypass switch 38.

[0111] In this way, a control signal based on the control signal PWM_CNTL controls the current control switch 16 and the bypass switch 38. The control signal based on the control signal PWM_CNTL is a signal generated from the control signal PWM_CNTL and may be the control signal PWM_CNTL itself or a different control signal (e.g., an inverted signal or a delayed signal).

[0112] Embodiment 3 synchronously controls the current control switch 16 and the bypass switch 38 with a control signal based on the control signal PWM_CNTL from the PWM circuit 12. The synchronous control in Embodiment 3 turns on the bypass switch 38 and turns off the current control switch 16 at different times to end the light emission period.

[0113] More specifically, in Embodiment 3, the current control switch 16 is turned OFF after the bypass switch 38 is turned ON. The relationship between these control timings can be adjusted, for example, by the power supply voltage VDD2 in the inverter circuit that generates the control signal from the control signal PWM_CNTL to the bypass switch 38. <Embodiment 4>

[0114] The following describes an example configuration of a micro-LED display device that includes the pixel circuit of the above embodiment. Figure 15 is a plan view showing an example configuration of a micro-LED display device. The micro-LED display device includes a display area composed of an array of pixel circuits 95 and micro-LEDs 951, and a control circuit for controlling the pixel circuit 95, which includes a signal circuit 91 and a scanning circuit 92. The signal circuit 91 and the scanning circuit 92 supply a power supply voltage (constant voltage) and a control signal for controlling the pixel circuit 95. The signal circuit 91 and the scanning circuit 92 are also controlled by an image processing circuit (not shown). The image processing circuit is a circuit that processes image data input from outside the micro-LED display device.

[0115] The pixel circuit 95 controls the micro LED 951. The components of the pixel circuit 95 are formed on the TFT substrate as shown in Figure 15. The micro LED 951 is connected to connection pads 947 and 948 on the TFT substrate and is electrically connected to the pixel circuit 95 via connection pads 947 and 948. For example, the anode and cathode of the micro LED 951 are physically and electrically connected to pads 947 and 948 by solder, respectively.

[0116] Figure 16 is a schematic perspective view showing the display section of a micro-LED display device. A red LED chip 901R, a green LED chip 901B, and a blue LED chip 901G are arranged in a matrix on a TFT substrate 905. Data lines or power lines 911 and transmission lines 912 are also illustrated in Figure 16. Pads 947 and 948, which would be exposed if the LED chips were removed, are shown for illustrative purposes. The areas between the LED chips 901R, 901B, and 901G mounted on the TFT substrate 905 are filled with partition material 903. For example, a black material such as black resin is used for the partition material 903 to reduce surface reflectivity.

[0117] While embodiments of the present disclosure have been described above, the present disclosure is not limited to the embodiments described above. Those skilled in the art can easily modify, add to, and transform each element of the above embodiments within the scope of the present disclosure. It is possible to replace parts of the configuration of one embodiment with the configuration of another embodiment, and to add the configuration of another embodiment to the configuration of one embodiment. [Explanation of Symbols]

[0118] 10 Pixel Circuit 11 Micro LEDs 12 PWM circuit 14 Constant current circuit 16 Current control switch 18 Bypass Switch 91 Signal circuit 92 Scanning Circuit

Claims

1. A pixel circuit for controlling the light emission of a light-emitting diode, Constant current circuit and Pulse width modulation circuit, A current control switch transistor is located on the path of the light-emitting current flowing through the light-emitting diode, which is supplied from the constant current circuit, A bypass switch transistor is connected to the anode of the light-emitting diode and is synchronously controlled with the current control switch transistor, Includes, The current control switch transistor is turned ON and then OFF by a first pulse signal based on the pulse control signal from the pulse width modulation circuit. The bypass switch transistor controls the light emission period of the light-emitting diode by being turned OFF and then ON by a second pulse signal based on the pulse control signal from the pulse width modulation circuit. Pixel circuit.

2. A pixel circuit according to claim 1, The first pulse signal and the second pulse signal are both pulse control signals from the pulse width modulation circuit. Pixel circuit.

3. A pixel circuit according to claim 1, The bypass switch transistor is turned OFF simultaneously with the ON of the current control switch transistor, and is turned ON simultaneously with the OFF of the current control switch transistor. Pixel circuit.

4. A pixel circuit according to claim 1, Before the current control switch transistor is turned OFF, the bypass switch transistor is turned ON. Pixel circuit.

5. The pixel circuit according to claim 4, The bypass switch transistor has a dual gate structure, A voltage that adjusts the threshold voltage of the bypass switch transistor is applied to the back gate of the bypass switch transistor. Pixel circuit.

6. A pixel circuit according to claim 1, The current control switch transistor and the bypass switch transistor have different conductivity types. Pixel circuit.

7. A pixel circuit according to claim 1, The current control switch transistor and the bypass switch transistor have the same conductivity type. One of the first pulse signal and the second pulse signal is a pulse control signal from the pulse width modulation circuit. The other of the first pulse signal and the second pulse signal is a signal obtained by inverting the pulse control signal from the pulse width modulation circuit. Pixel circuit.

8. The pixel circuit according to claim 7, The system further includes an inverter circuit that outputs the other of the first pulse signal and the second pulse signal from the pulse control signal from the pulse width modulation circuit, By adjusting the power supply voltage input to the inverter circuit, the time difference between the time the current control switch transistor is turned OFF and the time the bypass switch transistor is turned ON can be controlled. Pixel circuit.

9. A display device, A display area including a plurality of light-emitting diodes and a plurality of pixel circuits that control the light emission of the plurality of light-emitting diodes, A control circuit for controlling the plurality of pixel circuits, which is located outside the display area, Includes, Each of the multiple pixel circuits is Constant current circuit and Pulse width modulation circuit, A current control switch transistor is located on the path of the light-emitting current flowing through the light-emitting diode, which is supplied from the constant current circuit, A bypass switch transistor is connected to the anode of the light-emitting diode and is synchronously controlled with the current control switch transistor, Includes, The current control switch transistor is turned ON and then OFF by a first pulse signal based on the pulse control signal from the pulse width modulation circuit. The bypass switch transistor is turned OFF and then ON by a second pulse signal based on the pulse control signal from the pulse width modulation circuit. This is characterized by controlling the light emission period of the light-emitting diode. Display device.

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