Multilayer capacitor and its manufacturing method
A multilayer capacitor with a PVDF-based dielectric and IMC/epoxy resin external electrodes addresses MLCC weaknesses, offering enhanced mechanical strength, flexibility, and thermal stability, and improves processability by eliminating high-temperature firing.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- SAMSUNG ELECTRO MECHANICS CO LTD
- Filing Date
- 2025-06-10
- Publication Date
- 2026-06-29
AI Technical Summary
Multilayer ceramic capacitors (MLCCs) face challenges with warping and cracking under harsh operating conditions due to low material strength and inherent defects, particularly in automotive electrical equipment, necessitating improvements in flexibility, durability, thermal stability, and reliability.
A multilayer capacitor design incorporating a dielectric layer composed of a polyvinylidene fluoride (PVDF) compound and a carbon-based material, with external electrodes containing an intermetallic compound (IMC) and a thermosetting epoxy resin, enhancing mechanical strength and flexibility while maintaining high dielectric constant and thermal stability.
The capacitor exhibits high mechanical strength, flexibility, and durability, with improved thermal stability and processability, reducing the risk of cracking and warping, and eliminating the need for high-temperature firing processes.
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Figure 2026106370000001_ABST
Abstract
Description
[Technical Field]
[0001] This disclosure relates to a multilayer capacitor and a method for manufacturing the same. [Background technology]
[0002] Electronic components that use ceramic materials include capacitors, inductors, piezoelectric elements, varistors, and thermistors. Among these ceramic electronic components, multilayer ceramic capacitors (MLCCs) can be used in a variety of electronic devices due to their advantages such as small size, guaranteed high capacitance, and ease of mounting.
[0003] For example, multilayer ceramic capacitors (MLCCs) can be used as chip-type capacitors that are mounted on the substrates of various electronic products such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diodes (OLEDs), computers, personal portable devices, and smartphones, and play a role in charging and discharging electricity.
[0004] Recently, the range of applications has expanded to the automotive electrical equipment industry, making it difficult to guarantee against warping and cracking under harsh operating conditions. MLCCs, which use ceramic materials as dielectrics, have low material strength and inherent defects due to cracking and fracture, and various studies are being conducted to improve this. [Overview of the project] [Problems that the invention aims to solve]
[0005] One embodiment provides a multilayer capacitor that offers excellent flexibility, durability, thermal stability, processability, and reliability.
[0006] Another embodiment provides a method for manufacturing the multilayer capacitor. [Means for solving the problem]
[0007] One embodiment provides a laminated capacitor comprising a capacitor body including a dielectric layer and an internal electrode layer, and an external electrode disposed outside the capacitor body, wherein the dielectric layer includes a composite dielectric including a polyvinylidene fluoride (PVDF) compound and a carbon-based material, and the external electrode includes an electrode layer containing an intermetallic compound (IMC) including copper (Cu) and tin (Sn), and a thermosetting epoxy resin.
[0008] The polyvinylidene fluoride (PVDF) compound may include one or more selected from polyvinylidene fluoride (PVDF) homopolymer, polyvinylidene fluoride (PVDF) copolymer, polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE), polyvinylidene fluoride-hexafluoropropylene (PVDF-HFP), and polyvinylidene fluoride-chlorotrifluoroethylene (PVDF-CTFE).
[0009] The carbon-based material may include one or more selected from carbon nanotubes (CNTs), reduced graphene oxide (rGO), and carbon black.
[0010] The carbon-based material may be included in an amount of 1% to 50% by weight relative to the total amount of the polyvinylidene fluoride (PVDF) compound and the carbon-based material.
[0011] The composite dielectric can have a form in which the carbon-based material is dispersed in a matrix of the polyvinylidene fluoride (PVDF) compound.
[0012] The dielectric layer may further include a self-assembled monolayer on top of the layer containing the composite dielectric.
[0013] The self-assembled monolayer may contain one or more selected from polystyrene brush (PS-brush) and phenylhexyltrichlorosilane (PTS).
[0014] The intermetallic compound (IMC) may include one or more selected from Cu6Sn5 and Cu3Sn.
[0015] The thermosetting epoxy resin may be included in an amount of 1% to 10% by weight relative to the total amount of the intermetallic compound (IMC) and the thermosetting epoxy resin.
[0016] The intermetallic compound (IMC) may further contain silver (Ag).
[0017] The intermetallic compound (IMC) may be a molten mixture of a high-melting-point metal containing copper (Cu) and a low-melting-point metal containing tin (Sn).
[0018] The thermosetting epoxy resin may include one or more selected from bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, novolac-modified bisphenol A type epoxy resin, and urethane-modified bisphenol A type epoxy resin.
[0019] The electrode layer may further contain copper (Cu).
[0020] Another embodiment includes the steps of mixing a polyvinylidene fluoride (PVDF)-based compound and a carbon-based material to form a composite dielectric film; forming a conductive metal layer on the composite dielectric film; stacking a plurality of the composite dielectric films on which the conductive metal layer is formed to manufacture a capacitor body including a dielectric layer and an internal electrode layer; and applying and curing a paste for forming an electrode layer, which is a mixture of a conductive metal, a low melting point metal, and a thermosetting epoxy resin, on one surface of the capacitor body to form an electrode layer of an external electrode. A method for manufacturing a multilayer capacitor is provided.
[0021] The conductive metal can include one or more selected from copper (Cu) and silver (Ag).
[0022] The low melting point metal can include a Sn-Ag-Cu alloy.
Effects of the Invention
[0023] A multilayer capacitor according to an embodiment has high mechanical strength and warp strength, excellent flexibility and durability, and is excellent not only in dielectric constant and thermal stability but also in processability and reliability.
Brief Description of the Drawings
[0024] [Figure 1] It is a perspective view showing a multilayer capacitor according to an embodiment. [Figure 2] It is a cross-sectional view of the multilayer capacitor cut along the line I-I' of FIG. 1. [Figure 3] It is a cross-sectional view of the multilayer capacitor cut along the line II-II' of FIG. 1. [Figure 4] It is an exploded perspective view showing the stacked structure by decomposing the capacitor body of FIG. 1. [Figure 5] It is a schematic view of the inside of an external electrode according to an embodiment. [Figure 6] It is a schematic view showing the formation process of an intermetallic compound (IMC) according to an embodiment. [Figure 7] This is an SEM (scanning electron microscope) analysis image of the external electrode according to Example 1. [Figure 8] This is an optical microscope analysis image of the external electrode according to Example 1. [Figure 9] This is an XRD (X-ray diffraction) graph of the dielectric layer according to Example 1. [Figure 10] This is an XRD (X-ray diffraction) graph of the external electrode according to Example 1. [Figure 11] This is an FT-IR (Fourier Transform Infrared Spectroscopy) analysis graph of the thermosetting epoxy resin present on the external electrode in Example 1. [Modes for carrying out the invention]
[0025] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, so that those with ordinary skill in the art to which the present invention pertains can easily implement it. In order to clearly illustrate the present invention in the drawings, parts not relevant to the description have been omitted, and the same or similar components are denoted by the same reference numerals throughout the specification. Furthermore, in the accompanying drawings, some components are exaggerated, omitted, or shown schematically, and the sizes of each component do not fully reflect their actual sizes.
[0026] The accompanying drawings are provided to facilitate understanding of the embodiments disclosed herein and should not be understood as limiting the technical ideas disclosed herein, but rather as including all modifications, equivalents, or substitutions that fall within the concept and scope of the present invention.
[0027] Terms including ordinal numbers, such as "first," "second," etc., can be used to describe various components, but the components are not limited by such terms. These terms are used solely for the purpose of distinguishing one component from another.
[0028] Furthermore, when a layer, membrane, region, plate, or other part is said to be "on top of" or "above" another part, it includes not only cases where it is "directly above" the other part, but also cases where there is another part in between. Conversely, when one part is said to be "directly above" another part, it means that there is no other part in between. Also, when a part is said to be "on top of" or "above" a reference part, it means that it is located above or below the reference part, and does not necessarily mean that it is located "above" or "above" in the opposite direction of gravity.
[0029] Throughout the specification, terms such as “includes” or “has” should be understood to indicate the presence of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, and not to preemptively exclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof. Therefore, when a part says that a component “includes,” this means, unless otherwise stated, that it may include other components rather than excluding them.
[0030] Furthermore, throughout the specification, "on a plane" means when the subject is viewed from above, and "on a cross-section" means when the subject is viewed from the side of a cross-section cut perpendicularly into it.
[0031] Furthermore, throughout the specification, "connected" may mean not only that two or more components are directly connected, but also that two or more components are indirectly connected through other components, that they are not only physically connected but also electrically connected, or that they are a single unit despite being called by different names depending on their location or function.
[0032] Furthermore, throughout this specification, "contained as a major component" means that at least one component present in a given region has the highest content relative to the total amount of components.
[0033] A multilayer capacitor according to one embodiment will be described below with reference to Figures 1 to 4.
[0034] Figure 1 is a perspective view showing a multilayer capacitor according to one embodiment; Figure 2 is a cross-sectional view of the multilayer capacitor cut along the line I-I' in Figure 1; Figure 3 is a cross-sectional view of the multilayer capacitor cut along the line II-II' in Figure 1; and Figure 4 is an exploded perspective view showing the multilayer structure when the capacitor body of Figure 1 is disassembled.
[0035] The L-axis, W-axis, and T-axis shown in Figures 1 to 4 represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis direction) is perpendicular to the broad surface (main surface) of the sheet-shaped component and can be used, for example, with the same concept as the stacking direction in which the dielectric layers 111 are stacked. The length direction (L-axis direction) can be a direction that extends parallel to the broad surface (main surface) of the sheet-shaped component and is approximately perpendicular to the thickness direction (T-axis direction). For example, it can be a direction in which the first external electrode 131 and the second external electrode 132 are located on both sides. The width direction (W-axis direction) can be a direction that extends parallel to the broad surface (main surface) of the sheet-shaped component and is approximately perpendicular to the thickness direction (T-axis direction) and the length direction (L-axis direction). The length in the length direction (L-axis direction) of the sheet-shaped component can be longer than the length in the width direction (W-axis direction).
[0036] Referring to Figures 1 to 4, a multilayer capacitor 100 according to one embodiment includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outside of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed at opposing ends of the capacitor body 110 in the longitudinal direction (L-axis direction).
[0037] The capacitor body 110 may, for example, have a roughly hexahedral shape.
[0038] For the convenience of describing one embodiment, the two surfaces of the capacitor body 110 that face each other in the thickness direction (T-axis direction) are defined as the first and second surfaces, the two surfaces connected to the first and second surfaces are defined as the third and fourth surfaces, the two surfaces that face each other in the length direction (L-axis direction) are defined as the first and second surfaces, the two surfaces connected to the third and fourth surfaces are defined as the fifth and sixth surfaces, and the two surfaces that face each other in the width direction (W-axis direction) are defined as the fifth and sixth surfaces.
[0039] For example, the first surface, which is the bottom surface, can be the surface facing the mounting direction. Also, the first to sixth surfaces may be flat, but this embodiment is not limited to this. For example, the first to sixth surfaces may be curved surfaces with a convex central portion, and the corners that form the boundaries of each surface may be rounded.
[0040] The shape, size, and number of dielectric layers 111 of the capacitor body 110 are not limited to those shown in the drawings of this embodiment.
[0041] The capacitor body 110 includes a plurality of dielectric layers 111 and internal electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and a first internal electrode layer 121 and a second internal electrode layer 122 that are alternately arranged in the thickness direction (T-axis direction) between the dielectric layers 111.
[0042] At this time, the boundaries between adjacent dielectric layers 111 of the capacitor body 110 may become so integrated that they are difficult to confirm without using a scanning electron microscope (SEM).
[0043] The capacitor body 110 may include an active region and cover regions 112, 113.
[0044] The active region is a region in which the dielectric layer 111 and the internal electrode layers 121 and 122 are alternately stacked, and is the part that contributes to the formation of capacitance in the multilayer capacitor 100. Specifically, the active region can be a region in which the first internal electrode layer 121 or the second internal electrode layer 122, which are stacked along the thickness direction (T-axis direction), overlap.
[0045] The cover regions 112 and 113 are thickness-direction margins and can be located on the first and second surfaces of the active region, respectively, in the thickness direction (T-axis direction). Such cover regions 112 and 113 may be formed by a single dielectric layer 111 or by two or more dielectric layers 111 being laminated on the upper and lower surfaces of the active region, respectively.
[0046] Furthermore, the capacitor body 110 may also include a side margin region.
[0047] The side margin region is a widthwise margin portion and can be located on both opposite ends of the active region in the widthwise direction (W-axis direction), i.e., on the fifth and sixth surfaces, respectively. The side margin region can be formed by applying a conductive paste layer for the internal electrode layer to the surface of the dielectric green sheet, applying the conductive paste layer only to a portion of the surface of the dielectric green sheet, and not applying the conductive paste layer to both sides of the dielectric green sheet surface, then stacking the dielectric green sheets and firing them, but the method of formation is not limited to this.
[0048] The cover regions 112, 113 and the side margin regions serve to prevent damage to the internal electrode layers 121, 122 due to physical or chemical stress.
[0049] Dielectric layer The dielectric layer 111 according to one embodiment may include a composite dielectric comprising a polyvinylidene fluoride (PVDF) compound and a carbon-based material. That is, the composite dielectric is a polymer dielectric and is distinct from a ceramic dielectric.
[0050] Generally, multilayer capacitors use ferroelectric ceramic powder such as BaTiO3 as the dielectric. However, ferroelectric materials in ceramic substrates are heavy, brittle, and require high-temperature processing, limiting their technical usefulness. In particular, cracks are prone to occur when the chip is subjected to impact or tension. According to one embodiment, by applying a polymer dielectric instead of a ceramic dielectric to the dielectric layer, the durability of the multilayer capacitor can be improved, flexibility can be added, and crack occurrence can be minimized.
[0051] Furthermore, according to one embodiment, by applying a polymer dielectric material in which a high dielectric material is compounded into a polymer matrix, it is possible to obtain a polymer dielectric material that not only exhibits the advantages of polymer dielectrics such as mechanical flexibility, corrosion resistance, reliability, and processability, but also has a high operating voltage and a high dielectric constant.
[0052] In other words, a multilayer capacitor according to one embodiment may be a multilayer polymer capacitor (MLPC) that uses a polymer dielectric, which is distinguished from a multilayer ceramic capacitor (MLCC) that uses a ceramic dielectric.
[0053] MLCCs using ceramic dielectrics have difficulty achieving the same high capacitance as MLPCs for the same area and volume, and because they are ferroelectric dielectric materials, their capacitance is highly dependent on the DC bias. Therefore, the capacitance changes with voltage, which may result in a decrease in capacitance compared to the specifications. In contrast, MLPCs using polymer dielectrics according to one embodiment have the characteristic that their capacitance does not change significantly even when the voltage changes.
[0054] Furthermore, MLCCs using ceramic dielectrics exhibit different temperature characteristics depending on the type of dielectric, but all show temperature dependence, leading to degradation failures, requiring lower operating electric fields, making them brittle, and sensitive to thermal shock. In contrast, according to one embodiment, MLPCs using polymer dielectrics increase in capacitance simultaneously with temperature rise, exhibit low temperature dependence in terms of materials, and have relatively stable temperature characteristics.
[0055] Furthermore, the dielectric material of MLCCs exhibits a piezoelectric effect, which can cause unexpected signals in certain circuits. In some cases, this piezoelectric effect results in electrical noise, and when a potential or electric field is applied to the surface of an MLCC, deformation can occur in the frequency range of 20 Hz to 20 kHz, which is audible to humans. This is called acoustic noise or singing noise. In contrast, MLPCs that use a polymer dielectric according to one embodiment do not use ceramics, and therefore do not exhibit a piezoelectric effect, thus reducing acoustic noise.
[0056] One embodiment of the composite dielectric includes a polyvinylidene fluoride (PVDF)-based compound and a carbon-based material.
[0057] Specifically, the composite dielectric can have a form in which a carbon-based material is dispersed in a matrix of polyvinylidene fluoride (PVDF) compounds.
[0058] Polyvinylidene fluoride (PVDF) compounds are ferroelectric polymers that can act as dielectric matrices. PVDF compounds possess inherently high polarization and high dielectric constant due to the presence of highly electronegative fluorine (F) in the polymer chains and a CF dipole arrangement on the crystal structure. Furthermore, because they exist in five crystalline forms, they exhibit various properties depending on their crystallinity, as well as excellent mechanical properties such as flexibility, light weight, and ease of processing, along with high thermochemical stability.
[0059] Carbon-based materials have high dielectric constants of several hundred or more and can act as fillers dispersed in the matrix of PVDF-based compounds.
[0060] As mentioned above, PVDF-based compounds are flexible and possess excellent electrical properties, but their dielectric constant is not sufficiently high to replace high-dielectric ceramic dielectrics. According to one embodiment, by using a composite dielectric obtained by compounding a PVDF-based compound with a carbon-based material, that is, a composite dielectric obtained by dispersing a carbon-based material, which is a high-dielectric filler, in a matrix of PVDF-based compounds, the dielectric constant of the polymer dielectric can be increased. Therefore, a multilayer capacitor using the composite dielectric according to one embodiment can have excellent flexibility, durability, processability, and reliability.
[0061] In one embodiment, a carbon-based material is used as a highly dielectric filler. When ceramic powder is dispersed in a polymer as a highly dielectric filler to increase the dielectric constant, there are limitations to the amount that can be filled. When the proportion of ceramic powder increases, the polymer loses flexibility, leading to a decrease in physical properties such as mechanical strength. On the other hand, in one embodiment, when a carbon-based material is compounded with a PVDF-based compound polymer, the morphology can be stabilized even at low concentrations, and the thermal, electrical, and mechanical properties of the PVDF-based compound matrix can be increased.
[0062] Specifically, polyvinylidene fluoride (PVDF) compounds may include one or more selected from polyvinylidene fluoride (PVDF) homopolymer, polyvinylidene fluoride (PVDF) copolymer, polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE), polyvinylidene fluoride-hexafluoropropylene (PVDF-HFP), and polyvinylidene fluoride-chlorotrifluoroethylene (PVDF-CTFE).
[0063] Polyvinylidene fluoride (PVDF) compounds can be present in the composite dielectric, i.e., in amounts of 50% to 99% by weight relative to the total amount of the PVDF compound and carbon-based material, for example, 60% to 98% by weight, or 70% to 97% by weight. When the PVDF compound is included in the above range, the flexibility, durability, processability, and reliability of the multilayer capacitor can be improved.
[0064] The carbon-based material may include one or more selected from carbon nanotubes (CNTs), reduced graphene oxide (rGO), and carbon black, for example, carbon nanotubes (CNTs).
[0065] Carbon nanotubes (CNTs) are generally extremely fine cylindrical materials with aspect ratios ranging from tens to thousands. Carbon nanotubes (CNTs) have a thermal conductivity nearly twice that of diamond, and an electric current transfer capacity about 1,000 times higher than that of copper (Cu), and can dramatically improve physical properties even at low concentrations.
[0066] Carbon nanotubes (CNTs) can be single-walled CNTs, double-walled CNTs, multi-walled CNTs, bundled CNTs, or mixtures thereof.
[0067] The carbon-based material can be present in an amount of 1% to 50% by weight relative to the total amount of the composite dielectric, i.e., the polyvinylidene fluoride (PVDF) compound and the carbon-based material. For example, it can be present in an amount of 2% to 40% by weight, or 3% to 30% by weight. When the carbon-based material is included in the above range, it has a sufficient filling effect, excellent dispersibility, can increase the dielectric constant of the polymer dielectric which is the composite dielectric, and can improve the flexibility, durability, processability, and reliability of the multilayer capacitor.
[0068] XRD (X-ray diffraction analysis) of the dielectric layer 111 reveals the material information of the composite dielectric described above.
[0069] Specifically, after curing the multilayer capacitor 100 in an epoxy mixture, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to a depth of 1 / 2 in the L-axis direction. After fixing, the sample is maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allows observation of the active region where the dielectric layer and the internal electrode layer intersect. Subsequently, X-ray diffraction analysis (XRD) can be performed on the dielectric layer within the active region of the cross-sectional sample using Cu Kα rays. For example, when the active region of the cross-sectional sample is divided into three equal parts—upper, middle, and lower—X-ray diffraction analysis (XRD) can be performed on the dielectric layer in each region using Cu Kα rays.
[0070] XRD analysis results show, for example, a strong characteristic peak for carbon-based materials (002) appears at 2θ between 25° and 27°, and a strong characteristic peak for PVDF-based compounds (110) appears at 2θ between 19° and 21°.
[0071] When the aforementioned composite dielectric is formed in layers, the dielectric layer 111 may further include a self-assembled monolayer on top of the layer containing the aforementioned composite dielectric in order to reduce the interfacial resistance with the internal electrode layers 121 and 122.
[0072] The self-assembled monolayer may contain one or more selected from polystyrene brush (PS-brush) and phenylhexyltrichlorosilane (PTS).
[0073] The average thickness (average length in the T-axis direction) of the dielectric layer 111 may be between 0.1 μm and 8.0 μm, for example, between 0.1 μm and 6.0 μm. When the average thickness of the dielectric layer 111 is within the above range, the reliability of the multilayer capacitor is excellent.
[0074] The average thickness of the dielectric layer 111 can be measured by ion milling and scanning electron microscope (SEM) analysis after the multilayer capacitor 100 has been cured in an epoxy mixture, polished, and then ion milled. For example, a Thermo Fisher Scientific Verios G4 product can be used as the scanning electron microscope, with measurement conditions of 10kV, 0.2nA, and an analysis magnification of 100, so that at least one, three, five, or ten dielectric layers 111 are visible. The scanning electron microscope (SEM) image may also be used to determine the arithmetic mean of the dielectric layer 111 thickness at 10 points separated by a predetermined interval from the reference point, with the reference point being the center point in the length direction (L-axis direction) or width direction (W-axis direction) of the dielectric layer 111. The spacing between the 10 points can be adjusted according to the scale of the scanning electron microscope (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the dielectric layer 111. If all 10 points are not located within the dielectric layer 111, the position of the reference point can be changed or the spacing between the 10 points can be adjusted.
[0075] internal electrode layer The internal electrode layers 121 and 122, namely the first internal electrode layer 121 and the second internal electrode layer 122, are electrodes having opposite polarities and are alternately arranged facing each other along the T-axis direction with the dielectric layer 111 in between, with one end of each being exposed through the third and fourth surfaces of the capacitor body 110.
[0076] The first internal electrode layer 121 and the second internal electrode layer 122 can be electrically insulated from each other by the dielectric layer 111 placed in between them.
[0077] The ends of the first internal electrode layer 121 and the second internal electrode layer 122, which are alternately exposed through the third and fourth surfaces of the capacitor body 110, can be electrically connected to the first external electrode 131 and the second external electrode 132, respectively.
[0078] The internal electrode layers 121 and 122 contain a conductive metal, and may include one or more selected from, for example, aluminum (Al), copper (Cu), tin (Sn), nickel (Ni), and alloys thereof.
[0079] The internal electrode layers 121 and 122 can be formed on the composite dielectric that constitutes the dielectric layer 111 by vapor deposition using a conductive metal.
[0080] The average thickness of the internal electrode layers 121 and 122 can be 0.1 μm to 2 μm.
[0081] The average thickness of the internal electrode layers 121 and 122 can be measured by scanning electron microscopy (SEM) analysis. Specifically, from a scanning electron microscopy (SEM) image of a cross-sectional sample obtained in the same manner as the method for measuring the average thickness of the dielectric layer 111, the average thickness of the internal electrode layers 121 and 122 can be determined as the arithmetic mean of the thicknesses of 10 points located at predetermined intervals from the reference point, using the central point in the length direction (L-axis direction) or width direction (W-axis direction) of the internal electrode layers 121 and 122 as the reference point. The interval of the 10 points can be adjusted according to the scale of the scanning electron microscopy (SEM) image, for example, between 1 μm and 100 μm, 1 μm and 50 μm, or 1 μm and 10 μm. In this case, all 10 points must be located within the internal electrode layers 121 and 122. If all 10 points are not located within the internal electrode layers 121 and 122, the position of the reference point can be changed or the interval between the 10 points can be adjusted.
[0082] The capacitor body 110 can be formed by firing a laminate in which multiple dielectric layers 111 and internal electrode layers 121 and 122 are stacked.
[0083] external electrode The external electrodes 131 and 132, namely the first external electrode 131 and the second external electrode 132, are supplied with voltages of different polarities from each other and can be electrically connected to the exposed portions of the first internal electrode layer 121 and the second internal electrode layer 122, respectively.
[0084] With the above configuration, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge is accumulated between the first internal electrode layer 121 and the second internal electrode layer 122, which face each other. At this time, the capacitance of the multilayer capacitor 100 is proportional to the overlapping area of the first internal electrode layer 121 and the second internal electrode layer 122, which overlap each other along the T-axis in the active region.
[0085] The first external electrode 131 and the second external electrode 132 are arranged on the third and fourth surfaces of the capacitor body 110, respectively, and may include first and second connecting portions that connect to the first internal electrode layer 121 and the second internal electrode layer 122, and first and second band portions that are arranged at the corners where the third and fourth surfaces of the capacitor body 110 meet the first and second surfaces or the fifth and sixth surfaces.
[0086] The first and second band portions can extend from the first and second connection portions to parts of the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, respectively. The first and second band portions can serve to improve the adhesion strength of the first external electrode 131 and the second external electrode 132.
[0087] External electrodes 131 and 132 according to one embodiment will be described with reference to Figure 5.
[0088] Figure 5 is a schematic diagram of the inside of an external electrode according to one embodiment.
[0089] Referring to Figure 5, the external electrodes 131 and 132 may include electrode layers containing an intermetallic compound (IMC) 10 and a thermosetting epoxy resin 20. The electrode layer is a layer that can be electrically connected to the internal electrode layers 121 and 122 within the external electrodes 131 and 132, specifically a layer that is in direct contact with the capacitor body 110.
[0090] Intermetallic compounds 10 are substances in which two or more metal elements combine in simple integer ratios, and refer to substances in which low-melting-point metals and high-melting-point metals melt together at high temperatures to form a network.
[0091] Figure 6 is a schematic diagram showing the formation process of an intermetallic compound (IMC) according to one embodiment.
[0092] As shown in Figure 6, the intermetallic compound 10 can be formed by heat-treating a low-melting-point metal (A) and a high-melting-point metal (B), for example, at a high temperature of 200°C to 300°C. The low-melting-point metal (A) melts and hardens first, and then undergoes alloying and solidification processes with the high-melting-point metal (B).
[0093] In other words, the intermetallic compound 10 is a molten product of a low-melting-point metal and a high-melting-point metal. The low-melting-point metal may include tin (Sn). For example, the low-melting-point metal may include tin (Sn), silver (Ag), and copper (Cu), and may include, for example, a Sn-Ag-Cu alloy. The high-melting-point metal may include, for example, one or more selected from copper (Cu) and silver (Ag).
[0094] The intermetallic compound 10, formed by the melting of a low-melting-point metal and a high-melting-point metal at high temperatures, increases the connectivity between the external electrodes 131 and 132 and the internal electrode layers 121 and 122. Furthermore, as shown in Figure 5, the intermetallic compound 10 enables the external electrodes 131 and 132 and the internal electrode layers 121 and 122 to act as electrodes for electron transfer, forming a dense network that can produce an anchoring effect between the electrodes.
[0095] Such intermetallic compounds 10 can include copper (Cu) and tin (Sn). For example, the intermetallic compound 10 can include one or more selected from Cu6Sn5 and Cu3Sn.
[0096] Furthermore, the intermetallic compound 10 may further contain silver (Ag).
[0097] In one embodiment, the external electrodes 131 and 132, by containing the aforementioned intermetallic compound 10, have a lower Young's modulus compared to a general copper (Cu) electrode. This increases elasticity and improves warp strength characteristics.
[0098] The intermetallic compound 10 can be present in an amount of 90% to 99% by weight relative to the total amount of the intermetallic compound 10 and the thermosetting epoxy resin 20, for example, 91% to 98% by weight, or 92% to 97% by weight. When the intermetallic compound is included within the above content range, the connectivity between the internal electrode layer and the external electrode can be increased.
[0099] The thermosetting epoxy resin 20 may be a thermosetting resin having epoxy groups in the polymer. The thermosetting epoxy resin 20 may include one or more selected from, for example, bisphenol A type epoxy resins such as bisphenol A-epichlorohydrin epoxy resin; bisphenol F type epoxy resins; phenol novolac type epoxy resins; cresol novolac type epoxy resins; novolac-modified bisphenol A type epoxy resins; and urethane-modified bisphenol A type epoxy resins.
[0100] Since the thermosetting epoxy resin 20 has a very low Young's modulus, its warp strength characteristics can be further improved.
[0101] The thermosetting epoxy resin 20 can be present in an amount of 1% to 10% by weight relative to the total amount of the intermetallic compound 10 and the thermosetting epoxy resin 20, for example, in an amount of 2% to 9% by weight, or 3% to 8% by weight. When the thermosetting epoxy resin is included in the above content range, the warp strength and elasticity are increased, and a laminated capacitor with excellent flexibility and durability can be obtained.
[0102] According to one embodiment, a laminated capacitor that uses a dielectric layer 111 made of a polymer dielectric composite dielectric containing a PVDF compound and a carbon-based material, and external electrodes 131 and 132 containing an intermetallic compound (IMC) and a thermosetting epoxy resin, not only has a high dielectric constant but also high warp strength and elasticity, excellent flexibility and durability, and improved processability and reliability.
[0103] The electrode layers of the external electrodes 131 and 132 may further contain copper (Cu).
[0104] The structure and composition of the external electrodes 131 and 132 can be determined through SEM (scanning electron microscope) and optical microscopy analysis, XRD (X-ray diffraction analysis), and FT-IR (Fourier transform infrared spectroscopy) analysis.
[0105] SEM (scanning electron microscope) analysis can be performed as follows: After curing the multilayer capacitor 100 in an epoxy mixture, the L-axis and T-axis surfaces (LT surfaces) of the capacitor body 110 are polished to a depth of 1 / 2 in the W-axis direction to obtain a cross-sectional sample that allows observation of the external electrodes. Subsequently, the cross-sectional sample can be measured with a scanning electron microscope (SEM) so that the external electrodes on one side are visible. For example, the SEM can be used to measure with an accelerating voltage of 10kV and a magnification of 2000.
[0106] Optical microscopy analysis can be performed at 100x magnification so that one of the external electrodes is visible in the cross-sectional sample obtained by the method described above.
[0107] Through SEM analysis and optical microscopy analysis, it can be confirmed that thermosetting epoxy resin and intermetallic compounds (IMCs) are present in the electrode layer of the external electrode, specifically the external electrode in contact with one surface of the capacitor body; in other words, the two substances exist separately from each other.
[0108] Furthermore, using the cross-sectional sample obtained by the method described above, X-ray diffraction analysis (XRD) can be performed on one of the external electrodes using Cu Kα radiation. In the XRD analysis results, for example, strong peaks corresponding to intermetallic compounds (IMCs) such as Cu6Sn5 and Cu3Sn appear at 2θ between 40° and 45°.
[0109] Furthermore, FT-IR analysis is performed using a Fourier-transform-infrared spectrometer at 4000 cm⁻¹. -1 ~650cm -1 This can be done within the specified range. FT-IR analysis reveals the presence of CH, CC, and COC bonds, allowing for the identification of the thermosetting epoxy resin within the electrode layer of the external electrode.
[0110] When forming external electrodes with polymers such as thermosetting epoxy resins, drying and curing are performed at high temperatures. At this time, a dipole-dipole interaction is generated at the interface between the PVDF-based compound of the dielectric layer and the Cu metal present in the external electrode. This is due to the δ around the Cu metal. - When it becomes polarized, the δ of PVDF compounds + TTT conformation occurs in the phase corresponding to polarization. This is due to a chemical reaction between the PVDF-based compound in the dielectric layer and the Cu in the external electrode, which increases the bonding force and allows for a hermetic sealing effect that enables perfect sealing.
[0111] In other words, according to one embodiment, the contact between the capacitor body including the dielectric layer and the external electrode disposed on the outside of the capacitor body can be improved. Specifically, the contact between the dielectric layer, which is made of a composite dielectric including a PVDF-based compound and a carbon-based material, and the external electrode, which includes an intermetallic compound (IMC) and a thermosetting epoxy resin, can be improved.
[0112] In one embodiment, a multilayer capacitor to which the aforementioned polymer dielectric is applied and an external electrode containing an intermetallic compound and thermosetting epoxy resin is applied together has high warp strength and elasticity, as well as excellent flexibility and durability. Furthermore, reliability can be improved by mitigating physical shocks through the application of the polymer dielectric. In addition, the firing process, which is essential in the manufacture of multilayer ceramic capacitors, can be omitted, improving processability, and variables such as particle scattering in the internal electrode layer and firing mismatch that may appear in firing processes above 1000°C can be eliminated, thereby improving reliability.
[0113] The external electrodes 131 and 132 may further include, in addition to the electrode layer described above, a conductive resin layer disposed to cover the electrode layer and a plating layer disposed to cover the conductive resin layer.
[0114] The conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the band portion) in which the conductive resin layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110 can be longer than the length of the region (i.e., the band portion) in which the sintered metal layer extends to the first and second surfaces or the fifth and sixth surfaces of the capacitor body 110. In other words, the conductive resin layer can be formed on the electrode layer and can be formed in a manner that completely covers the electrode layer.
[0115] The conductive resin layer contains resin and conductive metal.
[0116] The resin contained in the conductive resin layer is not particularly limited as long as it has bonding and shock-absorbing properties and can be mixed with conductive metal powder to form a paste. For example, it may include phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.
[0117] The conductive metal contained in the conductive resin layer plays the role of electrically connecting it to the electrode layer.
[0118] The conductive metal contained in the conductive resin layer may be spherical, flake-shaped, or a combination thereof. That is, the conductive metal may be in the form of flakes only, spherical only, or a mixture of flakes and spheres.
[0119] Here, "spherical" can include forms that are not perfectly spherical, for example, forms in which the ratio of the length of the long axis to the short axis (long axis / short axis) is 1.45 or less. "Flake powder" means powder having a flat and elongated shape and is not particularly limited, but for example, the ratio of the length of the long axis to the short axis (long axis / short axis) may be 1.95 or more.
[0120] The plating layer may include nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb), either alone or in alloys thereof. For example, the plating layer may be a nickel (Ni) plating layer or a tin (Sn) plating layer, or it may be a configuration in which nickel (Ni) plating layers and tin (Sn) plating layers are sequentially laminated, or it may be a configuration in which tin (Sn) plating layers, nickel (Ni) plating layers, and tin (Sn) plating layers are sequentially laminated. The plating layer may also include multiple nickel (Ni) plating layers and / or multiple tin (Sn) plating layers.
[0121] The plating layer can improve the mountability of the multilayer capacitor 100 on the substrate, structural reliability, durability against external elements, heat resistance, and equivalent series resistance (ESR).
[0122] Manufacturing method of multilayer capacitors The following describes a method for manufacturing a multilayer capacitor 100 according to one embodiment.
[0123] A stacked capacitor 100 according to one embodiment can be manufactured by the following steps: forming a composite dielectric film by mixing a polyvinylidene fluoride (PVDF) compound and a carbon-based material; forming a conductive metal layer on the composite dielectric film; stacking a plurality of composite dielectric films on which the conductive metal layer is formed to manufacture a capacitor body including a dielectric layer and an internal electrode layer; and applying and curing an electrode layer-forming paste, which is a mixture of a conductive metal, a low-melting-point metal, and a thermosetting epoxy resin, to one surface of the capacitor body to form an electrode layer for an external electrode.
[0124] In the step of forming a composite dielectric film, the composite dielectric film can be formed by adding a PVDF-based compound to a dispersion of a carbon-based material in a solvent and mixing it, then subjecting the mixture to a casting step and a drying step.
[0125] Since the PVDF-based compounds and carbon-based materials are the same as described above, their explanation will be omitted here. The PVDF-based compounds and carbon-based materials can be added in a weight ratio of 50:50 to 99:1, for example, in a weight ratio of 60:40 to 98:2 or 70:30 to 97:3. When added within this weight ratio range, a multilayer capacitor with excellent flexibility, durability, processability, and reliability can be obtained.
[0126] In the step of forming a conductive metal layer, the conductive metal layer may include one or more conductive metals selected from aluminum (Al), copper (Cu), tin (Sn), nickel (Ni), and alloys thereof. The conductive metal layer can be formed on a composite dielectric film by vapor deposition.
[0127] In the step of forming the electrode layer of the external electrode, the electrode layer forming paste can be manufactured by mixing a conductive metal, a low-melting-point metal, and a thermosetting epoxy resin.
[0128] The conductive metal may be a high-melting-point metal and may include one or more selected from copper (Cu) and silver (Ag). The low-melting-point metal may include tin (Sn) and may include, for example, tin (Sn), silver (Ag), and copper (Cu), and as an example, a Sn-Ag-Cu alloy may be included. The conductive metal corresponding to the high-melting-point metal and the low-melting-point metal can melt together at high temperatures to form the aforementioned intermetallic compound (IMC).
[0129] Conductive metals and low-melting-point metals can be mixed in a weight ratio of 3:7 to 7:3.
[0130] Since thermosetting epoxy resins are similar to those described above, we will omit their explanation here.
[0131] Thermosetting epoxy resin can be mixed in an amount of 1 to 20 parts by weight per 100 parts by weight of the total amount of conductive metal and low-melting-point metal.
[0132] The electrode layer forming paste may further contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. The binder can be, for example, ethylcellulose, acrylic, or butyral, and the solvent can be, for example, organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, or toluene, or aqueous solvents.
[0133] As a method for applying the electrode layer forming paste to the outer surface of the capacitor body 110, various printing methods such as dipping and screen printing, application methods using dispensers, and spraying methods using sprays can be used. The electrode layer forming paste is applied to at least the third and fourth surfaces of the capacitor body 110, and can also be applied to a part of the first, second, fifth, or sixth surface where the band portions of the first and second external electrodes are selectively formed.
[0134] After applying the electrode layer forming paste, it can be dried at 100°C to 160°C, and then cured at a temperature of 200°C to 300°C.
[0135] Selectively, a conductive resin layer can be formed by applying a conductive resin layer-forming paste to the outer surface of the obtained capacitor body 110 and then curing it.
[0136] The paste for forming a conductive resin layer may contain a resin and, selectively, a conductive metal or a non-conductive filler. The descriptions of conductive metals and resins are the same as those described above, so a repetition is omitted. The paste for forming a conductive resin layer may also selectively contain a binder, solvent, dispersant, plasticizer, oxide powder, etc. Examples of binders include ethyl cellulose, acrylic, and butyral, and solvents may include organic solvents such as terpineol, butyl carbitol, alcohol, methyl ethyl ketone, acetone, and toluene, as well as aqueous solvents.
[0137] For example, the conductive resin layer can be formed by dipping the capacitor body 110 into a conductive resin layer forming paste and then curing it, printing the conductive resin layer forming paste onto the surface of the capacitor body 110 using screen printing or gravure printing, or applying the conductive resin layer forming paste to the surface of the capacitor body 110 and then curing it.
[0138] Next, a plating layer can be formed on the outside of the conductive resin layer.
[0139] For example, the plating layer can be formed by a plating method, and can also be formed by sputtering or electroplating (electric deposition).
[0140] The above-described embodiments will be explained in more detail below through the examples provided. However, the following embodiments are for illustrative purposes only and do not limit the scope of rights.
[0141] (Multilayer capacitor manufacturing) Examples 1-3 A composite dielectric film was formed by adding polyvinylidene fluoride (PVDF) to a dispersion of carbon nanotubes (CNTs) in a solvent and mixing it, followed by casting and drying processes. The PVDF and CNTs were added in the weight ratios shown in Table 1 below.
[0142] Next, a conductive metal layer was formed on the composite dielectric film by vapor deposition of nickel (Ni).
[0143] Next, a capacitor body was manufactured by laminating a composite dielectric film on which a conductive metal layer was formed.
[0144] Next, Cu powder, Sn 96.5 Ag 3.0 Cu 0.5 An IMC paste was prepared by mixing (SAC) alloy powder and bisphenol A-epichlorohydrin epoxy resin. At this time, the Cu powder and SAC alloy powder were mixed in a 1:1 weight ratio, and 5 parts by weight of bisphenol A epoxy resin were mixed with 100 parts by weight of the total amount of Cu powder and SAC alloy powder. The prepared paste was applied to one surface of the capacitor body by a dip coating method, dried at 100°C, and cured at 240°C to form the electrode layer of the external electrode.
[0145] Next, multilayer capacitors were manufactured through processes such as plating.
[0146] Examples 4-6 In Examples 1-3, multilayer capacitors were manufactured in the same manner as in Examples 1-3, except that polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE) was used instead of PVDF to form the composite dielectric film.
[0147] Comparative Example 1 A multilayer capacitor was manufactured in the same manner as in Example 1, except that a composite dielectric film was formed without using CNTs.
[0148] Comparative Example 2 A multilayer capacitor was manufactured in the same manner as in Example 4, except that a composite dielectric film was formed without using CNTs.
[0149] Comparative Example 3 A multilayer capacitor was manufactured in the same manner as in Example 1, except that Cu paste was used instead of the paste used in Example 1 to form the electrode layer of the external electrode.
[0150] The Cu paste was prepared by mixing 70% by weight of Cu powder, 20% by weight of glass composition, 5% by weight of acrylic resin (SPB-80), and the remainder of dihydroterpineol (DHT). At this time, the glass composition contained 9.0 mol% Li2O, 10 mol% Na2O, 1.5 mol% Fe2O, 6.3 mol% ZnO, 21 mol% BaO, 11 mol% SiO2, 8 mol% CaO, 12 mol% Al2O, 20.2 mol% B2O, and 1 mol% SnO.
[0151] Comparative Example 4 A multilayer capacitor was manufactured in the same manner as in Example 4, except that Cu paste was used instead of the paste used in Example 4 to form the electrode layer of the external electrode.
[0152] The Cu paste was prepared by mixing 70% by weight of Cu powder, 20% by weight of glass composition, 5% by weight of acrylic resin (SPB-80), and the remainder of dihydroterpineol (DHT). At this time, the glass composition contained 9.0 mol% Li2O, 10 mol% Na2O, 1.5 mol% Fe2O, 6.3 mol% ZnO, 21 mol% BaO, 11 mol% SiO2, 8 mol% CaO, 12 mol% Al2O, 20.2 mol% B2O, and 1 mol% SnO.
[0153] [Table 1]
[0154] Evaluation 1: SEM and optical microscopy analysis The multilayer capacitors manufactured in Example 1 were subjected to SEM (scanning electron microscope) and optical microscope analysis, and the results are shown in Figures 7 and 8.
[0155] For SEM analysis, the multilayer capacitor was cured in an epoxy mixture. Then, the L-axis and T-axis surfaces (LT surfaces) of the capacitor body were polished to a depth of 1 / 2 in the W-axis direction to obtain a cross-sectional sample that allowed observation of the external electrodes. Subsequently, SEM analysis was performed at an accelerated voltage of 10kV and a magnification of 2000 to ensure that one side of the external electrode in the cross-sectional sample was visible. Additionally, optical microscopy analysis was performed at a magnification of 100 to ensure that one side of the external electrode in the cross-sectional sample was visible.
[0156] Figure 7 shows an SEM (scanning electron microscope) analysis image of the external electrode according to Example 1, and Figure 8 shows an optical microscope analysis image of the external electrode according to Example 1.
[0157] Referring to Figures 7 and 8, it can be seen that a polymer such as thermosetting epoxy resin and an intermetallic compound (IMC) are present within the electrode layer of the external electrode; in other words, the two substances exist separately from each other.
[0158] Evaluation 2: XRD analysis X-ray diffraction analysis (XRD) was performed on the multilayer capacitors manufactured in Example 1, and the results are shown in Figures 9 and 10.
[0159] After curing the multilayer capacitor in an epoxy mixture, the W-axis and T-axis planes (WT planes) of the capacitor body were polished to a depth of 1 / 2 in the L-axis direction. After fixing, the capacitor was maintained in a vacuum atmosphere chamber to obtain a cross-sectional sample that allowed observation of the active region where the dielectric layer and the internal electrode layer intersect. X-ray diffraction analysis (XRD) was performed on the dielectric layer within the active region of the obtained cross-sectional sample using Cu Kα rays.
[0160] Figure 9 is an XRD (X-ray diffraction analysis) graph of the dielectric layer according to Example 1.
[0161] Referring to Figure 9, the characteristic peak of carbon nanotubes (CNTs) labeled (002) can be observed at a 2θ angle of 25° to 27°, and the characteristic peak of polyvinylidene fluoride (PVDF) labeled (110) can be observed at a 2θ angle of 19° to 21°. This indicates that the composite dielectric within the dielectric layer is composed of PVDF and CNTs.
[0162] Furthermore, X-ray diffraction analysis (XRD) was performed on the cross-sectional sample obtained in Evaluation 1 using Cu Kα radiation on one of the external electrodes.
[0163] Figure 10 shows the XRD (X-ray diffraction analysis) graph for the external electrode according to Example 1.
[0164] Referring to Figure 10, characteristic peaks for Cu6Sn5 and Cu3Sn can be observed at 2θ between 40° and 45°. This indicates the presence of intermetallic compounds (IMCs) containing Cu and Sn in the electrode layer of the external electrode.
[0165] Rating 3: FT-IR analysis The multilayer capacitors manufactured in Example 1 were subjected to FT-IR (Fourier Transform Infrared Spectroscopy) analysis, and the results are shown in Figure 11.
[0166] FT-IR analysis was performed in the range of 4000 cm -1 ~650 cm -1 using an FT-IR spectrometer (Fourier-transform infrared spectrometer).
[0167] Figure 11 is an FT-IR (Fourier transform infrared spectroscopy) analysis graph of the thermosetting epoxy resin present in the external electrode according to Example 1.
[0168] Referring to Figure 11, the thermosetting epoxy resin in the electrode layer of the external electrode can be confirmed by the presence of C-H bonds, C-C bonds, and C-O-C bonds.
[0169] Evaluation 4: Physical Property Measurement (1) Mechanical Property Measurement For the laminated capacitors manufactured in Examples 1 to 6 and Comparative Examples 1 to 4, mechanical properties such as strength and elasticity were measured, and the results are shown in Table 2 below.
[0170] Strength and modulus were all measured according to the ASTM D638 evaluation standard.
[0171] (2) Thermal Stability For the laminated capacitors manufactured in Examples 1 to 6 and Comparative Examples 1 to 4, TGA (thermogravimetric analyzer) analysis was performed, and the results are shown in Table 2 below.
[0172] TGA analysis was performed under a nitrogen atmosphere at a heating rate of 10 °C / min from 25 °C to 800 °C, and the Td, 10% value was measured. Td, 10% indicates the temperature at which 10% by weight of the substance involved in the analysis was lost.
[0173] (3) Dielectric Constant For the laminated capacitors manufactured in Examples 1 to 6 and Comparative Examples 1 to 4, the dielectric constant was measured, and the results are shown in Table 2 below.
[0174] The dielectric constant was measured at 100 Hz using an impedance analyzer.
[0175] (4) Warping strength The warpage strength was measured for the multilayer capacitors manufactured in Examples 1-6 and Comparative Examples 1-4, and the results are shown in Table 2 below.
[0176] Warpage strength was assessed by mounting 30 sample chips onto a warpage-resistant substrate, maintaining a 10mm pressure for 10 seconds, and then checking for cracks. The warpage strength indicates the number of cracks that occurred out of 30 sample chips.
[0177] [Table 2]
[0178] Table 2 above shows that in Examples 1 to 6, the mechanical strength, thermal stability, dielectric constant, and warpage strength characteristics are all superior compared to Comparative Examples 1 to 4. In other words, Comparative Examples 1 and 2 show decreased dielectric constant and warpage strength characteristics, while Comparative Examples 3 and 4 show a significant decrease in warpage strength characteristics.
[0179] From this, it can be seen that a multilayer capacitor having a dielectric layer using a composite dielectric containing a PVDF-based compound and a carbon-based material according to one embodiment, and an electrode layer of an external electrode containing an intermetallic compound (IMC) containing Cu and Sn and a thermosetting epoxy resin, has high mechanical strength and warp strength, excellent flexibility and durability, and excellent dielectric constant and thermal stability, as well as processability and reliability.
[0180] Although preferred embodiments of the present invention have been described above, the present invention is not limited thereto, and can be implemented in various ways within the scope of the claims, description of the invention, and attached drawings, and these also naturally fall within the scope of the present invention. [Explanation of symbols]
[0181] 10 Intermetallic compounds (IMC) 20 Thermosetting epoxy resin 100 Multilayer Capacitors 110 Capacitor Body 111 Dielectric layer 112 Coverage Area 113 Coverage Area 121 1st internal electrode layer 122 Second internal electrode layer 131 1st external electrode 132 2nd external electrode
Claims
1. A capacitor body including a dielectric layer and an internal electrode layer, The capacitor body includes an external electrode disposed on the outside of the capacitor body, The dielectric layer comprises a composite dielectric including a polyvinylidene fluoride (PVDF) compound and a carbon-based material. The external electrode is a multilayer capacitor comprising an electrode layer containing an intermetallic compound (IMC) containing copper (Cu) and tin (Sn), and a thermosetting epoxy resin.
2. The polyvinylidene fluoride (PVDF) compound comprises one or more selected from polyvinylidene fluoride (PVDF) homopolymer, polyvinylidene fluoride (PVDF) copolymer, polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE), polyvinylidene fluoride-hexafluoropropylene (PVDF-HFP), and polyvinylidene fluoride-chlorotrifluoroethylene (PVDF-CTFE) in the stacked capacitor according to claim 1.
3. The multilayer capacitor according to claim 1, wherein the carbon-based material comprises one or more selected from carbon nanotubes (CNTs), reduced graphene oxide (rGO), and carbon black.
4. The multilayer capacitor according to claim 1, wherein the carbon-based material is contained in an amount of 1% to 50% by weight relative to the total amount of the polyvinylidene fluoride (PVDF) compound and the carbon-based material.
5. The stacked capacitor according to claim 1, wherein the composite dielectric is in a form in which the carbon-based material is dispersed in a matrix of the polyvinylidene fluoride (PVDF)-based compound.
6. The laminated capacitor according to claim 1, wherein the dielectric layer further comprises a self-assembled monolayer on the layer containing the composite dielectric.
7. The multilayer capacitor according to claim 6, wherein the self-assembled monolayer comprises one or more selected from polystyrene brush (PS-brush) and phenylhexyltrichlorosilane (PTS).
8. The intermetallic compound (IMC) is Cu 6 Sn 5 and Cu 3 A multilayer capacitor according to claim 1, comprising one or more selected from Sn.
9. The multilayer capacitor according to claim 1, wherein the thermosetting epoxy resin is contained in an amount of 1% to 10% by weight relative to the total amount of the intermetallic compound (IMC) and the thermosetting epoxy resin.
10. The multilayer capacitor according to claim 1, wherein the intermetallic compound (IMC) further comprises silver (Ag).
11. The multilayer capacitor according to claim 1, wherein the intermetallic compound (IMC) is a molten material of a high-melting-point metal containing copper (Cu) and a low-melting-point metal containing tin (Sn).
12. The stacked capacitor according to claim 11, wherein the low-melting-point metal includes a Sn-Ag-Cu alloy.
13. The multilayer capacitor according to claim 1, wherein the thermosetting epoxy resin comprises one or more selected from bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, novolac-modified bisphenol A type epoxy resin, and urethane-modified bisphenol A type epoxy resin.
14. The multilayer capacitor according to claim 1, wherein the electrode layer further comprises copper (Cu).
15. The steps include: forming a composite dielectric film by mixing a polyvinylidene fluoride (PVDF) compound and a carbon-based material; The steps include: forming a conductive metal layer on the composite dielectric film; The steps include: manufacturing a capacitor body including a dielectric layer and an internal electrode layer by stacking a plurality of composite dielectric films on which the conductive metal layer is formed; The steps include: applying and curing an electrode layer-forming paste, which is a mixture of a conductive metal, a low-melting-point metal, and a thermosetting epoxy resin, to one surface of the capacitor body to form an electrode layer for the external electrode; A method for manufacturing a multilayer capacitor, including the following:
16. The method for manufacturing a stacked capacitor according to claim 15, wherein the polyvinylidene fluoride (PVDF) compound comprises one or more selected from polyvinylidene fluoride (PVDF) homopolymer, polyvinylidene fluoride (PVDF) copolymer, polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE), polyvinylidene fluoride-hexafluoropropylene (PVDF-HFP), and polyvinylidene fluoride-chlorotrifluoroethylene (PVDF-CTFE).
17. The method for manufacturing a multilayer capacitor according to claim 15, wherein the carbon-based material comprises one or more selected from carbon nanotubes (CNTs), reduced graphene oxide (rGO), and carbon black.
18. The method for manufacturing a multilayer capacitor according to claim 15, wherein the conductive metal comprises one or more selected from copper (Cu) and silver (Ag).
19. The method for manufacturing a multilayer capacitor according to claim 15, wherein the low-melting-point metal includes a Sn-Ag-Cu alloy.
20. The method for manufacturing a multilayer capacitor according to claim 15, wherein the thermosetting epoxy resin comprises one or more selected from bisphenol A type epoxy resin, bisphenol F type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, novolac-modified bisphenol A type epoxy resin, and urethane-modified bisphenol A type epoxy resin.