Image sensing device and imaging system including the same

Abstract

In an image sensing device that measures the distance to a target object, multiple single-photon avalanche diodes (SPADs) with different sensitivities are selected according to the illuminance. [Solution] An image sensing device 100 according to one embodiment includes a first pixel group PX_G1 and a second pixel group PX_G2, each including a first pixel SP1 which includes a first active region AA1 having a first area, and a second pixel SP2 which includes a second active region AA2 having a second area smaller than the first area, and each of the first pixel SP1 and the second pixel SP2 includes an avalanche diode SPAD, an anti-reflective layer ARP on the avalanche diode SPAD, and a light-gathering pattern LM on the anti-reflective layer ARP.

Description

Technical Field

[0001] This specification relates to an image sensing device and a photographing system including the same.

Background Art

[0002] The recently spotlighted TOF (Time of Flight) technology irradiates pulsed light from a light source disposed inside or near the sensor, receives the reflected light after that, measures the time therebetween, and then calculates the distance based on the principle of the constancy of the speed of light. In order to precisely measure TOF, since it is necessary to react at the moment when the light reaches the light receiving element, a highly sensitive photoelectric conversion element is required. For this reason, research on single photon avalanche diodes (SPADs) that can be fabricated by CMOS process technology has been actively conducted.

Summary of the Invention

Problems to be Solved by the Invention

[0003] The problem to be solved by this specification is to provide an image sensing device that can select either a high-sensitivity SPAD or a low-sensitivity SPAD according to the illuminance, receive light, and measure the distance to the target object.

[0004] Another problem to be solved by this specification is to select either a high-sensitivity SPAD or a low-sensitivity SPAD according to the illuminance, irradiate a first light to the target object through a light source, and measure the distance to the target object through either the high-sensitivity SPAD or the low-sensitivity SPAD for the second light reflected by the target object, and to provide a photographing system.

[0005] The problems of this specification are not limited to the above, and other technical problems can be analogized from the following embodiments.

Means for Solving the Problems

[0006] An image sensing device according to one embodiment for solving the above problems includes a first pixel group and a second pixel group, each including a first pixel having a first active region having a first area and a second pixel having a second active region having a second area smaller than the first area, and each of the first pixel and the second pixel includes an avalanche diode, an anti-reflective layer on the avalanche diode, and a light-gathering pattern on the anti-reflective layer.

[0007] An imaging system according to one embodiment for solving the above-mentioned other problems includes a light source that irradiates a target object with first light, and an image sensing device including a first pixel group and a second pixel group, each including a first pixel including a first active region having a first area and a second pixel including a second active region having a second area smaller than the first area, wherein each of the first pixel and the second pixel receives second light reflected by the target object, the first pixel of the first pixel group and the first pixel of the second pixel group are arranged adjacent to each other, and the second pixel of the second pixel group and the second pixel of the second pixel group are arranged adjacent to each other.

[0008] Specific details of other embodiments are included in the detailed description and drawings. [Effects of the Invention]

[0009] According to the embodiment, the system includes a first pixel group and a second pixel group, each containing a first pixel having a first area and a second pixel SP having a second area smaller than the first area, and the first and second pixels SP of each pixel group may be selectively turned on or off depending on the illuminance of the surrounding environment. For example, when the illuminance is above a reference level, the second pixels SP of each pixel group are turned on to receive light reflected by the target object, and when the illuminance is below the reference level, the first pixels SP of each pixel group are turned on to receive light reflected by the target object. This makes it possible to measure the distance to the target object more precisely by taking into account the illuminance of the surrounding environment.

[0010] According to this embodiment, the first pixel of the first pixel group and the first pixel SP of the second pixel group may be arranged adjacent to each other, and the second pixel SP of the first pixel group and the second pixel SP of the second pixel group may be arranged adjacent to each other. In accordance with the illumination of the surrounding environment described above, each first pixel SP1, SP2, SP3, SP4 and the second pixels SP1, SP2, SP3, SP4 operate selectively, and the first pixel of the first pixel group and the first pixel of the second pixel group, and the second pixel SP of the first pixel group and the second pixel SP of the second pixel group are arranged adjacent to each other, thereby increasing the light reception rate.

[0011] According to this embodiment, in a low-light environment, digital data is generated by the first pixel of the first pixel group and the first pixel SP of the second pixel group, respectively. The image signal processor then processes and sums the digital data generated by the first pixel of the first pixel group and the first pixel SP of the second pixel group, thereby improving the accuracy of distance measurement.

[0012] According to the embodiment, the system includes a first pixel group and a second pixel group, each containing a first pixel having a first area and a second pixel SP having a second area smaller than the first area. Depending on whether the distance to the target object is far or near, the first pixel and the second pixel SP of each pixel group can be selectively turned on or off. This makes it possible to measure the distance to the target object more precisely, taking into account the illumination of the surrounding environment.

[0013] However, the effects derived from this specification are not limited to those described above, and other effects not mentioned can be clearly understood by a person with ordinary skill in the art to which this specification belongs from the following description. [Brief explanation of the drawing]

[0014] [Figure 1] This is a block diagram showing a shooting system according to one embodiment. [Figure 2] This is a plan view of a pixel array according to one embodiment. [Figure 3] This is an enlarged plan view of the Q1 region in Figure 2. [Figure 4]It is a cross-sectional view taken along the line A-A' of FIG. 3. [Figure 5] It is a diagram for explaining the direct ToF method of the pixel SP. [Figure 6] It is a diagram for explaining the indirect ToF method of the pixel SP. [Figure 7] It is a diagram showing a photographing system according to an embodiment. [Figure 8] It is a diagram showing the mode of a single photon avalanche diode according to an embodiment. [Figure 9] It is a graph in which pixel data generated by the second pixel SP according to an embodiment is converted into a histogram. [Figure 10] It is a graph in which pixel data generated by the fourth pixel SP according to an embodiment is converted into a histogram. [Figure 11] It is a diagram showing a photographing system according to an embodiment. [Figure 12] It is a diagram showing a photographing system below the reference illuminance. [Figure 13] It is a plan view showing a channel region irradiated with the first light of a light source according to an embodiment. [Figure 14] It is a plan view showing that the pixel array according to an embodiment is irradiated with the second light. [Figure 15] It is a graph showing a histogram obtained by summing pixel data generated by the second pixel SP of a pixel group according to an embodiment. [Figure 16] It is a diagram showing a photographing system above the reference illuminance. [Figure 17] It is a graph showing a histogram obtained by summing pixel data generated by the fourth pixel SP of a pixel group according to an embodiment. [Figure 18] It is a block diagram showing a photographing system according to another embodiment. [Figure 19] It is a diagram showing in more detail a photographing system according to another embodiment. [Figure 20] It is a graph showing pixel data generated by the illuminance pixel SP as a histogram. [Figure 21] It is a graph showing pixel data generated by an illuminance pixel SP as a histogram.

Embodiments for Carrying Out the Invention

[0015] Hereinafter, embodiments will be described with reference to the drawings. In this specification, when a certain component (or region, layer, part, etc.) is referred to as being "above", "connected to", or "coupled to" another component, it means that it may be directly connected / coupled above the other component, or a third component may be disposed between them.

[0016] The same reference numerals refer to the same components. Also, in the drawings, the thickness, ratio, and dimensions of components may be exaggerated for an effective explanation of the technical content. "And / or" includes all one or more combinations in which related components can be defined.

[0017] Terms such as first, second, etc. may be used to describe various components, but the above components are not limited by the above terms. The above terms are only used to distinguish one component from another. For example, without departing from the scope of the rights of this embodiment, the first component may be named the second component, and similarly the second component may also be named the first component. Singular expressions include plural expressions unless the context clearly indicates otherwise.

[0018] Terms such as "below", "on the lower side", "above", "on the upper side", etc. are used to explain the relationship between the configurations shown in the drawings. The above terms are relative concepts.

[0019] Terms such as "includes" or "has" are intended to indicate the presence of features, figures, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood not to preemptively exclude the possibility of the presence or addition of one or more other features, figures, steps, actions, components, parts, or combinations thereof.

[0020] Figure 1 is a block diagram showing a shooting system according to one embodiment.

[0021] Referring to Figure 1, the shooting system 1 may mean a device such as a digital still camera for taking still images or a digital video camera for taking videos. For example, the shooting system 1 can be implemented with a digital single-lens reflex camera (DSLR), a mirrorless camera, or a mobile phone (especially a smartphone), but is not limited to these. The shooting system 1 may also be a concept that includes a device capable of photographing a subject and generating an image by including a lens and an image sensor.

[0022] The imaging system 1 may include an image sensing device 100 and an image signal processor 200.

[0023] The image sensing device 100 can measure distance using the time of flight (TOF) principle. The image sensing device 100 may include a light-gathering pattern LM, a pixel array 110, a pixel driver 120, a timing controller 130, a light source driver 140, and a readout circuit 150. The imaging system 1 according to one embodiment may further include a light sensor 300. The imaging system 1 may further include a light source LS.

[0024] The light source LS can irradiate the target object TO with light in response to the clock signal MLS from the light source driver 140. The light source LS may be a monochromatic illumination source or a combination of other laser light sources LS, including a laser diode (LD), light-emitting diode (LED), near-infrared laser (NIR), point light source, white lamp, and monochromator that emit light in a specific wavelength band (e.g., infrared or visible light). For example, the light source LS can emit infrared light having a wavelength of 800 nm to 1000 nm. Although only one light source LS is shown in Figure 1 for illustrative purposes, multiple light sources LS may be arranged around the focusing pattern LM. In one embodiment, the light source LS is shown as a near-infrared laser source (VCSEL: Vertical cavity surface emitting laser) including a point light source, but the embodiments herein are not limited thereto.

[0025] The focusing pattern LM can collect light reflected from the target object TO and concentrate it on pixels SP1, SP2, SP3, and SP4 of the pixel array 110. The focusing pattern LM may include a focusing lens made of glass or plastic surface, or other cylindrical optical elements. The focusing pattern LM may also include a lens group formed by at least one lens.

[0026] The pixel array 110 may include a plurality of pixels SP1, SP2, SP3, SP4 arranged continuously in a two-dimensional matrix structure. That is, the pixel array 110 may include a plurality of pixels SP arranged continuously along a first direction DR1 and a second direction DR2. Each pixel SP1, SP2, SP3, SP4 may include a pixel region. Each pixel SP can perform photoelectric conversion of the second light L2 (or incident light) received through the focusing pattern LM to generate and output a pixel signal, which is an electrical signal corresponding to the second light L2. In this case, the pixel signal may not be a signal indicating the color of the target object TO, but rather a signal indicating information corresponding to the distance to the target object TO. Each of the plurality of pixels may include a single-photon avalanche diode.

[0027] A pixel array 110, in which multiple pixels SP are arranged, can detect the distance to a target object TO using a direct ToF method. For reference, the direct ToF method is a method that directly measures the round-trip time from the time pulsed light is irradiated onto the target object TO to the time the pulsed light is reflected from the target object TO and incident, and calculates the distance to the target object TO by calculating the round-trip time and the speed of light. However, the embodiments described herein are not limited to this, and a pixel array 110, in which multiple pixels SP are arranged, can also detect the distance to a target object TO using an indirect ToF method.

[0028] The pixel driver 120 can drive the pixel array 110 under the control of the timing controller 130. For example, the pixel driver 120 can generate a quenching control signal to control a quenching operation that reduces the reverse bias voltage applied to the pixel SP to below the breakdown voltage. In other words, the pixel driver 120 can control the on / off state of the pixel SP under the control of the timing controller 130.

[0029] The readout circuit 150 is located on one side of the pixel array 110 and can calculate the time delay between the pulse signal (or pixel signal) output from each pixel SP and a reference pulse, and generate digital data (or pixel data) corresponding to the time delay (see the TDC (time-to-digital) section 151 of the readout circuit 150 in Figure 7) and store it (see the TDC buffer 153 of the readout circuit 150 in Figure 7). The readout circuit 150 can transmit the stored digital data to the image signal processor 200 under the control of the timing controller 130.

[0030] The timing controller 130 can control the overall operation of the image sensing device 100. Specifically, the timing controller 130 can generate timing signals to control the operation of the pixel driver 120 and the light source driver 140. The timing controller 130 can also control the activation or deactivation of the readout circuit 150 and control the transmission of the digital data stored in each of the readout circuits 150 to the image signal processor 200 simultaneously or sequentially.

[0031] The light source driver 140 can generate a clock signal that can drive the light source LS under the control of the timing controller 130.

[0032] The image signal processor 200 processes the digital data (or pixel data) input from the image sensing device 100 and can generate a depth image (histogram format) representing the distance to the target object TO. Specifically, the image signal processor 200 can calculate the distance to the target object TO for each pixel based on the time delay represented by the digital data received from the readout circuit 150.

[0033] The image signal processor 200 can control the operation of the image sensing device 100. In particular, the image signal processor 200 can analyze the digital data input from the image sensing device 100 to determine the mode of the image sensing device 100, and can control the image sensing device 100 to operate in the determined mode.

[0034] The image signal processor 200 can perform video signal processing on the generated depth image for noise reduction and image quality improvement. The depth image output from the image signal processor 200 may be stored in the internal or external memory of the imaging system 1 or the device equipped with the imaging system 1, or displayed via a display, at the user's request or automatically. Alternatively, the depth image output from the image signal processor 200 may be used to control the operation of the imaging system 1 or the device equipped with the imaging system 1.

[0035] Figure 2 is a plan view of a pixel array according to one embodiment. Figure 3 is an enlarged plan view of the Q1 region in Figure 2. Referring to Figures 2 and 3, the pixel array 110 may include a plurality of pixels SP1, SP2, SP3, SP4, and each pixel SP1, SP2, SP3, SP4 may include a pixel region (PX in Figure 1) and a non-pixel region NPX. The plurality of pixel regions may include a first pixel region PX1, a second pixel region PX2, a third pixel region PX3, and a fourth pixel region PX4, but the embodiments of this specification are not limited thereto. For example, the plurality of pixels SP1, SP2, SP3, SP4 can form a plurality of pixel groups. For example, the pixel array 110 may include a plurality of pixel groups. For example, the plurality of pixel groups may include a first pixel group PX_G1, a second pixel group PX_G2, a third pixel group PX_G3, and a fourth pixel group PX_G4, but the embodiments of this specification are not limited thereto.

[0036] Each pixel group PX_G1 to PX_G4 may include the first to fourth pixels SP. The first to fourth pixels SP may be divided by the area (or width) of the active regions AA1, AA2, AA3, and AA4 of the pixel regions PX1, PX2, PX3, and PX4 of each pixel SP1, SP2, SP3, and SP4.

[0037] For example, the areas (or widths W1 and W2) of the first active region AA1 and the second active region AA2 may each be larger than the area (or width W3) of the third active region AA3, and the area (or width W3) of the third active region AA3 may be larger than the area (or width W4) of the fourth active region AA4. The width W1 of the first active region AA1 and the width W2 of the second active region AA2 may be the same, but the embodiments of this specification are not limited thereto.

[0038] As shown in Figure 2, pixels in each pixel group PX_G1 to PX_G4 may be arranged adjacent to the same pixel in an adjacent pixel group PX_G1 to PX_G4.

[0039] For example, the first pixel group PX_G1 may include a third pixel SP3 located on the other side of the first direction DR1 and one side of the second direction DR2, a fourth pixel SP4 located on one side of the first direction DR1 and one side of the second direction DR2, a first pixel SP1 located on the other side of the first direction DR1 and the other side of the second direction DR2, and a second pixel SP2 located on one side of the first direction DR1 and the other side of the second direction DR2.

[0040] For example, the second pixel group PX_G2 may include a fourth pixel SP4 located on the other side of the first direction DR1 and one side of the second direction DR2, a third pixel SP3 located on one side of the first direction DR1 and one side of the second direction DR2, a second pixel SP2 located on the other side of the first direction DR1 and the other side of the second direction DR2, and a first pixel SP1 located on one side of the first direction DR1 and the other side of the second direction DR2.

[0041] For example, the third pixel group PX_G3 may include a first pixel SP1 located on the other side of the first direction DR1 and one side of the second direction DR2, a second pixel SP2 located on one side of the first direction DR1 and one side of the second direction DR2, a third pixel SP3 located on the other side of the first direction DR1 and the other side of the second direction DR2, and a fourth pixel SP4 located on one side of the first direction DR1 and the other side of the second direction DR2.

[0042] For example, the fourth pixel group PX_G4 may include a second pixel SP2 located on the other side of the first direction DR1 and one side of the second direction DR2, a first pixel SP1 located on one side of the first direction DR1 and one side of the second direction DR2, a fourth pixel SP4 located on the other side of the first direction DR1 and the other side of the second direction DR2, and a third pixel SP3 located on one side of the first direction DR1 and the other side of the second direction DR2.

[0043] As shown in Figure 2, the first pixels SP1 of each pixel group PX_G1 to PX_G4 may be arranged adjacent to each other (see PXa), the second pixels SP2 of each pixel group PX_G1 to PX_G4 may be arranged adjacent to each other (see PXb), the third pixels SP3 of each pixel group PX_G1 to PX_G4 may be arranged adjacent to each other (see PXc), and the fourth pixels SP4 of each pixel group PX_G1 to PX_G4 may be arranged adjacent to each other (see PXd).

[0044] In other words, according to the pixel array 110 of one embodiment, pixels SP1 to SP4 having the same width (or area) in their active regions AA1, AA2, AA3, and AA4 may be arranged adjacent to each other.

[0045] The cross-sectional structure of each pixel region PX1 to PX4 will be explained with reference to Figure 4.

[0046] Figure 4 is a cross-sectional view taken along the line A-A' in Figure 3. Although only the cross-sectional structures of the first pixel region PX1 and the second pixel region PX2 are shown in Figure 4, the cross-sectional structures of the first and second pixel regions PX1 and PX2 can also be applied to the third pixel region PX3 and the fourth pixel region PX4. As explained in Figures 2 and 3, the width W1 of the first active region AA1 and the width W2 of the second active region AA2 may be the same.

[0047] Referring to Figure 4, the pixel array 110 according to one embodiment may include a circuit section CEP, a single-photon avalanche diode SPAD on the circuit section CEP, a first trench section DTI and a second trench section BTG inside the single-photon avalanche diode SPAD, an anti-reflective layer ARP on the single-photon avalanche diode SPAD, and a focusing pattern LM on the anti-reflective layer ARP.

[0048] The circuit section CEP is located on the underside of the single-photon avalanche diode SPAD and may include transistors, wiring layers, and interlayer insulating layers. The transistors may include analog quenching transistors, readout transistors, etc., formed on the underside of the single-photon avalanche diode SPAD. The transistors are explained in Figure 7.

[0049] The single-photon avalanche diode SPAD may include a first semiconductor region CD1, a second semiconductor region CD2, an intermediate region MA between the first semiconductor region CD1 and the second semiconductor region CD2, and a substrate portion SUB on the second semiconductor region CD2 and the intermediate region MA.

[0050] The first semiconductor region CD1 may be an n-type semiconductor region, and the second semiconductor region CD2 may be a p-type semiconductor region. For example, the p-type ions may include boron (B) ions, and the n-type ions may include phosphorus (P) and / or arsenic (As) ions. For example, the first semiconductor region CD1 may include a first-first semiconductor region CD1a, which is an n+-type semiconductor region on the circuit portion CEP, and a first-second semiconductor region CD1b, which is an n-type semiconductor region on the first-first semiconductor region CD1a, and the second semiconductor region CD2 may include a second-first semiconductor region CD2a, which is a p+-type semiconductor region on the circuit portion CEP, and a second-second semiconductor region CD2b, which is a p-type semiconductor region on the second-first semiconductor region CD2a.

[0051] For example, the first-1 semiconductor region CD1a may have a higher doping concentration of n-type impurities than the first-2 semiconductor region CD1b, and the second-1 semiconductor region CD2a may have a higher doping concentration of p-type impurities than the second-2 semiconductor region CD2b. However, the embodiments of this specification are not limited thereto, and the first semiconductor region CD1 and the second semiconductor region CD2 may include only one n-type and one p-type semiconductor region.

[0052] In some embodiments, the vertical positions of the first-first semiconductor region CD1a and the first-second semiconductor region CD1b may be changed, and the vertical positions of the second-first semiconductor region CD2a and the second-second semiconductor region CD2b may be changed.

[0053] An intermediate region MA may be placed between the first semiconductor region CD1 and the second semiconductor region CD2. The intermediate region MA may also be placed on the upper surface of the first semiconductor region CD1. The mechanism of electrons (e-) and holes (h+) in the intermediate region MA will be described later.

[0054] A substrate portion SUB may be placed on the intermediate region MA and the second semiconductor region CD2. The substrate portion SUB may include an n-type semiconductor region or a p-type semiconductor region. However, the impurity doping concentration of the substrate portion SUB may be even lower than that of the first semiconductor region CD1 and the second semiconductor region CD2, respectively.

[0055] A first groove H1 may be formed in the non-pixel area NPX of the substrate portion SUB. Each first groove H1 may be formed by recessing the substrate portion SUB in the thickness direction. For example, the first groove H1 may completely penetrate the substrate portion SUB from the top surface to the bottom surface in the thickness direction. A first trench portion DTI may be placed in the first groove H1. The first trench portion DTI may be formed by a deep trench process. The first trench portion DTI may completely fill the first groove H1.

[0056] Second grooves H2 are formed in the pixel regions PX1 and PX2 of the substrate portion SUB. One, two, or more second grooves H2 may be provided. A second trench portion BTG may be placed in the second groove H2, and therefore, one, two, or more second trench portions BTG may also be provided. The first trench portion DTI and the second trench portion BTG may contain the same material. For example, the first trench portion DTI and the second trench portion BTG may contain an insulating material. For example, examples of the insulating material include, but are not limited to, hafnium oxide (HfO2) or silicon oxide (SiO2). The refractive index of the first trench portion DTI may be, for example, about 1.4 to about 2.0, but is not limited to this. The first trench portion DTI can play a role in causing the second light L2 (or incident light) incident on the first trench portion DTI to undergo total internal reflection by the single-photon avalanche diode SPAD. The second trench BTG can play a role in scattering the second light L2 incident from the focusing pattern LM. The first trench DTI and the second trench BTG can each play a role in increasing the light path by totally reflecting or scattering light to the single-photon avalanche diode SPAD. This can play a role in increasing the photoelectric conversion efficiency of the single-photon avalanche diode SPAD. In some embodiments, the first trench DTI may include polysilicon (Poly Si) and be designed so that the above-mentioned insulating material is formed on the sidewall of the polysilicon, but the embodiments herein are not limited thereto.

[0057] An anti-reflective layer ARP may be disposed on the single-photon avalanche diode SPAD and the first trench DTI. The anti-reflective layer ARP may be in direct contact with the first trench DTI and the single-photon avalanche diode SPAD. The anti-reflective layer ARP may contain the same material as the first trench DTI, but the embodiments herein are not limited thereto. The anti-reflective layer ARP may be formed in the same process as the first trench DTI and connected integrally with the first trench DTI. The anti-reflective layer ARP can serve to prevent light incident from the focusing pattern LM from being totally reflected by the single-photon avalanche diode SPAD. For this purpose, the anti-reflective layer ARP may have a refractive index between the refractive index of the focusing pattern LM and the refractive index of the single-photon avalanche diode SPAD, but is not limited thereto. For example, the refractive index of the anti-reflective layer ARP may be about 1.4 to about 2.0, but is not limited thereto.

[0058] A light-gathering pattern LM may be placed on the anti-reflective layer ARP. The light-gathering pattern LM can serve to receive light incident from the outside into each pixel region PX1 and PX2. For this purpose, the light-gathering pattern LM may have the shape of an upwardly convex convex lens and may be formed of a material with a large refractive index difference compared to the outside air. For example, the refractive index of the light-gathering pattern LM may be about 1.5 to about 1.7, but is not limited to this. The light-gathering pattern LM may be arranged continuously in the pixel regions PX1 and PX2 and the non-pixel region NPX, as shown in Figure 4, and may be formed so that the ends of the convex lens shape are located in the center of the pixel regions PX1 and PX2, but is not limited to this. For example, the light-gathering pattern LM may be interrupted in the non-pixel region NPX, in which case multiple light-gathering patterns LM may be located in each pixel region PX1 and PX2.

[0059] Although not shown in the figures, a grid may be placed on the anti-reflective layer ARP of the non-pixel region NPX. The grid may include an air structure or a reflective metal, but the embodiments described herein are not limited thereto.

[0060] A single-photon avalanche diode (SPAD) may be used as a photoelectric conversion element including a photosensitive PN junction. That is, a single-photon avalanche diode (SPAD) can detect a single photon (single photon of L2) reflected from an object (see TO in Figure 1) and generate pixel data (or current pulse, pixel signal, pulse signal) corresponding to the detected single photon. In this case, the pixel data can be generated through a series of processes triggered by avalanche breakdown by a single photon incident in Geiger mode, where a reverse bias voltage higher than the breakdown voltage is applied between the cathode and anode. Here, avalanche breakdown may occur in the intermediate region MA within the single-photon avalanche diode (SPAD). Holes (h+) may be located in one region adjacent to the second semiconductor region CD2 of the intermediate region MA, and electrons (e-) may be located in the other region adjacent to the first semiconductor region CD1 of the intermediate region MA. A hole (h+) in one region and an electron (e-) in another region may be bonded together to form an electron-hole pair. The electron-hole pair may be impact-ionized by a photon of the second photon L2.

[0061] Specifically, when a reverse bias voltage is applied to a single-photon avalanche diode (SPAD) to increase the electric field, impact ionization occurs. This occurs when electrons (e-) generated by the incident photon move due to the strong electric field, creating electron-hole (h+) pairs. The electrons (e-) and holes (h+) generated by the impact ionization phenomenon collide with each other, potentially generating countless carriers.

[0062] Figure 5 is a diagram illustrating the direct ToF method for pixel SPs.

[0063] Referring to Figures 1 and 5, with the image sensing device 100 activated, the light source LS can irradiate the target object TO with the first light L1 (or illumination light) by the reference pulse signal MLS. The time at which the pulses of the reference pulse signal MLS are generated can be defined as the reference pulse time RPT. The pixel array 110 and the readout circuit 150 can detect the pulse signal reflected from the target object TO and become incident, and generate pixel data PD.

[0064] The image signal processor 200 processes the pixel data PD input from the image sensing device 100 and can generate a depth image (histogram format) representing the distance to the target object TO. When the direct ToF method is applied, the image signal processor 200 can calculate the distance to the target object TO for each pixel based on the time delay represented by the pixel data PD received from the readout circuit 150. The image signal processor 200 analyzes the pixel data PD and can determine the time point at which the pixel data PD has a value greater than or equal to a threshold data as the pulse detection time PST. The definition of a value greater than or equal to the threshold data for the pixel data PD will be explained later. The image signal processor 200 calculates the time of flight (ToF) Δt, which is the time difference from the reference pulse time RPT to the pulse detection time PST, and calculates the distance between the target object TO and the image sensing device 100 by multiplying the calculated time of flight Δt by the speed of light (for example, by multiplying the value of Δt divided by 2 by the speed of light).

[0065] Figure 6 is a diagram illustrating the indirect ToF method for pixel SPs.

[0066] Referring to Figures 1 and 6, with the image sensing device 100 activated, the light source LS can irradiate the target object TO with the first light L1 (or illumination light) by the reference pulse signal MLS. The time at which the pulse of the reference pulse signal MLS is generated can be defined as the reference pulse time RPT. The pixel array 110 and the readout circuit 150 can detect the pulse signal reflected from the target object TO and incident on it to generate pixel data PD.

[0067] The image signal processor 200 processes the pixel data PD input from the image sensing device 100 and can generate a depth image (histogram format) representing the distance to the target object TO. When the indirect ToF method is applied, the image signal processor 200 can calculate the distance to the target object TO for each pixel based on the phase delay Δφ represented by the pixel data PD received from the readout circuit 150.

[0068] For the sake of clarity, the following explanation will focus primarily on the direct ToF method.

[0069] Figure 7 shows a shooting system according to one embodiment.

[0070] Referring to Figure 7, an imaging system according to one embodiment may include a single-photon avalanche diode SPAD, an analog quenching transistor QX, a readout transistor RT, a readout circuit 150, and an ISP200. An anode electrode AND may be formed at one end of the single-photon avalanche diode SPAD, and a cathode electrode CAT may be formed at the other end. The anode electrode AND and the cathode electrode CAT are relative concepts and their positions may change. For example, the anode electrode AND may be the second semiconductor region CD2 of the single-photon avalanche diode SPAD, and the cathode electrode CAT may be the first semiconductor region CD1 of the single-photon avalanche diode SPAD, but the embodiments herein are not limited thereto. A diode voltage VSPAD may be applied to the anode electrode AND of the single-photon avalanche diode SPAD. The cathode electrode CAT may be connected to the first node N1. A second light L2 is applied to the single-photon avalanche diode SPAD (see Figure 4). An analog quenching transistor QX is connected to the first node N1. An analog quenching voltage VDD is applied to the first electrode of the analog quenching transistor QX, the second electrode is connected to the first node N1, and a quenching control signal QCS is applied to the gate electrode. The on / off state of the analog quenching transistor QX may be controlled by the quenching control signal QCS.

[0071] A readout transistor RT may be connected to the first node N1. The first electrode of the readout transistor RT is connected to the first node N1, and the second electrode is connected to the readout circuit 150. A readout control signal RCS is applied to the gate electrode, and the on / off state of the readout transistor RT may be controlled by the readout control signal RCS.

[0072] Figure 8 shows the modes of a single-photon avalanche diode according to one embodiment. The horizontal axis of Figure 8 represents the voltage VR applied to the single-photon avalanche diode (see SPAD in Figure 7), and the vertical axis represents the current IR output from the single-photon avalanche diode (see SPAD in Figure 7).

[0073] Referring to Figures 7 and 8, the modes of a single-photon avalanche diode may include linear mode and Geiger mode. The linear mode and Geiger mode are distinguished with respect to the breakdown voltage VBV. When the voltage applied to a single-photon avalanche diode SPAD (hereinafter referred to as diode SPAD) is greater than or equal to the breakdown voltage VBV, the diode SPAD operates in Geiger mode, and when the voltage applied to the diode SPAD is less than the breakdown voltage VBV, the diode SPAD can operate in linear mode. The voltage VR applied to the diode SPAD may be based on the (-) voltage. Therefore, in this specification, a larger (-) value is considered to indicate a larger voltage. However, the embodiments of this specification are not limited thereto. In linear mode and Geiger mode, the diode voltage VSPAD may have a constant magnitude. For example, the diode voltage VSPAD may be set to have a voltage lower than the breakdown voltage VBV. If the diode voltage VSPAD is higher than the breakdown voltage VBV, the diode SPAD can enter Geiger mode even when the analog quenching transistor QX is not turned on. In this case, even when the second light L2 is not applied, random avalanches may occur, potentially generating a large current IR from the diode SPAD. Therefore, it is preferable to set the diode voltage VSPAD to be lower than the breakdown voltage VBV.

[0074] For a more detailed explanation of Geiger mode and linear mode, let's consider the magnitude of each voltage as an example. The breakdown voltage VBV is -20V, and the diode voltage VSPAD may be -19V. When the analog quenching transistor QX is off, the voltage applied to the diode SPAD is -19V, which is less than the breakdown voltage VBV, so the diode SPAD operates in linear mode. In linear mode, even when light L2 is incident on the diode SPAD, the current IR output from the diode SPAD is not large, and the magnitude of the current IR increases in proportion to the number of carriers (e- or h+) generated by impact ionization, although the number of carriers may not be large. Even when the analog quenching transistor QX is on, if the analog quenching voltage VDD is less than 1V, the voltage VR applied to the diode SPAD is -19V-(a voltage less than 1V), which is less than the breakdown voltage VBV, so the diode SPAD operates in linear mode.

[0075] Reset operation In the reset operation ((3)), when a 1V analog quenching voltage VDD is applied, the voltage VR applied to the diode SPAD becomes equal to the breakdown voltage VBV. From this point onward, the diode SPAD operates in Geiger mode. In Geiger mode, the magnitude of the current IR output from the diode SPAD increases very sharply as the voltage VR applied to the diode SPAD increases. However, in the reset operation ((3)), if the voltage VR applied to the diode SPAD is set to be equal to the breakdown voltage VBV, the diode SPAD may operate in linear mode instead of Geiger mode due to some error. Therefore, in the reset operation ((3)), the voltage VR applied to the diode SPAD can be set up to the operating voltage VOP. For example, the operating voltage VOP may be greater than the breakdown voltage VBV, for example, let's assume it is -23V. In other words, the reset operation ((3)) involves setting an operating voltage VOP that is greater than the breakdown voltage VBV in advance, and raising the voltage VR applied to the diode SPAD via the analog quenching voltage VDD to the operating voltage VOP. In order to raise the voltage VR applied to the diode SPAD to the operating voltage VOP, which is -23V, the analog quenching voltage VDD needs to be 4V (-19V - 4V = -23V). The voltage obtained by subtracting the breakdown voltage VBV from the operating voltage VOP is the set voltage VEX, which in this case may be -2V.

[0076] Avalanche operation In avalanche operation ((1)), the diode SPAD generates many impact ionizations and countless carriers, which can result in a large magnitude of the current IR output from the diode SPAD. That is, because the magnitude of the output current IR is large, the operation of generating a pulsed signal reflected from the target object TO as described in Figure 5 can be performed in the avalanche operation ((1)) of the diode SPAD. The pulsed signal generated from the diode SPAD is provided to the readout circuit 150 when the readout transistor RT is turned on. The TDC 151 of the readout circuit 150 generates pixel data PD based on the pulsed signal generated and transmitted from the diode SPAD, and the TDC buffer 153 stores the generated pixel data PD.

[0077] Quenching action In the quenching operation ((2)), the analog quenching transistor QX is turned off, which allows the voltage VR applied to the diode SPAD to drop again to the diode voltage VSPAD level. In one embodiment, the diode SPAD repeats the reset operation ((3)), the avalanche operation ((1)), and the quenching operation ((2)).

[0078] Figure 9 is a graph obtained by converting pixel data generated by the second pixel SP according to one embodiment into a histogram. Figure 10 is a graph obtained by converting pixel data generated by the fourth pixel SP according to one embodiment into a histogram. In Figures 9 and 10, the horizontal axis represents time t, and the vertical axis represents signal intensity.

[0079] Pixel data PD is generated in Geiger mode of the diode SPAD as described in Figure 7. The ISP (see 200 in Figure 7) can convert the pixel data PD of each diode SPAD into a histogram. In Figures 9 and 10, the diode SPAD of each pixel SP is exposed to the same illumination conditions and generates a pulse signal reflected and incident from an object at the same distance (see TO in Figure 1).

[0080] Referring to Figures 3, 9, and 10, the diode SPAD of the second pixel SP2 may have a second width W2, and the diode SPAD of the fourth pixel SP4 may have a fourth width W4 that is smaller than the second width W2. Generally, the width of a diode SPAD is proportional to its signal intensity. That is, the wider the diode SPAD, the more sensitive it is considered to be. For example, the diode SPADs of the first and second pixels SP1 and SP2 may be the most sensitive diodes, followed by the diode SPAD of the third pixel SP3 which is a medium-sensitivity diode, and the diode SPAD of the fourth pixel SP4 which is a low-sensitivity diode, but the embodiments herein are not limited thereto. Therefore, as shown in Figures 9 and 10, the signal intensity of the pixel data PD generated by the diode SPAD of the second pixel SP2 may be greater than the signal intensity of the pixel data PD generated by the diode SPAD of the fourth pixel SP4, based on an object at the same illumination conditions and distance (see TO in Figure 1).

[0081] One embodiment of the imaging system (see 1 in Figure 1) is characterized by selectively operating high-sensitivity, medium-sensitivity, and low-sensitivity diode SPADs (receiving light through the corresponding diode SPAD) under different illumination conditions. For example, in a low-illumination environment, a relatively large amount of light must be received, so a high-sensitivity diode SPAD may be operated, while in a high-illumination environment, a relatively small amount of light may be received, so a low-sensitivity diode SPAD may be operated. In some embodiments, the high-sensitivity, medium-sensitivity, and low-sensitivity diode SPADs may also be selectively operated (receiving light through the corresponding diode SPAD) depending on the distance to the target object (see TO in Figure 1). For example, a high-sensitivity diode SPAD may be operated when the distance is relatively far, and a low-sensitivity diode SPAD may be operated when the distance is relatively close.

[0082] Figure 11 shows a photographic system according to one embodiment.

[0083] Referring to Figures 7 and 11, the imaging system 1 according to one embodiment may include a plurality of pixels SP1, SP2, SP3, and SP4. In Figure 11, the first pixel group PX_G1 is shown as an example, but the operation of the second pixel group PX_G2 to the fourth pixel group PX_G4 may be the same as that of the first pixel group PX_G1.

[0084] The pixels SP1, SP2, SP3, and SP4 of the first pixel group PX_G1 may be connected to each other. For example, each pixel SP1, SP2, SP3, and SP4 may share the first node N1. The gate electrodes of the analog quenching transistors QX of each pixel SP1, SP2, SP3, and SP4 may each be connected to the pixel driver 120. The pixel driver 120 can control the on / off state of the analog quenching transistors QX of each pixel SP1, SP2, SP3, and SP4 by applying a quenching control signal QCS to the gate electrodes of the analog quenching transistors QX of each pixel SP1, SP2, SP3, and SP4.

[0085] As described above, the imaging system 1 according to one embodiment is characterized by selectively operating high-sensitivity, medium-sensitivity, and low-sensitivity diode SPADs (receiving light through the corresponding diode SPAD) under different illumination conditions. Therefore, the pixel driver 120 can control the on / off state of the analog quenching transistor QX of each pixel SP1, SP2, SP3, and SP4 based on the illumination of the surrounding environment determined by the illumination sensor 300. Accordingly, the illumination sensor 300 can sense the illumination of the surrounding environment, determine whether the sensed illumination is above or below a reference illumination level, and transmit the determined result to the timing controller 130.

[0086] The timing controller 130 can transmit a signal to the pixel driver 120 to turn on the analog quenching transistor QX of the first pixel SP1 or the second pixel SP2 if the sensed illuminance is less than the reference illuminance, and can transmit a signal to the pixel driver 120 to turn on the analog quenching transistor QX of the fourth pixel SP4 if the sensed illuminance is equal to or greater than the reference illuminance.

[0087] In some embodiments, the illuminance sensor 300 may sense multiple reference illuminances. For example, the reference illuminance may include a first reference illuminance and a second reference illuminance greater than the first reference illuminance. Below the first reference illuminance, the timing controller 130 can transmit a signal to the pixel driver 120 to turn on the analog quenching transistor QX of the first pixel SP1 or the second pixel SP2 if the sensed illuminance is less than the first reference illuminance. If the sensed illuminance is greater than or equal to the first reference illuminance and less than the second reference illuminance, the timing controller 130 can transmit a signal to the pixel driver 120 to turn on the analog quenching transistor QX of the third pixel SP3. If the sensed illuminance is greater than or equal to the second reference illuminance, the timing controller 130 can transmit a signal to the pixel driver 120 to turn on the analog quenching transistor QX of the fourth pixel SP4. For the sake of explanation, the following will focus on the case where there is only one reference illuminance.

[0088] Figure 12 shows the imaging system at below the standard illumination level.

[0089] Referring to Figure 12, if the ambient illuminance is below the reference illuminance, the pixel driver 120 can apply a turn-on level quenching control signal QCS to the analog quenching transistor QX of the second pixel SP2, and a turn-off level quenching control signal QCS to the analog quenching transistors QX of the remaining pixels SP1, SP3, and SP4. This can turn on the analog quenching transistor QX of the second pixel SP2, and turn off the analog quenching transistors QX of the remaining pixels SP1, SP3, and SP4. Therefore, a pulse signal (or pixel signal) generated by the second light reflected from the target object TO (see L2 in Figure 1) is generated from the diode SPAD of the turned-on second pixel SP2, and the generated pulse signal can be transmitted to the readout circuit 150 via the readout transistor RT.

[0090] Figure 13 is a plan view showing the channel region irradiated with the first light from a light source according to one embodiment. Figure 14 is a plan view showing the second light irradiating the pixel array according to one embodiment.

[0091] Referring to Figures 12 to 14, the light source LS includes a near-infrared laser light source (VCSEL: Vertical cavity surface emitting laser), and the light source LS may include channel groups LSAa, LSAb, LSAc, and LSAd in the pixel region PX, corresponding to the pixel groups PX_G1, PX_G2, PX_G3, and PX_G4 in Figure 3. In this specification, when a channel of the light source LS corresponds to a pixel SP, it means that the first light L1 output from that channel is reflected from the target object TO and incident on the corresponding pixel SP. For example, the first channel group LSAa outputs the first light L1 corresponding to the first pixel group PX_G1, the second channel group LSAb outputs the first light L1 corresponding to the second pixel group PX_G2, the third channel group LSAc outputs the first light L1 corresponding to the third pixel group PX_G3, and the fourth channel group LSAd outputs the first light L1 corresponding to the fourth pixel group PX_G4.

[0092] As explained in Figure 12, in one embodiment of the imaging system 1, when the ambient illumination is below the reference illumination, the pixel driver 120 applies a turn-on level quenching control signal QCS to the analog quenching transistor QX of the second pixel SP2, so that only the second pixel SP2 of each pixel group PX_G1, PX_G2, PX_G3, and PX_G4 in Figure 3 operates.

[0093] As shown in Figure 13, the light source LS according to one embodiment can output the second light L2 from all channels regardless of which pixels SP1, SP2, SP3, and SP4 are operating.

[0094] Figure 15 is a graph showing a histogram of the pixel data generated by the second pixel SP of the pixel group according to one embodiment.

[0095] Referring to Figure 15, below the reference illuminance, only the second pixel SP2 of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4 in Figure 3) operates. The second pixel SP2 of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4 in Figure 3) generates a pulse signal (or pixel signal) and transmits the generated pulse signal to the readout circuit (see 150 in Figure 12). The readout circuit (see 150 in Figure 12) converts the pulse signals generated by the second pixel SP2 into pixel data and transmits it to the ISP200. The ISP200 converts the transmitted pixel data into a histogram (see the left side of Figure 15) and sums the converted pixel data (see the right side of Figure 15).

[0096] According to one embodiment of the imaging system, even when the ambient illumination is below the reference illumination, a large amount of second light (see L2 in Figure 14) can be received through the diode SPAD of the second pixel SP2 of each pixel group PX_G1, PX_G2, PX_G3, and PX_G4, which has high sensitivity, and effective pixel data can be generated. In addition, since the pixel data generated from the second pixel SP2 of each pixel group PX_G1, PX_G2, PX_G3, and PX_G4 is summed up, the distance to the target object (see TO in Figure 1) can be accurately sensed even in low-illumination environments.

[0097] Figure 16 shows the imaging system at a standard illumination level or higher. Figure 17 is a graph showing the sum of pixel data generated by the fourth pixel SP4 of the pixel group according to one embodiment.

[0098] Referring to Figures 16 and 17, if the ambient illuminance is equal to or greater than the reference illuminance, the pixel driver 120 can apply a turn-on level quenching control signal QCS to the analog quenching transistor QX of the fourth pixel SP4, and a turn-off level quenching control signal QCS to the analog quenching transistors QX of the remaining pixels SP1, SP2, and SP3. This can turn on the analog quenching transistor QX of the fourth pixel SP4, and turn off the analog quenching transistors QX of the remaining pixels SP1, SP2, and SP3. Therefore, a pulse signal (or pixel signal) generated by the second light reflected from the target object TO (see L2 in Figure 1) is generated from the diode SPAD of the turned-on fourth pixel SP4, and the generated pulse signal can be transmitted to the readout circuit 150 via the readout transistor RT.

[0099] Below the reference illuminance, only the fourth pixel SP4 of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4 in Figure 3) operates. The fourth pixel SP4 of each pixel group (PX_G1, PX_G2, PX_G3, PX_G4 in Figure 3) generates a pulse signal (or pixel signal) and transmits the generated pulse signal to the readout circuit 150. The readout circuit (see 150 in Figure 12) converts the pulse signals generated by the fourth pixel SP4 into pixel data and transmits it to the ISP200. The ISP200 converts the transmitted pixel data into a histogram (see the left side of Figure 17) and sums the converted pixel data (see the right side of Figure 17).

[0100] According to one embodiment of the imaging system, when the ambient illumination is above the reference illumination, a small amount of second light (see L2 in Figure 14) can be received through the diode SPAD of the fourth pixel SP4 of each pixel group PX_G1, PX_G2, PX_G3, and PX_G4, which has low sensitivity, and effective pixel data can be generated. As explained in Figure 8, in Geiger mode, the magnitude of the output current IR of the diode SPAD can be very large. Therefore, in a high-illumination environment, a large amount of signal may be output (along with noise), so it is necessary to reduce the amount of second light L2 received.

[0101] Furthermore, by summing the pixel data generated from the fourth pixel SP4 of each pixel group PX_G1, PX_G2, PX_G3, and PX_G4, the distance to the target object (see TO in Figure 1) can be accurately sensed.

[0102] The following describes a shooting system according to another embodiment. When describing the following embodiments, the reference numerals or components described in Figures 1 to 17 will be omitted for redundant explanation or detailed explanation.

[0103] Figure 18 is a block diagram showing a shooting system according to another embodiment. Figure 19 is a diagram showing a more detailed view of the shooting system according to another embodiment. Figures 20 and 21 are graphs showing pixel data generated by illuminance pixels as histograms.

[0104] Referring to Figures 18 to 21, the imaging system 1_1 according to this embodiment differs from the imaging system 1 shown in Figures 1 and 11 in that the illuminance sensor 300 in Figure 1 is located inside the pixel array 110_1 (see LPX).

[0105] More specifically, the illuminance sensor LPX is located inside the pixel array 110_1 and, like the pixels, may be formed in the form of a single-photon avalanche diode. Figure 18 illustrates a single illuminance sensor LPX, but the embodiments herein are not limited thereto, and there may be multiple illuminance sensors LPX. Also, although the illuminance sensor LPX is shown located on the outer periphery of the pixel array 110_1, the embodiments herein are not limited thereto, and it may be located between pixels SP1, SP2, SP3, and SP4.

[0106] As shown in Figure 19, the illuminance sensor LPX senses the illuminance of the surrounding environment and transmits the sensed result (in the form of a pulse signal) to the readout circuit 150. The readout circuit 150 generates pixel data based on the pulse signal (or pixel signal) transmitted from the illuminance sensor LPX and transmits it to the ISP200.

[0107] As shown in Figures 20 and 21, the illuminance sensor LPX senses the illuminance of the surrounding environment over a certain period of time, and the ISP200 can determine whether the average illuminance is equal to or greater than the reference illuminance TH (see Figure 20) or less than the reference illuminance TH (see Figure 21) based on a histogram generated based on the sensed pulse signals (or pixel data). If the average illuminance is equal to or greater than the reference illuminance TH, the timing controller 130 transmits a signal to the pixel driver 120 to turn on the analog quenching transistor QX of the fourth pixel SP4. If the average illuminance is less than the reference illuminance TH, the timing controller 130 can transmit a signal to the pixel driver 120 to turn on the analog quenching transistor QX of the first pixel SP1 or the second pixel SP2.

[0108] In some embodiments, a highly sensitive diode SPAD may be operated when the distance is relatively far, and a less sensitive diode SPAD may be operated when the distance is relatively close.

[0109] For example, referring to Figure 16, the illuminance sensor 300 may be omitted, and only the fourth pixel SP4 of each pixel group (see PX_G1 to PX_G4 in Figure 3) may be operated. The pixel driver 120 may apply a turn-on level quenching control signal QCS to the analog quenching transistor QX of the fourth pixel SP4, and a turn-off level quenching control signal QCS to the analog quenching transistor QX of the remaining pixels SP1, SP2, and SP3. A pulse signal (or pixel signal) generated by the second light reflected from the target object TO (see L2 in Figure 1) is generated from the diode SPAD of the turned-on fourth pixel SP4, and the generated pulse signal can be transmitted to the readout circuit 150 via the readout transistor RT. The readout circuit 150 converts each pulse signal generated by the fourth pixel SP4 into pixel data and transmits it to the ISP200, which converts each transmitted pixel data into a histogram and sums up the converted pixel data. Furthermore, the ISP200 can determine whether the target object (see TO in Figure 1) is at a nearby or distant location based on the aggregated pixel data. For example, if the aggregated pixel data is above a certain threshold or above a certain precision, it may be determined to be at a nearby location, and if it is below the threshold or below a certain precision, it may be determined to be at a distant location.

[0110] If the summed pixel data is equal to or greater than the reference value or reference accuracy, the distance to the target object TO is measured based on the summed pixel data generated by the fourth pixel SP4. If the summed pixel data is less than the reference value or reference accuracy, the first or second pixels SP1 and SP2 are activated to generate pulse signals (or pixel signals) again and transmit them to the readout circuit 150. The readout circuit 150 converts the pulse signals generated by the first pixel SP1 or the second pixel SP2 into pixel data and transmits them to the ISP200. The ISP200 converts each transmitted pixel data into a histogram and sums the converted pixel data. At this time, the distance to the target object TO can be measured based on the summed pixel data.

[0111] Image sensing devices and imaging systems according to various embodiments of this specification can be described as follows.

[0112] Image sensing devices according to various embodiments of this specification include a first pixel group and a second pixel group, each including a first pixel having a first area and a second pixel SP having a second area smaller than the first area, wherein each of the first and second pixels includes an avalanche diode, an anti-reflective layer on the avalanche diode, and the light-gathering pattern on the anti-reflective layer.

[0113] In the image sensing apparatus according to various embodiments of this specification, the first pixel of the first pixel group and the first pixel SP of the second pixel group may be arranged adjacent to each other, and the second pixel of the second pixel group and the second pixel SP of the second pixel group may be arranged adjacent to each other.

[0114] In the image sensing apparatus according to various embodiments of this specification, the avalanche diode may include a first semiconductor region, a second semiconductor region, and a substrate portion on the first semiconductor region and the second semiconductor region.

[0115] In the image sensing apparatus according to various embodiments of this specification, the first pixel SP may further include an intermediate region between the first semiconductor region and the second semiconductor region.

[0116] In the image sensing apparatus according to various embodiments of this specification, the first pixel SP may further include a second trench portion that recesses the substrate portion in the thickness direction.

[0117] Image sensing devices according to various embodiments of this specification further include non-pixel regions surrounding each pixel SP, and a first trench portion may be disposed in the non-pixel region.

[0118] In various embodiments of this specification, the image sensing apparatus may include, for each first and second pixel SP, an analog quenching transistor that turns on in response to a quenching control signal, and an avalanche diode connected to the analog quenching transistor.

[0119] In various embodiments of this specification, the image sensing apparatus may have an analog quenching voltage applied to the first electrode of the analog quenching transistor, the second electrode connected to the avalanche diode, and the gate electrode controlled by the quenching control signal.

[0120] Image sensing devices according to various embodiments of this specification further include an illuminance sensor, and if the illuminance of the surrounding environment sensed by the illuminance sensor is equal to or greater than a reference illuminance, the analog quenching transistor of the second pixel SP of the first pixel group and the analog quenching transistor of the second pixel SP of the second pixel group may be turned on.

[0121] In the image sensing apparatus according to various embodiments of this specification, if the illuminance of the surrounding environment sensed by the illuminance sensor is less than a reference illuminance, the analog quenching transistor of the first pixel SP of the first pixel group and the analog quenching transistor of the first pixel SP of the second pixel group may be turned on.

[0122] In the image sensing apparatus according to various embodiments of this specification, the illuminance sensor may be located within the pixel array and may be located in the form of an avalanche diode.

[0123] In the various embodiments of this specification, the image sensing apparatus may have the first pixel and second pixel SP of the first pixel group electrically connected, and the first pixel and second pixel SP of the second pixel group electrically connected.

[0124] In the various embodiments of this specification, the image sensing apparatus may selectively turn on or off the first and second pixels SP of each pixel group depending on the illuminance of the surrounding environment.

[0125] Various embodiments of the imaging system described herein include a light source that irradiates a target object with first light, and an image sensing device that includes a first pixel group and a second pixel group, each including a first pixel having a first area and a second pixel SP having a second area smaller than the first area, wherein each of the first and second pixels receives second light reflected by the target object, the first pixel of the first pixel group and the first pixel SP of the second pixel group are arranged adjacent to each other, and the second pixel of the second pixel group and the second pixel SP of the second pixel group are arranged adjacent to each other.

[0126] In various embodiments of this specification, the imaging system may be such that the first pixel and second pixel SP of the first pixel group are electrically connected, and the first pixel and second pixel SP of the second pixel group are electrically connected.

[0127] In the various embodiments of this specification, the imaging systems may selectively turn on or off the first and second pixels SP of each pixel group depending on the illuminance of the surrounding environment.

[0128] In various embodiments of the imaging system described herein, the light source may irradiate the target object with the first light so as to correspond to the first pixel or second pixel SP of each pixel group that is selectively turned on.

[0129] The imaging systems according to various embodiments of this specification may further include a readout circuit that calculates the time delay between a pulse signal output from a first or second pixel SP of each selectively turned-on pixel group and a reference pulse, and generates and stores pixel data corresponding to the time delay.

[0130] The imaging systems according to various embodiments of this specification may further include an image signal processor that processes pixel data input from the readout circuit and generates a depth image representing the distance to the target object.

[0131] In the various embodiments of the imaging system described herein, each of the first and second pixels includes an avalanche diode, and the avalanche diode may include a first semiconductor region, a second semiconductor region, and a substrate portion on the first and second semiconductor regions.

[0132] Although one embodiment has been described above with reference to the attached drawings, those skilled in the art will understand that the above-described technical configuration can be implemented in other specific forms without altering the technical idea or essential features. Therefore, the above-described embodiment should be understood to be illustrative and not limiting in all respects. Furthermore, the scope of the present invention is indicated more by the claims described below than by the above-described detailed description. Moreover, the meaning and scope of the claims, and any modifications or altered forms derived from their equivalent concepts, should be interpreted as being included within the scope of the present invention. [Explanation of symbols]

[0133] 1: Shooting System 100: Image sensing device 110: Pixel Array 120: Pixel driver 130: Timing Controller 150: Lead-out circuit 200:ISP

Claims

1. It includes a first pixel group and a second pixel group, each including a first pixel having a first active region having a first area, and a second pixel having a second active region having a second area smaller than the first area, An image sensing device in which each of the first and second pixels includes an avalanche diode, an anti-reflective layer on the avalanche diode, and a light-gathering pattern on the anti-reflective layer.

2. The image sensing device according to claim 1, wherein the first pixel of the first pixel group and the first pixel of the second pixel group are arranged adjacent to each other, and the second pixel of the second pixel group and the second pixel of the second pixel group are arranged adjacent to each other.

3. The image sensing apparatus according to claim 1, wherein the avalanche diode includes a first semiconductor region, a second semiconductor region, and a substrate portion on the first semiconductor region and the second semiconductor region.

4. The image sensing apparatus according to claim 3, wherein the first pixel further includes an intermediate region between the first semiconductor region and the second semiconductor region.

5. The image sensing apparatus according to claim 3, wherein the first pixel further includes a second trench portion that recesses the substrate portion in the thickness direction.

6. The image sensing device according to claim 1, further comprising a non-pixel region surrounding each of the aforementioned pixels, wherein a first trench portion is disposed in the non-pixel region.

7. The image sensing apparatus according to claim 1, wherein the first pixel and the second pixel include an analog quenching transistor that turns on in response to a quenching control signal, and the avalanche diode connected to the analog quenching transistor.

8. The image sensing device according to claim 7, wherein an analog quenching voltage is applied to the first electrode of the analog quenching transistor, the second electrode is connected to the avalanche diode, and the gate electrode is controlled by the quenching control signal.

9. The image sensing device according to claim 7, further comprising an illuminance sensor, wherein if the illuminance of the surrounding environment sensed by the illuminance sensor is equal to or greater than a reference illuminance, the analog quenching transistor of the second pixel of the first pixel group and the analog quenching transistor of the second pixel of the second pixel group are turned on.

10. The image sensing device according to claim 9, wherein if the illuminance of the surrounding environment sensed by the illuminance sensor is less than a reference illuminance, the analog quenching transistor of the first pixel of the first pixel group and the analog quenching transistor of the first pixel of the second pixel group are turned on.

11. The image sensing device according to claim 9, wherein the illuminance sensor is arranged in the form of an avalanche diode.

12. The image sensing device according to claim 1, wherein the first pixel and the second pixel of the first pixel group are electrically connected, and the first pixel and the second pixel of the second pixel group are electrically connected.

13. The image sensing device according to claim 12, wherein the first pixel and second pixel SP of each pixel group are selectively turned on or off according to the illuminance of the surrounding environment.

14. The image sensing device according to claim 12, wherein the first and second pixels of each pixel group are selectively turned on or off depending on the distance to the target object.

15. A light source that irradiates the target object with a first beam of light, The image sensing device includes a first pixel group and a second pixel group, each including a first pixel having a first active region having a first area, and a second pixel having a second active region having a second area smaller than the first area, Each of the first and second pixels receives the second light reflected by the target object, The first pixel of the first pixel group and the first pixel of the second pixel group are arranged adjacent to each other. A shooting system in which the second pixel of the second pixel group and the second pixel of the second pixel group are arranged adjacent to each other.

16. The imaging system according to claim 15, wherein the first pixel and the second pixel of the first pixel group are electrically connected, and the first pixel and the second pixel of the second pixel group are electrically connected.

17. The imaging system according to claim 16, wherein the first and second pixels of each pixel group are selectively turned on or off depending on the illumination of the surrounding environment.

18. The imaging system according to claim 17, wherein the light source irradiates the target object with the first light so as to correspond to the first or second pixel of each pixel group that is selectively turned on.

19. The imaging system according to claim 17, further comprising a readout circuit that calculates the time delay between a pulse signal output from the first or second pixel of each selectively turned-on pixel group and a reference pulse, and generates and stores pixel data corresponding to the time delay.

20. The imaging system according to claim 19, further comprising an image signal processor that processes pixel data input from the readout circuit and generates a depth image representing the distance to the target object.

Images