Semiconductor equipment

Abstract

To provide a semiconductor device with reduced defects in an oxide semiconductor film. Also, in a semiconductor device using an oxide semiconductor film, to provide a semiconductor device with improved electrical characteristics or improved reliability. In a semiconductor device using an oxide semiconductor film, a semiconductor device with improved electrical characteristics or improved reliability. To provide. 【Solution means】A semiconductor device including a gate electrode formed on a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping the gate electrode through the gate insulating film, and a pair of electrodes contacting the multilayer film, and an oxide insulating film covering the transistor, wherein the multilayer film has an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film is an oxide insulating film containing more oxygen than oxygen satisfying a stoichiometric composition, and the transistor has a threshold voltage that does not fluctuate or has a fluctuation amount in the plus or minus direction of 1.0 V or less under a bias temperature stress test. A semiconductor device including a gate electrode formed on a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping the gate electrode through the gate insulating film, and a pair of electrodes contacting the multilayer film, and an oxide insulating film covering the transistor, wherein the multilayer film has an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film is an oxide insulating film containing more oxygen than oxygen satisfying a stoichiometric composition, and the transistor has a threshold voltage that does not fluctuate or has a fluctuation amount in the plus or minus direction of 1.0 V or less under a bias temperature stress test. A semiconductor device including a gate electrode formed on a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping the gate electrode through the gate insulating film, and a pair of electrodes contacting the multilayer film, and an oxide insulating film covering the transistor, wherein the multilayer film has an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film is an oxide insulating film containing more oxygen than oxygen satisfying a stoichiometric composition, and the transistor has a threshold voltage that does not fluctuate or has a fluctuation amount in the plus or minus direction of 1.0 V or less under a bias temperature stress test. has an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film is an oxide insulating film containing more oxygen than oxygen satisfying a stoichiometric composition, and the transistor has a threshold voltage that does not fluctuate or has a fluctuation amount in the plus or minus direction of 1.0 V or less under a bias temperature stress test. has an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film is an oxide insulating film containing more oxygen than oxygen satisfying a stoichiometric composition, and the transistor has a threshold voltage that does not fluctuate or has a fluctuation amount in the plus or minus direction of 1.0 V or less under a bias temperature stress test. The threshold voltage does not fluctuate or the fluctuation amount in the plus or minus direction is 1.0 V or less under a bias temperature stress test. The threshold voltage does not fluctuate or the fluctuation amount in the plus or minus direction is 1.0 V or less under a bias temperature stress test.

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device having a transistor and a method for manufacturing the same. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors being described are amorphous silicon, single-crystal silicon formed on a glass substrate. It is made of silicon semiconductors such as silicon or polycrystalline silicon. Transistors, which use semiconductors, are also used in integrated circuits (ICs), among other applications.

[0003] In recent years, metal oxides exhibiting semiconductor properties have been used in transistors instead of silicon semiconductors. The technology is attracting attention. In this specification, metal oxides exhibiting semiconductor properties are referred to as oxides. Let's call it a semiconductor.

[0004] For example, a tripod using zinc oxide or an In-Ga-Zn oxide as an oxide semiconductor. A technique for fabricating transistors and using them as switching elements for pixels in display devices. The technique is disclosed (see Patent Documents 1 and 2). [Prior art documents] [Patent Documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2007-123861 [Patent Document 2] Japanese Patent Publication No. 2007-96055 [Overview of the Initiative] [Problems that the invention aims to solve]

[0006] In a transistor using an oxide semiconductor film, the amount of oxygen vacancies contained in the oxide semiconductor film A high level of this can lead to poor electrical characteristics in transistors, as well as deterioration over time and stress testing. (For example, in the BT (Bias-Temperature) stress test), The electrical characteristics of a zista, specifically the cause of the increased fluctuation in the threshold voltage (Vth), and Yes.

[0007] Therefore, one aspect of the present invention relates to a semiconductor device using an oxide semiconductor film, One of the objectives is to reduce defects in body membranes. Another aspect of the present invention relates to an oxide semiconductor film. One of the challenges of this invention is to improve the electrical characteristics of semiconductor devices using this technology. One aspect of the invention is to improve reliability in a semiconductor device using an oxide semiconductor film. This will be one of the issues to address. [Means for solving the problem]

[0008] One aspect of the present invention is a gate electrode formed on a substrate, a gate insulating film covering the gate electrode, It has a multilayer film that overlaps with the gate electrode via a gate insulating film, and a pair of electrodes in contact with the multilayer film. A semiconductor device comprising a transistor and an oxide insulating film covering the transistor, The multilayer film comprises an oxide semiconductor film and an oxide film containing In or Ga, and the oxide insulating film is said to have an oxide semiconductor film. This is an oxide insulating film containing more oxygen than satisfies the stoichiometric composition, and transient The sta is one in which the threshold voltage does not fluctuate or is positive in the bias temperature stress test. Alternatively, it has the characteristic of fluctuating in the negative direction, and fluctuating in the negative or positive direction. The amount is characterized by being 1.0V or less, preferably 0.5V or less.

[0009] Furthermore, the oxide semiconductor film preferably contains In or Ga.

[0010] Furthermore, the energy level at the lower end of the conduction band of an oxide film containing In or Ga is... It is closer to the vacuum level than the energy level at the lower end of the conduction band of the conductive film. Furthermore, In or Energy levels at the lower end of the conduction band of an oxide film containing Ga, and the energy levels at the lower end of the conduction band of an oxide semiconductor film. The difference from the energy level is preferably 0.05 eV or more and 2 eV or less. The energy difference between the vacant level and the lower edge of the conduction band is also called electron affinity, and therefore contains In or Ga. The electron affinity of oxide films is smaller than that of oxide semiconductor films, with a difference of 0.05e. It is preferable that the value is between V and 2eV.

[0011] Furthermore, oxide semiconductor films and oxide films containing In or Ga are In-M-Zn oxides. The film (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) is an oxide semi-semi Compared to a conductive film, the atomic ratio of M contained in an oxide film containing In or Ga is large. It is preferable.

[0012] Furthermore, the multilayer film is exposed to constant light in the energy range of 1.5 eV to 2.3 eV. Using the constant photocurrent method (CPM) The derived absorption coefficient is 1 × 10⁻⁶ -3 It is preferable that it be less than / cm.

[0013] Furthermore, the silicon concentration between the oxide semiconductor film and the oxide film containing In or Ga. However, 2 x 10 18 atoms / cm 3 It is preferable that it be less than [a certain value].

[0014] Furthermore, in one aspect of the present invention, a gate electrode and a gate insulating film are formed, and on the gate insulating film, A multilayer film is formed having an oxide semiconductor film and an oxide film containing In or Ga, and the multilayer film A semiconductor is formed by creating a pair of contacting electrodes and forming an oxide insulating film on the multilayer film and the pair of electrodes. This is a method for manufacturing the apparatus. The oxide insulating film is applied to a substrate placed in a vacuum-evacuated processing chamber. Maintain the temperature between 180°C and 260°C, and introduce the raw material gas into the processing chamber to maintain the pressure within the processing chamber. The pressure is set to 100 Pa or more and 250 Pa or less, and 0.17 W / cm² is applied to the electrode installed in the processing chamber. 2 More than 0.5W / cm 2 It is formed by supplying the following high-frequency power. [Effects of the Invention]

[0015] According to one aspect of the present invention, in a semiconductor device using an oxide semiconductor film, the oxide semiconductor film The defects can be reduced. Furthermore, according to one aspect of the present invention, an oxide semiconductor film is used In semiconductor devices, electrical characteristics can be improved. Furthermore, according to one aspect of the present invention This can improve reliability in semiconductor devices using oxide semiconductor films. [Brief explanation of the drawing]

[0016] [Figure 1] This diagram shows a top view and a cross-sectional view illustrating one form of a transistor, as well as a diagram illustrating its Vg-Id characteristics. [Figure 2] This is a diagram illustrating the band structure of a transistor. [Figure 3] This is a cross-sectional view illustrating one method for fabricating transistors. [Figure 4] This is a cross-sectional view illustrating one form of transistor. [Figure 5] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 6]This is a diagram illustrating the band structure of a transistor. [Figure 7] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 8] This is a cross-sectional view illustrating one method for fabricating transistors. [Figure 9] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 10] This is a cross-sectional view illustrating one method for fabricating transistors. [Figure 11] These are a top view and a cross-sectional view illustrating one form of transistor. [Figure 12] This is a cross-sectional view illustrating one form of transistor. [Figure 13] This is a top view illustrating one form of a semiconductor device. [Figure 14] This is a cross-sectional view illustrating one form of a semiconductor device. [Figure 15] This figure illustrates an electronic device using a semiconductor device, which is one aspect of the present invention. [Figure 16] This figure illustrates an electronic device using a semiconductor device, which is one aspect of the present invention. [Figure 17] This is a diagram showing the Vg-Id characteristics of a transistor. [Figure 18] This figure shows the change in the threshold voltage of a transistor after a photo-BT stress test. [Figure 19] This figure shows the spin density of the g-value originating from oxygen vacancies in an oxide semiconductor film. [Figure 20] This figure shows the CPM measurement results of the multilayer film contained in the transistor. [Figure 21] This figure shows the ToF-SIMS results for the multilayer film contained in a transistor. [Figure 22] This figure shows the TDS measurement results of the oxide insulating film contained in the transistor. [Figure 23] This figure shows the spin density of the g-value originating from the dangling bond in the oxide insulating film. [Figure 24]This is a top view showing an example of the configuration of the pixel section of a display device. [Figure 25] This is a cross-sectional view showing an example of the configuration of the pixel section of a display device. [Figure 26] This figure shows an example of the connection structure for the common electrodes of a display device, and another figure showing an example of the connection structure for the wiring of a display device. [Figure 27] This is a cross-sectional view showing an example of the configuration of the pixel section of a display device. [Figure 28] This is a top view illustrating one form of a semiconductor device. [Figure 29] These are a top view and a cross-sectional view illustrating one form of a semiconductor device. [Figure 30] These are exploded perspective and top views showing an example of a touch sensor configuration. [Figure 31] These are cross-sectional and circuit diagrams showing examples of touch sensor configurations. [Figure 32] This is a cross-sectional view illustrating one form of transistor. [Figure 33] This is a block diagram showing an example of the configuration of a liquid crystal display device. [Figure 34] This is a timing chart illustrating one example of a method for driving a liquid crystal display device. [Figure 35] This figure shows the valence band spectrum obtained by HAXPES measurement. [Figure 36] This is a diagram illustrating the structure used in the calculation of the band structure. [Figure 37] This is a diagram illustrating the calculation results of the band structure. [Figure 38] This is a schematic diagram of an oxide semiconductor film and a diagram illustrating the band structure in an oxide semiconductor film. [Figure 39] This is a diagram illustrating the calculation results of the band structure. [Figure 40] This figure shows the change in energy barrier height in response to a change in channel length. [Modes for carrying out the invention]

[0017] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention The present invention is not limited to the following description, and its form and scope may not depart from the spirit and scope of the present invention. Those skilled in the art will readily understand that the details can be modified in various ways. Therefore, the present invention The following embodiments and examples are not to be interpreted as being limited to their descriptions. In the embodiments and examples described below, the same part or a part having a similar function This involves using the same reference numeral or hatch pattern in common across different drawings, and repeating it. I will omit the explanation of "shi".

[0018] In each figure described herein, the size, film thickness, or region of each component is clearly indicated. It may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. .

[0019] Furthermore, the terms "first," "second," "third," etc. used in this specification are used to avoid confusion of constituent elements. This is a selection and not a numerical limit. Therefore, for example, "the first" This can be explained by appropriately replacing it with "the second" or "the third," etc.

[0020] Furthermore, the functions of "source" and "drain" are used in situations where the direction of current changes during circuit operation. In this specification, "sauce" and "dressing" may be used interchangeably. The term "in" may be used interchangeably.

[0021] Furthermore, voltage refers to the potential difference between two points, while electric potential refers to the electrostatic field at a given point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge within a given object. Furthermore, generally speaking, the potential difference between the potential at a certain point and a reference potential (for example, the ground potential) This is simply called electric potential or voltage, and the terms electric potential and voltage are often used as synonyms. Therefore, unless otherwise specified in this specification, potential may be read as voltage. You may substitute "voltage" with "potential."

[0022] In this specification, when an etching process is performed after a photolithography process: The mask formed during the photolithography process shall be removed.

[0023] (Embodiment 1) In this embodiment, drawings illustrate a semiconductor device and a method for manufacturing the same, which are aspects of the present invention. I will explain by referring to it.

[0024] In transistors using oxide semiconductor films, this can lead to defects in the transistor's electrical characteristics. One example of a defect is oxygen deficiency. For example, oxide semiconductors containing oxygen deficiencies in the film. Transistors using membranes tend to have a threshold voltage that fluctuates in the negative direction, normally It tends to exhibit ON characteristics. This is because an electric charge is generated due to oxygen vacancies contained in the oxide semiconductor film. This is to reduce resistance. When a transistor has normally-on characteristics, Various problems can arise, such as increased likelihood of malfunctions or higher power consumption when not in use. It occurs. Also, the electrical characteristics of the transistor, typically, can be affected by changes over time and stress tests. There is a problem in that the fluctuation amount of the key voltage increases.

[0025] One of the causes of oxygen deficiency is damage that occurs during the transistor manufacturing process. For example, when forming an insulating film on an oxide semiconductor film by plasma CVD, Depending on the conditions, the oxide semiconductor film may be damaged.

[0026] Furthermore, impurities such as silicon and carbon, which are constituent elements of insulating films, are not limited to oxygen vacancies. This causes poor electrical properties in the transistor. Therefore, the impurity is mixed into the oxide semiconductor film. As a result, the oxide semiconductor film becomes less resistive, which affects its performance over time and in stress tests. This leads to a problem where the electrical characteristics of the transistor, particularly the fluctuation in the threshold voltage, increase. There is.

[0027] Therefore, in this embodiment, a semiconductor device comprising a transistor having an oxide semiconductor film is provided. In this context, oxygen vacancies in an oxide semiconductor film having a channel region, and defects in an oxide semiconductor film The challenge is to reduce the concentration of pure substances.

[0028] Figures 1(A) to 1(C) show a top view and a cross-section of the transistor 50 of the semiconductor device. The diagrams are shown. Figure 1(A) is a top view of transistor 50, and Figure 1(B) is a top view of Figure 1(A). Figure 1(C) is a cross-sectional view between the dashed lines A and B, and Figure 1(A) is a cross-sectional view between the dashed lines C and D in Figure 1(A). This is a diagram. Note that in Figure 1(A), for clarity, the substrate 11, gate insulating film 17, and oxide are shown. Insulating film 24, nitride insulating film 25, etc. have been omitted.

[0029] The transistor 50 shown in Figures 1(B) and 1(C) is a gate provided on the substrate 11. It has an electrode 15. In addition, a gate insulating film 17 is formed on the substrate 11 and the gate electrode 15. Then, through the gate insulating film 17, the multilayer film 20 overlapping with the gate electrode 15 and the multilayer film 20 are in contact It has a pair of electrodes 21 and 22. It also has a gate insulating film 17, a multilayer film 20, and a pair A protective film composed of an oxide insulating film 24 and a nitride insulating film 25 is placed on electrodes 21 and 22. 26 is formed.

[0030] In the transistor 50 shown in this embodiment, the multilayer film 20 is an oxide semiconductor film 18, It has an oxide film 19 containing In or Ga. In addition, a part of the oxide semiconductor film 18 is cha It functions as a Nell region. In addition, an oxide insulating film 24 is formed in contact with the multilayer film 20. In other words, the oxide semiconductor film 18 and the oxide insulating film 24 contain In or Ga. An oxide film 19 is provided.

[0031] The oxide semiconductor film 18 is typically made of In-Ga oxide, In-Zn oxide, or In-M - Zn oxides (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) are available. .

[0032] Furthermore, when the oxide semiconductor film 18 is an In-M-Zn oxide, the atomic ratio of In to M is... Preferably, In is 25 atomic% or more, M is less than 75 atomic%, and further Preferably, In is 34 atomic% or more and M is less than 66 atomic%.

[0033] The oxide semiconductor film 18 has an energy gap of 2 eV or more, preferably 2.5 eV or more. More preferably, it is 3 eV or more. Thus, oxide semiconductors with a wide energy gap By using this method, the off-current of transistor 50 can be reduced.

[0034] The thickness of the oxide semiconductor film 18 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 10 The wavelength should be 0 nm or less, and more preferably 3 nm to 50 nm.

[0035] The oxide film 19 containing In or Ga is typically In-Ga oxide or In-Zn oxide. Oxides, In-M-Zn oxides (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd or (Hf) and the energy at the lower end of the conduction band is lower than that of the oxide semiconductor film 18 to the vacuum level. In the near future, and typically, the energy at the lower end of the conduction band of an oxide film 19 containing In or Ga, The difference between the energy of the lower end of the conduction band of the oxide semiconductor film 18 and the energy of the lower end of the conduction band is 0.05 eV or greater, and 0.0 7eV or more, 0.1eV or more, or 0.15eV or more and 2eV or less, 1eV or less, 0 It is 0.5 eV or less, or 0.4 eV or less. That is, an oxide film containing In or Ga 19 The difference between the electron affinity of the element and the electron affinity of the oxide semiconductor film 18 is 0.05 eV or greater, or 0.0 7eV or higher, 0.1eV or higher, or 0.15eV or higher and 2eV or lower, 1eV or lower, It is 0.5 eV or less, or 0.4 eV or less.

[0036] When the oxide film 19 containing In or Ga is an In-M-Zn oxide, In and M The atomic ratio is preferably less than 50 atomic% for In and 50 atomic% or more for M. More preferably, In is less than 25 atomic%, and M is 75 atomic% or more. do.

[0037] Furthermore, the oxide semiconductor film 18 and the oxide film 19 containing In or Ga are In-MZ In the case of n oxides (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), oxidation Compared to the semiconductor film 18, the M(Al, The atomic ratio of Ti, Ga, Y, Zr, La, Ce, Nd, or Hf is large, and typically Compared to the atoms contained in the oxide semiconductor film 18, the amount is 1.5 times or more, preferably 2 times or more. More preferably, the atomic ratio is three times higher or more.

[0038] Furthermore, the oxide semiconductor film 18 and the oxide film 19 containing In or Ga are In-MZ In the case of n oxides (where M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), In Alternatively, an oxide film 19 containing Ga is formed in In:M:Zn=x1:y1:z1 [atomic ratio], and acid If the ionized semiconductor film 18 is given by In:M:Zn=x2:y2:z2 [atomic ratio], then y1 / x 1 is greater than y2 / x2, preferably y1 / x1 is 1.5 times or more than y2 / x2. It is more preferably that y1 / x1 is at least twice as large as y2 / x2. In this case, y1 / x1 is more than 3 times larger than y2 / x2. Therefore, if y2 is greater than or equal to x2, a stable electrical current is generated in the transistor using the oxide semiconductor film. It is preferable because it can impart properties. However, if y2 becomes three times or more than x2, the oxide semicolon Because the field-effect mobility of a transistor using a conductive film decreases, y2 is greater than or equal to x2. It is preferable that it be less than 3 times 2.

[0039] For example, as an oxide semiconductor film 18, In:Ga:Zn = 1:1:1 or 3:1:2 In-Ga-Zn oxides with a specific atom ratio can be used. Additionally, those containing In or Ga can be used. The oxide film 19 consists of atoms in In:Ga:Zn=1:3:2, 1:6:4, or 1:9:6. A numerical ratio of In-Ga-Zn oxide can be used. Furthermore, the oxide semiconductor film 18 and The atomic ratios of the oxide film 19 containing In or Ga are, respectively, the above atomic ratios with respect to error. This includes fluctuations of plus or minus 20%.

[0040] Note that, without being limited thereto, those having an appropriate composition may be used according to the semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the required transistors. Further, in order to obtain the semiconductor characteristics of the required transistors, the carrier density, impurity concentration, defect density, atomic number ratio of metal element to oxygen, interatomic distance, density, etc. of the oxide semiconductor film 18 are made appropriate .

[0041] The oxide film 19 containing In or Ga also functions as a damage relaxation film for the oxide semiconductor film 18 when forming the oxide insulating film 24 formed later.

[0042] The thickness of the oxide film 19 containing In or Ga is 3 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less.

[0043] When silicon or carbon, which is one of the Group 14 elements, is contained in the oxide semiconductor film 18, oxygen deficiency increases in the oxide semiconductor film 18 and it becomes n-type. Therefore, the concentration of silicon or carbon in the oxide semiconductor film 18, or the concentration of silicon or carbon in the vicinity of the interface between the oxide film 19 containing In or Ga <00004​​​​​​​​​​​​​​​​​​​​​It may also be an alline oxide semiconductor. Crystal structure refers to a structure in which the plane orientation of each crystal grain is random. Furthermore, it can also refer to a microcrystalline structure or a mixed structure. The grain size of the included crystal grains is 0.1 nm to 10 nm, preferably 1 nm to 10 nm. The following is preferably 2 nm to 4 nm. Also, at least the oxide semiconductor film 18 By using a CAAC-OS crystal structure, the amount of variation in electrical properties due to irradiation with visible light and ultraviolet light can be reduced. It is possible to further reduce this.

[0045] Furthermore, in the transistor 50 shown in this embodiment, oxidation occurs so as to be in contact with the multilayer film 20. A material insulating film 24 is formed.

[0046] An oxide insulating film 24 is formed so as to be in contact with the multilayer film 20. The oxide insulating film 24 is The oxide insulating film contains more oxygen than satisfies the stoichiometric composition. In oxide insulating films containing more oxygen than the required amount, some of the oxygen is removed upon heating. Oxide insulating films containing more oxygen than satisfying the stoichiometric composition are analyzed by TDS method. Therefore, the amount of oxygen removed, converted to oxygen atoms, is 1.0 × 10⁻⁶. 18 atoms / cm 3 The above is favorable. 3.0 x 10 20 atoms / cm 3 The above describes the oxide insulating film.

[0047] The oxide insulating film 24 has a thickness of 30 nm to 500 nm, preferably 50 nm. Silicon oxide films, silicon oxide nitride films, etc., with a wavelength of 400 nm or less can be used.

[0048] Furthermore, the oxide insulating film 24 preferably has a low defect count, and typically, ESR measurement... This results in the spin of the signal appearing at g=2.001, which originates from the silicon dangling bond. Density is 1.5 × 10 18 spins / cm 3 Less than, and even 1 x 10 18 spins / cm 3 The following is preferable:

[0049] Here, regarding the band structure in the dashed-dotted line EF near the multilayer film 20 in Figure 1(B), This will be explained using Figure 2(A), and the carrier flow in transistor 50 will be shown in Figure 2( This will be explained using B) and Figure 2(C).

[0050] In the band structure shown in Figure 2(A), for example, the energy of the oxide semiconductor film 18 In-Ga-Zn oxide with a gap of 3.15 eV (sputtering machine used for film deposition) The atomic ratio of the GET is In:Ga:Zn = 1:1:1, and it contains either In or Ga. As oxide film 19, an In-Ga-Zn oxide (component) with an energy gap of 3.5 eV The atomic ratio of the sputtering target used for the film was In:Ga:Zn = 1:3:2. It is. Furthermore, the energy gap can be measured using a spectroscopic ellipsometer. .

[0051] Vacuum levels and valence band of oxide semiconductor film 18 and oxide film 19 containing In or Ga The energy difference at the upper end (also called the ionization potential) is 7.9 eV, and It is 8.0 eV. Note that the energy difference between the vacuum level and the upper end of the valence band is measured using ultraviolet photoelectron spectroscopy. Analysis(UPS:Ultraviolet Photoelectron Spectro Measurement can be performed using a scopy device (PHI VersaProbe).

[0052] The vacuum level and conduction band of the oxide semiconductor film 18 and the oxide film 19 containing In or Ga. The energy differences at the ends (also called electron affinity) are 4.7 eV and 4.5 eV, respectively. be.

[0053] Furthermore, the lower end of the conduction band of the oxide semiconductor film 18 is defined as Ec_18, and it contains In or Ga. Let Ec_19 be the lower end of the conduction band of the oxide film 19. Also, the lower end of the conduction band of the gate insulating film 17 Let the end be Ec_17, and the lower end of the conduction band of the oxide insulating film 24 be Ec_24.

[0054] As shown in Figure 2(A), in the multilayer film 20, the oxide semiconductor film 18 and In or G The lower end of the conduction band near the interface with the oxide film 19 containing a is continuously changing. , barrier near the interface between the oxide semiconductor film 18 and the oxide film 19 containing In or Ga The change is gradual and disappears. Oxide semiconductor film 18 and oxide containing In or Ga This shape is formed by the mutual movement of oxygen between the films 19. Also, in the multilayer film 20 In this region, the energy at the lower end of the conduction band in the oxide semiconductor film 18 is the lowest, and this region This becomes the channel region.

[0055] Here, in a transistor, the flow of electrons, which are carriers, is shown in Figure 2(B This will be explained using Figure 2(B) and Figure 2(C). Note that in Figures 2(B) and 2(C), oxides The amount of electrons flowing through the semiconductor film 18 is represented by the size of the dashed arrow.

[0056] Near the interface between the oxide film 19 containing In or Ga and the oxide insulating film 24, A trap level 27 is formed by pure material and defects. For example, as shown in Figure 2(B) As shown above, when the channel region of the transistor is a single layer of oxide semiconductor film 18, In the semiconductor film 18, the electrons, which are carriers, mainly flow on the gate insulating film 17 side. A small amount also flows on the oxide insulating film 24 side. As a result, electricity flows through the oxide semiconductor film 18. Some of the offspring get caught in trap level 27.

[0057] On the other hand, the transistor 50 shown in this embodiment is an oxide semiconductor as shown in Figure 2(C). An oxide film 19 containing In or Ga is provided between the body film 18 and the oxide insulating film 24. Therefore, there is a gap between the oxide semiconductor film 18 and the trap level 27. As a result, acid Electrons flowing through the ionized semiconductor film 18 are less likely to be trapped at the trap level 27. When a child electron is captured, that electron becomes a negative fixed charge. As a result, the transient The threshold voltage of the trap level fluctuates. However, the oxide semiconductor film 18 and the trap level Because there is a gap between it and level 27, it reduces electron trapping at trap level 27. This is possible, and it can reduce fluctuations in the threshold voltage.

[0058] Furthermore, near the interface between the oxide semiconductor film 18 and the oxide film 19 containing In or Ga When the energy difference ΔE1 at the lower end of the conduction band is small, the carriers flowing through the oxide semiconductor film 18 It crosses the lower end of the conduction band of the oxide film 19 containing In or Ga and reaches the trap level 27. It gets captured. Therefore, the lower end Ec_18 of the conduction band of the oxide semiconductor film 18 and In The energy difference ΔE1 between the lower end Ec_19 of the conduction band of the Ga-containing oxide film 19 and the film is 0. It is preferable that the voltage be 1 eV or higher, preferably 0.15 eV or higher.

[0059] Furthermore, the back channel of the multilayer film 20 (in the multilayer film 20, the opposite of the gate electrode 15) On the opposite side of the surface, the oxide insulation contains more oxygen than satisfactorily satisfying the stoichiometric composition. A membrane 24 (see Figure 1(B)) is provided. Therefore, oxygen that satisfies the stoichiometric composition is provided. The oxide insulating film 24, which contains more oxygen than the oxide film 20, contains more oxygen than the oxide film 20. It is possible to transfer oxygen to the semiconductor film 18, thereby reducing oxygen vacancies in the oxide semiconductor film 18. It is possible.

[0060] Based on the above, the oxide semiconductor film 18 and the oxide film 19 containing In or Ga are present. A multilayer film 20, and on the multilayer film 20, more oxygen than satisfies the stoichiometric composition. Having an oxide insulating film 24 containing the above reduces oxygen vacancies in the multilayer film 20. It is possible. Also, if In or Ga is included between the oxide semiconductor film 18 and the oxide insulating film 24 By providing the oxide film 19, the oxide semiconductor film 18, or an oxide containing In or Ga, is formed. To reduce the concentration of silicon and carbon near the interface between the material film 19 and the oxide semiconductor film 18. This is possible.

[0061] As a result of these findings, the absorption coefficient derived by the constant photocurrent measurement method in the multilayer film 20 is 1 × 10 -3 Less than / cm, preferably 1 × 10 -4 The absorption coefficient is less than / cm. And a positive correlation with the energy (converted by wavelength) corresponding to the localized energy level resulting from the inclusion of impurities. Because of this, the localized energy level density in the multilayer film 20 is extremely low.

[0062] Furthermore, the absorption coefficient curve obtained by CPM measurement shows that the arbor originating from the band's tail is By removing the absorption coefficient component called the bucktail, the absorption coefficient due to the localized level can be expressed by the following equation. It can be calculated from this. Note that the ar-back tail is obtained by CPM measurement. This refers to a region in the absorption coefficient curve that has a constant slope, and this slope is called the ARBAC energy. It's called ghee.

[0063]

number

[0064] Here, α(E) represents the absorption coefficient at each energy, α u is, Arbackte This represents the absorption coefficient due to the ruth.

[0065] A transistor 50 having such a structure is made of a multilayer film 20 including an oxide semiconductor film 18. Because it has very few defects, it is possible to improve the electrical characteristics of transistors. Furthermore, the BT stress test and the photo-BT stress test, which are examples of stress tests, The positive voltage does not fluctuate, or the fluctuation in the positive or negative direction is 1.0V or less. Preferably, the voltage is 0.5V or less, and it is highly reliable.

[0066] Here, the threshold voltage fluctuation in the BT stress test and the photo-BT stress test is small. The electrical characteristics of a transistor are explained using Figure 1(D).

[0067] BT stress testing is a type of accelerated testing that tests the effects of long-term use on transistors. It is possible to evaluate changes in its characteristics (i.e., changes over time) in a short period of time. In particular, BT stress The change in the transistor's threshold voltage before and after testing is an important factor in determining reliability. This serves as an indicator. The smaller the fluctuation in threshold voltage before and after the BT stress test, the more reliable the result. It can be said that this is a transistor with high performance.

[0068] Next, we will explain the specific BT stress test method. First, the initial transistor The period characteristics are measured. Next, the temperature of the substrate on which the transistor is formed (substrate temperature) is kept constant. Maintain the pair of electrodes, which function as the source and drain of the transistor, at the same potential. A pair of electrodes, functioning as source and drain, are imprinted at a different potential on the gate electrode for a certain period of time. Add. The substrate temperature should be set appropriately according to the purpose of the test. Next, set the substrate temperature to the initial temperature. The temperature was set to the same temperature as when the properties were measured, and the electrical characteristics of the transistor were measured. As a result, the initial The difference between the threshold voltage in the period characteristics and the threshold voltage after the BT stress test is the threshold voltage. It can be obtained as a voltage fluctuation.

[0069] Note that if the potential applied to the gate electrode is higher than the potentials of the source and drain, it is considered positive. This is called a BT stress test, in which the potential applied to the gate electrode is greater than the potentials of the source and drain. A low level is called a negative BT stress test. Additionally, a BT stress test can be performed while irradiating with light. The process of performing this test is called a photo-BT stress test. Light is irradiated, and a potential is applied to the gate electrode. When the potential is higher than the potential of the source and drain, it is called a light-plus BT stress test, and when light shines... When light is emitted and the potential applied to the gate electrode is lower than the potentials of the source and drain, it is called light. This is called a negative BT stress test.

[0070] The test intensity of the BT stress test is determined by the substrate temperature, the electric field strength applied to the gate insulating film, and This can be determined by the electric field application time. The electric field strength applied to the gate insulating film is the gate It is determined by dividing the potential difference between the source and drain by the thickness of the gate insulating film. If you want to apply an electric field strength of 3 MV / cm to a gate insulating film with a thickness of 100 nm, The potential difference between the gate and the source and drain should be 30V.

[0071] Figure 1(D) shows the electrical characteristics of a transistor, with the horizontal axis representing the gate voltage (Vg) and the vertical axis representing the gate voltage (Vg). The axis represents the drain current (Id). The initial characteristics of the transistor are shown by the dashed line 41, and the BT stroke The electrical characteristics after the test are shown by the solid line 43. The transistor shown in this embodiment is shown by the dashed line 41. And the threshold voltage fluctuation amount in solid line 43 is 0V, or in the positive or negative direction. The amount of variation in the direction is 1.0V or less, preferably 0.5V or less. Therefore, in this embodiment... The transistor shown exhibits little fluctuation in threshold voltage after BT stress testing. As a result, The transistor 50 shown in this embodiment is highly reliable.

[0072] Furthermore, since transistors having an oxide semiconductor film are n-channel type transistors, In this specification, when the gate voltage is 0V, it is assumed that no drain current is flowing. A transistor capable of this is defined as a transistor with normally-off characteristics. Furthermore, A transistor in which drain current can be considered to be flowing when the gate voltage is 0V. This is defined as a transistor with normally-on characteristics.

[0073] Furthermore, in this specification, the threshold voltage (Vth) is defined as the gate voltage (Vg[V]) in parallel. The square root of the axis and drain current (Id 1 / 2 [A]) is plotted on the vertical axis (see diagram) In (zu), the maximum slope is Id 1 / 2When the tangent line is extrapolated, the intersection of the tangent line and the Vg axis. It is defined by the gate voltage at a point.

[0074] The following describes the other configurations of transistor 50.

[0075] There are no major restrictions on the material of the substrate 11, but it should at least be able to withstand subsequent heat treatment. It must have heat resistance. For example, glass substrate, ceramic substrate, quartz substrate, saffron A wire substrate or the like may be used as the substrate 11. Alternatively, a simple silicon or silicon carbide may be used. Crystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SO It is also possible to apply substrates such as I, and semiconductor elements are provided on these substrates. It may also be used as substrate 11.

[0076] Furthermore, a flexible substrate is used as the substrate 11, and the transistor 50 is directly mounted on the flexible substrate. It may be formed. Alternatively, a release layer may be provided between the substrate 11 and the transistor 50. The layer is separated from the substrate 11 after the semiconductor device is partially or completely completed on it, and other It can be used for transfer onto a circuit board. In this case, the transistor 50 is mounted on a circuit board with poor heat resistance. It can also be mounted on flexible substrates.

[0077] The gate electrode 15 is made of aluminum, chromium, copper, tantalum, titanium, molybdenum, and tan. Metal elements selected from gusten, or alloys containing the above-mentioned metal elements, or the above-mentioned gold It can be formed using alloys of combined group elements. Also, manganese, zirconium A metallic element selected from one or more of the following may be used. Also, gate electrode 1 5 may be a single-layer structure or a laminated structure of two or more layers. For example, aluminum containing silicon. A single-layer structure of a titanium film, a double-layer structure with a titanium film laminated on an aluminum film, and a titanium nitride film A two-layer structure in which a titanium film is laminated, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, A two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, titanium A film, an aluminum film laminated on the titanium film, and then another titanium film formed on top of that. It has a layered structure, etc. Also, aluminum contains titanium, tantalum, tungsten, and molybdenum. Alloy film combining one or more elements selected from chromium, neodymium, and scandium Alternatively, a nitride film may be used.

[0078] Furthermore, the gate electrode 15 contains indium tin oxide and indium acid containing tungsten oxide. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide The substance contains titanium dioxide, indium tin oxide, indium zinc oxide, and silicon oxide. Transparent conductive materials such as indium tin oxide can also be applied. A laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element can also be used.

[0079] Furthermore, between the gate electrode 15 and the gate insulating film 17, an In-Ga-Zn oxynitride semiconductor is used. Body membranes, In-Sn oxynitride semiconductor films, In-Ga oxynitride semiconductor films, In-Zn oxynitride Nitride semiconductor films, Sn-based oxynitride semiconductor films, In-based oxynitride semiconductor films, metal nitride films (In These films may also contain elements such as N, ZnN, etc. The film has a voltage of 5 eV or higher, preferably 5.5 eV or higher. It has a work function that is greater than the electron affinity of oxide semiconductors, therefore oxide semiconductors The threshold voltage of a transistor using this method can be shifted to a positive value, which is known as the normally Off-characteristic switching elements can be realized. For example, In-Ga-Zn oxynitride semiconductors. When using a film, the nitrogen concentration should be at least higher than that of the oxide semiconductor film 18, specifically 7 atomic percent. The above-mentioned In-Ga-Zn oxynitride semiconductor film is used.

[0080] The gate insulating film 17 is, for example, silicon oxide, silicon oxide nitride, silicon oxide nitride, and nitrogen Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn metal acids Silicon oxides, silicon nitride, etc., can be used, and they can be provided in a laminated or single layer configuration. Also, as shown in Figure 32... Furthermore, the gate insulating film 17 is configured as a laminated structure of gate insulating film 17a and gate insulating film 17b. As the gate insulating film 17b in contact with the multilayer film 20, an oxide insulating material from which oxygen is removed by heating is used. It may be used. By using a film in which oxygen is desorbed by heating for the gate insulating film 17b, oxidation It is possible to lower the interface state density at the interface between the semiconductor film 18 and the gate insulating film 17. Therefore, transistors with less degradation of electrical characteristics can be obtained. As 17a, an insulating film having a blocking effect on oxygen, hydrogen, water, etc. is provided, Diffusion of oxygen from the oxide semiconductor film 18 to the outside, and hydrogen from the outside to the oxide semiconductor film 18. It can prevent the intrusion of water, etc. An insulating film having a blocking effect on oxygen, hydrogen, water, etc. For example, aluminum oxide, aluminum oxide nitride, gallium oxide, gallium oxide nitride, Yttrium oxide, yttrium oxidized nitride, hafnium oxide, hafnium oxidized nitride, etc. ru.

[0081] Furthermore, as the gate insulating film 17, hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x Oy N z ), Nitrogen-added hafnium Minate (HfAl x O y N z ), hafnium oxide, yttrium oxide, etc. Using k-materials can reduce gate leakage in transistors.

[0082] The thickness of the gate insulating film 17 is 5 nm or more and 400 nm or less, more preferably 10 nm or more. The wavelength should be 300 nm or less, more preferably 50 nm to 250 nm.

[0083] The pair of electrodes 21 and 22 are made of conductive materials such as aluminum, titanium, chromium, and nickel. From copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten A single elemental metal, or an alloy primarily composed of such metal, is used in a single-layer or layered structure. For example, a single-layer structure of an aluminum film containing silicon, or a titanium film laminated on top of an aluminum film. Two-layer structure, two-layer structure with a titanium film laminated on a tungsten film, copper-magnesium-aluminum A two-layer structure in which a copper film is laminated on a nium alloy film, a titanium film or a titanium nitride film, and the titanium film Alternatively, an aluminum film or copper film may be layered on top of a titanium nitride film, and then a titanium film may be placed on top of that. Alternatively, a three-layer structure forming a titanium nitride film, a molybdenum film or a molybdenum nitride film, and the molybdenum An aluminum film or copper film is laminated on top of a butene film or molybdenum nitride film, and furthermore, There are three-layer structures, such as one with a molybdenum film or molybdenum nitride film formed on top. A transparent conductive material containing um, tin oxide, or zinc oxide may be used.

[0084] Furthermore, a nitride insulating film having a blocking effect against oxygen, hydrogen, water, etc. is placed on the oxide insulating film 24. By providing the edge film 25, oxygen diffuses from the multilayer film 20 to the outside and from the outside into the multilayer film 20 It can prevent the intrusion of hydrogen, water, etc. into the film. Examples of nitride insulating films include silicon nitride and nitride Examples include silicon oxide, aluminum nitride, and aluminum oxide nitride. Furthermore, oxygen, hydrogen, Instead of a nitride insulating film that has a blocking effect of water, etc., An oxide insulating film having a blocking effect may be provided. Examples of oxide insulating films include aluminum oxide, aluminum oxide nitride, and gallium oxide. Gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide, oxide Examples include hafnium nitride.

[0085] Next, the method for fabricating the transistor 50 shown in Figure 1 will be explained using Figure 3.

[0086] As shown in Figure 3(A), a gate electrode 15 is formed on the substrate 11, and on the gate electrode 15 A gate insulating film 17 is formed.

[0087] Here, a glass substrate is used as the substrate 11.

[0088] The method for forming the gate electrode 15 is shown below. First, sputtering, CVD, and vapor deposition are described. A conductive film is formed by a bonding method, and a mask is formed on the conductive film by a photolithography process. Next, the conductive film is etched using the mask to form the gate electrode 15. Next, remove the mask.

[0089] The gate electrode 15 may be formed by electroplating, printing, or inkjet instead of the above formation method. It may also be formed by the jet method or other methods.

[0090] Here, a tungsten film with a thickness of 100 nm is formed by sputtering. Next A mask is formed by a photolithography process, and a tungsten film is made using this mask. Dry etching is performed to form the gate electrode 15.

[0091] The gate insulating film 17 is formed by sputtering, CVD, vapor deposition, or the like.

[0092] The gate insulating film 17 can be a silicon oxide film, a silicon oxide nitride film, or silicon nitride oxide. When forming a membrane, silicon-containing depositing gases and oxidizing gases are used as raw material gases. It is preferable to do so. Typical examples of silicon-containing sedimentary gases include silane, disilane, and Examples include silane and silane fluoride. Oxidizing gases include oxygen, ozone, and nitrous oxide. Examples include nitrogen dioxide.

[0093] Furthermore, when forming a silicon nitride film as the gate insulating film 17, a two-step formation method is used. It is preferable that this is done. First, a mixed gas of silane, nitrogen, and ammonia is used as the raw material gas. A first silicon nitride film with few defects is formed using the plasma CVD method employed. Next, the raw material gas is switched to a mixed gas of silane and nitrogen, resulting in a lower hydrogen concentration and a lower hydrogen content. A second silicon nitride film capable of blocking is formed. Such a formation method Therefore, the gate insulating film 17 is a nitride with few defects and hydrogen blocking properties. A silicon film can be formed.

[0094] Furthermore, when forming a gallium oxide film as the gate insulating film 17, MOCVD (Meta Using the Organic Chemical Vapor Deposition method It can be formed by [doing something].

[0095] Next, as shown in Figure 3(B), an oxide semiconductor film 18 and In are placed on the gate insulating film 17. Alternatively, an oxide film 19 containing Ga is formed.

[0096] Regarding the method for forming an oxide semiconductor film 18 and an oxide film 19 containing In or Ga, The following is explained. An oxide semiconductor film which will become an oxide semiconductor film 18 is placed on the gate insulating film 17, and A continuous oxide film containing In or Ga is formed to form an oxide film 19 containing In or Ga. Next, a photolithography process is performed on an oxide film containing In or Ga. After forming the mask, the oxide semiconductor film and an acid containing In or Ga are used with the mask. By etching a portion of each of the oxide films, the gate insulating film is formed as shown in Figure 3(B). 17 An oxide semiconductor film 1 that is separated from the device so as to overlap with a part of the gate electrode 15 8. A multilayer film 20 is formed having an oxide film 19 containing In or Ga. After this, Remove the mask.

[0097] An oxide semiconductor film that becomes an oxide semiconductor film 18, and an oxide film 19 containing In or Ga. Oxide films containing In or Ga can be produced by sputtering, coating, or pulsed laser. It can be formed using methods such as vapor deposition and laser ablation.

[0098] Form the oxide semiconductor film and the oxide film containing In or Ga using the sputtering method. In this case, the power supply equipment for generating plasma includes an RF power supply, an AC power supply, and a DC power supply. Devices and other equipment can be used as appropriate.

[0099] Sputtering gases include noble gases (typically argon), oxygen gas, and a mixture of noble gases and oxygen. Use a mixed gas as appropriate. In the case of a mixed gas of a noble gas and oxygen, it is preferable to increase the gas ratio of oxygen with respect to the noble gas.

[0100] Further, the target may be appropriately selected according to the composition of the oxide semiconductor film and the oxide film containing In or Ga to be formed.

[0101] When forming the oxide semiconductor film and the oxide film containing In or Ga, for example, when using the sputtering method, the substrate temperature is set to 150°C or higher and 500°C or lower, preferably 150°C or higher and 450°C or lower, and more preferably 200°C or higher and 350°C or lower, and the oxide semiconductor film and the oxide film containing In or Ga are formed while heating, whereby a CAAC-OS film described later can be formed.

[0102] The oxide semiconductor film and the oxide film containing In or Ga are not simply laminated, but are produced so that a continuous junction (here, particularly a structure in which the energy at the lower end of the conduction band changes continuously between the films) is formed. That is, at the interface of each film, a defect energy level such as a trap center or a recombination center, or an impurity that forms a barrier that inhibits the flow of carriers is not present. If impurities are mixed between the laminated oxide semiconductor film and the oxide film containing In or Ga, the continuity of the energy band is lost, carriers are trapped or recombined at the interface, and disappear.

[0103] To form a continuous junction, each film is continuously laminated without exposing it to the atmosphere using a multi-chamber type film forming apparatus (sputtering apparatus) equipped with a load lock chamber. is required. Each chamber in the sputtering apparatus should be equipped with an adsorption-type vacuum exhaust pump such as a cryopump to remove impurities such as water that could become contaminants for the oxide semiconductor film. Preferably, high-vacuum evacuation (to a level of about 1×10 Pa to 5×10 -4 Pa) is carried out using an adsorption-type vacuum exhaust pump such as a cryopump to remove water and other impurities that could become contaminants for the oxide semiconductor film as much as possible. Alternatively, it is preferable to combine a turbomolecular pump and a cold trap to prevent gas from flowing back into the chamber from the exhaust system. -7 Preferably, high-vacuum evacuation (to a level of about 1×10 Pa to 5×10 Pa) is carried out using an adsorption-type vacuum exhaust pump such as a cryopump to remove water and other impurities that could become contaminants for the oxide semiconductor film as much as possible. Alternatively, it is preferable to combine a turbomolecular pump and a cold trap to prevent gas from flowing back into the chamber from the exhaust system.

[0104] To obtain a highly pure and intrinsic oxide semiconductor film, not only is it necessary to evacuate the chamber to a high vacuum, but also to purify the sputtering gas to a high degree. For the oxygen gas and argon gas used as sputtering gases, gases purified to a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower, are used to prevent moisture and the like from being incorporated into the oxide semiconductor film as much as possible.

[0105] Here, by the sputtering method, an In-Ga-Zn oxide film with a thickness of 35 nm (the atomic ratio of the sputtering target used for film formation is In:Ga:Zn = 1:1:). = 1:1:1) is formed as an oxide semiconductor film. Then, by the sputtering method, an In-Ga-Zn oxide film with a thickness of 20 nm (the atomic ratio of the sputtering target used for film formation is In:Ga:Zn = 1:3:2) is formed as an oxide film containing In or Ga. Next, a mask is formed on the oxide film containing In or Ga, and by selectively etching a part of each of the oxide semiconductor film and the oxide film containing In or Ga, a multilayer film 20 having an oxide semiconductor film 18 and an oxide film 19 containing In or Ga is formed.

[0106] ​​​​​​​​​​Heat treatment may be performed afterward.

[0107] Next, as shown in Figure 3(C), a pair of electrodes 21 and 22 are formed.

[0108] The methods for forming the pair of electrodes 21 and 22 are shown below. First, sputtering and CVD. A conductive film is formed using methods such as vapor deposition. Next, a photolithography process is performed on the conductive film. A mask is formed. Next, the conductive film is etched using the mask to form a pair of electrodes 21, 2 Form 2. After this, remove the mask.

[0109] Here, a tungsten film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a thick A 100 nm thick titanium film is sequentially stacked using the sputtering method. Next, a fu... A mask is formed by a photolithography process, and a tungsten film is formed using this mask. A pair of electrodes 21 and 22 are formed by dry etching a titanium film and a titanium film.

[0110] Next, as shown in Figure 3(D), oxide insulation is placed on the multilayer film 20 and the pair of electrodes 21 and 22. A film 24 is formed.

[0111] Furthermore, after forming the pair of electrodes 21 and 22, continuous oxide insulation is performed without exposure to the atmosphere. It is preferable to form a film 24. After forming the pair of electrodes 21 and 22, do not expose to the atmosphere. Adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the raw material gas, the oxide insulating film 24 By continuously forming these, an oxide film 19 containing In or Ga and an oxide insulating film 24 are formed. At the interface, the concentration of impurities originating from atmospheric components can be reduced, and oxide insulation can be reduced. It is possible to transfer oxygen contained in the film 24 to the oxide semiconductor film 18, The oxygen deficiency amount of the body film 18 can be reduced.

[0112] As the oxide insulating film 24, the substrate placed in the evacuated processing chamber of the plasma CVD apparatus is maintained at 180°C or higher and 260°C or lower, more preferably 200°C or higher and 240°C or lower. The substrate placed in the processing chamber is maintained at 180°C or higher and 260°C or lower, more preferably 200°C or higher and 240°C or lower. Then, a source gas is introduced into the processing chamber, and the pressure in the processing chamber is set to 100 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower. High-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, more preferably 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. .17W / cm 2 0.5W / cm or lower, more preferably 0.25W / cm or higher 2 0.35W / cm or lower, more preferably 0.25W / cm or higher 2 and 0.35W / cm 2 or lower, a silicon oxide film or a silicon oxynitride film is formed under the condition of supplying high-frequency power. The silicon oxide film or the silicon oxynitride film is formed under the condition of supplying high-frequency power.

[0113] As the source gas for the oxide insulating film 24, a deposition gas containing silicon and an oxidizing gas can be used. Representative examples of the deposition gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. Representative examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. As the deposition gas containing silicon, silane, disilane, trisilane, silane fluoride, etc. can be used. Representative examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. As the deposition gas containing silicon, silane, disilane, trisilane, silane fluoride, etc. can be used. Representative examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. nitrogen dioxide, etc.

[0114] Under the film formation conditions of the oxide insulating film 24, by supplying high-frequency power with the above power density in the processing chamber with the above pressure, the decomposition efficiency of the source gas in the plasma increases, the oxygen radicals increase, and the oxidation of the source gas proceeds. Under the film formation conditions of the oxide insulating film 24, by supplying high-frequency power with the above power density in the processing chamber with the above pressure, the decomposition efficiency of the source gas in the plasma increases, the oxygen radicals increase, and the oxidation of the source gas proceeds. As a result, the oxygen content in the oxide insulating film 24 becomes more than the stoichiometric ratio. However, when the substrate temperature is the above temperature, the bonding force between silicon and oxygen is weak, so a part of oxygen desorbs due to heating. As a result, the oxygen content in the oxide insulating film 24 becomes more than the stoichiometric ratio. However, when the substrate temperature is the above temperature, the bonding force between silicon and oxygen is weak, so a part of oxygen desorbs due to heating. As a result, the oxygen content in the oxide insulating film 24 becomes more than the stoichiometric ratio and a part of oxygen desorbs due to heating. [[ID=M47]] As a result, an oxide insulating film containing more oxygen than the stoichiometric composition and having a part of oxygen desorbed due to heating is formed. This is possible. In addition, the oxide film 19 containing In or Ga acts as a protective film for the oxide semiconductor film 18. As a result, damage to the oxide semiconductor film 18 is reduced, while also enabling high power density. An oxide insulating film 24 can be formed using frequency power.

[0115] Furthermore, in the deposition conditions for the oxide insulating film 24, silicon-containing deposition in an oxidizing gas... By increasing the flow rate of the volatile gas, it is possible to reduce the amount of defects in the oxide insulating film 24. Typically, ESR measurements show that g = 2.0 originates from dangling bonds in silicon. The spin density of the signal appearing at 01 is 6 × 10 17 spins / cm 3 Less than 3x 10 17 spins / cm 3 The following is preferably 1.5 × 10 17 spins / cm 3 below This allows for the formation of an oxide insulating film with a low defect rate. As a result, the transistor This can increase reliability.

[0116] Here, the oxide insulating film 24 is silane at a flow rate of 160 sccm and at a flow rate of 4000 s. The raw material gas used is nitrous oxide from ccm, the pressure in the processing chamber is 200 Pa, and the substrate temperature is 220°C. Using a 27.12MHz high-frequency power supply, 1500W of high-frequency power is applied to parallel plate electrodes. A 400 nm thick silicon oxide-nitride film is formed using the supplied plasma CVD method. Oh, the plasma CVD device has an electrode area of ​​6000 cm². 2 This is a parallel-plate type plasma CVD. This device, when converted to power per unit area (power density), produces 0.25W. / cm 2 That is the case.

[0117] Next, a heat treatment is performed. The temperature of this heat treatment is typically 150°C or higher until the substrate strain point is reached. A temperature of 200°C to 450°C, more preferably 300°C to 450°C. do.

[0118] The heat treatment can be carried out using an electric furnace, an RTA device, etc. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. Processing time can be reduced.

[0119] The heat treatment involves nitrogen, oxygen, and ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm). Air (pm or less, preferably 10 ppb or less), or noble gas (argon, helium, etc.) It should be done under the appropriate atmosphere. Note that the above-mentioned nitrogen, oxygen, ultra-dry air, or noble gases may contain hydrogen, water, etc. It is preferable that it is not included.

[0120] This heat treatment converts some of the oxygen contained in the oxide insulating film 24 into the oxide semiconductor film 18. By moving it, the amount of oxygen vacancies contained in the oxide semiconductor film 18 can be reduced. Also, acid When the chemical insulating film 24 contains water, hydrogen, etc., it has a function to block water, hydrogen, etc. A nitride insulating film 25 is then formed and heat-treated, and the water contained in the oxide insulating film 24 Hydrogen and other elements migrate to the oxide semiconductor film 18, causing defects to form in the oxide semiconductor film 18. While heating, the water, hydrogen, etc. contained in the oxide insulating film 24 are removed. This makes it possible to reduce variations in the electrical characteristics of transistor 50, and also to reduce the threshold voltage This can suppress fluctuations. Furthermore, the oxide insulating film 24 is heated with In or By forming it on the oxide film 19 containing Ga, oxygen is transferred to the oxide semiconductor film 18, and acid Since it is possible to reduce the oxygen vacancies contained in the ionized semiconductor film 18, the heat treatment It is not necessary to do so.

[0121] Here, the material is heated at 350°C for 1 hour in a nitrogen and oxygen atmosphere.

[0122] Furthermore, when forming the pair of electrodes 21 and 22, the conductive film is etched, and the multilayer film 20 The oxide is damaged, and oxygen vacancies occur on the back channel side of the multilayer film 20. An oxide insulating film containing more oxygen than satisfies the stoichiometric composition is applied to the insulating film 24. This allows for the repair of oxygen deficiencies that occur on the back channel side due to heat treatment. This allows for a reduction in defects contained in the multilayer film 20, thus enabling transients This can improve the reliability of the Ta50.

[0123] Next, a nitride insulating film 25 is formed by sputtering, CVD, or the like.

[0124] Furthermore, when forming the nitride insulating film 25 by plasma CVD, the true The substrate placed in the ventilated processing chamber is subjected to a temperature of 300°C to 400°C, more preferably 300°C to 400°C. A temperature of 320°C to 370°C is preferable because it allows for the formation of a dense nitride insulating film. .

[0125] When forming a silicon nitride film as the nitride insulating film 25 by plasma CVD, It is preferable to use depositing gases containing condensate, nitrogen, and ammonia as raw material gases. By using a small amount of ammonia as a raw material gas compared to nitrogen, ammonia can be produced in the plasma. The nitrate dissociates, generating an active species. This active species is contained in the silicon-containing sedimentary gas. The bonds between silicon and hydrogen, and the triple bond of nitrogen are broken. As a result, silicon and nitrogen The bonding is promoted, resulting in fewer silicon and hydrogen bonds, fewer defects, and a dense silicon nitride. A film can be formed. On the other hand, in the raw material gas, the amount of ammonia relative to nitrogen If the levels are high, the decomposition of silicon-containing sedimentary gases and nitrogen will not proceed, and silicon and hydrogen will not decompose. The bonds remain intact, leading to an increase in defects and the formation of a rough silicon nitride film. For these reasons, the flow rate ratio of nitrogen to ammonia in the raw gas should be between 5 and 50. Preferably, the value should be between 10 and 50.

[0126] Here, in the processing chamber of the plasma CVD apparatus, silane is flowed at a rate of 50 sccm, and at a rate of 5000... The raw material gases are nitrogen at sccm and ammonia at a flow rate of 100 sccm, and the pressure in the processing chamber is Using a 27.12MHz high-frequency power supply with a pressure of 100Pa and a substrate temperature of 350°C, 1000 A plasma CVD method using W high-frequency power supplied to parallel plate electrodes was used to create a nitrided nitride with a thickness of 50 nm. A silicon film is formed. Note that the plasma CVD apparatus has an electrode area of ​​6000 cm². 2 The flat This is a flat-plate type plasma CVD apparatus, and the supplied power is converted to power per unit area (power density). Converted to 1.7 × 10 -1 W / cm 2 That is the case.

[0127] Through the above process, a protective film 26 composed of an oxide insulating film 24 and a nitride insulating film 25 is formed. It can be formed.

[0128] Next, a heat treatment may be performed. The temperature of this heat treatment is typically 150°C or higher for the substrate. Below the strain point, preferably 200°C to 450°C, more preferably 300°C to 450°C The temperature should be below ℃.

[0129] By following the above steps, transistor 50 can be manufactured.

[0130] Oxygen molecules that satisfy a stoichiometric composition are superimposed on an oxide semiconductor film that functions as a channel region. By forming an oxide insulating film containing more oxygen than the oxide insulating film, the oxygen in the oxide insulating film is oxidized. It can be moved to a monocrystalline semiconductor film. As a result, the amount of oxygen vacancies contained in the oxide semiconductor film can be reduced. This can be reduced.

[0131] Then, by forming an oxide film containing In or Ga on the oxide semiconductor film, chemical When forming an oxide insulating film containing more oxygen than satisfactorily satisfying the stoichiometric composition, the oxidation Damage to the semiconductor film can be further suppressed. In addition, it contains In or Ga. By forming an oxide film, an insulating film is formed on the oxide semiconductor film, such as an oxide insulating film. This method can suppress the incorporation of constituent elements of the film into the oxide semiconductor film.

[0132] Based on the above, in semiconductor devices using oxide semiconductor films, the number of defects is reduced. It is possible to obtain a suitable location. Furthermore, in semiconductor devices using oxide semiconductor films, the electrical properties can be improved. A semiconductor device with the above specifications can be obtained.

[0133] <Example 1> In the transistor 50 shown in this embodiment, the substrate 11 and gate electric current may be used as needed. A base insulating film may be provided between the poles 15. The material for the base insulating film may be silicon oxide, acid Silicon nitride, silicon nitride, silicon oxide nitride, gallium oxide, hafnium oxide, acid Examples include yttrium oxide, aluminum oxide, and aluminum oxide nitride. The materials used include silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, and oxide. By using aluminum, impurities, typically alkali metals, water, and water, can be removed from the substrate 11. This can suppress the diffusion of elements into the multilayer film 20.

[0134] The underlying insulating film can be formed by sputtering, CVD, or other methods.

[0135] <Modification 2> In the oxide semiconductor film 18 provided on the transistor 50 shown in this embodiment, impurities By using an oxide semiconductor film with low substance concentration and low defect level density, even better electrical properties can be achieved. It is preferable that transistors with properties can be fabricated. Here, the impurity concentration is low, A low defect level density (low oxygen deficiency) is considered high-purity intrinsic or substantially high-purity intrinsic. Oxide semiconductors that are high-purity intrinsic or substantially high-purity intrinsic have few carrier sources. Therefore, the carrier density can sometimes be lowered. A transistor using in the channel region exhibits electrical characteristics where the threshold voltage is negative (no Also called Marion.) It rarely becomes high-purity genuine or substantially high-purity genuine. Oxide semiconductors, being of a certain nature, have a low defect level density, and therefore also a low trap level density. Therefore, transistors using this oxide semiconductor in the channel region exhibit small fluctuations in electrical characteristics. This results in a highly reliable transistor. Furthermore, the electricity trapped in the trap levels of the oxide semiconductor... Charges can take a long time to disappear and sometimes behave like fixed charges. Therefore, transistors using oxide semiconductors with a high trap level density in the channel region This can lead to unstable electrical properties. Impurities include hydrogen, nitrogen, alkali metals, Alternatively, alkaline earth metals, etc., may be present.

[0136] The hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water, and also acid Oxygen vacancies are formed in the lattice where elements have been removed (or in the areas where oxygen has been removed). Water is then added to these oxygen vacancies. The presence of an element can sometimes generate electrons, which act as carriers. Also, some hydrogen atoms can become metallic. By bonding with oxygen, which bonds with atoms, it can generate electrons, which are carriers. Therefore Therefore, transistors using oxide semiconductors containing hydrogen exhibit normally-on characteristics. It's cheap.

[0137] Therefore, it is preferable that the oxide semiconductor film 18 has as little hydrogen as possible. Specifically, in the oxide semiconductor film 18, secondary ion mass spectrometry (SIMS: Second The hydrogen concentration obtained by (ary Ion Mass Spectrometry) is 5 ×10 18 atoms / cm 3 The following is preferably 1 × 10 18 atoms / cm 3 The following are more preferable is 5 x 10 17 atoms / cm 3 More preferably 1 × 10 16 atoms / cm 3 The following ru.

[0138] As a method for reducing the hydrogen concentration of the oxide semiconductor film 18, in Figure 3(B) the oxide semiconductor After forming a multilayer film 20 having a conductive film 18 and an oxide film 19 containing In or Ga, By performing a heat treatment, the hydrogen concentration of the oxide semiconductor film 18 can be reduced. The processing temperature is typically 150°C or higher but below the substrate strain point, preferably 200°C or higher. The temperature should be 0°C or lower, more preferably 300°C to 450°C.

[0139] Furthermore, the oxide semiconductor film 18 is made of alkali metal or obtained by secondary ion mass spectrometry. The concentration of alkaline earth metals is 1 × 10⁻⁶ 18 atoms / cm 3 The following is preferably 2 × 10 16 original Child / cm 3 The following applies: Alkali metals and alkaline earth metals bond with oxide semiconductors. This can generate carriers, which can increase the transistor's off-current. Therefore, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor film 18 is reduced. It is preferable.

[0140] By providing a nitride insulating film on a part of the gate insulating film 17, the alkalinity of the oxide semiconductor film 18 is reduced. The concentration of alkaline metals or alkaline earth metals can be reduced.

[0141] Furthermore, if nitrogen is present in the oxide semiconductor film 18, electrons, which are carriers, are generated, The rear density increases, making it easier to convert to n-type. As a result, using an oxide semiconductor containing nitrogen... Transistors tend to exhibit normally-on characteristics. Therefore, in the oxide semiconductor film, Therefore, it is preferable that nitrogen is reduced as much as possible, for example, the nitrogen concentration should be 5 × 10⁻⁶. 1 8 atoms / cm 3 The following is preferable:

[0142] In this way, impurities (hydrogen, nitrogen, alkali metals, or alkaline earth metals, etc.) can be produced. By having an oxide semiconductor film 18 that has been reduced to the greatest extent possible and made highly pure, the transistor is no This suppresses the marion characteristic and drastically reduces the transistor's off-current. Yes, it is possible. Therefore, semiconductor devices with good electrical characteristics can be fabricated. Furthermore, reliability can be improved. A semiconductor device can be fabricated using this technology.

[0143] Furthermore, the low off-current of transistors using highly purified oxide semiconductor films indicates that This can be proven through various experiments. For example, if the channel width is 1 × 10⁻⁶ 6 Channel length L in μm Even if the element is 10 μm, the voltage between the source electrode and the drain electrode (drain voltage) is 1 In the range from V to 10V, the off-current is below the measurement limit of the semiconductor parameter analyzer. That is, 1 × 10 -13 A characteristic of A or less can be obtained. In this case, the off-current is The value obtained by dividing by the transistor's channel width is found to be less than 100 zA / μm. Furthermore, by connecting a capacitive element and a transistor, the flow of fluid into or out of the capacitive element occurs. The off-current was measured using a circuit that controls the charge with the transistor in question. This transistor uses a portion of a highly purified oxide semiconductor film in the channel region, The off-current of the transistor was measured from the change in the amount of charge per unit time of the element. As a result, when the voltage between the source and drain electrodes of the transistor is 3V, several tens of yA / It was found that an even lower off-current of μm could be obtained. Therefore, highly purified acid Transistors using ionized semiconductor films exhibit remarkably low off-current.

[0144] <Variation 3> As a pair of electrodes 21 and 22 provided in the transistor 50 shown in this embodiment, Gusten, titanium, aluminum, copper, molybdenum, chromium, or tantalum in elemental form It is preferable to use a conductive material that readily bonds with oxygen, such as an alloy. As a result, the multilayer film 20 The oxygen contained in the electrode combines with the conductive material contained in the pair of electrodes 21 and 22, and in the multilayer film 20 Then, an oxygen-deficient region is formed. Also, a pair of electrodes 21 and 22 are formed on the multilayer film 20. In some cases, some of the constituent elements of the conductive material may be mixed in. As a result, in the multilayer film 20, A low-resistance region is formed near the area in contact with the pair of electrodes 21 and 22. Figure 4 is shown in Figure 1(B). This is an enlarged cross-sectional view of the multilayer film 20 of transistor 50. As shown in Figure 4(A), In Alternatively, in the oxide film 19 containing Ga, most of the low-resistance regions 28a and 29a are formed. In some cases, this may occur. Alternatively, as shown in Figure 4(B), the oxide semiconductor film 18 and In or In the oxide film 19 containing Ga, low-resistance regions 28b and 29b may be formed. Alternatively, as shown in Figure 4(C), an oxide semiconductor film 18 and an acid containing In or Ga. In the oxide film 19, low-resistance regions 28c and 29c are formed so as to be in contact with the gate insulating film 17. This may occur. The low-resistance regions 28a-28c and 29a-29c have high conductivity. Therefore, it is possible to reduce the contact resistance between the multilayer film 20 and the pair of electrodes 21 and 22, It is possible to increase the on-current of the inverter.

[0145] <Modification 4> In the method for manufacturing the transistor 50 shown in this embodiment, a pair of electrodes 21 and 22 are formed After this, a washing process may be performed to remove etching residue. This makes it possible to suppress the generation of leakage current flowing between the pair of electrodes 21 and 22. This cleaning process involves TMAH (Tetramethylammonium Hydroxide). Alkaline solutions such as (de) solution, and acidic solutions such as dilute hydrofluoric acid, oxalic acid, and phosphoric acid are used. It can be done by doing so.

[0146] <Modification 5> In the method for manufacturing the transistor 50 shown in this embodiment, a pair of electrodes 21 and 22 are formed After this, the multilayer film 20 is exposed to plasma generated in an oxygen atmosphere, and the oxide semiconductor film 18 and Oxygen may be supplied to the oxide film 19 containing In or Ga. The oxygen atmosphere is as follows: The atmosphere contains oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. Furthermore, the plasma treatment In this case, the multilayer film 20 is exposed to plasma generated without applying a bias to the substrate 11. This is preferable. As a result, the multilayer film 20 is not damaged and oxygen is supplied. This makes it possible to reduce the amount of oxygen vacancies in the multilayer film 20. Impurities remaining on the surface of the multilayer film 20 due to polishing, such as halogens like fluorine and chlorine. These can be removed.

[0147] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0148] (Embodiment 2) In this embodiment, the number of defects in the oxide semiconductor film is further reduced compared to Embodiment 1. A semiconductor device having a transistor capable of performing the following will be described with reference to the drawings. The transistor described in the embodiment has a gate insulating film and oxide compared to Embodiment 1. It differs in that it has an oxide film containing In or Ga between the semiconductor films.

[0149] Figure 5 shows a top view and a cross-sectional view of the transistor 60 of the semiconductor device. Figure 5(A) Figure 5(B) is a top view of transistor 60, and Figure 5(A) shows the cross section between the dashed line A and B in Figure 5(A). This is a top view, and Figure 5(C) is a cross-sectional view between the dashed lines C and D in Figure 5(A). Note that Figure 5 (A) For clarity, the substrate 11, gate insulating film 17, oxide insulating film 23, oxide insulating film The edge film 24, nitride insulating film 25, etc., have been omitted.

[0150] The transistor 60 shown in Figure 5 has a gate electrode 15 provided on the substrate 11. Furthermore, a gate insulating film 17 is formed on the substrate 11 and the gate electrode 15, and the gate insulating film 17 Through this, the multilayer film 34 overlaps with the gate electrode 15, and a pair of electrodes 21 are in contact with the multilayer film 34. It also has a gate insulating film 17, a multilayer film 34, and a pair of electrodes 21 and 22. A protective film 26 is formed, which consists of an oxide insulating film 24 and a nitride insulating film 25.

[0151] In the transistor 60 shown in this embodiment, the multilayer film 34 contains In or Ga. It has an oxide film 31, an oxide semiconductor film 32, and an oxide film 33 containing In or Ga. Furthermore, a portion of the oxide semiconductor film 32 functions as a channel region.

[0152] Furthermore, the gate insulating film 17 and the oxide film 31 containing In or Ga are in contact. An oxide film 31 containing In or Ga is provided between the insulating film 17 and the oxide semiconductor film 32. It's being kicked.

[0153] Furthermore, the oxide insulating film 24 and the oxide film 33 containing In or Ga are in contact. That is, oxidation An oxide film 33 containing In or Ga is provided between the semiconductor film 32 and the oxide insulating film 24. It's being kicked.

[0154] The oxide film 31 containing In or Ga and the oxide film 33 containing In or Ga are actually Appropriate materials and formation methods similar to those used for the oxide film 19 containing In or Ga shown in Form 1. It can be used.

[0155] The oxide semiconductor film 32 is made of the same material and formed as the oxide semiconductor film 18 shown in Embodiment 1. The method can be used as appropriate.

[0156] Furthermore, when the oxide film 31 containing In or Ga is an In-M-Zn oxide, In The atomic ratio of In and M is preferably less than 50 atomics and 50 atomics of M. % or more, more preferably In is less than 25 atomic%, and M is 75 atomic% or more. The oxide semiconductor film 32 and the oxide film 33 containing In or Ga are In-M-Zn. When it is an oxide, it is preferable to use the atomic ratio of In to M shown in Embodiment 1.

[0157] Here, as an oxide film 31 containing In or Ga, the thickness is determined by sputtering. A 30nm InGa-Zn oxide film (atoms of the sputtering target used for film deposition) The numerical ratio is In:Ga:Zn = 1:6:4). Also, the oxide semiconductor film 32 is thickened. A 10nm InGa-Zn oxide film (atoms of the sputtering target used for film formation) The numerical ratio forms In:Ga:Zn = 1:1:1). Also, oxidation containing In or Ga. As material film 33, an In-Ga-Zn oxide film with a thickness of 10 nm (sputtering used for film deposition) The target atoms form an atomic ratio of In:Ga:Zn = 1:3:2.

[0158] Here, the band structure of the transistor 60 near the multilayer film 34 in Figure 5 is shown by the dashed line GH. The construction will be explained using Figure 6(A), and the carrier flow in transistor 60 will be explained. Next, we will explain using Figure 6(B).

[0159] In the band structure shown in Figure 6(A), for example, an oxide film 31 containing In or Ga As an example, the In-Ga-Zn oxide (used for film formation) has an energy gap of 3.8 eV. The atomic ratio of the puttering target is In:Ga:Zn = 1:6:4. The semiconductor film 32 is an In-Ga-Zn oxide (component) with an energy gap of 3.2 eV. The atomic ratio of the sputtering target used for the film was In:Ga:Zn = 1:1:1. It exists. The oxide film 33 containing In or Ga has an energy gap of 3.5 eV. The atomic ratio of the sputtering target used for depositing the In-Ga-Zn oxide film is In: (Use Ga:Zn=1:3:2)

[0160] An oxide film 31 containing In or Ga, an oxide semiconductor film 32, and In or Ga The energy difference between the vacuum level of the oxide film 33 containing the electrons and the upper edge of the valence band (also known as the ionization potential) The values ​​are 7.8 eV, 7.9 eV, and 8.0 eV, respectively.

[0161] An oxide film 31 containing In or Ga, an oxide semiconductor film 32, and In or Ga The energy difference (also called electron affinity) between the vacuum level and the lower edge of the conduction band of the oxide film 33 containing the film is: These values ​​are 4.0 eV, 4.7 eV, and 4.5 eV, respectively.

[0162] Furthermore, the lower end of the conduction band of the oxide film 31 containing In or Ga is defined as Ec_31, and the oxide The lower end of the conduction band of the semiconductor film 32 is defined as Ec_32, and the oxide film 33 containing In or Ga The lower end of the conduction band is defined as Ec_33. The lower end of the conduction band of the gate insulating film 17 is defined as Ec_17. Let Ec_24 be the lower end of the conduction band of the oxide insulating film 24.

[0163] As shown in Figure 6(A), in the multilayer film 34, an oxide film 31 containing In or Ga The lower end of the conduction band near the interface between the oxide semiconductor film 32 and I The lower end of the conduction band near the interface with the oxide film 33 containing n or Ga changes continuously. That is, near the interface between the oxide film 31 containing In or Ga and the oxide semiconductor film 32. , and near the interface between the oxide semiconductor film 32 and the oxide film 33 containing In or Ga There are no barriers, and the change is gradual. A structure with such a lower end of the conduction band is called U-shaped. It can also be called a U-shaped well structure. It is an oxide film containing In or Ga. Between 31 and the oxide semiconductor film 32, and between the oxide semiconductor film 32 and an acid containing In or Ga This shape is formed by the mutual movement of oxygen between the oxide film 33 and the other film. At 34, the energy of the lower edge Ec_32 of the conduction band in the oxide semiconductor film 32 is the highest. At a low level, this region becomes the channel region.

[0164] Here, Figure 6 shows how electrons, which are carriers, flow in transistor 60. (B) will be used for explanation. Note that in Figure 6(B), electrons in the oxide semiconductor film 32 The flow is represented by the size of the dashed arrow.

[0165] Near the interface between the gate insulating film 17 and the oxide film 31 containing In or Ga, impurities A trap level 36 is formed by material and defects. Also, oxides containing In or Ga are present. Similarly, a trap level 37 is formed near the interface between the film 33 and the oxide insulating film 24. In the transistor 60 shown in this embodiment, as shown in Figure 6(B), the gate is isolated. An oxide film 31 containing In or Ga is provided between the edge film 17 and the oxide semiconductor film 32. There is a gap between the oxide semiconductor film 32 and the trap level 36. An oxide film 33 containing In or Ga is provided between the semiconductor film 32 and the oxide insulating film 24. Therefore, there is a gap between the oxide semiconductor film 32 and the trap level 37.

[0166] As a result, electrons flowing through the oxide semiconductor film 32 are trapped at trap levels 36 and 37. This makes it difficult to increase the on-current of the transistor, and also increases the field-effect mobility. This can increase the effect. Also, when electrons are trapped at trap levels 36 and 37, these electrons This results in a negative fixed charge. As a result, the transistor's threshold voltage fluctuates. However, between the oxide semiconductor film 32 and the trap levels 36 and 37, Because of the gap, it is possible to reduce electron trapping at trap levels 36 and 37. Yes, and it can reduce fluctuations in the threshold voltage.

[0167] Furthermore, near the interface between the oxide film 31 containing In or Ga and the oxide semiconductor film 32 The energy difference ΔE2 at the lower end of the conduction band, and the oxide semiconductor film 32 containing In or Ga The energy difference ΔE3 near the interface at the lower end of the conduction band with the oxide film 33 is small. Then, the carriers flowing through the oxide semiconductor film 32 are from the oxide film 31 containing In or Ga. The lower end of the conduction band and the lower end of the conduction band of the oxide film 33 containing In or Ga are crossed. It crosses the threshold and gets trapped at levels 36 and 37. Therefore, it contains In or Ga. The energy difference ΔE2 at the lower end of the conduction band between the oxide film 31 and the oxide semiconductor film 32, and the oxide Energy difference Δ at the lower end of the conduction band between the semiconductor film 32 and the oxide film 33 containing In or Ga It is preferable that each of the E3 values ​​be 0.1 eV or higher, preferably 0.15 eV or higher.

[0168] Furthermore, near the interface between the oxide film 31 containing In or Ga and the oxide semiconductor film 32 Compared to the energy difference ΔE2, the oxide semiconductor film 32 and the oxide containing In or Ga By reducing the energy difference ΔE3 near the interface with film 33, the oxide semiconductor film 3 2 and the resistance between the pair of electrodes 21 and 22 can be reduced, and in the trap level 36 Because the amount of electrons trapped can be reduced, the on-current of the transistor can be increased, and This allows for a greater increase in the mobility of the field effect.

[0169] Note that here, the energy difference ΔE3 is smaller than the energy difference ΔE2, In accordance with the electrical characteristics of the zista, the energy difference ΔE2 and the energy difference ΔE3 are the same, or The energy difference ΔE3 is greater than the energy difference ΔE2, including In or Ga. The composition of the oxide film 31, the oxide semiconductor film 32, and the oxide film 33 containing In or Ga. The elements and composition can be selected as appropriate.

[0170] Furthermore, the back channel of the multilayer film 34 (in the multilayer film 34, opposite the gate electrode 15) On the opposite side of the surface, the oxide insulation contains more oxygen than satisfactorily satisfying the stoichiometric composition. A membrane 24 (see Figure 5) is provided. Therefore, more oxygen than that satisfying the stoichiometric composition is present. The oxygen contained in the oxide insulating film 24, which contains a large amount of oxygen, is absorbed by the oxide semiconductor contained in the multilayer film 34. By transferring the oxygen to the body membrane 32, the oxygen vacancy in the oxide semiconductor film 32 can be reduced. ru.

[0171] Furthermore, the etching process that forms the pair of electrodes 21 and 22 damages the multilayer film 34. As a result, oxygen vacancies occur on the back channel side of the multilayer film 34, but acid that satisfies the stoichiometric composition The oxygen contained in the oxide insulating film 24, which contains more oxygen than the element, repairs the oxygen vacancy. It can be restored. This improves the reliability of transistor 60. .

[0172] Based on the above, an oxide film 31 containing In or Ga, an oxide semiconductor film 32, and I A multilayer film 34 having an oxide film 33 containing n or Ga, and on the multilayer film 34, a chemical amount By having an oxide insulating film 24 containing more oxygen than satisfies the theoretical composition, a multilayer It is possible to reduce oxygen vacancies in the film 34. Also, the gate insulating film 17 and oxide An oxide film 31 containing In or Ga is provided between the semiconductor film 32 and the oxide film 31. An oxide film 33 containing In or Ga is provided between the semiconductor film 32 and the oxide insulating film 24. Therefore, the interface between the oxide film 31 containing In or Ga and the oxide semiconductor film 32 is The concentrations of silicon and carbon in the vicinity, the concentrations of silicon and carbon in the oxide semiconductor film 32, Or near the interface between the oxide film 33 containing In or Ga and the oxide semiconductor film 32 It is possible to reduce the concentration of ricon and carbon. As a result, in the multilayer film 34, The absorption coefficient derived by the constant photocurrent measurement method is 1 × 10⁻⁶ -3 Less than / cm, preferably 1×1 0 -4 The localization level density is extremely low, as it is less than / cm.

[0173] The transistor 60 having such a structure is a multilayer film 34 including an oxide semiconductor film 32. Because it has very few defects, it is possible to improve the electrical characteristics of the transistor. Typically, this allows for an increase in on-current and an improvement in field-effect mobility. Also, stress The threshold voltage fluctuates in BT stress tests and photo-BT stress tests, which are examples of such tests. It does not work, or the amount of fluctuation in the positive or negative direction is 1.0V or less, preferably 0 It operates at 0.5V or less, making it highly reliable.

[0174] <Example 1> Instead of the multilayer film 34 shown in Figures 5(A) to 5(C) in this embodiment, Figure 5(D As shown in Figure 5(E), an oxide film 31 containing In or Ga, an oxide semiconductor film 32, an oxide film containing In or Ga 33, and an oxide film containing In or Ga 35 A multilayer film 34a having the above can be used. Note that Figure 5(D) is shown in Figure 5(B) Figure 5(E) corresponds to an enlarged view of the vicinity of the layer film 34, and Figure 5(C) is an enlarged view of the vicinity of the multilayer film 34 shown in Figure 5(C). This corresponds to a large-scale map.

[0175] The oxide film 35 containing In or Ga is an oxide film 31 containing In or Ga, and oxidation It is provided on the sides of the semiconductor film 32 and the oxide film 33 containing In or Ga, respectively. Furthermore, the oxide semiconductor film 32 is surrounded by an oxide film containing In or Ga.

[0176] The oxide film 35 containing In or Ga is the same as the oxide films 31 and 33 containing In or Ga. It is formed from a metal oxide similar to that. That is, compared to the oxide semiconductor film 32, In or Because the band gap of the Ga-containing oxide film 35 is large, the multilayer film 34a and the gate insulating film 1 Trap levels near the interface of 7, or near the interface between the multilayer film 34a and the oxide insulating film 23 It is possible to reduce electron trapping at the wrap level. As a result, the transistor Reliability improves.

[0177] Note that the oxide film 35 containing In or Ga is the oxide film 31 containing In or Ga. A dry oxide film 32 and an oxide film 33 containing In or Ga are formed by a dry oxide film 32. The reaction products generated in the chipping process are an oxide film 31 containing In or Ga, and oxidation By adhering to the side surface of the material semiconductor film 32 and the oxide film 33 containing In or Ga, The conditions for dry etching include, for example, using boron trichloride gas as the etching gas. And using chlorine gas, inductively coupled plasma (ICP) This can be done by applying LED plasma power and substrate bias power.

[0178] Furthermore, in transistor 60, the gate insulating film 17 and the oxide insulating film 24 are chemically charged. An oxide containing more oxygen than the theoretically required oxygen composition, with some of the oxygen being removed upon heating. When an insulating film is used, the cross-sectional structure in the channel width direction (see Figure 5(E)) is In or The oxide semiconductor film 32 is covered by oxide films 31, 33, and 35 containing Ga, and further It contains more oxygen than satisfactorily satisfactorily, and some of the oxygen is removed upon heating. It has a structure covered with an oxide insulating film.

[0179] Having this cross-sectional structure reduces the leakage current flowing along the side surface of the oxide semiconductor film 32. This allows for the suppression of increased off-current and the threshold due to stress testing. This reduces the fluctuation in the value voltage, thereby improving reliability. Furthermore, it also improves the gate insulating film. It is possible to efficiently transfer oxygen from 17 and the oxide insulating film 24 to the oxide semiconductor film 32. This makes it possible to reduce the oxygen vacancy content of the oxide semiconductor film 32.

[0180] <Modification 2> In the transistor 60 shown in this embodiment, the multilayer film 34 and the pair of electrodes 21, 22 The layered structure can be modified as appropriate. For example, as shown in Figure 7, a modified version can be constructed. It can be made into a Zista 65.

[0181] A top view of transistor 65 is shown in Figure 7(A). In Figure 7(A), the dashed line AB A cross-sectional view between the points is shown in Figure 7(B), and a cross-sectional view between the points C and D shown by the dashed line is shown in Figure 7(C). In Figure 7(A), for clarity, the substrate 11, gate insulating film 17, and the material containing In or Ga are shown. The oxide film 31, oxide semiconductor film 32, protective film 26, etc., have been omitted.

[0182] Compared to transistor 60, transistor 65 has a portion of its pair of electrodes 21 and 22 that are acid-resistant. It differs in that it is surrounded by an oxide semiconductor film 32 and an oxide film 33 containing In or Ga. Specifically, the transistor 65 has an oxide semiconductor on an oxide film 31 containing In or Ga. A body membrane 32 is provided, and a pair of electrodes 21 and 22 are provided on the oxide semiconductor film 32. Furthermore, an acid containing In or Ga is brought into contact with the oxide semiconductor film 32 and the pair of electrodes 21 and 22. A phosphate film 33 is provided. In addition, in the transistor 65, the product of other components The layer structure is the same as that of transistor 60.

[0183] In transistor 65, the pair of electrodes 21 and 22 are in contact with the oxide semiconductor film 32. Furthermore, compared to transistor 60, the contact resistance between the multilayer film 34 and the pair of electrodes 21 and 22 is low. This transistor has improved on-current compared to transistor 60.

[0184] Furthermore, the transistor 65 has a pair of electrodes 21 and 22 in contact with the oxide semiconductor film 32. Therefore, without increasing the contact resistance between the multilayer film 34 and the pair of electrodes 21 and 22, In or This allows the oxide film 33 containing Ga to be made thicker. In this way, the protective film 26 Trauma caused by plasma damage during formation or by the inclusion of constituent elements of the protective film 26. The top level is located near the interface between the oxide semiconductor film 32 and the oxide film 33 containing In or Ga. The formation can be suppressed. In other words, transistor 65 improves the on current and threshold current. It is possible to achieve both a reduction in pressure fluctuations and a more efficient approach.

[0185] The method for fabricating transistor 65 will be explained using Figure 8. First, in the same manner as in Figure 3(A) Then, a gate electrode and a gate insulating film 17 are formed on the substrate 11 (see Figure 8(A)).

[0186] Next, an oxide film 4 containing In or Ga becomes an oxide film 31 containing In or Ga. 4. A pair of oxide semiconductor films 45, which will become the oxide semiconductor film 32, are continuously formed, and then a pair Form electrodes 21 and 22 (see Figure 8(B)). The oxide containing In or Ga The material film 44 is made of the same material as the oxide film 19 containing In or Ga shown in Embodiment 1, and The formation method can be used as appropriate. The oxide semiconductor film 45 is made of acid as shown in Embodiment 1. The same materials and formation methods as for the ionized semiconductor film 18 can be used as appropriate. The electrodes 21 and 22 can be formed in the same manner as shown in Figure 3(C). , 22 is formed on the oxide semiconductor film 45.

[0187] Next, the oxide semiconductor film 45 that will become the oxide semiconductor film 32 and the pair of electrodes 21 and 22 are covered Thus, an oxide containing In or Ga becomes an oxide film 33 containing In or Ga. A film is formed. The oxide film containing In or Ga is the In or Ga shown in Embodiment 1. The same materials and formation methods as those used for the Ga-containing oxide film 19 can be used as appropriate.

[0188] Subsequently, an oxide film containing In or Ga becomes an oxide film 31 containing In or Ga. 44, an oxide semiconductor film 45 which becomes an oxide semiconductor film 32, and an oxide containing In or Ga A portion of each oxide film containing In or Ga, which will become the physical film 33, is etched, Alternatively, an oxide film 31 containing Ga, an oxide semiconductor film 32 and an oxide containing In or Ga A multilayer film 34 having a physical film 33 is formed (see Figure 8(C)). Note that the etching process is performed. This involves forming an oxide film 33 containing In or Ga on an oxide film containing In or Ga. This can be carried out by forming a mask using a photolithography process and then using that mask.

[0189] Next, the gate insulating film 17, the multilayer film 34, and the pair of electrodes 21 and 22 are covered, A protective film 26 is formed. The protective film 26 can be formed in the same manner as in Embodiment 1. See Figure 8(D). Also, in the method for fabricating transistor 65, Embodiment 1 may be appropriately applied. Heat treatment can be performed by referring to it.

[0190] Furthermore, etching to form a pair of electrodes 21 and 22 results in an oxide semiconductor film 32. Because defects such as oxygen vacancies can occur in oxide semiconductor films, the carrier density may increase. , to form an oxide film containing In or Ga, which becomes an oxide film 33 containing In or Ga. Before that, the oxide semiconductor film is exposed to plasma generated in an oxygen atmosphere, and the oxide semiconductor film It is preferable to supply oxygen to the body membrane. In this way, the transistor 65 Then, traps near the interface between the oxide semiconductor film 32 and the oxide film 33 containing In or Ga. This can suppress the formation of energy levels and reduce fluctuations in the threshold voltage. Alternatively, In transistor 65, the flow of the oxide semiconductor film 32 in the multilayer film 34 flows near the side surface of the oxide semiconductor film 32. This can reduce leakage current and suppress the increase in off-current.

[0191] Furthermore, the etching process that forms the pair of electrodes 21 and 22 damages the multilayer film 34. As a result, oxygen vacancies occur on the back channel side of the multilayer film 34, but acid that satisfies the stoichiometric composition The oxygen contained in the oxide insulating film 24, which contains more oxygen than the element, repairs the oxygen vacancy. It can be restored. This improves the reliability of transistor 65. .

[0192] <Variation 3> In the transistor 60 shown in this embodiment, the multilayer film 34 and the pair of electrodes 21, 22 The layered structure can be modified as appropriate. For example, as shown in Figure 9, a modified version can be constructed. It can be called Zista 66.

[0193] A top view of transistor 66 is shown in Figure 9(A). In Figure 9(A), the dashed line AB A cross-sectional view between the points is shown in Figure 9(B), and a cross-sectional view between the points C and D shown by the dashed line is shown in Figure 9(C). In Figure 9(A), for clarity, the substrate 11, gate insulating film 17, protective film 26, etc., have been omitted. It is.

[0194] Compared to transistor 60, transistor 66 has an oxide film containing In or Ga. 33 is formed on the gate insulating film 17, a pair of electrodes 21 and 22, and an oxide semiconductor film 32. They differ in that they have an oxide film containing In or Ga. An oxide semiconductor film 32 is provided on 31, and the oxide film 31 contains In or Ga. A pair of electrodes 21 and 22 are provided so as to cover the oxide semiconductor film 32, and In This covers the oxide film 31 containing Ga and the oxide semiconductor film 32, as well as the pair of electrodes 21 and 22. An oxide film 33 containing In or Ga is provided on the transistor 66. Furthermore, the stacked structure of the other components is the same as that of transistor 60.

[0195] Compared to transistor 60, transistor 66 has a pair of oxide semiconductor electrodes 21 and 22. Because the area in contact with the conductive film 32 is large, the contact between the multilayer film 34 and the pair of electrodes 21 and 22 This transistor has low contact resistance and improved on-current compared to transistor 60.

[0196] Furthermore, the transistor 66 has a pair of electrodes 21 and 22 that are in contact with the oxide semiconductor film 32 over a large area. Because they are in contact, the contact resistance between the multilayer film 34 and the pair of electrodes 21 and 22 is not increased. This allows for increasing the thickness of the oxide film 33 containing In or Ga. Therefore, plasma damage or contamination of the constituent elements of the protective film 26 during its formation may occur. The trap levels that occur in such a place are the oxide semiconductor film 32 and the oxide film 33 containing In or Ga. This can suppress the formation near the interface with the transistor 66. This allows for both reducing fluctuations in the upper limit and the threshold voltage.

[0197] The method for fabricating transistor 66 will be explained using Figure 10. First, in the same manner as in Figure 3(A) Then, a gate electrode and a gate insulating film 17 are formed on the substrate 11 (see Figure 10(A)). .

[0198] Next, an oxide film containing In or Ga, which becomes an oxide film 31 containing In or Ga, And an oxide semiconductor film which will become an oxide semiconductor film 32 is continuously formed, on the oxide semiconductor film A mask is prepared by a photolithography process, and etching is performed using the mask. An oxide film 31 and an oxide semiconductor film 32 containing n or Ga are formed. Subsequently, In is young Alternatively, a pair of electric elements are used to cover the edges of the oxide film 31 containing Ga and the oxide semiconductor film 32. Forms electrodes 21 and 22 (see Figure 10(B)). Note that the In or Ga included The oxide film is made of the same material as the oxide film 19 containing In or Ga shown in Embodiment 1, and The formation method can be used as appropriate. The oxide semiconductor film is the oxide shown in Embodiment 1. The same materials and formation methods as for the semiconductor film 18 can be used as appropriate. Sections 1 and 22 can be formed in the same manner as shown in Figure 3(C).

[0199] Next, In or A Ga-containing oxide film 33 is formed, and a multilayer film 34 is formed (see Figure 10(C)). The oxide film containing In or Ga is the oxide containing In or Ga shown in Embodiment 1. The same materials and formation methods as for film 19 can be used as appropriate. The oxide film 33 containing In or Ga is formed by a mass of photolithography or the like. The material can be processed using etching with a marker, or it can be left in its as-formed state.

[0200] Next, a protective film 26 is formed on the gate insulating film 17 and the oxide film 33 containing In or Ga. The protective film 26 can be formed in the same manner as in Embodiment 1 (see Figure 10(D)). (See reference). Also, in the method for manufacturing transistor 66, heating is performed with appropriate reference to Embodiment 1. It can perform the process.

[0201] Furthermore, etch forms oxide film 31 and oxide semiconductor film 32 containing In or Ga. Due to the process, defects such as oxygen vacancies are created on the side surface of the oxide semiconductor film 32, and the carrier density changes. It may increase. Then, by etching to form a pair of electrodes 21 and 22, acid In some cases, defects such as oxygen vacancies occur on the surface of the ionized semiconductor film 32, leading to an increase in carrier density. Therefore, an oxide film 31 containing In or Ga and an oxide semiconductor film 32 were formed. Afterwards, and after the pair of electrodes 21 and 22 have been formed, the oxide semiconductor film 3 Exposing 2 to a plasma generated in an oxygen atmosphere to supply oxygen to the oxide semiconductor film 32. It is preferable.

[0202] Furthermore, the etching process that forms the pair of electrodes 21 and 22 damages the multilayer film 34. As a result, oxygen vacancies occur on the back channel side of the multilayer film 34, but acid that satisfies the stoichiometric composition The oxygen contained in the oxide insulating film 24, which contains more oxygen than the element, repairs the oxygen vacancy. It can be restored. This can improve the reliability of transistor 66. .

[0203] In this way, in transistor 66, the side surface of the oxide semiconductor film 32 and A trap level is located near the interface between the oxide semiconductor film 32 and the oxide film 33 containing In or Ga. This can suppress the formation of the threshold voltage and reduce fluctuations in the threshold voltage.

[0204] Furthermore, the transistor 66 has an oxide film 33 containing In or Ga. To cover the sides (sides in the channel length direction) of the oxide film 31 and oxide semiconductor film 32 that contain It is provided in this manner (see Figure 9(C)). Therefore, the side surface of the oxide semiconductor film 32 This can reduce the leakage current flowing through the circuit and suppress the increase in off-current.

[0205] Furthermore, when forming the oxide film 31 and oxide semiconductor film 32 containing In or Ga (Figure See 9(B).), after the oxide semiconductor film 32 is formed, an oxide containing In or Ga is formed. In the etching process for forming the physical film 31, an oxide film 31 containing In or Ga and Reaction products adhere to the side surface of the oxide semiconductor film 32, forming an oxide film containing In or Ga (Figure) A film equivalent to the oxide film 35 containing In or Ga shown in 5(D) may be formed. In this case, the oxide film 33 containing In or Ga covers the side surface of the oxide semiconductor film 32. It is formed by further covering it with an oxide film containing n or Ga.

[0206] <Modification 4> In the transistor 60 shown in this embodiment, the multilayer film 34 and the pair of electrodes 21, 22 The layered structure can be modified as appropriate. For example, as a modified example, see the tra It can be made into a 67.

[0207] A top view of transistor 67 is shown in Figure 11(A). In Figure 11(A), the dashed line A A cross-sectional view between -B is shown in Figure 11(B), and a cross-sectional view between the dashed-dotted line CD is shown in Figure 11(C). Note that in Figure 11(A), for clarity, the substrate 11, gate insulating film 17, and protective film 26 are shown separately. The "do" is omitted.

[0208] Transistor 67 is the same as transistor 66 shown in Figure 9(B), but with In or Ga An oxide film 33 containing is provided so as to cover a pair of electrodes 21 and 22, and In Alternatively, the edges of the Ga-containing oxide film 33 are located on the pair of electrodes 21 and 22. In transistor 67, the stacked structure of the other components is the same as the stacked structure of transistor 66. They are the same.

[0209] As shown in Figure 11(C), transistor 67 has an oxide film 3 containing In or Ga. 3 has an oxide film 31 containing In or Ga on the side surface intersecting the channel width direction. It is provided so as to cover the side surface of the oxide semiconductor film 32. Therefore, the oxide semiconductor This reduces the leakage current flowing along the side of the film 32 and suppresses the increase in off-current. It is possible.

[0210] (Embodiment 3) In this embodiment, a transistor with a different structure from that of Embodiments 1 and 2 is used. Next, we will explain using Figure 12. The transistor 70 shown in this embodiment is an oxide semiconductor film It is characterized by having multiple gate electrodes that face each other via a barrier.

[0211] The transistor 70 shown in Figure 12 has a gate electrode 15 provided on the substrate 11. Furthermore, a gate insulating film 17 is formed on the substrate 11 and the gate electrode 15, and the gate insulating film 1 7 connects to the multilayer film 20 that overlaps with the gate electrode 15, and to a pair of electrodes 21 that are in contact with the multilayer film 20. It has , 22 and . The multilayer film 20 is an oxide semiconductor film 18 and In or Ga It includes an oxide film 19, a gate insulating film 17, a multilayer film 20, and a pair of electrodes 21. A protective film 26 composed of an oxide insulating film 24 and a nitride insulating film 25 is formed on 22. It also has a gate electrode 61 that is superimposed on the multilayer film 20 via a protective film 26.

[0212] The gate electrode 61 can be formed in the same manner as the gate electrode 15 shown in Embodiment 1. .

[0213] The transistor 70 shown in this embodiment has opposing gate electrodes 15 across the multilayer film 20. and has a gate electrode 61. Different potentials are applied to the gate electrode 15 and the gate electrode 61. This allows the threshold voltage of transistor 70 to be controlled.

[0214] Furthermore, by having a multilayer film 20 having an oxide semiconductor film 18 with reduced oxygen vacancy, This makes it possible to improve the electrical characteristics of the transistor. Also, the threshold voltage fluctuation amount This results in a transistor with fewer defects and therefore greater reliability.

[0215] The oxide semiconductor film disclosed in the above embodiment can be formed by sputtering. However, it may also be formed by other methods, such as thermal CVD. MOC is an example of a thermal CVD method. VD(Metal Organic Chemical Vapor Depositi) You can also use the ON method or the ALD (Atomic Layer Deposition) method. stomach.

[0216] Thermal CVD is a film deposition method that does not use plasma, so defects can occur due to plasma damage. It has the advantage of never being accomplished.

[0217] Thermal CVD is a method in which the chamber is subjected to atmospheric pressure or reduced pressure, and the raw material gas and oxidizer are simultaneously processed. The film is formed by sending the material into a chamber, reacting it near or on the substrate, and depositing it onto the substrate. You may go.

[0218] Furthermore, the ALD method maintains atmospheric pressure or reduced pressure inside the chamber, and the raw material gas for the reaction is The gases are introduced into the chamber sequentially, and film deposition can be performed by repeating this gas introduction sequence. For example, by switching between each switching valve (also called a high-speed valve), two types or less The above raw material gases are supplied to the chamber in order, and the first is supplied in order to prevent the mixing of multiple types of raw material gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the raw material gas. A second raw material gas is introduced. If an inert gas is introduced at the same time, the inert gas is... It acts as a carrier gas, and also when introducing a second raw material gas, an inert gas is introduced at the same time. Good. Also, instead of introducing an inert gas, the first source gas was removed by vacuum evacuation. Later, a second raw material gas may be introduced. The first raw material gas is adsorbed onto the surface of the substrate and the first single An atomic layer is formed, and it reacts with a second source gas introduced later to form a second single atomic layer. Thin films are formed by stacking on a single atomic layer. By controlling the gas introduction sequence, the desired thickness is achieved. By repeating the process multiple times until the desired result is achieved, a thin film with excellent step coverage can be formed. The thickness can be adjusted by the number of times the gas introduction sequence is repeated, thus enabling precise film thickness. It is adjustable and suitable for fabricating minute FETs.

[0219] Thermal CVD methods such as MOCVD and ALD, as disclosed in the embodiments described above. It is possible to form oxide semiconductor films, for example, by the MOCVDV method, InGaZnO X (X>0) When forming a film, trimethylindium, trimethylgallium, and di Ethyl zinc is used. The chemical formula for trimethylindium is (CH3)3In. Furthermore, the chemical formula for trimethylgallium is (CH3)3Ga. Also, diethylzinc. The chemical formula is (CH3)2Zn. Furthermore, it is not limited to these combinations, but also includes trim Triethylgallium (chemical formula (C2H5)3Ga) can also be used instead of tylgallium. It is also possible to use dimethylzinc (chemical formula (C2H5)2Zn) instead of diethylzinc. can.

[0220] For example, oxide semiconductor films, such as InGaZnO, can be deposited using an ALD (Advanced Laser Deposition) system. X ( When depositing a film (X>0), In(CH3)3 gas and O3 gas are introduced sequentially and repeatedly. Then an InO2 layer is formed, and after that, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form Ga An O layer is formed, and then Zn(CH3)2 and O3 gas are simultaneously introduced to form a ZnO layer. Do so. Note that the order of these layers is not limited to this example. Also, mix these gases and InG Mixed compounds such as aO2 layer, InZnO2 layer, GaInO layer, ZnInO layer, and GaZnO layer A layer may be formed. Alternatively, instead of O3 gas, an inert gas such as Ar can be used for bubbling. While H2O gas can be used, it is preferable to use H-containing O3 gas. Alternatively, In(C2H5)3 gas may be used instead of In(CH3)3 gas. Ga(C2H5)3 gas may be used instead of (CH3)3 gas. Also, In(CH 3) In(C2H5)3 gas may be used instead of 3 gas. Also, Zn(CH3)2 You may use gas.

[0221] Furthermore, the configuration and methods shown in this embodiment are similar to those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0222] (Embodiment 4) In this embodiment, the transistors included in the semiconductor device described in the above embodiment are used. In this context, one embodiment applicable to oxide semiconductor films will be described.

[0223] Oxide semiconductor films include amorphous oxide semiconductors, single-crystal oxide semiconductors, and polycrystalline oxide semiconductors. It can be made into a body. Also, an oxide semiconductor film is an oxide semiconductor (CA) having a crystalline portion. It may also be configured as AC-OS.

[0224] CAAC-OS film is one of the oxide semiconductor films having multiple crystalline regions, and most The crystalline portion is small enough to fit within a cube with sides less than 100 nm. Therefore, CAAC- The crystalline portion contained in the OS film is within a cube with sides less than 10 nm, less than 5 nm, or less than 3 nm. This also includes cases where the size fits within the given space. CAAC-OS films have fewer defects than microcrystalline oxide semiconductor films. It is characterized by a low void density. A detailed explanation of the CAAC-OS membrane follows. .

[0225] CAAC-OS film is examined using a transmission electron microscope (TEM). When observed with a tron ​​microscope, a clear boundary between crystalline parts is observed, i.e. The grain boundaries (also called crystal grain boundaries) cannot be identified. Therefore, C AAC-OS films are less susceptible to the decrease in electron mobility caused by grain boundaries.

[0226] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM view). (Inference) It can be confirmed that in the crystalline part, metal atoms are arranged in layers. Each of these layers has irregularities on the surface (also called the surface to be formed) or the upper surface that forms the CAAC-OS film. The shape reflects this, and the elements are arranged parallel to the surface or top surface of the CAAC-OS film.

[0227] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T). EM observation revealed that in the crystalline region, metal atoms are arranged in a triangular or hexagonal shape. This can be confirmed. However, no regularity is observed in the arrangement of metal atoms between different crystalline regions. stomach.

[0228] Cross-sectional TEM observation and planar TEM observation revealed that the crystalline portion of the CAAC-OS film exhibits orientation. It can be seen that this is the case.

[0229] X-ray diffraction (XRD) of CAAC-OS film When structural analysis is performed using the instrument, for example, CAAC-OS having InGaZnO4 crystals is found. Out-of-plane analysis of the film showed a peak at a diffraction angle (2θ) of around 31°. This peak may appear. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have c-axis orientation, and the c-axis is generally aligned with the surface to be formed or the upper surface. It can be confirmed that it is facing in a nearly vertical direction.

[0230] On the other hand, in the CAAC-OS film, X-rays are incident from a direction approximately perpendicular to the c-axis in an in-p In analysis using the lane method, a peak may appear when 2θ is around 56°. This is attributed to the (110) plane of the InGaZnO4 crystal. For a crystalline semiconductor film, fix 2θ to approximately 56° and use the normal vector of the sample surface as the axis (φ axis). When the analysis (φ scan) is performed while rotating the sample, a crystal plane equivalent to the (110) plane is found. Six peaks attributable to this are observed. In contrast, in the case of the CAAC-OS film, 2θ Even when fixed at approximately 56° and scanned using the φ scan function, no clear peak appears.

[0231] From the above, it can be concluded that in CAAC-OS films, the orientation of the a-axis and b-axis between different crystalline regions is It is irregular, but has c-axis orientation, and the c-axis is parallel to the normal vector of the surface to be formed or the upper surface. It can be seen that it is facing in a certain direction. Therefore, it is arranged in layers as confirmed by the aforementioned cross-sectional TEM observation. Each layer of arranged metal atoms is a plane parallel to the ab-plane of the crystal.

[0232] The crystalline portion is formed when the CAAC-OS film is deposited, or when crystallization treatment such as heat treatment is performed. It is formed when this occurs. As mentioned above, the c-axis of the crystal is the surface on which the CAAC-OS film is formed or It is oriented in a direction parallel to the normal vector of the upper surface. Therefore, for example, the shape of the CAAC-OS film When altered by etching or other means, the c-axis of the crystal becomes the surface on which the CAAC-OS film is formed or The vector may not be parallel to the normal vector of the top surface.

[0233] Furthermore, the degree of crystallinity in the CAAC-OS film does not need to be uniform. For example, CAAC-OS When the crystalline portion of the film is formed by crystal growth from near the upper surface of the CAAC-OS film, The region near the surface may have a higher degree of crystallinity than the region near the surface being formed. Also, CA When impurities are added to an AC-OS film, the degree of crystallinity in the region where the impurities are added changes, and Regions with varying degrees of crystallinity may also be formed.

[0234] Furthermore, the out-of-plane CAAC-OS film having InGaZnO4 crystals Analysis using this method revealed that in addition to the peak near 2θ = 31°, there is also a peak near 2θ = 36°. In some cases, this may occur. Peaks near 2θ of 36° indicate c-axis orientation in a portion of the CAAC-OS film. This indicates the presence of crystals that do not possess properties. The CAAC-OS film has a 2θ of approximately 31°. It is preferable that a peak is shown and that no peak is shown near 36° for 2θ.

[0235] There are three methods for forming the CAAC-OS film.

[0236] The first method involves setting the film deposition temperature to 150°C or higher and 500°C or lower, preferably 150°C or higher and 450°C or lower. The oxide semiconductor film is formed at a temperature of 200°C or lower, more preferably between 200°C and 350°C. As a result, the c-axis of the crystalline portion contained in the oxide semiconductor film is the normal vector of the formed surface or the surface This method forms crystal regions aligned in a direction parallel to the normal vector.

[0237] The second method involves depositing an oxide semiconductor film to a thin thickness, followed by heating at a temperature between 200°C and 700°C. By performing heat treatment, the c-axis of the crystalline portion contained in the oxide semiconductor film becomes the normal vector of the surface to be formed. This method forms crystal portions aligned in a direction parallel to the normal vector of the crystal or surface.

[0238] The third method involves depositing a thin first layer of oxide semiconductor film, followed by heating at 200°C or above 700°C. By performing heat treatment below °C and then depositing a second oxide semiconductor film, the oxide semiconductor The c-axis of the crystalline portion contained in the body membrane is parallel to the normal vector of the surface being formed or the normal vector of the surface. This is a method for forming crystal regions aligned in a specific direction.

[0239] Transistors with CAAC-OS applied to oxide semiconductor films are resistant to visible light and ultraviolet light irradiation. The variation in electrical properties is small. Therefore, applying CAAC-OS to oxide semiconductor films results in a small change in performance. The generator has good reliability.

[0240] Furthermore, CAAC-OS uses polycrystalline oxide semiconductor sputtering targets. It is preferable to deposit the film by sputtering. The sputtering target When ions collide with the sputtering target, the crystalline region contained within the sputtering target is on the ab plane. The sputtering particles are cleaved and have a flat or pellet-shaped surface parallel to the ab plane. This can cause peeling. In this case, the flat or pellet-shaped sputtering particles may By maintaining the crystalline state, CAAC-OS can be deposited on the surface to be formed. Cut.

[0241] Furthermore, it is preferable to apply the following conditions for forming the CAAC-OS film.

[0242] By reducing the inclusion of impurities during film formation, it is possible to suppress the disruption of the crystalline state due to impurities. For example, the concentration of impurities present in the deposition chamber (such as hydrogen, water, carbon dioxide, and nitrogen) can be measured. It would be good to reduce it. Also, it would be good to reduce the impurity concentration in the film formation gas. Specifically, the dew point is A film-forming gas with a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0243] Furthermore, by increasing the heating temperature of the film-forming surface during film formation (e.g., substrate heating temperature), the formed surface Sputtering particle migration occurs after reaching a certain temperature. Specifically, the temperature of the surface to be formed... The film is formed at a temperature of 100°C to 740°C, preferably 150°C to 500°C. By increasing the temperature of the surface to be formed during film deposition, the plate-shaped or pellet-shaped sputtering particles are produced. When it reaches the surface to be deposited, migration occurs on that surface, resulting in sputtering. The flat side of the particle adheres to the surface to be formed.

[0244] Furthermore, by increasing the oxygen content in the deposition gas and optimizing the power, plasma damage during film deposition can be reduced. It is preferable to reduce the amount of oxygen. The oxygen content in the film-forming gas is 30% by volume or more, preferably 100%. This is expressed as a percentage by volume.

[0245] As an example of a target for sputtering, an In-Ga-Zn compound target is used. The following is an example.

[0246] InO X powder, GaO Y Powder, and ZnO Z The powder is mixed in a predetermined number of moles and then subjected to pressure treatment. Furthermore, by heat treatment at a temperature between 1000°C and 1500°C, polycrystalline In-G is produced. The target is an α-Zn-based metal oxide. Note that this pressurized treatment is performed without cooling (or allowing to cool). You can proceed as is, or you can proceed while heating. Note that X, Y, and Z are any positive numbers. Here, the predetermined molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z powder The endings are 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, 3:1:2, 1 The ratios are 3:2, 1:6:4, or 1:9:6. Note that the type of powder and the amount of powder used in the mixture are also important. The ol ratio can be adjusted as appropriate depending on the sputtering target being fabricated.

[0247] The configurations shown in this embodiment may be combined with the configurations shown in other embodiments as appropriate. It can be used.

[0248] (Embodiment 5) A semiconductor device having a display function using the transistor shown as an example in the above embodiment ( It can also be used to manufacture a display device. Alternatively, the entire system can be integrally formed on the same substrate as the pixel section to form a system-on-panel. This embodiment allows for the use of a display device that utilizes a transistor, as illustrated in the above embodiment. An example of this will be explained using Figures 13 and 14. Note that Figures 14(A) and 14(B) will be explained. Figure 13(B) is a cross-sectional view showing the cross-sectional structure of the area indicated by the dashed line MN.

[0249] In Figure 13(A), the pixel portion 902 provided on the first substrate 901 is surrounded by A sealing material 905 is provided and sealed by the second substrate 906. Figure 13(A In this case, the area is different from the area surrounded by the sealing material 905 on the first substrate 901. In the region, signal line chips formed of single-crystal or polycrystalline semiconductors on a separately prepared substrate are used. A drive circuit 903 and a scan line drive circuit 904 are implemented. Also, a signal line drive circuit 90 3. Various signals and potentials are supplied to the scan line drive circuit 904 or the pixel unit 902, FPC (Flexible printed circuits) Supplied from 918

[0250] In Figures 13(B) and 13(C), the pixel portion 90 is provided on the first substrate 901. A sealing material 905 is provided so as to surround 2 and the scan line drive circuit 904. A second substrate 906 is provided on top of the pixel section 902 and the scan line driving circuit 904. The pixel section 902 and the scan line driving circuit 904 are connected to the first substrate 901 and the sealing material 905. The display element is sealed together with the second substrate 906. Figures 13(B) and 13 In (C), the region surrounded by the sealing material 905 on the first substrate 901 is Signals formed in different regions on a separately prepared substrate using single-crystal or polycrystalline semiconductors A line drive circuit 903 is implemented. In Figures 13(B) and 13(C), the signal line Various signals and electricity supplied to the drive circuit 903, the scan line drive circuit 904, or the pixel unit 902 The position is supplied by FPC918.

[0251] Furthermore, in Figures 13(B) and 13(C), the signal line drive circuit 903 is formed separately. The example shown is mounted on the first substrate 901, but the configuration is not limited to this. The drive circuit may be formed and implemented separately, or it may be part of the signal line drive circuit or the scan line drive circuit. It is also acceptable to separately form and implement only a portion of it.

[0252] Furthermore, the method of connecting the separately formed drive circuit is not particularly limited, and COG(C The hip-on-glass (hip-on-glass) method, or the wire bonding method, or TAB (Tap) method. Methods such as Automated Bonding can be used. Figure 13(A This is an example of implementing the signal line drive circuit 903 and the scan line drive circuit 904 using the COG method. Figure 13(B) shows an example of implementing the signal line drive circuit 903 using the COG method, and Figure 1 3(C) is an example of implementing the signal line drive circuit 903 using the TAB method.

[0253] Furthermore, the display device includes a panel in which the display elements are sealed, and a control on the panel This includes modules that have ICs, etc., mounted on them, including those containing R.

[0254] In this specification, a display device refers to an image display device or a light source (including an illumination device). This refers to a module to which a connector, such as an FPC or TCP, is attached. , a module with a printed circuit board located beyond the TCP, or a display element using the COG method All modules with directly mounted ICs (integrated circuits) are also included in the definition of a display device.

[0255] Furthermore, the pixel section and scan line driving circuit provided on the first substrate have multiple transistors Therefore, the transistor shown in the above embodiment can be applied.

[0256] Display elements used in display devices include liquid crystal elements (also called liquid crystal display elements) and light-emitting elements. A light-emitting element (also called a light-emitting display element) can be used. The light-emitting element is controlled by current or voltage. This category includes elements whose brightness is controlled by [something], specifically inorganic EL (Electroluminescent) elements. This includes Luminescence elements, organic EL elements, etc. Also, electronic inks, etc. Display media in which the contrast changes due to electrical action can also be applied. Figure 14( Figure A shows an example of a liquid crystal display device using liquid crystal elements as display elements, and Figure 14(B) shows a table. An example of a light-emitting device using a light-emitting element as the indicator is shown.

[0257] As shown in Figures 14(A) and 14(B), the display device has a connection terminal electrode 915 and terminals It has an electrode 916, and the connecting terminal electrode 915 and terminal electrode 916 are provided by the FPC918 It is electrically connected to the terminal via an anisotropic conductive agent 919.

[0258] The connecting terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 It is formed of the same conductive film as the pair of electrodes of transistors 910 and 911.

[0259] Furthermore, the pixel section 902 and the scanning line driving circuit 904 provided on the first substrate 901 are It has multiple transistors, and in Figures 14(A) and 14(B), they are included in the pixel section 902. For example, transistor 910 and transistor 911 included in the scan line drive circuit 904 This is shown. In Figure 14(A), transistors 910 and 911 have an insulating layer. An edge film 924 is provided, and in Figure 14(B), a planarization film 921 is further provided on the insulating film 924. It is provided. Furthermore, in transistors 910 and 911, oxide semiconductor The multilayer film 926 having a body film is a multilayer film 20 having an oxide semiconductor film as shown in Embodiment 1. Alternatively, a multilayer film 34 having the oxide semiconductor film shown in Embodiment 2 can be used as appropriate. The insulating film 924 can be the protective film 26 shown in Embodiment 1 as appropriate. 3 is an insulating film that functions as a base layer.

[0260] In this embodiment, transistors 910 and 911 are as described in the above embodiment. The transistors shown can be applied as appropriate. Transistor 910 and Transistor As TA911, use the transistor shown in any one of Embodiments 1 to 3. This makes it possible to create high-resolution display devices.

[0261] Furthermore, in Figure 14(B), a transistor 91 for the drive circuit is located on the planarized film 921. This example shows a conductive film 917 provided in a position that overlaps with the channel region of the multilayer film 926. In this embodiment, the conductive film 917 is formed from the same conductive film as the first electrode 930. By providing the conductive film 917 in a position that overlaps with the channel region of the multilayer film 926, BT S Further reducing the fluctuation in the threshold voltage of transistor 911 before and after the Tress test. This is possible. Also, the potential of the conductive film 917 is the same as that of the gate electrode of transistor 911. It's fine if they're different, and the conductive film can even function as a second gate electrode. Furthermore, the potential of the conductive film 917 is GND, 0V, floating state, or the maximum voltage of the drive circuit. Low potential (Vss, for example, the potential of the source electrode when the potential of the source electrode is used as the reference) and same potential It may be at or to an equivalent potential.

[0262] Furthermore, the conductive film 917 also has the function of shielding against external electric fields. In other words, when an external electric field is present inside... A function to prevent it from affecting (circuit parts including transistors) (especially electrostatic shielding against static electricity). It also has a shielding function. Due to the shielding function of the conductive film 917, it is protected from the influence of external electric fields such as static electricity. This prevents fluctuations in the electrical characteristics of the transistor. The conductive film 917 is This is applicable to any of the transistors shown in the above embodiment.

[0263] The transistor 910 provided in the pixel section 902 is electrically connected to the display element, and the display panel It constitutes the display. The display element is not particularly limited as long as it can display information, and various display elements can be used. It can be used.

[0264] In Figure 14(A), the liquid crystal element 913, which is a display element, has a first electrode 930, a second electrode It includes an electrode 931 and a liquid crystal layer 908. Furthermore, an alignment film is formed to sandwich the liquid crystal layer 908. An insulating film 932 and an insulating film 933 that function together are provided. In addition, the second electrode 931 is Provided on the substrate 906 side of 2, the first electrode 930 and the second electrode 931 are connected to the liquid crystal layer 908. It has a structure where elements overlap through each other.

[0265] Furthermore, the spacer 935 is a columnar spacer obtained by selectively etching the insulating film. Therefore, in order to control the distance (cell gap) between the first electrode 930 and the second electrode 931 It is provided in [location]. A spherical spacer may also be used.

[0266] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Liquid crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. These liquid crystal materials, depending on the conditions, can be classified into cholesteric phase, smectic phase, cubic phase, and It exhibits iralnematic phase, isotropic phase, etc.

[0267] Alternatively, a liquid crystal exhibiting a blue phase without an alignment layer may be used. The blue phase is one of the liquid crystal phases. Therefore, as the temperature of a cholesteric liquid crystal is increased, it transitions from the cholesteric phase to the isotropic phase. This is the phase that appears immediately before. The blue phase only appears within a narrow temperature range, so the temperature range needs to be modified. To improve performance, a liquid crystal composition mixed with a chiral agent is used in the liquid crystal layer. The liquid crystal exhibits a blue phase. A liquid crystal composition containing a chiral agent has a short response time of 1 msec or less and is optically isotropic. Therefore, alignment processing is unnecessary, and the viewing angle dependence is small. Furthermore, an alignment layer does not need to be provided. Therefore, rubbing is unnecessary, thus preventing electrostatic discharge damage caused by rubbing. This can be stopped, and defects and damage to liquid crystal displays during the manufacturing process can be reduced. This makes it possible to improve the productivity of liquid crystal display devices.

[0268] The first substrate 901 and the second substrate 906 are fixed together by a sealing material 925. The 925 material can be made of organic resins such as thermosetting resins and photocuring resins.

[0269] Furthermore, the transistor using the oxide semiconductor film used in the above embodiment is a switching transistor. It has excellent characteristics. Furthermore, because it can achieve relatively high field-effect mobility, high-speed operation is possible. Therefore, by using the above transistor in the pixel portion of a semiconductor device having a display function, This allows for the provision of high-quality images. Furthermore, the drive circuit section or pixel section can be created on the same substrate. Because it becomes possible to manufacture them separately, the number of components in semiconductor devices can be reduced. .

[0270] The size of the retention capacitance provided in a liquid crystal display device depends on the number of transistors arranged in the pixel area. The charge is maintained for a predetermined period, taking into account the current and other factors. High-purity acid By using a transistor having a semiconductor film, the liquid crystal capacitance in each pixel can be adjusted. It is sufficient to provide a holding capacity having a size of 1 / 3 or less, preferably 1 / 5 or less of the total capacity. Therefore, it is possible to increase the aperture ratio in the pixels.

[0271] Furthermore, in a display device, a black matrix (light-shielding film), a polarizing member, a phase difference member, and Optical components (optical substrates) such as anti-radiation members shall be provided as appropriate. For example, polarizing substrates and phase difference Circular polarization using a substrate may also be used. Furthermore, backlights, sidelights, etc., may be used as light sources. You may use it.

[0272] Furthermore, the display method used in the pixel area may be a progressive or interlaced method. It is possible to do so. Also, the color elements controlled by pixels when displaying color include RGB(R It is not limited to the three colors (where G represents red, G represents green, and B represents blue). For example, RGBW (where W represents white). ) or RGB with one or more additional colors such as yellow, cyan, and magenta. Furthermore, the size of the display area for each dot of the color element may differ. However, this invention One embodiment is not limited to a color display device, but also applies to a monochrome display device. It can also be applied.

[0273] In Figure 14(B), the light-emitting element 963, which is a display element, is provided in the pixel section 902. It is electrically connected to transistor 910. The configuration of the light-emitting element 963 is as follows: The structure is a stacked structure of electrode 930, light-emitting layer 961, and second electrode 931, but is not limited to the configuration shown. No. The configuration of the light-emitting element 963 is appropriate to match the direction of the light extracted from the light-emitting element 963. It can be changed as appropriate.

[0274] The partition wall 960 is formed using an organic insulating material or an inorganic insulating material, particularly a photosensitive resin. Using the material, an opening is formed on the first electrode 930, and the side wall of the opening has a continuous curvature. It is preferable to form it so that it becomes an inclined surface when held.

[0275] Even if the light-emitting layer 961 consists of a single layer, it is configured so that multiple layers are stacked. Either way is fine.

[0276] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting element 963, the second electrode 9 A protective layer may be formed on 31 and the partition wall 960. The protective layer may be a silicon nitride film, nitrile Silicon oxide film, aluminum oxide film, aluminum nitride film, aluminum oxide nitride film Aluminum nitride film, DLC film, etc. can be formed. Also, the first substrate 90 1. The space sealed by the second substrate 906 and the sealing material 936 contains a filler material 964. It is installed and sealed. In this way, it is highly airtight to prevent exposure to the outside air, and minimizes degassing. No protective film (laminated film, UV-curing resin film, etc.) or cover material Casing (enclosure) is preferable.

[0277] The sealant 936 contains organic resins such as thermosetting resins and photocuring resins, as well as free-flowing glass containing low-melting point glass. Frit glass can be used. Frit glass is suitable for use with impurities such as water and oxygen. It is preferable because it has high barrier properties. Also, when using frit glass as the sealing material 936 In addition, as shown in Figure 14(B), by providing frit glass on the insulating film 924, adhesion is improved. This is preferable because it can enhance the effect.

[0278] In addition to inert gases such as nitrogen and argon, filler 964 may also be an ultraviolet curing resin or Thermosetting resins can be used, such as PVC (polyvinyl chloride), acrylic resin, and poly Imide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (e Tylene vinyl acetate can be used. For example, nitrogen can be used as a filler. stomach.

[0279] Additionally, if necessary, a polarizing plate or circular polarizing plate (including elliptical polarizing plate) may be placed on the emission surface of the light-emitting element. Even if optical films such as phase difference plates (λ / 4 plate, λ / 2 plate) and color filters are appropriately provided, Good. Alternatively, an anti-reflective coating may be provided on the polarizing plate or circular polarizing plate. For example, due to surface irregularities... It is possible to apply an anti-glare treatment that diffuses reflected light and reduces glare.

[0280] A first electrode and a second electrode (pixel electrode, common electrode, counter electrode) that apply voltage to the display element. In (also known as) the direction of the light extracted, the location where the electrodes are set, and the pattern of the electrodes You can choose between light transmission and reflectivity depending on the layer structure.

[0281] The first electrode 930 and the second electrode 931 are made of indium oxide containing tungsten oxide. Indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, acid Titanium oxide-containing indium tin oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide with added silicon oxide Electrical materials can be used.

[0282] Furthermore, the first electrode 930 and the second electrode 931 are made of tungsten (W) and molybdenum (Mo). ), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), Tantalum (Ta), chromium (Cr), cobalt (Co), nickel (Ni), titanium (T) i) Metals such as platinum (Pt), aluminum (Al), copper (Cu), silver (Ag), or other materials It can be formed using one or more of the alloys or metal nitrides thereof.

[0283] Furthermore, the first electrode 930 and the second electrode 931 are made of conductive polymers. It can be formed using a conductive composition containing (also known as). Examples of conductive polymers include: So-called π-electron conjugated conductive polymers can be used. For example, polyaniline or so derivatives of, polypyrrole or its derivatives, polythiophene or its derivatives, or ani Copolymers or derivatives thereof consisting of two or more elements such as phosphorus, pyrrole, and thiophene, etc. I can give it to you.

[0284] Furthermore, transistors are susceptible to damage from static electricity, etc., so a protective circuit is needed to protect the drive circuit. It is preferable to provide a path. The protection circuit is preferably constructed using nonlinear elements.

[0285] As described above, by applying the transistor shown in the above embodiment, a display function is obtained. This enables the provision of highly reliable semiconductor devices.

[0286] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0287] (Embodiment 6) In this embodiment, a display device (touch panel and) equipped with a touch sensor (contact detection device) is provided. (Also known as.) The following explains this.

[0288] Figure 24 is a top view showing an example of the pixel configuration of the display device 900. Figure 25 is a top view of Figure 24. This is a cross-sectional view between the dotted lines OP. Note that in Figure 24, for clarity, some of the components have been removed. Details have been omitted. Furthermore, in this embodiment, the reference numerals used in Embodiment 5 will be used as appropriate in the explanation. ru.

[0289] The pixel portion includes at least a transistor 910 and a scan line including a gate electrode 972. a signal line including one electrode 974 of a pair of electrodes 974, 975, and a pixel electrode The first electrode 930, the second electrode 931 which functions as a common electrode, and the spacer 935 It has (see Figure 24).

[0290] The transistor 910 consists of a gate electrode 972, a gate insulating film 976, and a multilayer film 926. It has a pair of electrodes 974, 975 and an insulating film 924. The gate electrode 972 is the first It is provided on the insulating film 923 which functions as an underlayer on the substrate 901. Gate insulating film 9 76 is provided on the gate electrode 972, and the multilayer film 926 overlaps with the gate electrode 972. The pair of electrodes 974 and 975 are arranged on the gate insulating film 976, and the multilayer film 9 The insulating film 924 is provided on 26, and the multilayer film 926 and the pair of electrodes 974, 975 It is located above (see Figure 25).

[0291] Furthermore, an organic resin film 945 is provided on the insulating film 924. A second electrode 931 is provided. An insulating film is provided on the organic resin film 945 and the second electrode 931. An edge film 937 is provided. Electrodes are present in the insulating film 924, insulating film 937, and organic resin film 945. An opening reaching 975 is provided, and a first electrode 93 is placed on the opening and the insulating film 937. A 0 is provided (see Figure 25). In other words, the first electrode 930 is a pair of electrodes 974 It is electrically connected to one side of the 975.

[0292] Furthermore, an insulating film 932, which functions as an alignment film, is provided on the insulating film 937 and the first electrode 930. An alignment film is provided on the surface of the second substrate 906 facing the first substrate 901. A functional insulating film 933 is provided, and a liquid crystal layer 9 is placed between the insulating film 932 and the insulating film 933. 08 is provided. In addition to the above components, optical members may be provided as appropriate. Example For example, polarizing plates can be provided on the outside of the first substrate 901 and the second substrate 906.

[0293] Furthermore, the display device 900 is equipped with a capacitive sensor as a touch sensor. An electrode 941 is provided on the outside of the substrate 906. The polarizing plate is placed between the electrode 941 and the second substrate 906.

[0294] The second electrode 931 on the first substrate 901 side is the common electrode of the pixel and the capacitive element of the touch sensor. It functions as one of the electrodes of the child. Electrode 941 is the other electrode of the capacitive element of the touch sensor. It functions in this way. Furthermore, the pixel section of the display device 900 employs an FFS mode pixel structure. Therefore, since no conductive film is formed on the second substrate 906 side, the band of the second substrate 906 Electrode 941 functions as a conductor for preventing electric shock.

[0295] Transistor 910 is made of the same material as transistor 50 described in Embodiment 1 and the same It can be formed by the following manufacturing method. That is, gate electrode 972, gate insulating film 976, multilayer film 9 26. Each of the pair of electrodes 974, 975 and the insulating film 924 is as described in Embodiment 1. The transistor 50 consists of a gate electrode 15, a gate insulating film 17, a multilayer film 20, and a pair of electrodes 21. , 22, and the protective film 26 can be formed using the same materials and methods as those used for each of them.

[0296] Furthermore, the signal line driving circuit of the display device 900 and One or both of the scan line drive circuits can be fabricated. For example, a signal line drive circuit and a drive circuit can be fabricated. Transistors and diodes included in one or both of the probe drive circuits, as well as FPCs, etc. It is possible to create wiring for the terminal section that is connected to it.

[0297] The organic resin film 945 is applied to the planarization film 921 or partition wall 960 described in Embodiment 5. It can be formed using materials and manufacturing methods. The insulating film 937 is a transistor 9 Materials applicable to the insulating film (gate insulating film 976 or insulating film 924, etc.) included in 10 It can be formed using the following manufacturing method.

[0298] Furthermore, electrode 975, which is one of the pair of electrodes 974 and 975, and the first electrode 9 30 refers to the openings provided in the insulating film 924, insulating film 937, and organic resin film 945 that are in contact with each other. The opening is formed by creating a resist mask through a photolithography process, and It can be formed by etching using a resist mask. Specifically, insulating film 9 A step to etch part of 24 and the organic resin film 945, and a step to etch part of the insulating film 937 It is formed by a polishing process.

[0299] Figure 26(A) shows a pair of electrodes 974 and 975 and a wiring 977 that is electrically connected to them, and a second A cross-sectional view of an example of a connection structure in which the electrode 931 is connected is shown. Wiring 977 and the second The electrode 931 is in contact with the insulating film 924 and the organic resin film 945 through openings provided in these. By doing so, potential is supplied to the wiring 977, thereby supplying potential to the second electrode 931. This can be done. Furthermore, the wiring 977 is shaped using the manufacturing process of the pair of electrodes 974 and 975. It is possible.

[0300] Figure 26(B) shows an example of the wiring connection structure at the terminal section connected to an FPC, etc. A cross-sectional view is shown. The electrode 979 is provided in the insulating film 924 and the organic resin film 945 at an opening. It is in contact with the wiring 977 and is provided on the gate insulating film 976, insulating film 924 and organic resin film 945. The opening is in contact with the wiring 978. This provides potential to the wiring 978. By supplying power, potential can be supplied to wiring 977. Wiring 978 is the gate electrode. It can be formed using the 972 manufacturing process.

[0301] As shown in Figure 26(B), the electrode 979 connects the wiring 977 and the wiring 978. By doing so, compared to creating a connection where wiring 977 and wiring 978 are in direct contact, One less mask can be used. This is because wiring 977 and wiring 978 are in direct contact. To create such a connection structure, before forming the pair of electrodes 974 and 975, the gate insulating film is formed. A photomask is needed to form a contact hole at 976, as shown in Figure 26(B). This is because the photomask is not required for the connection structure.

[0302] Furthermore, instead of the transistor 910 shown in Figure 25, a multi-level mask is used as shown in Figure 27. By fabricating transistor 912, it is possible to reduce the number of photomasks. A multi-gradation mask is a mask that allows exposure at multiple levels of light intensity, and typically... Exposure is performed using three levels of light intensity: an exposed area, a partially exposed area, and an unexposed area. A multi-gradation mask is used. By using this method, multiple (typically two) thicknesses can be achieved in a single exposure and development process. A resist mask can be formed. Therefore, by using a multi-level mask, The number of photomasks can be reduced. Specifically, the multilayer film 927 and the pair of electrodes. In the formation process of 928 and 929, by using a multi-gradation mask, one photomask is required. It can be reduced. Furthermore, by using a multi-gradation mask, a pair of electrodes 928, 929 The edge of the multilayer film 927 is located outside the edge of the other edge.

[0303] Figure 28 is a plan view showing an example configuration of the second electrode 931 and electrode 941 of the display device 900. As shown in Figure 28, the second electrodes 931 and 941 have a striped shape. The second electrode 931 and electrode 941 are arranged orthogonally in a plane. The second electrode 931 is attached to the FPC9 substrate 901 by routing wires 951. Each electrode 941 is connected to 54 and attached to the substrate 906 by routing wires 952. It is connected to the FPC955.

[0304] Figure 29(A) is a cross-sectional view shown by the dashed line QR in Figure 28, and Figure 29(B) is a cross-sectional view shown by Figure 2 This is a plan view of region 953 of 8. As shown in Figure 29(A), the second electrode 931 is It is provided in common to multiple pixels, and the first electrode 930 is provided for each pixel. It is connected to transistor 910. The area where the second electrode 931 and electrode 941 intersect. A capacitive element of the touch sensor is formed in the region. The capacitive element has a second electrode 931 and It consists of electrode 941 and a dielectric material placed between the second electrode 931 and electrode 941. The second electrode 931 is an electrode for supplying potential to the capacitive element. Electrode 941 is These are electrodes used to extract the current flowing through a capacitive element.

[0305] The operation of the display device 900 involves a display operation that inputs video signals to pixels and a sensor that detects contact. It can be broadly classified into single operations. During display operation, the potential of the second electrode 931 is fixed at a low level. During the sensing period, pulse signals are sequentially applied to each second electrode 931, and The potential is considered to be high level. At this time, if the finger is in contact with the display device 900, the contact of the finger The capacitance formed by this process is added to the capacitive element of the touch sensor, so the flow through the capacitive element flows through it. The current changes, and the potential of electrode 941 changes. Electrode 941 is scanned sequentially, and electrode 941 By detecting changes in electrical potential, the contact position of the finger can be detected.

[0306] As described above, in a display device having liquid crystal elements, the capacitance of the display device 900 is configured The electrodes used were the conductive antistatic electrodes originally provided in the FFS mode liquid crystal display device. Because it can use common electrodes for the body and pixels, it is lightweight, thin, and has high display quality. It is possible to provide a panel.

[0307] In this case, the second electrode 931 is located below the first electrode 930 (on the side of the first substrate 901). An example of this configuration has been shown, but the second electrode 931 can be placed above the first electrode 930. It can also be done this way.

[0308] Note that the structure of the display device may be different from the display device 900 shown in this embodiment. Good. For example, a touch panel substrate can be made to form a capacitance and act as the first element of a liquid crystal display or light-emitting display. This is an external touch panel that is attached to either the first circuit board 901 or the second circuit board 906. It is also possible to attach an antistatic device to the outside of the first substrate 901 or the second substrate 906. Using a conductive film for surface capacitive touch sensors, It is also possible to configure a sensor. Below, using Figures 30 and 31, an external touch panel can be configured. This section describes an example configuration of a touch sensor applied to the system.

[0309] Figure 30(A) is an exploded perspective view showing an example of the configuration of a touch sensor, and Figure 30(B) is a different view. Figure 30(C) is a plan view showing an example configuration of the electrode 981 of the touch sensor. This is a plan view showing an example configuration of electrode 982.

[0310] As shown in Figures 30(A) to 30(C), the touch sensor 980 is located on the substrate 986. Multiple electrodes 981 arranged in the X-axis direction, and arranged in the Y-axis direction intersecting the X-axis direction Multiple electrodes 982 are formed.

[0311] Electrodes 981 and 982 each have a structure in which multiple quadrilateral-shaped conductive films are connected. The multiple electrodes 981 and multiple electrodes 982 are positioned at the quadrilateral portion of the conductive film. They are arranged so as not to overlap. At the intersection of electrode 981 and electrode 982, An insulating film is provided between electrode 981 and electrode 982 to prevent contact between them.

[0312] Figure 31(A) is a cross-sectional view illustrating an example of the connection structure of electrodes 981 and 982. Figure 31(B) shows an example of a cross-sectional view of the point where electrodes 981 and 982 intersect. This is the equivalent circuit diagram of the intersection of electrode 981 and electrode 982. As shown in Figure 31(B) Furthermore, a capacitance 983 is formed at the intersection of electrode 981 and electrode 982.

[0313] As shown in Figure 31(A), in the sensor unit 989, the electrode 981 is the first conductive film The structure consists of 981a and the conductive film 981b, and the second conductive film 981c on the insulating film 985. The conductive film 981a and conductive film 981b are connected by conductive film 981c. Electrode 982 is formed by the first conductive film layer. Electrode 981, electrode 982, and electrode The insulating film 991 is formed covering 984 and the insulating film 985. For example, a silicon oxide film, a silicon oxide nitride film, or the like can be formed as the insulating film 991. Furthermore, an underlayer insulating film may be formed between the substrate 986 and electrodes 981 and 984. For example, silicon oxide films, silicon oxide nitride films, etc., can be formed as the insulating film. Cut.

[0314] Electrodes 981 and 982 are formed from a conductive material that is transparent to visible light. For example, as a light-transmitting conductive material, indium tin oxide containing silicon oxide, oxide Examples include indium tin, zinc oxide, indium zinc oxide, and zinc oxide with added gallium. .

[0315] The conductive film 981a is connected to the electrode 984 at the terminal portion 990. The electrode 984 is , forming a terminal for connection to the FPC. Electrode 982, like electrode 981, also forms a terminal for connection to the other electrode 984. It is connected to the electrode 984, which can be formed from, for example, a tungsten film.

[0316] In order to electrically connect electrode 984 and FPC, insulating film 985 and insulating film on electrode 984 are used. An opening is formed in the edge film 991. The substrate 987 is attached to the insulating film 991 with an adhesive or bonding agent. It is attached with an adhesive film or the like. The substrate 986 is exposed with adhesive or adhesive film. By attaching it to the first substrate 901 or the second substrate 906 of the display device, the touch panel is configured It will be accomplished.

[0317] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0318] (Embodiment 7) This embodiment describes a driving method for reducing the power consumption of a display device. The driving method of this embodiment allows a display device in which oxide semiconductor transistors are applied to the pixels. Further reductions in power consumption can be achieved. The following uses Figures 33 and 34 to illustrate the display device. As an example, we will explain how to reduce the power consumption of liquid crystal display devices.

[0319] Figure 33 is a block diagram showing an example of the configuration of the liquid crystal display device according to this embodiment. As such, the liquid crystal display device 500 has a liquid crystal panel 501 as a display module, and further It has a control circuit 510 and a counter circuit.

[0320] The liquid crystal display device 500 receives digital data, namely image signals (Video) and liquid crystal particles. A synchronization signal (SYNC) is input to control the screen refresh of the NEL501. Examples of signals include horizontal synchronization signals (Hsync), vertical synchronization signals (Vsync), and There is a reference clock signal (CLK), etc.

[0321] The liquid crystal panel 501 includes a display unit 530, a scan line drive circuit 540, and a data line drive circuit 5 It has 50. The display unit 530 has multiple pixels 531. Pixels 531 in the same row are shared The same scan line 541 is connected to the scan line drive circuit 540, and the pixels 531 in the same column are common Data line 551 is connected to data line drive circuit 550.

[0322] The liquid crystal panel 501 has a common voltage (hereinafter referred to as Vcom) and a power supply voltage. High power supply voltage (VDD) and low power supply voltage (VSS) are supplied. Common voltage (Vcom ) is supplied to each pixel 531 of the display unit 530.

[0323] The data line drive circuit 550 processes the input image signal and generates a data signal. The scan line drive circuit 540 outputs a data signal to the TA line 551. A scanning signal is output to scan line 541 to select pixel 531.

[0324] Pixel 531 is a switch whose electrical connection to data line 551 is controlled by a scan signal. It has a switching element. When the switching element is turned on, data line 551 is transmitted to pixel 531. The data signal is written.

[0325] The electrode to which Vcom is applied corresponds to the common electrode.

[0326] The control circuit 510 is a circuit that controls the entire liquid crystal display device 500. It includes a circuit that generates control signals for the circuits that constitute 0.

[0327] The control circuit 510 receives the synchronization signal (SYNC) and then controls the scan line drive circuit 540 and the data line drive circuit. It has a control signal generation circuit that generates control signals for the motion circuit 550. Scan line drive circuit 540 Control signals include the start pulse (GSP) and the clock signal (GCLK), and data The control signals for the wire drive circuit 550 are a start pulse (SSP) and a clock signal (SC). Examples include LK, etc. For example, the control circuit 510 uses clock signals (GCLK, SCLK) This generates multiple clock signals with the same period but shifted phases.

[0328] Furthermore, the control circuit 510 receives an image signal (Vide) input from outside the liquid crystal display device 500. o) Output control to the data line drive circuit 550.

[0329] The data line drive circuit 550 is a digital-to-analog conversion circuit (hereinafter referred to as the DA conversion circuit 55) It is called 2.) The DA conversion circuit 552 converts the image signal to analog and the data signal Generate a number.

[0330] Furthermore, if the image signal input to the liquid crystal display device 500 is an analog signal, the control cycle The signal is converted to a digital signal via channel 510 and output to the LCD panel 501.

[0331] The image signal consists of image data for each frame. The control circuit 510 processes the image signal. Based on the information obtained from that process, the output of the image signal to the data line drive circuit 550 is controlled. It has the function of detecting motion from image data for each frame. It is equipped with a motion detection unit 511 that detects when there is no movement. The control circuit 510 stops outputting the image signal to the data line drive circuit 550, and also when there is motion If it is determined that this is the case, the output of the image signal will be resumed.

[0332] There are no particular restrictions on the image processing for motion detection performed by the motion detection unit 511. For example, as a motion detection method, the difference data between two consecutive frames of image data can be used. There is a way to obtain the data. From the obtained differential data, it is possible to determine whether or not there is movement. There are also methods for detecting motion vectors, etc.

[0333] Furthermore, the liquid crystal display device 500 is equipped with an image signal correction circuit that corrects the input image signal. For example, a voltage higher than the voltage corresponding to the grayscale of the image signal can be applied to pixel 531. The image signal is corrected so that it can be written. This correction improves the response of the liquid crystal element. This allows for a reduction in processing time. The image signal is then corrected and processed to drive the control circuit 510. The method is called overdrive. Also, the frame frequency of the image signal When performing double-speed driving, which drives the liquid crystal display device 500 at integer multiples, the control circuit 510 has two Create image data to interpolate between frames, or display black between two frames. You just need to generate image data for that purpose.

[0334] Below, using the timing chart shown in Figure 34, we will discuss moving images like video, This section describes the operation of a liquid crystal display device 500 for displaying still images. Figure 34 shows the vertical synchronization signal (Vsync) and the data line 5 from the data line drive circuit 550. The signal waveform of the data signal (Vdata) output to 51 is shown.

[0335] Figure 34 is a timing chart of the liquid crystal display device 500 over a 3m frame period. So, the image data for the initial k-frame period and the final j-frame period has motion. Assume that there is no motion in the image data for the other frame periods. Note that k and j are 1. These are integers between m-2 and above.

[0336] During the initial k-frame period, the motion detection unit 511 detects motion in the image data of each frame. It is determined that there is a data. The control circuit 510 determines that there is a data based on the determination result of the motion detection unit 511. The DATA signal (Vdata) is output to data line 551.

[0337] Then, the motion detection unit 511 performs image processing for motion detection, and the k+1 frame If the control circuit 510 determines that there is no movement in the image data, the motion detection unit 511 makes a determination. Based on the results, during the k+1th frame period, the image signal (Vid The output of eo) is stopped. Therefore, the data from the data line drive circuit 550 to the data line 551 The output of the TA signal (Vdata) is stopped. Furthermore, the rewriting of the display unit 530 is stopped. Therefore, control signals (start pulse signal) are sent to the scan line drive circuit 540 and the data line drive circuit 550. The supply of signals (such as the clock signal) is stopped. Then, the control circuit 510 controls the motion detection unit 51 In step 1, until a result indicating motion is detected in the image data, the data line is sent to the data line drive circuit 550. Output of the image signal, output of control signals to the scan line drive circuit 540 and the data line drive circuit 550. The power is stopped, and the rewriting of the display unit 530 is stopped.

[0338] In this specification, "not supplying a signal" to the liquid crystal panel means that the signal is not supplied. Applying a voltage different from the predetermined voltage required to operate the circuit to the wiring, or the wiring This refers to putting a wire into an electrically floating state.

[0339] When the rewriting of the display unit 530 is stopped, an electric field in the same direction continues to be applied to the liquid crystal element. This can lead to deterioration of the liquid crystal in the liquid crystal element. If such problems become apparent, Regardless of the determination result of the motion detection unit 511, the control circuit 510 scans at a predetermined timing. The line drive circuit 540 and the data line drive circuit 550 are supplied with signals, and the data with reversed polarity is sent. It is recommended to write the signal to data line 551 and reverse the direction of the electric field applied to the liquid crystal element. .

[0340] The polarity of the data signal input to data line 551 is determined based on Vcom. The polarity is positive if the data signal voltage is higher than Vcom, and negative if it is lower. It is the polarity.

[0341] Specifically, as shown in Figure 34, when the m+1th frame period begins, the control circuit 510 The system outputs control signals to the scan line drive circuit 540 and the data line drive circuit 550, and drives the data lines. The image signal Video is output to circuit 550. The data line drive circuit 550 is the kth frame. During this period, the polarity of the data signal (Vdata) output to data line 551 is reversed. The resulting data signal (Vdata) is output to data line 551. Therefore, the image data shows movement. During the m+1 frame period and the 2m+1 frame period, which are periods in which polarity is not detected, The inverted data signal (Vdata) is written to data line 551. During periods of no change, the display unit 530 is rewritten intermittently, thus consuming power due to the rewriting process. This method reduces costs while preventing degradation of the liquid crystal elements.

[0342] Then, the motion detection unit 511 detects motion in the image data from the 2m+1 frame onward. If it determines that this is the case, the control circuit 510 will then operate the scan line drive circuit 540 and the data line drive circuit 550. This controls the display unit 530 and rewrites it.

[0343] As described above, according to the driving method in Figure 34, the motion of the image data (Video) is Regardless of the context, the data signal (Vdata) has its polarity reversed every m-frame period. Regarding the rewriting of the display unit 530, the display period of the image including motion is displayed frame by frame. The display unit 530 is rewritten, and the display period of an image without movement is m frames every m frames. This will result in the display being rewritten. As a result, power consumption associated with rewriting the display will be reduced. This is possible. Therefore, it is possible to suppress the increase in power consumption due to the increase in driving frequency and pixel count. Cut.

[0344] As mentioned above, the liquid crystal display device 500 has a mode for displaying video and a mode for displaying still images. In this mode, the driving method of the liquid crystal display is changed to suppress the degradation of the liquid crystal and improve the display quality. This makes it possible to provide a power-saving liquid crystal display device while maintaining its position.

[0345] Furthermore, when displaying still images, if the pixels are rewritten every frame, the human eye cannot perceive the rewriting of the pixels. The image may be perceived as flickering, which can cause eye strain. Display devices are effective in reducing eye strain because the pixel refresh rate is low during the display period of still images. That is the case.

[0346] Therefore, a liquid crystal panel in which an oxide semiconductor transistor forms the backplane is used. Therefore, we provide a high-definition, low-power, small-to-medium-sized liquid crystal display that is very suitable for portable electronic devices. It is possible to do so.

[0347] Furthermore, in order to prevent deterioration of the LCD, the interval for reversing the polarity of the data signal (here, the m-frame period) is set. The interval should be 2 seconds or less, preferably 1 second or less.

[0348] Furthermore, motion detection of the image data was performed by the motion detection unit 511 of the control circuit 510, but motion detection The motion detection does not need to be performed solely by the motion detection unit 511. The data indicating the presence or absence of motion is displayed on the liquid crystal display device 500. The control circuit 510 may also be configured to receive input from an external source.

[0349] Furthermore, the condition for determining that there is no movement in the image data is the image data between two consecutive frames. The number of frames required for determination is not determined by the data itself, but depends on the usage mode of the liquid crystal display device 500. This can be determined as appropriate. For example, if there is no movement in the image data of consecutive m frames. In some cases, the rewriting of the display unit 530 may be stopped.

[0350] Note that the configuration and methods shown in this embodiment are different from those shown in other embodiments and examples. It can be used in appropriate combination with methods and other techniques.

[0351] (Embodiment 8) One aspect of the present invention is a semiconductor device that can be applied to various electronic devices (including amusement machines). It is possible. As for electronic devices, television equipment (television or television receiver) Also called a machine. ), computer monitors, digital cameras, digital video cameras Digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio playback devices Examples include amusement machines (pachinko machines, slot machines, etc.) and game cabinets. These electronic machines An example of a vessel is shown in Figure 15.

[0352] Figure 15(A) shows table 9000 having a display unit. Table 9000 is The housing 9001 incorporates a display unit 9003, and the display unit 9003 displays video. It is possible to do so. Furthermore, the configuration in which the housing 9001 is supported by four legs 9002 is... It is shown. Furthermore, the casing 9001 has a power cord 9005 for power supply.

[0353] The semiconductor device shown in any of the above embodiments can be used in the display unit 9003. Yes. Therefore, the display quality of the display unit 9003 can be improved.

[0354] The display unit 9003 has a touch input function, and the display unit 9003 of the table 9000 By touching the displayed button 9004 with your finger, you can operate the screen or input information. This allows for communication with or control of other home appliances, It may also be used as a control device to control other home appliances by operating a surface. For example, Image By using a semiconductor device with sensor functionality, the display unit 9003 can be given a touch input function. It is possible.

[0355] Furthermore, a hinge provided on the housing 9001 allows the screen of the display unit 9003 to be positioned relative to the floor. It can be stood upright and used as a television set. In a small room, Installing a large-screen television set reduces the available space, but a table If the display unit is built into the unit, the space in the room can be used more effectively.

[0356] Figure 15(B) shows the television system 9100. The housing 9101 incorporates a display unit 9103, and the display unit 9103 displays images. It is possible to demonstrate this. Here, the stand 9105 supports the housing 9101. This shows the configuration.

[0357] The television unit 9100 is operated using the control switches on the housing 9101, or a separate unit. This can be done using the remote control unit 9110. The remote control unit 9110 has an operating key -9109 allows you to control the channel and volume, and the display unit 9103 displays the information. The video can be controlled. Furthermore, the remote control unit 9110 can control the remote control. A display unit 9107 may be provided to display information output from the unit 9110.

[0358] The television system 9100 shown in Figure 15(B) includes a receiver, a modem, and other components. The television equipment 9100 can receive general television broadcasts using its receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, One-way (sender to receiver) or two-way (sender and receiver, or between receivers, etc.) It is also possible to communicate information.

[0359] The semiconductor device shown in any of the above embodiments is used in the display units 9103 and 9107. This is possible. Therefore, the display quality of television equipment can be improved.

[0360] Figure 15(C) shows the computer 9200, consisting of the main unit 9201, the casing 9202, and the display unit 9 203, Keyboard 9204, External connection port 9205, Pointing device 920 Includes 6, etc.

[0361] The semiconductor device shown in any of the above embodiments can be used in the display unit 9203. Yes. Therefore, it is possible to improve the display quality of the computer 9200.

[0362] The display unit 9203 has a touch input function, and the display unit 92 of the computer 9200 By touching the display buttons shown in 03 with your finger, you can operate the screen or input information. This enables screen operation, and also allows communication with or control of other home appliances. Depending on the design, it may also be used as a control device to control other home appliances.

[0363] Figures 16(A) and 16(B) show a foldable tablet device. ) is in an open state, and the tablet terminal consists of a housing 9630, a display unit 9631a, and a display Part 9631b, display mode switching switch 9034, power switch 9035, power saving mode It has a code change switch 9036, a fastener 9033, and an operating switch 9038.

[0364] The semiconductor device shown in any of the above embodiments includes a display unit 9631a and a display unit 9631b It can be used for this purpose. Therefore, it is possible to improve the display quality of tablet devices. Cut.

[0365] The display unit 9631a can be partially designated as a touch panel area 9632a, and the display will Data can be entered by touching the operation key 9638. Note that the display unit 96 In 31a, as an example, one half of the area has a display-only function, and the other half of the area The area indicates a configuration having touch panel functionality, but is not limited to this configuration. Display unit 96 The entire area of ​​31a may also be configured to have touch panel functionality. For example, the display unit 9 The entire surface of 631a is used as a touch panel with keyboard buttons, and the display unit 9631b is displayed It can be used as a display screen.

[0366] In addition, in the display unit 9631b, similar to the display unit 9631a, one of the display units 9631b The area can be designated as the touch panel area 9632b. Also, the touch panel keyboard Touch the location where the display toggle button 9639 is displayed using your finger or stylus. This allows keyboard buttons to be displayed on the display unit 9631b.

[0367] Furthermore, simultaneously with respect to the touch panel area 9632a and the touch panel area 9632b You can also use touch input.

[0368] Additionally, the display mode switch 9034 changes the display orientation, such as vertical or horizontal display. You can switch between modes, such as switching between black and white and color displays. Power saving mode switching... The Itch 9036 detects ambient light during use using a light sensor built into the tablet device. The display brightness can be optimized according to the amount of light. The tablet terminal uses optical sensors. In addition to the sensor, other detection devices such as gyroscopes, accelerometers, and other sensors that detect tilt are also used. It can be built-in.

[0369] Furthermore, Figure 16(A) shows an example where the display area of ​​display unit 9631b and display unit 9631a are the same. However, this is not particularly limited, and one size may be different from the other. The quality of the display may also differ. For example, one display panel can provide a higher resolution display than the other. You can also use "ru".

[0370] Figure 16(B) shows the closed state, and the tablet terminal consists of a housing 9630 and a solar cell 9 633, and a charge / discharge control circuit 9634 are included. Note that in Figure 16(B), the charge / discharge control circuit 96 As an example of 34, consider a configuration having a battery 9635 and a DC-DC converter 9636. This is what is being shown.

[0371] Note that the tablet device is foldable, so when not in use, the casing 9630 is closed. This can be done. Therefore, the display units 9631a and 9631b can be protected. We can provide tablet devices that are highly durable and reliable from a long-term use perspective.

[0372] In addition, the tablet devices shown in Figures 16(A) and 16(B) are also available in various forms. Functions to display information (still images, videos, text images, etc.), calendar, date or time, etc. A function that displays information on the display unit, and a touch input operation or editing of the information displayed on the display unit. It has input capabilities, and functions to control processing through various software (programs), etc. It is possible.

[0373] The touch panel is powered by a solar cell 9633 mounted on the surface of the tablet device. It can be supplied to the display unit or the video signal processing unit, etc. The solar cell 9633 is It can be provided on one or both sides of the housing 9630, and efficiently charges the battery 9635. This configuration is preferable because it allows for such a setup. Note that the battery 9635 is lithium Using microion batteries offers advantages such as miniaturization.

[0374] Furthermore, the configuration and operation of the charge / discharge control circuit 9634 shown in Figure 16(B) are shown in Figure 16( A block diagram is shown and explained in C). Figure 16(C) shows solar cell 9633, battery 9 635, DC-DC converter 9636, converter 9637, switch SW1 to SW3 The display unit 9631 is shown, along with the battery 9635 and the DC-DC converter 963 6. Converter 9637 and switches SW1 to SW3 control the charge and discharge as shown in Figure 16(B). This corresponds to circuit 9634.

[0375] First, we will explain an example of operation when electricity is generated by the solar cell 9633 using ambient light. The electricity generated by the solar panel is set to a voltage suitable for charging the battery 9635. The CDC converter 9636 performs either a boost or a buck. Then, the display unit 9631 operates as follows: When power from solar cell 9633 is used, switch SW1 is turned ON, and the converter 9637 will boost or lower the voltage to the required level for the display unit 9631. To avoid displaying information on 9631, turn switch SW1 off and switch SW2 on. This configuration would allow for charging of the 9635 battery.

[0376] While the solar cell 9633 is shown as an example of a power generation method, it is not particularly limited to this method. , by other power generation methods such as piezoelectric elements (piezo elements) and thermoelectric elements (Peltier elements) The configuration may also include charging the battery 9635. For example, power may be supplied wirelessly (contactlessly). This can be done using a contactless power transmission module that transmits and receives power for charging, or by combining it with other charging methods. It can also be used as a composition.

[0377] The configurations shown in this embodiment may be combined with the configurations shown in other embodiments as appropriate. It can be used. [Examples]

[0378] In this example, the Vg-Id characteristics of the transistor and the measurement results of the photo-BT stress test were used. I will explain about that.

[0379] First, the process for fabricating the transistor included in Sample 1 will be explained. In this example, Refer to Figure 3 and write the command.

[0380] First, as shown in Figure 3(A), a glass substrate is used as the substrate 11, and a glass substrate is placed on the substrate 11. A electrode 15 was formed.

[0381] A 100nm thick tungsten film is formed using the sputtering method, and then photolithography is performed. A mask is formed on the tungsten film by the process, and the mask is used to form a part of the tungsten film. The part was etched to form the gate electrode 15.

[0382] Next, a gate insulating film 17 was formed on the gate electrode 15.

[0383] As a gate insulating film, a first silicon nitride film with a thickness of 50 nm and a second film with a thickness of 300 nm Silicon nitride film, third silicon nitride film with a thickness of 50 nm, and silicon oxide nitride film with a thickness of 50 nm It was formed by laminating reconstituted films.

[0384] The first silicon nitride film is coated with silane at a flow rate of 200 sccm and nitrogen at a flow rate of 2000 sccm. and ammonia at a flow rate of 100 sccm is used as a raw material gas in the processing chamber of the plasma CVD apparatus. The system supplies the fluid, controls the pressure inside the processing chamber to 100 Pa, and uses a 27.12 MHz high-frequency power supply. It was formed by supplying 2000W of power.

[0385] Next, under the conditions for the raw material gas of the first silicon nitride film, the ammonia flow rate was set to 2000 The material was changed to SCCM, and a second silicon nitride film was formed.

[0386] Next, silane at a flow rate of 200 sccm and nitrogen at a flow rate of 5000 sccm are used as raw material gases. It is supplied to the processing chamber of the plasma CVD apparatus, and the pressure inside the processing chamber is controlled to 100 Pa, 27.1 Using a 2MHz high-frequency power supply, 2000W of power is supplied to form the third silicon nitride film. I did it.

[0387] Next, silane at a flow rate of 20 sccm and nitrous oxide at a flow rate of 3000 sccm are used as the raw material gases. The plasma is then supplied to the processing chamber of the plasma CVD apparatus, and the pressure inside the processing chamber is controlled to 40 Pa. 27. A silicon oxide nitride film is formed by supplying 100W of power using a 12MHz high-frequency power supply. did.

[0388] Furthermore, the deposition of the first to third silicon nitride films and the silicon oxidizide film. During the process, the substrate temperature was set to 350°C.

[0389] Next, a multilayer film 20 was formed on the gate electrode 15 via the gate insulating film 17.

[0390] Here, a first In oxide semiconductor film 18 with a thickness of 35 nm is placed on the gate insulating film 17. - After forming a Ga-Zn oxide film by sputtering, In is placed on the oxide semiconductor film 18. Alternatively, a second In-Ga-Zn oxide film with a thickness of 20 nm is used as the Ga-containing oxide film 19. Formed. Next, an oxide film 19 containing In or Ga is formed by a photolithography process. A mask is formed on the oxide semiconductor film 18 and an acid containing In or Ga is used with the mask. A portion of the oxide film 19 was etched. Subsequently, the etched oxide semiconductor film 18 and A multilayer film 20 was formed by heat treatment of an oxide film 19 containing In or Ga.

[0391] The first In-Ga-Zn oxide film is a sputtering target with In:Ga:Zn= A 1:1:1 (atomic ratio) target is used, with argon at a flow rate of 50 sccm and 50 s The oxygen sputtering gas of the ccm is supplied to the processing chamber of the sputtering apparatus, and the processing chamber The internal pressure was controlled to 0.6 Pa, and 5 kW of DC power was supplied to form it. The substrate temperature during the formation of the n-Ga-Zn oxide film was set to 170°C.

[0392] The second In-Ga-Zn oxide film is a sputtering target with In:Ga:Zn= A target with an atomic ratio of 1:3:2 was used, and the sputtering gas flow rate was 90 sccm. Ar and oxygen at a flow rate of 10 sccm are supplied to the processing chamber of the sputtering apparatus. The pressure was controlled to 0.3 Pa and 5 kW of DC power was supplied to form the mixture. The substrate temperature used for forming the ga-Zn oxide film was set to 25°C.

[0393] The heat treatment involves heating at 450°C for 1 hour in a nitrogen atmosphere, followed by heating in a nitrogen and oxygen atmosphere. The material was subjected to a heat treatment at 450°C for 1 hour in an open atmosphere.

[0394] The configuration obtained through the steps up to this point can be seen in Figure 3(B).

[0395] Next, a portion of the gate insulating film 17 is etched to expose the gate electrode (not shown). As shown in Figure 3(C), a pair of electrodes 21 and 22 were formed in contact with the multilayer film 20.

[0396] Here, a conductive film was formed on the gate insulating film 17 and the multilayer film 20. The conductive film was, A 400 nm thick aluminum film is formed on a 50 nm thick tungsten film, and the aluminum A 100 nm thick titanium film was formed on the titanium film. Next, a photolithography process was performed. Then a mask is formed on the conductive film, and a part of the conductive film is etched using the mask, and a pair Electrodes 21 and 22 were formed.

[0397] Next, the substrate is moved to a depressurized processing chamber, heated at 220°C, and then filled with nitrous oxide. The substrate was then moved to the processing chamber. Next, a 27.12 MHz electrode was applied to the upper electrode located in the processing chamber. Using a high-frequency power supply of z, 150W of high-frequency power is supplied, and the decomposition of nitrous oxide generates The multilayer film 20 was exposed to the generated oxygen plasma.

[0398] Next, a protective film 26 was formed on the multilayer film 20 and the pair of electrodes 21 and 22 (see Figure 3(D)). (See image). Here, an oxide insulating film 24 and a nitride insulating film 25 are formed as the protective film 26. .

[0399] First, after the plasma treatment described above, an oxide insulating film 24 is continuously formed without exposure to the atmosphere. A silicon oxide nitride film with a thickness of 400 nm was formed as the oxide insulating film 24.

[0400] The oxide insulating film 24 is infused with silane at a flow rate of 160 sccm and oxide monoxide at a flow rate of 4000 sccm. Using dinitrogen as the raw material gas, with a processing chamber pressure of 200 Pa and a substrate temperature of 220°C, 1500 The material was formed by plasma CVD, in which high-frequency power W was supplied to parallel plate electrodes. Furthermore, it contains more oxygen than satisfactorily satisfying the oxygen composition, and some of the oxygen is removed by heating. It is possible to form a silicon oxide nitride film that can be separated.

[0401] Next, a heat treatment was performed to remove water, nitrogen, hydrogen, etc. from the oxide insulating film 24. The sample was then subjected to heat treatment at 350°C for 1 hour in a nitrogen and oxygen atmosphere.

[0402] Next, the substrate is moved to a reduced-pressure processing chamber, heated at 350°C, and then on the oxide insulating film 24. A nitride insulating film 25 was formed thereon. Here, the nitride insulating film 25 was made of a film with a thickness of 100 nm. A silicon nitride film was formed.

[0403] The nitride insulating film 25 is coated with silane at a flow rate of 50 sccm, nitrogen at a flow rate of 5000 sccm, and Ammonia at a flow rate of 100 sccm is used as the raw material gas, the pressure in the processing chamber is 100 Pa, and the substrate temperature is... The plasma CVD method was performed with a temperature of 350°C and 1000W of high-frequency power supplied to parallel plate electrodes. It was formed more.

[0404] Next, although not shown in the figure, a portion of the oxide insulating film 24 and the nitride insulating film 25 is etched. An opening was formed that exposed a portion of the pair of electrodes 21 and 22.

[0405] Next, a planarization film was formed on the nitride insulating film 25 (not shown). Here, the composition was After coating the nitride insulating film 25, exposure and development are performed to expose a portion of the pair of electrodes. A planarized film with openings was formed. The planarized film was made of acrylic resin with a thickness of 1.5 μm. Fat was formed. After this, heat treatment was performed. This heat treatment was carried out at a temperature of 250°C, and nitrate It lasted an hour and had a natural, unpretentious atmosphere.

[0406] Next, a conductive film was formed (not shown) that connected to a portion of the pair of electrodes. Here, spa ITO containing silicon oxide with a thickness of 100 nm was formed by the tarring method. After this, nitrogen The sample was heated in a plain atmosphere at 250°C for 1 hour.

[0407] Sample 1, which has a transistor, was fabricated through the above process.

[0408] Furthermore, an oxide film 19 containing In or Ga is formed in the transistor of sample 1. A sample with a transistor that was not present was prepared as sample 2. Furthermore, a pair of electrodes 21 and 22 were used. After formation, the oxide semiconductor film 18 was treated with an aqueous phosphoric acid solution prepared by diluting 85% phosphoric acid 100 times. The surface was cleaned.

[0409] Next, the Vg-Id characteristics were measured as the initial characteristics of the transistors contained in Sample 1 and Sample 2. Determined. Here, the substrate temperature is set to 25°C, and the potential difference between the source and drain (hereinafter referred to as drain) is set to 25°C. This is called the gate voltage. The gate voltage is 1V or 10V, and the potential difference between the source and gate electrode (hereinafter referred to as gate voltage) is 1V or 10V. This is called the source voltage. When the voltage is varied from -20V to +15V, the current flowing between the source and drain is called the source voltage. The change characteristics of the drain current (hereinafter referred to as drain current), i.e., the Vg-Id characteristics, are measured. Ta.

[0410] Figures 17(A) and 17(B) show the Vg-Id of the transistors contained in each sample. The characteristics are shown. In Figure 17, the horizontal axis represents the gate voltage Vg, and the vertical axis represents the drain current Id. Furthermore, the solid lines represent the Vg-Id characteristics when the drain voltage Vd is 1V and 10V, respectively. The dashed line represents the field effect mobility with respect to the gate voltage when the drain voltage Vd is 10V. Note that the field-effect mobility values ​​are the results obtained in the saturation region for each sample.

[0411] Each transistor has a channel length (L) of 6 μm and a channel width (W) of 50 μm. Yes. In addition, 20 transistors with the same structure were fabricated on the substrate for each sample.

[0412] Figure 17(B) shows that in the Vg-Id characteristics of the transistor included in sample 2, the drain The gate voltage at which the on-current begins to flow when the on-voltage Vd is 1V (also called the rise gate voltage) (Vg). The rising gate voltage of the 10V on-current is different. Also, the sample The variation in Vg-Id characteristics between each transistor in 2 is also large. On the other hand, Figure 17(A ) From this, the Vg-Id characteristics of the transistor included in sample 1 are as follows: drain voltage Vd is 1V, The rising gate voltage (Vg) for the 10V on-current is approximately the same. And, sample 1 contains The variation in Vg-Id characteristics between each transistor is small. The conductive film 18 and the oxide insulating film 24 are not in direct contact with each other. Specifically, the oxide insulating film 24 is not in direct contact with each other. By providing an oxide film 19 containing In or Ga between the conductive film 18 and the oxide insulating film 24 This shows that the initial characteristics of the transistor are improved.

[0413] Next, BT stress tests and photo-BT stress tests were performed on sample 1 and sample 2. For the BT stress test, the substrate temperature was set to 80°C and the electric field strength applied to the gate insulating film was set to 0. A BT circuit is configured to apply a predetermined voltage to the gate electrode, with a voltage of 0.66 MV / cm and an application time of 2000 seconds. A stress test was conducted. The BT stress test was performed in an atmospheric environment with a dew point temperature of 12°C. Ta.

[0414] Furthermore, using the same conditions as the BT stress test described above, 3000 lux of white LED light was applied to the BT stress test. A photo-BT stress test was performed by applying a predetermined voltage to the gate electrode while irradiating the radiator. The photo-BT stress test was conducted in a dry air atmosphere with a dew point temperature of -30°C.

[0415] Here, we will explain the measurement method for the BT stress test. First, as described above, The initial characteristics of the Vg-Id properties of the inverter were measured.

[0416] Next, after raising the substrate temperature to 80°C, the potentials of the transistor's source and drain were measured. We set the voltage to 0V. Next, the electric field strength applied to the gate insulating film becomes 0.66 MV / cm. A voltage was applied to the gate electrode and held for 2000 seconds.

[0417] In addition, in the negative BT stress test (Dark-GBT), -30V is applied to the gate electrode. The following was applied: In addition, in the Plus BT stress test (Dark + GBT), the gate electrode was 30V was applied. Furthermore, in the photo-GBT (Photo-GBT) stress test, While irradiating with 3000 lux of white LED light, -30V was applied to the gate electrode. In the Plus BT stress test (Photo + GBT), 3000 lux of white LED light is used. While irradiating, 30V was applied to the gate electrode.

[0418] Next, with voltage still applied to the gate electrode, source, and drain, raise the substrate temperature to 25°C. The voltage was lowered. After the substrate temperature reached 25°C, voltage was applied to the gate electrode, source, and drain. It has been terminated.

[0419] Furthermore, the threshold voltage and BT strike of the initial characteristics of the transistors included in Sample 1 and Sample 2 Figure 18 shows the difference in threshold voltage after the test (i.e., the variation in threshold voltage (ΔVth)). As shown in Figure 18, the positive BT stress test (Dark +GBT) and the negative BT test are shown. Stress test (Dark-GBT), Light-plus-BT stress test (Photo-GBT) T) Photo-GBT (Photo-BT) Threshold voltages This shows the variation ΔVth.

[0420] In this specification, the threshold voltage (Vth) is defined as the gate voltage (Vg[V]) in parallel. The square root of the axis and drain current (Id 1 / 2 [A]) is plotted on the vertical axis (see diagram) In (zu), the maximum slope is Id 1 / 2 When the tangent line is extrapolated, the intersection of the tangent line and the Vg axis. It is defined by the gate voltage at a point.

[0421] Furthermore, from Figure 18, the absolute value of the threshold voltage fluctuation of the transistor included in sample 1 is Compared to the absolute value of the threshold voltage fluctuation (ΔVth) of the transistor contained in sample 2 It can be seen that it is decreasing. In particular, the Plus BT stress test (Dark + GBT) The threshold voltage fluctuation (ΔVth) has decreased significantly. From this, it can be seen that oxide semiconductors An oxide film 19 containing In or Ga is provided between the body film 18 and the oxide insulating film 24. This shows that the reliability of the transistor improves.

[0422] Based on the above, an acid containing In or Ga is placed between the oxide semiconductor film 18 and the oxide insulating film 24. By providing the oxide film 19, the electrical characteristics of the transistor can be improved. This allows for improved initial characteristics while also improving reliability. In addition, In or The oxide film 19 containing Ga is an oxide insulating film 24 in the oxide semiconductor film 18 which is a channel region. It can be said that this suppresses the inclusion of elements contained in (for example, nitrogen). The oxide film 19 containing In or Ga is formed by a high-power-density plasma CVD method. When forming the insulating film 24, the oxide semiconductor film 18, which is the channel region, suffers plasma damage. It can be said that this inhibits receiving. [Examples]

[0423] In this example, the oxide semiconductor film of the transistor included in Sample 1 and Sample 2 of Example 1 The amount of oxygen deficiency contained in 18 will be explained. In this example, sample 1 of Example 1 and the A sample with the same structure as the transistor stacked structure contained in material 2 was prepared, and an oxide semiconductor film 18 ESR (electron spin resonance) analysis was performed to evaluate the amount of oxygen deficiency contained in the sample.

[0424] First, let me describe the sample that was measured. Sample 3 consists of an oxide semiconductor film 18 on a quartz base. An oxide film 19 containing In or Ga is formed on the oxide semiconductor film 18 in a 20 nm shape. A 400 nm oxide insulating film 24 was formed on an oxide film 19 containing In or Ga. .

[0425] The oxide semiconductor film 18 of sample 3 and the oxide film 19 containing In or Ga, and oxide The insulating film 24 was formed under the same conditions as sample 1 in Example 1.

[0426] Sample 4 has a 35 nm oxide semiconductor film 18 formed on it, and an oxide insulating film on the oxide semiconductor film 18. A film 24 was formed at a thickness of 400 nm.

[0427] The oxide semiconductor film 18 and oxide insulating film 24 of sample 4 were prepared under the same conditions as sample 2 of Example 1. It was formed by [this method].

[0428] Next, ESR analysis was performed on samples 3 and 4. ESR measurement was performed at a predetermined temperature. From the magnetic field value (H0) at which microwave absorption occurs, the g value can be calculated using the formula g = hν / βH0. The following parameters are obtained. Note that ν is the microwave frequency, and h is Planck's constant. Yes, β is the Bohr magneton, and both are constants. In ESR method analysis, microwave The power (9.06 GHz) was set to 20 mW, and the direction of the magnetic field was parallel to the film surfaces of sample 3 and sample 4. The measurement temperature was set to room temperature.

[0429] Figure 19 shows the ESR analysis results. In Figure 19, the horizontal axis indicates the sample name, and the vertical axis indicates the oxide. This originates from the oxygen vacancy density contained in the semiconductor film 18 and the oxide film 19 containing In or Ga. This indicates a spin density of g = 1.93.

[0430] As shown in Figure 19, comparing sample 3 and sample 4, sample 3 has a lower spin density. Furthermore, an oxide film containing In or Ga is placed between the oxide semiconductor film 18 and the oxide insulating film 24. By providing 19, oxygen depletion occurs due to plasma damage during the formation of the oxide insulating film 24. It can be said that damage can be suppressed from being generated in the oxide semiconductor film 18.

[0431] Also, although not shown in the diagram, in sample 3, an oxide film 19 containing In or Ga was added to 50 By setting nm, the spin density became below the detection limit. In this embodiment, spin The detection limit for density is 1.0e+17 spins / cm². 3 Therefore, to reduce oxygen deficiency From this perspective, by providing a 50nm oxide film 19 containing In or Ga, oxide isolation is achieved. Plasma damage during the formation of the border film 24 can be significantly reduced.

[0432] Therefore, by providing an oxide film 19 containing In or Ga, a plastic with a high power density can be obtained. Even when forming the oxide insulating film 24 by the Zuma CVD method, transistors with good electrical characteristics are produced, and A semiconductor device having the transistor can be fabricated. [Examples]

[0433] In this embodiment, the localized energy levels of the multilayer film included in a transistor according to one aspect of the present invention are as follows: This section will explain the results of evaluating the multilayer film using CPM measurement.

[0434] First, let me explain the samples that underwent CPM measurement.

[0435] A first oxide film containing In or Ga with a thickness of 30 nm is formed on a glass substrate, and the first A 100 nm thick oxide semiconductor film is formed on an oxide film containing In or Ga, and oxidation By forming a second oxide film containing In or Ga with a thickness of 30 nm on a monosemiconductor film, A multilayer film was formed.

[0436] In this embodiment, a first oxide film containing In or Ga, and In or Ga The second oxide film contains In-Ga-Zn oxide (In:Ga:Zn=1:3:2[atoms]). This oxide film was deposited by sputtering using a target with a numerical ratio of [number]. Oh, we'll use 30 sccm of argon gas and 15 sccm of oxygen gas as film-forming gases, and the pressure will be... The material was formed by setting the pressure to 0.4 Pa, the substrate temperature to 200°C, and applying a DC power of 0.5 kW. Ta.

[0437] Furthermore, oxide semiconductor films are In-Ga-Zn oxide (In:Ga:Zn=1:1:1[ An oxide semiconductor film deposited by sputtering using a target with an atomic ratio of [] The following is the result: 30 sccm of argon gas and 15 sccm of oxygen gas were used as the film-forming gases. The pressure is set to 0.4 Pa, the substrate temperature to 200°C, and a DC power of 0.5 kW is applied. It was formed by and

[0438] The sample prepared in the manner described above will be referred to as Sample 5.

[0439] Next, CPM measurement was performed on sample 5. Specifically, the multilayer film of sample 5 was placed in contact with the film. The terminals are set so that the photocurrent value remains constant when a voltage is applied between the first electrode and the second electrode. The amount of light irradiated onto the sample surface is adjusted, and the absorption coefficient is calculated from the irradiated light amount within the desired wavelength range. I derived it.

[0440] Figure 20 shows the absorption coefficient measured by the spectrophotometer (thick dotted line) and the absorption coefficient derived from CPM measurement. The absorption coefficient (thick solid line) is the energy gap of each layer contained in the multilayer film that is greater than or equal to the energy gap of each layer. The fitting results within the range are shown. The absorption obtained by CPM measurement is also shown. In the coefficient curve, the slope of the Arbach tail (thin dotted line) is the Arbach energy. The value was 78.7 meV. In the energy range enclosed by the dashed circle in Figure 20(A), CP Subtracting the absorption coefficient of the Arbach tail (thin dotted line) from the absorption coefficient derived from the M measurement, The integral value of the absorption coefficient in that energy range was derived (see Figure 20(B)). As a result, the absorption coefficient of this sample is 2.02 × 10⁻⁶. -4 cm -1 It was found that...

[0441] Based on the above, it can be concluded that the localized energy levels in the multilayer film of sample 5 are caused by impurities and defects. Therefore, it was found that the multilayer film has an extremely low energy level density due to impurities and defects. It can be seen that transistors using multilayer films have stable electrical characteristics. [Examples]

[0442] In this embodiment, the silicon concentration of the multilayer film included in a transistor according to one aspect of the present invention is This section will explain the results of evaluating the multilayer film using SIMS measurement. .

[0443] First, let me explain the samples that were measured using SIMS.

[0444] A 10 nm thick oxide film 81 containing In or Ga is formed on a silicon wafer Si. A 10 nm thick oxide semiconductor film 82 is formed on an oxide film 81 containing In or Ga. A 10 nm thick oxide film 83 containing In or Ga is formed on the oxide semiconductor film 82. A multilayer film was formed by doing this.

[0445] In this embodiment, the oxide film 81 containing In or Ga is an In-Ga-Zn oxide. Using a target with the atomic ratio (In:Ga:Zn=1:3:2), sputtering This oxide film was formed by the deposition method. Argon gas was used as the deposition gas at a rate of 30 sccm. Using 15 sccm of oxygen gas, with a pressure of 0.4 Pa, and a substrate temperature of 200°C, DC It was formed by applying 0.5 kW of power.

[0446] Furthermore, the oxide semiconductor film 82 is an In-Ga-Zn oxide (In:Ga:Zn=1:1: A target with an atomic ratio of 1 was used to deposit an oxide semiconductor film by sputtering. It is a body membrane. The film-forming gases used were 30 sccm of argon gas and 15 sccc of oxygen gas. Using m, the pressure is set to 0.4 Pa, the substrate temperature is set to 300°C, and a DC power of 0.5 kW is applied. It was formed by doing so.

[0447] Furthermore, the oxide film 83 containing In or Ga is an In-Ga-Zn oxide (In:Ga Using a target with Zn = 1:3:2 (atomic ratio), the shape is formed by sputtering. This is the oxide film that was formed. Argon gas was used as the deposition gas at 30 sccm, and oxygen gas was used as the deposition gas. Using 15 sccm, with a pressure of 0.4 Pa, a substrate temperature of 200°C, and a DC power of 0.5 It was formed by applying kW.

[0448] After forming the multilayer film, the sample was subjected to no heat treatment, and the sample was subjected to heat treatment at 450°C for 2 hours. Samples were prepared. The sample that was not subjected to heat treatment was designated as Sample 6, and the sample that underwent heat treatment was tested. The fee was set at 7.

[0449] For samples 6 and 7, time-of-flight secondary ion mass spectrometry (ToF-SIMS: Tim e-of-flight secondary ion mass spectrome (try) was performed, and the Si concentration in the depth direction [atoms / cm 3 [The value was measured.] Figure 21(A) The Si concentration calculated from the secondary ion intensity of SiO3 in the depth direction of the multilayer film in sample 6. [atoms / cm 3 Figure 21(B) shows the Si in the depth direction of the multilayer film in sample 7. Si concentration calculated from the secondary ion strength of O3 [atoms / cm³] 3 This indicates ].

[0450] Figures 21(A) and 21(B) show a silicon wafer and an oxide containing In or Ga. At the interface with film 81, and on the upper surface of oxide film 83 containing In or Ga, the Si concentration is It was found that the Si concentration of the oxide semiconductor film 82 was found to be high. The lower limit is 1 × 10 18 atoms / cm 3 It was found to be to that extent. Alternatively, an oxide film 81 containing Ga and an oxide film 83 containing In or Ga are provided. As a result, silicon caused by silicon wafers or surface contamination is transferred to the oxide semiconductor film 82. This can be considered to be because it will no longer have any impact.

[0451] Furthermore, the results shown in Figures 21(A) and 21(B) indicate that the expansion of silicon by heat treatment Dispersion is unlikely to occur, indicating that mixing during film formation is the primary cause.

[0452] Based on the above, by using a multilayer film as shown in this embodiment, a stable electrical characteristic can be obtained. It is possible to manufacture a lunger.

[0453] (Reference example 1) Here, as the oxide insulating film 24 of the transistor described in the above example, stoichiometric Oxidizing nitriding contains more oxygen than is required to make up the composition, and some of the oxygen is removed upon heating. Let me explain the recon membrane.

[0454] It contains more oxygen than satisfactorily required for its composition, and some of the oxygen is removed upon heating. To evaluate this, TDS measurements were performed to determine the amount of oxygen degassed.

[0455] First, let me explain the structure of the sample that was measured. Reference sample 1 is a silicon wafer. A silicon oxide-nitride film with a thickness of 400 nm was formed under the following conditions: flow rate 160 The raw material gases used were silane at sccm and nitrous oxide at a flow rate of 4000 sccm, and the pressure in the processing chamber was With a force of 200 Pa and a substrate temperature of 220°C, 1500 W of high-frequency power is supplied to the parallel plate electrodes. Formed by plasma CVD using supplied plasma.

[0456] Reference sample 2 is a reference sample with silicon oxynitride having a thickness of 400 nm formed on a silicon wafer under the following conditions. The conditions are those of reference sample 1, except that the flow rate of silane is changed to 200 sccm, and the other conditions are the same as those of reference sample 1.

[0457] The results of TDS measurements of reference sample 1 and reference sample 2 are shown in FIGS. 22(A) and 22(B). In FIGS. 22(A) and 22(B), for both reference sample 1 and reference sample 2, a peak at M / z = 32 corresponding to the mass number of oxygen was observed. Therefore, it can be said that for the silicon oxynitride films of reference sample 1 and reference sample 2, part of the oxygen contained in the film desorbs upon heating.

[0458] The amount of oxygen desorbed upon heating can be evaluated using the value converted to oxygen molecules (per unit area ). For reference sample 1, it was 3.2×10 14 molecules / cm 2 . For reference sample 2, it was 1.9×10 14 molecules / cm 2 . The amount of oxygen desorbed from reference sample 1, when converted to oxygen atoms (per unit volume), was 1.6×10 atoms / cm 19 , and the amount of oxygen desorbed from reference sample 3 2, when converted to oxygen atoms (per unit volume), was 9.5×10 18 <00,00091>atoms / cm 3 .

[0459] From the above, after providing the silicon oxynitride films formed under the conditions of reference sample 1 and reference sample 2 in a region overlapping with an oxide semiconductor film and performing a heat treatment, oxygen vacancies in the oxide semiconductor film can be repaired, and a transistor with good electrical characteristics can be fabricated.

[0460] (Reference example 2) This section explains the defect density of the oxide insulating film used in Reference Sample 1 and Reference Sample 2 of Reference Example 1. Here, the defect amount of the oxide insulating film is analyzed using ESR (electron spin resonance) method. Let's explain using the results.

[0461] First, let's describe the structure of the sample that was evaluated.

[0462] Reference samples 3 and 4 are 100 nm thick oxide semiconductors formed on a quartz substrate. It comprises a film and a 400 nm thick oxide insulating film formed on the oxide semiconductor film.

[0463] The oxide semiconductor films of Reference Sample 3 and Reference Sample 4 were subjected to sputtering targeting in In:G A target with a:Zn=1:1:1 (atomic ratio) and argon at a flow rate of 50 sccm and Supplied into the processing chamber of the sputtering apparatus as oxygen sputtering gas at a flow rate of 50 sccm. The pressure inside the processing chamber was controlled to 0.6 Pa, and 5 kW of DC power was supplied to form the material. The substrate temperature used when forming the oxide semiconductor film was set to 170°C.

[0464] Next, after heat treatment at 450°C for 1 hour in a nitrogen atmosphere, in a nitrogen and oxygen atmosphere... The material was then subjected to a heat treatment at 450°C for 1 hour.

[0465] Next, an oxide insulating film was formed on the oxide semiconductor film. This oxide insulating film was used in reference sample 1. A sample formed using the same conditions as the silicon oxidizride film is designated as reference sample 3.

[0466] The oxide insulating film formed on the oxide semiconductor film is the same as the silicon oxide nitride film of reference sample 2. The sample formed using the specified conditions will be designated as Reference Sample 4.

[0467] Next, ESR method analysis was performed on reference sample 3 and reference sample 4. Here, the ESR method analysis was performed under the following conditions. The measurement temperature was set to -170 °C, the high-frequency power (microwave power) at 9.1 GHz was set to 1 mW, and the direction of the magnetic field was parallel to the film surface of the prepared sample. The spin density of the signal appearing at g (g value) = 2.001 derived from the dangling bonds of silicon is shown in FIG. 23.

[0468] It can be seen that the spin density is lower in reference sample 4 than in reference sample 3. That is, under the film formation conditions of the oxide insulating film, by setting the silane flow rate to 200 sccm and the dinitrogen monoxide flow rate to 4000 sccm, a silicon oxynitride film with few defects, typically, by ESR method analysis, the spin density of the signal appearing at g = 2.001 is 6×10 spins / c

[0469] m less than, preferably 3×10 spins / cm or less, preferably 1.5×10 17 spins / c m 3 less than, preferably 3×10 17 spins / cm 3 or less, preferably 1.5×10 1 7 spins / cm 3 or less of a silicon oxynitride film can be formed.

[0470] From the above, by forming an oxide insulating film under the above conditions and increasing the flow rate of silane, the defect density in the formed oxide insulating film can be reduced.

[0471] (Reference Example 3) Here, the quantification of defect levels generated within the energy gap of the oxide semiconductor film will be described. In this reference example, HAXPES, which is a photoelectron spectroscopy using high-intensity hard X-rays, is used. By Hard X-ray Photoelectron Spectroscopy I will now explain the measurement results.

[0472] This section describes the samples that underwent HAXPES measurement.

[0473] A silicon oxide nitride film with a thickness of 100 nm is formed on a silicon wafer, and the silicon oxide nitride film A 100 nm thick oxide semiconductor film is formed on the condensate film, and a 5 nm thick oxide semiconductor film is formed on the oxide semiconductor film. A sample (sample 8) was prepared with a silicon oxide film of thickness m.

[0474] In sample 8, the silicon oxidizride film was treated with silane at a flow rate of 1 sccm and silane at a flow rate of 800 sccm. Using nitrous oxide (C / M) as the raw material gas, the pressure in the processing chamber was set to 40 Pa, and the substrate temperature was set to 400°C. By using a plasma CVD method in which 150W of high-frequency power (60MHz) is supplied to parallel plate electrodes... It was formed.

[0475] In sample 8, the oxide semiconductor film is an In-Ga-Zn oxide (In:Ga:Zn=1 Using a target with an atomic ratio of 1:1, argon gas is used as the film deposition gas at 30 Using sccm of oxygen gas at a pressure of 0.4 Pa and a substrate temperature of 300°C, The material was formed using a sputtering method with a DC power of 0.5 kW applied.

[0476] In sample 8, the silicon oxide film was formed using a silicon-containing target and a film formation gas. Then, use 50 sccm of oxygen gas, set the pressure to 0.4 Pa, and set the substrate temperature to 100°C. The silicon oxide film was formed by sputtering with a C power of 1.5 kW applied. It contains more oxygen than satisfactorily required for its composition, and some of the oxygen is removed upon heating. It is a silicon oxide film.

[0477] Furthermore, there is a sample (Sample 9) in which an oxide semiconductor film with a thickness of 100 nm was formed on a silicon wafer. We fabricated it. In addition, we formed a 100 nm thick silicon oxide-nitride film on a silicon wafer. A sample (sample 10) in which an oxide semiconductor film with a thickness of 100 nm was formed on the silicon oxynitride film. ) was created.

[0478] In sample 9 and sample 10, the oxide semiconductor film and the silicon oxidiznitride film were the same as in sample 8. The following methods were used to prepare the samples. In addition, in samples 8 to 10, an oxide semiconductor film was prepared for each sample. After formation, the sample was heat-treated at 450°C under a nitrogen and oxygen atmosphere. Furthermore, regarding sample 8... Furthermore, after forming a silicon oxide film, the material is subjected to a heat treatment at 300°C in an oxygen atmosphere. Ta.

[0479] Next, HAXPES measurements were performed on samples 8 through 10. HAXPES measurements are performed as follows: This is a photoelectron spectroscopy technique that uses hard X-rays (approximately 6-8 keV) as excitation X-rays.

[0480] Figure 35 shows the valence band spectra obtained by HAXPES measurements for each sample. As shown in Figure 35, the horizontal axis represents the binding energy. The vertical axis shows spectral intensity. The horizontal axis at 0 eV represents acidity. This can be considered the conduction band of an oxide semiconductor film, and the position where the value on the horizontal axis is around 3 eV corresponds to an oxide semiconductor. This can be considered as the valence band of the film. That is, the position from 0 eV to around 3 eV on the horizontal axis. This can be considered as the energy gap of the oxide semiconductor film.

[0481] Furthermore, the intensity of the valence band spectrum is generated within the energy gap of the oxide semiconductor film. This is due to the presence of defect levels. For example, if defect levels are present, the intensity of the valence band spectrum will be high. It will get worse.

[0482] Furthermore, considering the principle of HAXPES measurement, the signals detected by HAXPES measurement are, This can be considered to reflect defects near the surface of the sample. (Sample 9 and Sample 1 in Figure 35) From the result of 0, the defect levels generated within the energy gap of the oxide semiconductor film are oxide It can be considered that these correspond to defects present near the surface of the semiconductor film.

[0483] In Figure 35, in the range of 0eV to 3eV on the horizontal axis, the spectrum of sample 8 is similar to that of sample 9 and sample 8. It was confirmed that the intensity was lower than that of spectrum 10. Therefore, as with sample 8, heating A silicon oxide film, which allows for the partial desorption of oxygen, is placed in contact with an oxide semiconductor film, and then heat-treated. By doing so, the vicinity of the surface of the oxide semiconductor film (the interface between the oxide semiconductor film and the silicon oxide film) It was confirmed that defects in the vicinity can be repaired. Furthermore, the above defect level is an oxide semi-electrode. It can be considered that this corresponds to the oxygen vacancies contained in the conductive film. In other words, heating causes oxygen... A silicon oxide film, from which a portion of the silicon detaches, is placed in contact with the oxide semiconductor film and then subjected to heat treatment. Therefore, it can be said that oxygen vacancies near the surface of oxide semiconductor films can be repaired.

[0484] Here, a silicon oxide film is formed on an oxide semiconductor film by sputtering. However, the silicon oxide film contains more oxygen than satisfies the stoichiometric composition, and If it is a silicon oxide film in which some of the oxygen is desorbed by heat, then the acid formed by plasma CVD is It was considered that even silicon oxide films can repair defects present near the surface of oxide semiconductor films. Therefore, a silicon oxide film formed by the method described herein, such as Embodiment 1, can be used. If present, it can be considered that defects present near the surface of oxide semiconductor films can be repaired.

[0485] (Reference example 4) Here, we find the energy gap between the source and drain of a transistor using an oxide semiconductor. Let me explain about the wall.

[0486] As the oxide semiconductor film that forms the channel region, an intrinsic or substantially intrinsic oxide semiconductor film is used. When used, in a transistor having the oxide semiconductor film, the energy of the oxide semiconductor film A barrier of about half the energy gap between the pair of electrodes, which are the source and drain electrodes, and the acid It is thought to be formed between the oxide semiconductor film. However, in reality, the oxide semiconductor film The transistor used has a Vg-Id characteristic where the gate voltage is around 0V and the drain voltage is around 0V. The fact that the flow begins suggests that there is a problem with this way of thinking.

[0487] Therefore, as shown in Figure 36(A), the gate insulating film GI and the oxidation on the gate insulating film GI A monocrystalline semiconductor film OS, and a source electrode S and a drain electrode D provided on the oxide semiconductor film OS. Assuming a transistor having the structure and the channel length (L) of the transistor is changed The band structure in the dashed-dotted line H1-H2 was derived by calculation. (See Figure 36(A)) In this case, the region of the oxide semiconductor film OS in contact with the source electrode S and the drain electrode D is n-type. A low-resistance region n is provided. In other words, the oxide semiconductor film OS has a low-resistance region n, This includes an intrinsic or substantially intrinsic region i. In this calculation, oxide semiconductor The calculations were performed assuming a film OS thickness of 35 nm and a gate insulating film GI thickness of 400 nm.

[0488] By solving Poisson's equation, we can estimate the band's curvature, which is: Debye's shielding length λ D It was found that the length is characterized by [this]. Note that the device's shielding Length λ D It can be expressed by the following equation, where k B This is the Boltzmann constant.

[0489]

number

[0490] In the above equation, the intrinsic carrier density n of the oxide semiconductor film OS i 6.6 × 10 -9 cm - 3 Assuming the dielectric constant ε of the oxide semiconductor film OS is 15 and the temperature is 300K, Shielding length λ D 5.7 × 10 10 It was found to be a very large value, μm. Therefore The channel length is the shielding length λ of the device. D 1.14 × 10, which is twice the amount of 1.14 × 10 11 Larger than μm Therefore, the energy barrier between the low-resistance region n and the intrinsic or substantially intrinsic region i is the oxide semi-semi It can be seen that this is half the energy gap of the conductive film OS.

[0491] Figure 37 shows channel lengths of 0.03 μm, 0.3 μm, 1 μm, 10 μm, 100 μm, and 1 x 10 12 The calculated band structure for μm is shown. However, the source electrode and drain are not included. The potential of the in electrode is fixed to GND (0V). In Figure 37, n represents the low-resistance region. This indicates that i represents an intrinsic or substantially intrinsic region sandwiched between low-resistance regions, and the dashed line represents an acid This shows the Fermi energy of an oxide semiconductor film, with the dashed line indicating the mid-gap of an oxide semiconductor film. vinegar.

[0492] As shown in Figure 37, the channel length is sufficiently large at 1 × 10 12 In the case of μm, the low resistance region and intrinsic The difference in electron energy in the virtually intrinsic region is the energy gap of the oxide semiconductor film. It was found that it was halved. However, as the channel length was reduced, the low resistance region gradually decreased. The difference in electron energy between the region and the intrinsic or substantially intrinsic region becomes smaller, and the channel length is 1 It was found that there is almost no energy barrier below μm. The energy is fixed by a pair of electrodes, which are the source electrode and the drain electrode.

[0493] As mentioned above, when the channel length is small, there is a low resistance region and intrinsic or substantially intrinsic It can be seen that the energy barrier with respect to the region becomes sufficiently small.

[0494] Here, when the channel length is small, the low-resistance region and the intrinsic or substantially intrinsic region We will consider why the energy barrier becomes sufficiently small.

[0495] Figure 38 shows a schematic diagram of an oxide semiconductor film and the band structure in the oxide semiconductor film. Let me explain. Figure 38(A) shows the intrinsic or substantially intrinsic region 601 and the low-resistance region 6 The lower end of the conduction band at the center of the channel length of an oxide semiconductor film 600 having 02 and 603 E c_0 is shown. Also, the channel length of the oxide semiconductor film 600 is denoted as L_0. Figure 38(A) In this case, L_0 > 2λ D That is the case.

[0496] Figure 38(B) shows an oxide semiconductor film with a smaller channel length than Figure 38(A), and its... The end structure is shown. Figure 38(B) shows the intrinsic or substantially intrinsic region 611 and the low-resistance region. The lower end of the conduction band at the center of the channel length of the oxide semiconductor film 610 having 612 and 613 Ec_1 is shown. Also, the channel length of the oxide semiconductor film 610 is denoted as L_1. Figure 38(B ) in channel length L_1 <L_0であり、L_1<2λ D That is the case. .

[0497] Figure 38(C) shows that the oxide semiconductor film has more channels than the oxide semiconductor film shown in Figures 38(A) and 38(B). A short oxide semiconductor film and its band structure are shown. Figure 38(C) shows intrinsic or actual Oxide semiconductor film 620 having a qualitatively intrinsic region 621 and low-resistance regions 622, 623 The lower end Ec_2 of the conduction band at the center of the channel length is shown. Also, the oxide semiconductor film 620 Let the channel length be L_2. <L_1であり、L_2<<2λ D That is .

[0498] In Figure 38(A), the energy difference between the Fermi level Ef and the lower end of the conduction band Ec_0 is E The energy barrier ΔH_0 is shown, and in Figure 38(B), the Fermi level Ef and the lower end of the conduction band are shown. The energy difference Ec_1 is denoted as the energy barrier ΔH_1, and in Figure 38(C), The energy difference between the Lumi level Ef and the lower end of the conduction band Ec_2 is denoted as the energy barrier ΔH_2.

[0499] In an oxide semiconductor film, the region in contact with a pair of electrodes becomes a low-resistance region. Therefore, The closer the junction between the conductive or substantially intrinsic region and the low-resistance region is, the more energy is present at the lower end of the conduction band. The gy decreases and the curve becomes distorted. As shown in Figure 38(A), when the channel length L_0 is sufficiently large... In this case, the energy barrier ΔH_0 corresponds to Eg(band gap) / 2.

[0500] On the other hand, as shown in Figures 38(B) and 38(C), when the channel length decreases, conduction Because the curved portions of the lower ends Ec_1 and Ec_2 of the band overlap, the energy barrier ΔH_1 Therefore, ΔH_2 is thought to be lower than Eg / 2. In this way, the channel length becomes smaller. This results in a decrease in the lower end of the conduction band in the intrinsic or substantially intrinsic region. In this specification, the CBL effect (Conduction Band Lowering E) is used to describe this effect. (ffect)

[0501] Next, in the structure shown in Figure 36(A), the gate electrode GE is provided below the gate insulating film GI. Assuming a bottom-gate transistor, the channel length (L) of the transistor is The band structure in the dashed-dotted line H1-H2 after the change was calculated. The structure of the transistor used is shown in Figure 36(B). Note that in this calculation, oxide semiconductors were used. The calculations were performed assuming a conductive film OS has a thickness of 35 nm and a gate insulating film GI has a thickness of 400 nm.

[0502] Figure 39 shows the transistor with the said structure, with channel lengths of 1 μm, 10 μm, and 50 μm. m, 100 μm, 1 × 10 5 μm and 1 × 10⁻⁶ 12 Calculation results of the band structure at μm This is shown. However, the potentials of the source electrode, drain electrode, and gate electrode are fixed at GND (0V). It is defined. In Figure 39, n indicates the low-resistance region, and i is in the oxide semiconductor film. The dashed line indicates an intrinsic or substantially intrinsic region sandwiched between low-resistance regions, and the dotted line represents an oxide semiconductor. The Fermi energy of the film is shown, and the dashed line indicates the mid-gap of the oxide semiconductor film.

[0503] The band structure shown in Figure 39 is similar to the calculation performed for the structure shown in Figure 36(A). This is the result obtained through calculation. However, if a gate electrode is provided as in the structure shown in Figure 36(B) In that case, even if the channel length (L) is greater than 1 μm, the low resistance region and the intrinsic or actual The energy barrier to the qualitatively intrinsic region is approximately constant, independent of the channel length (L). It can be seen that this is the value.

[0504] Figure 40 shows the relationship between the channel length (L length) and the structure of Figure 36(A) and Figure 36(B). This indicates the height of the energy barrier.

[0505] From Figure 40, in the structure of Figure 36(A) without a gate electrode, the channel length is large As time progresses, the height of the energy barrier increases monotonically, and the channel length becomes 1 × 10⁻⁶. 12 μm Sometimes, it is found that the energy gap of the oxide semiconductor film becomes half (1.6 eV). On the other hand, in the structure shown in Figure 36(B) with a gate electrode, the channel length is greater than 1 μm. Even in this case, it can be seen that the height of the energy barrier does not depend on the channel length.

[0506] From the above, transistors using intrinsic or substantially intrinsic oxide semiconductor films are CBL Due to the effect, the energy barrier is greater than half the energy gap of the oxide semiconductor film. As the voltage decreases, drain current flows from around 0V in the Vg-Id characteristic. It can be considered that this begins to occur. Also, transients larger than a certain channel length (1 μm) Since the energy barrier of the channel is a constant value regardless of the channel length, it is intrinsic or substantial. A transistor using an intrinsic oxide semiconductor film exhibits a gate voltage in its Vg-Id characteristics. It can be inferred that the drain current starts flowing from around 0V.

[0507] The multilayer film included in a transistor according to one aspect of the present invention is an intrinsic or substantially intrinsic oxide. Because it has a semiconductor film, the transistor having the multilayer film has a Vg-Id characteristic It can be inferred that drain current begins to flow when the power voltage is around 0V.

Claims

[Claim 1] The gate electrode on the substrate, The gate insulating film covering the gate electrode, A multilayer film overlapping the gate electrode via the gate insulating film, A transistor having a pair of electrodes in contact with the multilayer film, The gate insulating film, the multilayer film, and the oxide insulating film covering the pair of electrodes are provided, The multilayer film comprises an oxide semiconductor film and an oxide film containing In or Ga. The oxide insulating film is an oxide insulating film containing more oxygen than satisfies the stoichiometric composition. The transistor is a semiconductor device in which the threshold voltage does not fluctuate under bias temperature stress testing, or the fluctuation in the positive or negative direction is 1.0V or less.

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