Glass substrate, wiring board, and method for processing glass substrate

Abstract

The present invention provides a wiring board and a method for manufacturing a wiring board that can improve the adhesion of elements to the bottom surface of a recess. [Solution] The wiring board comprises a glass substrate 12 including a first surface 13, a second surface 14 located opposite the first surface, and at least one recess 20 located on the first surface, and a metal layer 50 located in the recess. The recess includes a side surface and a bottom surface. The metal layer includes at least a bottom metal layer located on the bottom surface of the recess. The wiring board may include an element located in the recess and overlapping the bottom metal layer in a plan view, and the element 40 may include an upper surface, a lower surface and a side surface, and a terminal 44 located on the upper surface.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a glass substrate, a wiring substrate, and a method for processing a glass substrate.

Background Art

[0002] Packaging technologies that densely mount a plurality of semiconductor elements with different functions, such as CPUs and memories, on a single substrate have attracted attention. A substrate that electrically connects a plurality of semiconductor elements is also referred to as an interposer. For example, Patent Document 1 discloses a semiconductor package including an interposer including through electrodes and semiconductor elements mounted on the interposer.

[0003] In Patent Document 1, the semiconductor elements are arranged in recesses formed on the surface of the substrate. In Patent Document 1, it is proposed that the surface roughness of the bottom surface of the recess is three times or less the surface roughness of the surface of the substrate. By reducing the surface roughness of the bottom surface of the recess, wiring can be appropriately formed on the bottom surface of the recess.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] When the surface roughness of the bottom surface of the recess is reduced, the adhesion of the element to the bottom surface of the recess decreases.

[0006] Embodiments of the present disclosure aim to provide a wiring substrate and a method for manufacturing the wiring substrate that can effectively solve such problems.

Means for Solving the Problems

[0007] Embodiments of the present disclosure relate to the following [1] to

[20] .

[0008] [1] A wiring board, A glass substrate comprising a first surface, a second surface located opposite the first surface, and at least one recess located on the first surface, The metal layer located in the recess comprises, The recess includes the side surface and the bottom surface, The wiring board comprises a metal layer, at least, a bottom metal layer located on the bottom surface of the recess.

[0009] [2] In the wiring board described in [1], the metal layer may contain titanium.

[0010] [3] The wiring board described in [1] or [2] may include an element located in the recess and overlapping the bottom metal layer in a plan view, the element may include an upper surface, a lower surface and a side surface and a terminal located on the upper surface.

[0011] [4] The wiring board described in [3] may include an adhesive layer located between the lower surface of the element and the bottom metal layer, and the adhesive layer may contain a resin material and a curing agent.

[0012] [5] The wiring board described in [1] or [2] may include an insulating layer that is in contact with the upper surface of the element.

[0013] In the wiring board described in [6] [5], the insulating layer may include portions that are in contact with the upper surface and the side surface of the element.

[0014] In the wiring board described in [7] [5] or [6], the insulating layer may include portions that are in contact with the upper surface of the element and the first surface of the glass substrate.

[0015] The wiring board described in [8] [3] or [4] may include at least one wiring layer located on the first surface, the wiring layer may include a conductive layer electrically connected to the terminals of the element.

[0016] In the wiring board described in [9] [8], the terminals of the element may include power terminals and signal terminals, the conductive layer may include a power layer electrically connected to the power terminals and a signal layer electrically connected to the signal terminals, and the metal layer may be electrically connected to the power layer.

[0017]

[10] The wiring board described in any one of [1] to [9] may have at least one through hole that penetrates the glass substrate from the first surface to the second surface.

[0018] The wiring board described in

[11]

[10] may include at least one through electrode located in the through hole.

[0019]

[12] [9] The wiring board described above may include at least one through hole penetrating the glass substrate from the first surface to the second surface, and at least one through electrode located in the through hole, the through electrode may include a power through electrode electrically connected to the power layer and a signal through electrode electrically connected to the signal layer.

[0020]

[13] In the wiring board described in

[12] , the dimensions of the through-hole in which the power supply through-electrode is located may be larger than the dimensions of the through-hole in which the signal through-electrode is located.

[0021] In the wiring board described in

[14] [4], the adhesive layer may include the side surface located inside the side surface of the element in a plan view.

[0022] In the wiring board described in

[15] [4], the adhesive layer may include an outer peripheral portion located outside the side surface of the element in a plan view, and the outer peripheral portion may include a portion located above the lower surface of the element.

[0023]

[16] In the wiring board according to any one of [1] to

[15] , the recess may have a depth of 30 μm or more and 150 μm or less.

[0024]

[17] The wiring board according to

[11] may include at least one wiring layer located on the second surface, and the wiring layer may include an insulating layer and a conductive layer electrically connected to the through electrode.

[0025]

[18] A method for manufacturing a wiring board, preparing a glass substrate including a first surface, a second surface located on the opposite side of the first surface, and at least one recess located on the first surface; forming a metal layer in the recess, the recess includes a side surface and a bottom surface, the metal layer includes at least a bottom surface metal layer located on the bottom surface of the recess, a method for manufacturing a wiring board.

[0026]

[19] The method for manufacturing a wiring board according to

[18] may include forming an adhesive layer on the bottom surface metal layer and arranging an element on the adhesive layer.

[0027]

[20] The method for manufacturing a wiring board according to

[18] or

[19] may include a first rewiring step of forming an insulating layer and a conductive layer on the first surface, and a second rewiring step of forming an insulating layer and a conductive layer on the second surface. [Advantages of the Invention]

[0028] According to an embodiment of the present disclosure, the adhesion of the element to the bottom surface of the recess can be enhanced. [Brief Description of the Drawings]

[0029] [Figure 1] It is a plan view showing a wiring board according to an embodiment. [Figure 2] It is a cross-sectional view taken along line II-II of the wiring board in FIG. 1. [Figure 3]This is a cross-sectional view showing an example of a recess, element, and metal layer. [Figure 4] This is a cross-sectional view showing an example of a processing step for processing a glass substrate. [Figure 5] This is a cross-sectional view showing an example of the process for forming a metal layer and through electrodes. [Figure 6] This is a cross-sectional view showing an example of the process for forming a metal layer. [Figure 7] This is a cross-sectional view showing an example of the process for forming a metal layer. [Figure 8] This is a cross-sectional view showing an example of the process for forming through electrodes. [Figure 9] This is a cross-sectional view showing an example of the process for forming through electrodes. [Figure 10] This is a cross-sectional view showing an example of the process for forming through electrodes. [Figure 11] This is a cross-sectional view showing an example of the polishing process. [Figure 12] This is a cross-sectional view showing an example of the process of mounting elements in a recessed area. [Figure 13] This is a cross-sectional view showing an example of the process of mounting elements in a recessed area. [Figure 14] This is a cross-sectional view showing an example of an adhesive layer formed on the bottom surface of a recess. [Figure 15A] This is a cross-sectional view showing an example of an adhesive layer, metal layer, and element located in a recess. [Figure 15B] This is a cross-sectional view showing an example of an adhesive layer, metal layer, and element located in a recess. [Figure 15C] This is a cross-sectional view showing an example of an adhesive layer, metal layer, and element located in a recess. [Figure 15D] This is a cross-sectional view showing an example of an adhesive layer, metal layer, and element located in a recess. [Figure 16] This is a cross-sectional view showing an example of the process for forming a redistribution layer. [Figure 17] This is a cross-sectional view showing an example of the process for forming a redistribution layer. [Figure 18] This is a cross-sectional view showing a modified example of a wiring board. [Figure 19] This is a cross-sectional view showing a modified example of a wiring board. [Figure 20] This is a cross-sectional view showing a modified example of a wiring board. [Figure 21] This is a cross-sectional view showing a modified example of a wiring board. [Figure 22] This is a cross-sectional view showing a modified example of a wiring board. [Figure 23] This is a cross-sectional view showing a modified example of a wiring board. [Figure 24] This is a cross-sectional view showing a modified example of a wiring board. [Figure 25] This figure shows an example of a product that incorporates a circuit board. [Modes for carrying out the invention]

[0030] In this specification, unless otherwise specified, terms meaning base materials such as "substrate," "base material," "board," "sheet," and "film" are not distinguished from each other solely on the basis of differences in name. For example, "substrate" is a concept that includes materials that may be called sheets or films.

[0031] In this specification, unless otherwise specified, the term "plane" refers to the plane of a plate-like member in question that coincides with the planar direction of the member when viewed as a whole and in a broad sense. The term "normal direction" as used with respect to a plate-like member refers to the direction normal to the plane of the member.

[0032] In this specification, unless otherwise specified, terms relating to shape and geometric conditions, as well as values ​​that specify the degree of shape and geometric conditions, may be interpreted based on the function they achieve, without being bound by their strict meaning. Examples of terms relating to shape and geometric conditions include "parallel" and "orthogonal." Examples of values ​​that specify the degree of shape and geometric conditions include length values ​​and angle values.

[0033] In this specification and these drawings, unless otherwise specified, when the positional relationship of a second component to a first component is described using terms such as "above," "below," "upper side," "lower side," "upward," or "downward," the second component may or may not be in contact with the first component. In this specification and these drawings, unless otherwise specified, when the positional relationship of a second component to a first component is described using terms such as "above," "upper side," or "upward," depending on the usage conditions of the product, the second component may be located "below," "downward," or "downward" of the first component.

[0034] In this specification, if multiple candidate upper limits and multiple candidate lower limits are given for a certain parameter, the numerical range of that parameter may be constructed by combining any one candidate upper limit and any one candidate lower limit. For example, consider the case where it is stated that "Parameter B is, for example, A1 or greater, and may be A2 or greater, and may be A3 or greater. Parameter B is, for example, A4 or less, and may be A5 or less, and may be A6 or less." In this case, the numerical range of parameter B may be A1 or greater and A4 or less, A1 or greater and A5 or less, A1 or greater and A6 or less, A2 or greater and A4 or less, A2 or greater and A5 or less, A2 or greater and A6 or less, A3 or greater and A4 or less, A3 or greater and A5 or less, and A3 or greater and A6 or less.

[0035] In this specification and these drawings, unless otherwise specified, identical parts or components having similar functions are denoted by the same or similar reference numerals. Dimensional ratios in the drawings may differ from actual ratios for illustrative purposes. In this specification and these drawings, some components may be omitted from the drawings.

[0036] In this specification and these drawings, unless otherwise specified, one embodiment of this specification may be combined with other embodiments or modifications, to the extent that it does not contradict. Other embodiments or modifications may also be combined with each other, to the extent that it does not contradict.

[0037] In this specification and these drawings, unless otherwise specified, when multiple steps are disclosed regarding a method such as a manufacturing method, other steps not disclosed may be performed between the disclosed steps. The order of the disclosed steps may be changed to the extent that it does not create a contradiction.

[0038] The configuration of the wiring board and its manufacturing method will be described in detail with reference to the drawings. However, the technical concept of the embodiments of this disclosure shall not be construed as being limited only to the following specific embodiments.

[0039] Figure 1 is a plan view showing an example of a wiring board 10. The wiring board 10 comprises a glass substrate 12 and at least one element 40 mounted on the glass substrate 12. The wiring board 10 may have a plurality of elements 40 arranged in the plane direction of the wiring board 10. The plurality of elements 40 may be arranged in a first direction D1 and a second direction D2. The first direction D1 and the second direction D2 are included in the plane direction of the wiring board 10. The second direction D2 intersects the first direction D1. The second direction D2 may be perpendicular to the first direction D1. The first direction D1 and the second direction D2 may be the directions in which the edges of the glass substrate 12 extend.

[0040] Figure 2 is a cross-sectional view of the wiring board 10 in Figure 1 along line II-II. The glass substrate 12 includes a first surface 13 and a second surface 14. The second surface 14 is located on the opposite side of the first surface 13 in the thickness direction of the glass substrate 12. The thickness direction is also referred to as the third direction D3. The third direction D3 is perpendicular to the first direction D1 and the second direction D2.

[0041] (Glass substrate) The glass substrate 12 includes at least one recess 20 located on the first surface 13. The recess 20 includes a side surface 21 and a bottom surface 22. The element 40 is located in the recess 20. The glass substrate 12 may include a plurality of recesses 20. Each of the plurality of elements 40 may be located in a recess 20. One element 40 may be placed in one recess 20. Multiple elements 40 may be placed in one recess 20.

[0042] The number of recesses 20 contained in the glass substrate 12 constituting one wiring board 10 may be, for example, one or more, two or more, or three or more. The number of recesses 20 contained in the glass substrate 12 constituting one wiring board 10 may be, for example, 10 or less, eight or less, or six or less.

[0043] The glass substrate 12 contains a glass material. Examples of glass materials include alkali-free glass, borosilicate glass, and quartz glass.

[0044] (element) Element 40 may be a semiconductor element including a transistor formed from a semiconductor such as silicon. Examples of semiconductor elements include CPUs, GPUs, FPGAs, sensors, and memories. The semiconductor element may also be a chiplet in which semiconductor elements such as CPUs, GPUs, FPGAs, sensors, and memories are divided according to their function. Element 40 may also be a passive element such as a resistor or capacitor. Element 40 may include terminals exposed on its surface.

[0045] (Through electrode) The glass substrate 12 may include at least one through-hole 15 penetrating from the first surface 13 to the second surface 14. The wiring board 10 may have at least one through-electrode 25 located in the through-hole 15. The glass substrate 12 may include a plurality of through-holes 15. A through-electrode 25 may be formed in each of the plurality of through-holes 15.

[0046] The through-hole 15 includes a wall surface 16 extending from the first surface 13 to the second surface 14. The through-electrode 25 includes at least a layer made of a metallic material covering the wall surface 16. The through-electrode 25 is configured to at least partially close the through-hole 15. "Closing" means shielding the space of the through-hole 15 with a solid material in the planar direction of the first surface 13. As shown in Figure 2, the through-electrode 25 may be formed over the entire area of ​​the through-hole 15.

[0047] The through electrode 25 is conductive. The through electrode 25 may contain metallic materials such as copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, titanium, chromium, and zinc. The through electrode 25 may also contain compounds of these metallic materials.

[0048] (metal layer) The wiring board 10 may include a metal layer 50 located in the recess 20. As shown in Figure 2, the metal layer 50 is located between the bottom surface 22 of the recess 20 and the element 40.

[0049] The metal layer 50 contains a metallic material. Examples of metallic materials include copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, titanium, chromium, and zinc. The metal layer 50 may contain these metallic materials as its main components. The "main component" is a component that constitutes 51 atomic percent or more of the metal layer 50. For example, the metal layer 50 contains titanium as its main component. The metal layer 50 may also contain compounds of the metallic materials mentioned above.

[0050] (1st redistribution layer) The wiring board 10 may include a first redistribution layer 30 located on the first surface 13. The first redistribution layer 30 includes at least one wiring layer. In the example shown in Figure 2, the first redistribution layer 30 includes a first wiring layer 301 located on the first surface 13. Wiring layers such as the first wiring layer 301 include an insulating layer 31 and a conductive layer 32.

[0051] The insulating layer 31 includes a layer made of an insulating material having insulating properties. For example, the insulating layer 31 may include an organic layer made of an organic material having insulating properties. Examples of organic materials include polyimide and epoxy. For example, the insulating layer 31 may also include an inorganic layer made of an inorganic material having insulating properties. Examples of inorganic materials include silicon nitride and silicon oxide.

[0052] The insulating layer 31 may include an opening 311. The opening 311 may penetrate the insulating layer 31 in the third direction D3.

[0053] The conductive layer 32 may be electrically connected to the terminal 44 of the element 40. The conductive layer 32 may be electrically connected to the through electrode 25. The terminal 44 of the element 40 and the through electrode 25 may be electrically connected by the conductive layer 32.

[0054] The conductive layer 32 may include vias 33 located at the opening 311 of the insulating layer 31. For example, the conductive layer 32 may include vias 33 connected to terminal 44 of element 40. For example, the conductive layer 32 may include vias 33 connected to through electrode 25. Each via 33 extends in a third direction D3.

[0055] The conductive layer 32 may include wiring 34 extending in the planar direction of the wiring board 10. The wiring 34 may extend at least partially in a first direction D1 or a second direction D2. The wiring 34 may be located on the upper surface of the insulating layer 31.

[0056] In this specification, "top surface" means the surface located opposite the "bottom surface" in the third direction D3. "Bottom surface" means the surface facing the glass substrate 12 in the third direction D3.

[0057] The conductive layer 32 is conductive. The conductive layer 32 may contain metallic materials such as copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, titanium, chromium, and zinc. The conductive layer 32 may also contain compounds of these metallic materials.

[0058] (2nd redistribution layer) The wiring board 10 may include a second redistribution layer 35 located on the second surface 14. The second redistribution layer 35 includes at least one wiring layer. In the example shown in Figure 2, the second redistribution layer 35 includes a first wiring layer 351 located on the second surface 14. Wiring layers such as the first wiring layer 351 include an insulating layer 36 and a conductive layer 37.

[0059] The insulating layer 36, like the insulating layer 31, includes a layer made of an insulating material having insulating properties. The insulating layer 36 may include an opening 361. The opening 361 may penetrate the insulating layer 36 in the third direction D3.

[0060] The conductive layer 37 is conductive, similar to the conductive layer 32. The conductive layer 37 may be electrically connected to the through electrode 25. The conductive layer 37 may include vias 38 located at the opening 361 of the insulating layer 36. For example, the conductive layer 37 may include vias 38 connected to the through electrode 25. Each via 38 extends in the third direction D3.

[0061] The recess 20, element 40, and metal layer 50 of the glass substrate 12 will be described in detail. Figure 3 is a cross-sectional view showing an example of the recess 20, element 40, and metal layer 50.

[0062] As shown in Figure 3, the element 40 includes an upper surface 41, a lower surface 42, and a side surface 43. The lower surface 42 of the element 40 faces the bottom surface 22 of the recess 20. The upper surface 41 of the element 40 is located opposite the lower surface 42 in the third direction D3. The terminals 44 of the element 40 may be located on the upper surface 41. The side surface 43 extends from the upper surface 41 toward the lower surface 42.

[0063] The side surface 43 of element 40 does not have to be in contact with the side surface 21 of recess 20. In other words, there may be a gap between the side surface 43 of element 40 and the side surface 21 of recess 20. The gap may be filled with a resin material such as an insulating layer 31.

[0064] The metal layer 50 includes at least a bottom metal layer 51 located on the bottom surface 22 of the recess 20. The bottom metal layer 51 includes an upper surface 511, a lower surface 512, and a side surface 513. The upper surface 511 faces the bottom surface 42 of the element 40. The lower surface 512 faces the bottom surface 22 of the recess 20. The lower surface 512 may be in contact with the bottom surface 22. The side surface 513 extends from the upper surface 511 toward the lower surface 512.

[0065] The bottom metal layer 51 overlaps the element 40 in a plan view. "Plan view" means viewing the object along the normal direction of the first surface 13. In a plan view, the contour of the bottom metal layer 51 may be located outside the contour of the element 40. For example, in a plan view, the side surface 513 of the bottom metal layer 51 may include a side surface 46 located outside the side surface 43 of the element 40.

[0066] "Component A is located outside component B" means that, in the planar direction of the first surface 13, the distance from component A to the center point C1 is greater than the distance from component B to the center point C1. Conversely, "Component A is located inside component B" means that, in the planar direction of the first surface 13, the distance from component A to the center point C1 of the recess 20 is smaller than the distance from component B to the center point C1. The center point C1 is the center point of the base surface 22 in plan view.

[0067] The bottom metal layer 51 does not have to be placed over the entire bottom surface 22. For example, the side surface 513 of the bottom metal layer 51 does not have to be in contact with the side surface 21 of the recess 20.

[0068] The wiring board 10 may include an adhesive layer 45 located between the bottom metal layer 51 of the metal layer 50 and the bottom surface 42 of the element 40. The bottom surface of the adhesive layer 45 may be in contact with the bottom metal layer 51. The top surface of the adhesive layer 45 may be in contact with the bottom surface 42 of the element 40.

[0069] The adhesive layer 45 may be configured to harden upon some trigger; that is, the adhesive layer 45 may contain a resin material. Examples of triggers include heating and light irradiation.

[0070] Examples of resin materials for the adhesive layer 45 include polymers such as epoxy resin, acrylic resin, polyurethane, silicone resin, polyimide, and polyester. The resin material of the adhesive layer 45 may also contain monomers. The resin material content in the adhesive layer 45 may be, for example, 70.0% by volume or more, 75.0% by volume or more, or 80.0% by volume or more. The resin material content in the adhesive layer 45 may be, for example, 100.0% by volume or less, 95.0% by volume or less, or 90.0% by volume or less. The resin material content in the adhesive layer 45 is calculated based on a cross-sectional image of the adhesive layer 45.

[0071] The resin material of the adhesive layer 45 may be the same as or different from the material of the insulating layer 31.

[0072] The resin material of the adhesive layer 45 may contain a curing agent. The curing agent is, for example, a polymerization initiator. The polymerization initiator may generate radicals or cations by heating or light irradiation. Whether the resin material of the adhesive layer 45 contains a curing agent is determined by infrared absorption spectroscopy. Specifically, if organic components such as CH are detected in the analysis results by infrared absorption spectroscopy of a sample obtained by Soxhlet extraction of the adhesive layer 45, it is determined that the resin material of the adhesive layer 45 contains a curing agent.

[0073] The adhesive layer 45 may contain multiple fillers. The fillers may be composed of inorganic materials such as silica or glass. The filler content in the adhesive layer 45 may be, for example, 0.0 volume% or more, 5.0 volume% or more, or 10.0 volume% or more. The filler content in the adhesive layer 45 may be, for example, 30.0 volume% or less, 25.0 volume% or less, or 20.0 volume% or less. The filler content in the adhesive layer 45 is calculated based on a cross-sectional image of the adhesive layer 45.

[0074] A cross-sectional image of the adhesive layer 45 is obtained by observing the cross-section of the adhesive layer 45 with a scanning electron microscope (SEM). The region of the cross-sectional image is divided into a region of resin material and a region of filler by image processing. The resin material content in the adhesive layer 45 is calculated by dividing the area of ​​the resin material region by the total area of ​​the adhesive layer 45 and multiplying the result by 100. The filler content in the adhesive layer 45 is calculated by dividing the area of ​​the filler region by the total area of ​​the adhesive layer 45 and multiplying the result by 100.

[0075] The adhesive layer 45 does not have to be placed over the entire bottom surface 22. For example, the adhesive layer 45 does not have to be in contact with the side surface 21 of the recess 20. In this case, the adhesive layer 45 includes a side surface 46 that is away from the side surface 21 of the recess 20 in the planar direction of the wiring board 10.

[0076] The adhesive layer 45 does not have to cover the entire surface of the bottom metal layer 51. For example, the side surface 46 of the adhesive layer 45 may be located inside the top surface 511 of the bottom metal layer 51.

[0077] The function of the bottom metal layer 51 of the metal layer 50 will be explained.

[0078] As described above, the element 40 includes one or more terminals 44 located on its upper surface 41. The electrical connection between the first redistribution layer 30 and the element 40 is established on the upper surface 41. In this case, the lower surface 42 of the element 40 does not need to include a conductive portion. For example, the lower surface 42 may be made of a resin such as epoxy resin.

[0079] The adhesion of resin to glass is not very high. Therefore, if the lower surface 42 of element 40 is made of resin and the lower surface 42 of element 40 is in contact with the bottom surface 22 of the recess 20 of the glass substrate 12, there is a concern that the lower surface 42 of element 40 may peel off from the bottom surface 22. For example, there is a concern that peeling may occur under harsh conditions such as thermal cycling tests. Even if an adhesive layer 45 is placed between the lower surface 42 of element 40 and the bottom surface 22 of the recess 20, since the adhesive layer 45 contains resin, there is a concern that the adhesive layer 45 may peel off from the bottom surface 22.

[0080] In this embodiment, a metal layer 50 is placed on the bottom surface 22 of the recess 20 of the glass substrate 12. The adhesion of metal to glass is higher than that of resin to glass. Therefore, the metal layer 50 can suppress the delamination of the lower surface 42 of the element 40 from the bottom surface 22.

[0081] The metal layer 50 can also suppress light from reaching the element 40 during the manufacturing process of the wiring board 10, as described below.

[0082] The glass substrate 12 is light-transmitting. Therefore, light irradiated onto the second surface 14 of the glass substrate 12 propagates through the interior of the glass substrate 12 and heads toward the first surface 13 or the recess 20. If the element 40 is located in the recess 20, the light reaches the lower surface 42 of the element 40. For example, in the manufacturing process of the wiring board 10, exposure light irradiated onto the second surface 14 of the glass substrate 12 may reach the lower surface 42 of the element 40. The exposure light is, for example, ultraviolet light.

[0083] In this embodiment, a metal layer 50 is placed on the bottom surface 22 of the recess 20 of the glass substrate 12. The metal layer 50 has light-shielding properties. Therefore, the metal layer 50 can suppress light such as exposure light from reaching the bottom surface 42 of the element 40.

[0084] Examples of the dimensions of the components of the wiring board 10 are described below.

[0085] As shown in Figure 3, the glass substrate 12 has a thickness T1. The thickness T1 of the glass substrate 12 is, for example, 0.1 mm or more, may be 0.2 mm or more, or 0.3 mm or more. The thickness T1 of the glass substrate 12 is, for example, 5.0 mm or less, may be 4.0 mm or less, or 3.0 mm or less.

[0086] As shown in Figure 3, the recess 20 has a depth T2. The depth T2 of the recess 20 is, for example, 30 μm or more, may be 40 μm or more, or 50 μm or more. The depth T2 of the recess 20 is, for example, 150 μm or less, may be 140 μm or less, or 130 μm or less. The depth T2 is measured at the center point of the recess 20 in a plan view.

[0087] The depth T2 of the recess 20 may be determined relative to the thickness T1 of the glass substrate 12. The ratio T2 / T1, which is the ratio of the depth T2 of the recess 20 to the thickness T1 of the glass substrate 12, is, for example, 0.01 or more, may be 0.02 or more, may be 0.03 or more, or may be 0.05 or more. The ratio T2 / T1 is, for example, 0.50 or less, may be 0.40 or less, or may be 0.30 or less.

[0088] As shown in Figure 1, the recess 20 has a first dimension S1 in the first direction D1 and a second dimension S2 in the second direction D2. The first dimension S1 and the second dimension S2 are, for example, 1.0 mm or more, may be 2.0 mm or more, or 3.0 mm or more. The first dimension S1 and the second dimension S2 are, for example, 10.0 mm or less, may be 9.0 mm or less, or 8.0 mm or less. The first dimension S1 and the second dimension S2 are measured on the first surface 13.

[0089] The first dimension S1 may be greater than the depth T2 of the recess 20. The ratio S1 / T2, which is the ratio of the first dimension S1 to the depth T2, is, for example, 1.5 or more, may be 2.0 or more, or may be 2.5 or more. The ratio S1 / T2 is, for example, 5.0 or less, may be 4.0 or less, or may be 3.0 or less.

[0090] The second dimension S2 may be greater than the depth T2 of the recess 20. The numerical range for S2 / T2, which is the ratio of the second dimension S2 to the depth T2, may be the same as the numerical range for the ratio S1 / T2 described above.

[0091] As shown in Figure 2, the through-hole 15 in the glass substrate 12 has a dimension S3 in the first direction D1. Dimension S3 is, for example, 5 μm or more, may be 10 μm or more, or 20 μm or more. Dimension S3 is, for example, 200 μm or less, may be 100 μm or less, or 80 μm or less. Dimension S3 is measured on the first surface 13.

[0092] As shown in Figure 3, the adhesive layer 45 has a thickness T3. The thickness T3 of the adhesive layer 45 is, for example, 1 μm or more, may be 3 μm or more, or 10 μm or more. The thickness T3 of the adhesive layer 45 is, for example, 200 μm or less, may be 100 μm or less, or 50 μm or less. The thickness T3 is measured at the center point of the recess 20 in a plan view.

[0093] As shown in Figure 3, the bottom metal layer 51 of the metal layer 50 has a thickness T4. The thickness T4 of the bottom metal layer 51 is, for example, 10 nm or more, may be 30 nm or more, 100 nm or more, 300 nm or more, or 1 μm or more. The thickness T4 of the bottom metal layer 51 is, for example, 10 μm or less, may be 3 μm or less, or 1 μm or less. The thickness T4 is measured at the center point of the recess 20 in a plan view.

[0094] The above-mentioned dimensions of the components of the wiring board 10 are calculated based on cross-sectional images of the wiring board 10 obtained by electron microscopy. The cross-section is obtained by cutting the wiring board 10 along a cutting plane that passes through the center point C1 of the recess 20 in a plan view and is perpendicular to the first surface 13.

[0095] (Manufacturing method for wiring boards) An example of a manufacturing method for the wiring board 10 will be described.

[0096] First, a glass substrate 12 is prepared. Next, as shown in Figure 4, a processing step is performed to form at least one recess 20 on the first surface 13 of the glass substrate 12. Also, as shown in Figure 4, a through-hole forming step is performed to form a through-hole 15 in the glass substrate 12.

[0097] In the processing step, the recess 20 may be formed by etching. For example, a resist layer is formed on the first surface 13. Subsequently, an opening is made in the resist layer at a position corresponding to the recess 20. Then, the glass substrate 12 is processed at the opening in the resist layer. As a result, as shown in Figure 4, the recess 20 is formed in the glass substrate 12. Examples of processing methods include wet etching and dry etching. Examples of dry etching include reactive ion etching and deep reactive ion etching.

[0098] In the processing step, the recess 20 may be formed by machining using a tool such as a drill. The dimensions of the tool in the first direction D1 may be smaller than the first dimension S1 of the recess 20. In this case, the recess 20 may be formed by scanning the tool with respect to the glass substrate 12 in the first direction D1. The tool may also be scanned with respect to the glass substrate 12 in the second direction D2.

[0099] In the through-hole formation process, the through-hole 15 may be formed by etching. For example, a resist layer is formed on the first surface 13. Subsequently, an opening is made in the resist layer at a position corresponding to the through-hole 15. Next, the glass substrate 12 is processed at the opening in the resist layer. As a result, as shown in Figure 4, the through-hole 15 is formed in the glass substrate 12. Examples of etching methods are the same as in the processing process, such as wet etching and dry etching.

[0100] In the through-hole formation process, the through-hole 15 may be formed by machining using a tool such as a drill.

[0101] The machining process may be performed before the through-hole formation process. The machining process may be performed after the through-hole formation process.

[0102] The processing step may be performed simultaneously with the through-hole formation step. For example, a resist layer is formed on the first surface 13. Subsequently, openings are made in the resist layer at positions corresponding to the through-holes 15 and recesses 20. Next, the glass substrate 12 is processed at the openings in the resist layer. As a result, as shown in Figure 4, through-holes 15 and recesses 20 are formed simultaneously in the glass substrate 12.

[0103] Next, as shown in Figure 5, a through-electrode formation step may be performed to form a through-electrode 25 in the through-hole 15. The through-electrode formation step may include a seed layer formation step and a plating step, which will be described later.

[0104] Furthermore, as shown in Figure 5, a metal layer formation step may be performed to form a metal layer 50 in the recess 20 of the glass substrate 12. The metal layer 50 includes at least a bottom metal layer 51 located on the bottom surface 22 of the recess 20.

[0105] The metal layer formation process will be described in detail. The metal layer formation process may include a formation process and a removal process.

[0106] In the formation process, a metal layer 50 is formed on the surface of the glass substrate 12. For example, as shown in Figure 6, the metal layer 50 is formed on the first exposed surface of the glass substrate 12. The first exposed surface is the surface of the glass substrate 12 that is visible when the glass substrate 12 is viewed along the direction normal to the first surface 13.

[0107] The metal layer 50 may be formed on the surface of the glass substrate 12 by physical deposition such as sputtering. The metal layer 50 may also be formed on the surface of the glass substrate 12 by plating.

[0108] In the removal process, for example, metal layers 50 other than the bottom metal layer 51 are removed by etching. For example, as shown in Figure 7, a resist layer 55 is formed on the metal layer 50 located on the bottom surface 22 of the recess 20. Subsequently, an etching solution capable of dissolving the metal layer 50 is supplied to the metal layer 50. The metal layer 50 not covered by the resist layer 55 is removed by the etching solution. As a result, the bottom metal layer 51 shown in Figure 5 is obtained.

[0109] The through-electrode formation process will be described in detail. The through-electrode formation process may include a seed layer formation process and a plating process.

[0110] In the seed layer formation process, as shown in Figure 8, a seed layer 251 is formed on the first surface 13, the second surface 14, and the wall surface 16 of the glass substrate 12. For example, the seed layer 251 is formed by physical deposition such as sputtering. The seed layer 251 may cover the entire wall surface 16.

[0111] The seed layer 251 may contain metallic materials such as copper, nickel, titanium, chromium, and zinc. The seed layer 251 may also contain compounds of these metallic materials.

[0112] In the plating process, as shown in Figure 9, a plating layer 252 is deposited on the seed layer 251 by electroplating. Through the seed layer formation process and the plating process, a through electrode 25 including the seed layer 251 and the plating layer 252 is obtained.

[0113] The plating layer 252 may contain metals such as copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, titanium, chromium, and zinc, or alloys using these metals. The plating layer 252 may contain these metals or alloys using these metals as its main component. The "main component" is a component that constitutes 51 atomic percent or more of the plating layer 252. For example, the plating layer 252 may contain copper as its main component.

[0114] The plating process may be carried out until the through electrode 25 closes the through hole 15, as shown in Figure 10. In the example shown in Figure 10, the plating process is carried out until the entire space of the through hole 15 is filled by the through electrode 25. Alternatively, the plating process may be terminated before the through electrode 25 closes the through hole 15, as shown in Figure 9. In other words, the plating process may be terminated while the space of the through hole 15 remains. The space of the through hole 15 may be continuous from the first surface 13 to the second surface 14.

[0115] Next, a polishing step may be performed as shown in Figure 11. The polishing step may include at least one of a first polishing step and a second polishing step. In the example shown in Figure 11, the polishing step includes a first polishing step and a second polishing step. In the first polishing step, the seed layer 251 and plating layer 252 located on the first surface 13 are removed by polishing. In the second polishing step, the seed layer 251 and plating layer 252 located on the second surface 14 are removed by polishing. Polishing may be, for example, chemical mechanical polishing.

[0116] The first polishing step forms a first end face 255 on the through electrode 25. The second polishing step forms a second end face 256 on the through electrode 25.

[0117] The seed layer 251 of the through electrode 25 may be the same layer as the metal layer 50. For example, the metal layer 50 located in the recess 20 may be formed simultaneously in the process of forming the seed layer 251 by physical deposition. Alternatively, the seed layer 251 of the through electrode 25 may be formed in a process different from the process of forming the metal layer 50.

[0118] Next, a mounting process is carried out in which the element 40 is mounted in the recess 20. The mounting process may include an adhesive layer formation process and a placement process. In the adhesive layer formation process, as shown in Figure 12, an adhesive layer 45 is formed on the bottom metal layer 51 of the metal layer 50. In the placement process, as shown in Figure 13, the element 40 is placed on the adhesive layer 45.

[0119] The implementation process will now be described in detail. Figure 14 is a cross-sectional view showing an example of an adhesive layer 45 formed on the bottom metal layer 51 during the adhesive layer formation process. The adhesive layer 45 shown in Figure 14 is formed, for example, by applying a solution containing the material of the adhesive layer 45 onto the bottom metal layer 51. The solution includes, for example, a resin material constituting the adhesive layer 45 and a curing agent. The solution may further contain a solvent. As shown in Figure 14, the adhesive layer 45 may be formed so as not to be in contact with the side surface 21 of the recess 20.

[0120] As shown in Figure 14, in the state before the element 40 is placed, the adhesive layer 45 may include an upper surface 451 that is not flat. For example, the upper surface 451 of the adhesive layer 45 may include a curved surface.

[0121] Figure 15A is a cross-sectional view showing an example of the placement process. In the placement process, the element 40 may be placed on the adhesive layer 45 before it is cured. The upper surface 451 of the adhesive layer 45 is deformed by being pressed by the lower surface 42 of the element 40. As a result, the upper surface 451 of the adhesive layer 45 can have a shape corresponding to the lower surface 42 of the element 40. For example, if the lower surface 42 of the element 40 is flat, the portion of the upper surface 451 of the adhesive layer 45 that overlaps with the element 40 in a plan view is also flat.

[0122] The mounting process may include a curing step in which the adhesive layer 45 is cured after the element 40 has been placed on the adhesive layer 45. In the curing step, a trigger is applied to the adhesive layer 45 so that the curing agent contained in the adhesive layer 45 generates radicals or cations. For example, the adhesive layer 45 may be heated. For example, the adhesive layer 45 may be irradiated with light. The light is, for example, ultraviolet light.

[0123] As the adhesive layer 45 hardens, the lower surface of the adhesive layer 45 can adhere closely to the upper surface of the bottom metal layer 51, and the upper surface of the adhesive layer 45 can adhere closely to the lower surface 42 of the element 40.

[0124] As shown in Figure 15A, in a plan view, the contour of the adhesive layer 45 may coincide with the contour of the element 40. For example, in a plan view, the adhesive layer 45 may include a side surface 46 that overlaps with the side surface 43 of the element 40. "Side surface 46 overlapping with side surface 43" means that the distance in the first direction D1 between the position of side surface 43 in contact with the upper surface 41 of the element 40 and the position of side surface 46 in contact with the upper surface of the adhesive layer 45 is less than 10 μm.

[0125] Figure 15B is a cross-sectional view showing another example of the mounting process. As shown in Figure 15B, in a plan view, the contour of the adhesive layer 45 may be located inside the contour of the element 40. For example, in a plan view, the adhesive layer 45 may include a side surface 46 located inside the side surface 43 of the element 40. In other words, in a plan view, the side surface 46 of the adhesive layer 45 may overlap the bottom surface 42 of the element 40. The distance in the first direction D1 between the position of the side surface 43 in contact with the top surface 41 of the element 40 and the position of the side surface 46 in contact with the top surface of the adhesive layer 45 may be 10 μm or more.

[0126] Figure 15C is a cross-sectional view showing another example of the mounting process. As shown in Figure 15C, in a plan view, the contour of the adhesive layer 45 may be located outside the contour of the element 40. For example, the adhesive layer 45 may include an outer peripheral portion 47 located outside the side surface 43 of the element 40 in a plan view.

[0127] As shown in Figure 15C, the outer peripheral portion 47 may include a portion located above the lower surface 42 of the element 40. This portion is created when the upper surface of the adhesive layer 45 is pressed by the lower surface 42 of the element 40. The distance K1 in the third direction D3 between the upper surface of the outer peripheral portion 47 and the lower surface 42 of the element 40 is, for example, 1.0 μm or more, may be 2.0 μm or more, or may be 3.0 μm or more. The distance K1 is, for example, 150 μm or less, may be 140 μm or less, or may be 130 μm or less.

[0128] As shown in Figure 15C, the outer peripheral portion 47 of the adhesive layer 45 does not have to be in contact with the side surface 21 of the recess 20. The side surface 46 of the adhesive layer 45 may be located inside the side surface 513 of the bottom metal layer 51.

[0129] Figure 15D is a cross-sectional view showing another example of the mounting process. As shown in Figure 15D, in plan view, the contour of the adhesive layer 45 may be located outside the contour of the bottom metal layer 51. For example, the adhesive layer 45 may include a side surface 46 located outside the side surface 513 of the bottom metal layer 51 in plan view. The side surface 513 of the bottom metal layer 51 may be covered by the adhesive layer 45. A portion of the adhesive layer 45 may be in contact with the bottom surface 22 of the recess 20.

[0130] Next, a process is carried out to form redistribution layers such as the first redistribution layer 30 and the second redistribution layer 35. For example, as shown in Figure 16, an insulating layer 31 is formed on the first surface 13. The insulating layer 31 may also be formed in the gap between the element 40 and the side surface 21 of the recess 20. As shown in Figure 16, an insulating layer 36 may be formed on the second surface 14.

[0131] Next, as shown in Figure 17, a step is performed to form an opening 311 in the insulating layer 31. If the material of the insulating layer 31 is photosensitive, the opening 311 may be formed in the insulating layer 31 by exposure and development. Alternatively, the opening 311 may be formed in the insulating layer 31 by partially etching the insulating layer 31. Next, a step is performed to form a conductive layer 32. For example, vias 33 are formed in the opening 311, and wiring 34 is formed on the insulating layer 31. As a result, the first rewiring layer 30 shown in Figure 2 is obtained.

[0132] The insulating layer 31 may be in contact with the upper surface of the element 40. A portion of the insulating layer 31 may be located in the recess 20. For example, the insulating layer 31 may be in contact with the side surface of the element 40. In the example shown in Figure 17, the insulating layer 31 includes a portion in contact with the first surface 13, a portion in contact with the upper surface of the element 40, and a portion in contact with the side surface of the element 40.

[0133] Although not shown in the figures, the insulating layer located in the recess 20 may be formed separately from the insulating layer 31 located on the first surface 13. The insulating layer located in the recess 20, which is formed separately from the insulating layer 31 located on the first surface 13, is also called the internal insulating layer. The internal insulating layer includes a portion in contact with the upper surface of the element 40 and a portion in contact with the side surface of the element 40, but does not include the portion located on the first surface 13.

[0134] As shown in Figure 17, a step is performed to form an opening 361 in the insulating layer 36. If the material of the insulating layer 36 is photosensitive, the opening 361 may be formed in the insulating layer 36 by exposure and development. Alternatively, the opening 361 may be formed in the insulating layer 36 by partially etching the insulating layer 36. Next, a step is performed to form a conductive layer 37. For example, vias 38 are formed in the opening 361. As a result, the second redistribution layer 35 shown in Figure 2 is obtained.

[0135] In the process of exposing the insulating layer 31, exposure light L13 may be irradiated toward the first surface 13 of the glass substrate 12. In the process of exposing the insulating layer 36, exposure light L14 may be irradiated toward the second surface 14 of the glass substrate 12.

[0136] The glass substrate 12 is light-transmitting. Therefore, exposure light L14 irradiated onto the second surface 14 of the glass substrate 12 propagates through the interior of the glass substrate 12 and heads toward the first surface 13 or the recess 20. In this embodiment, a metal layer 50 is placed on the bottom surface 22 of the recess 20 of the glass substrate 12. The metal layer 50 is light-shielding. Therefore, the metal layer 50 can suppress the exposure light L14 from reaching the bottom surface of the element 40.

[0137] The adhesion of metal to glass is higher than that of resin to glass. The metal layer 50 located between the lower surface of element 40 and the bottom surface 22 of the recess 20 can suppress the peeling of the lower surface 42 of element 40 from the bottom surface 22.

[0138] The metal layer 50 may be in contact with the insulating layer located in the recess 20. In this case, the metal layer 50 can also suppress the peeling of the insulating layer from the bottom surface 22 of the recess 20.

[0139] The above-described embodiment can be modified in various ways. Hereinafter, modifications will be described with reference to the drawings as necessary. In the following description and the drawings used therein, parts that can be configured similarly to the above-described embodiment will be given the same reference numerals as those used for the corresponding parts in the above-described embodiment. Duplicate explanations will be omitted. Furthermore, if it is clear that the effects and advantages obtained in the above-described embodiment can also be obtained in the modifications, the explanation may be omitted.

[0140] (First variation) Figure 18 is a cross-sectional view showing the wiring board 10 in the first modified example.

[0141] The first redistribution layer 30 may include a plurality of wiring layers stacked in a third direction D3. For example, the first redistribution layer 30 may include a first wiring layer 301 and a second wiring layer 302 located on the first wiring layer 301. The first wiring layer 301 and the second wiring layer 302 each include an insulating layer 31 and a conductive layer 32. Each insulating layer 31 may include an opening 311. The conductive layer 32 may include vias 33 located in each of the openings 311 of the plurality of insulating layers 31.

[0142] The second redistribution layer 35 may include a plurality of wiring layers stacked in a third direction D3. For example, the second redistribution layer 35 may include a first wiring layer 351 and a second wiring layer 352 located on the first wiring layer 351. The first wiring layer 351 and the second wiring layer 352 each include an insulating layer 36 and a conductive layer 37. Each insulating layer 36 may include an opening 361. The conductive layer 37 may include vias 38 located in each of the openings 361 of the plurality of insulating layers 36.

[0143] (Second variation) Figure 19 is a cross-sectional view showing the wiring board 10 in a second modified example. The through electrode 25 may be configured to partially close the through hole 15. For example, the through electrode 25 may include a wall portion 253 extending along the wall surface 16 and a closing portion 254 that shields the through hole 15 in part along the plane direction of the first surface 13.

[0144] The closing portion 254 may be located between the first surface 13 and the second surface 14 in the third direction D3. In this case, a resin layer 26 may be formed in the through hole 15 between the closing portion 254 and the first surface 13, and between the closing portion 254 and the second surface 14.

[0145] (Third variation) Figure 20 is a cross-sectional view showing the wiring board 10 in the third modified example.

[0146] The glass substrate 12 may include a through hole 15 that penetrates the glass substrate 12 from the bottom surface 22 of the recess 20 to the second surface 14. The wiring board 10 may include a through electrode 25 located in the through hole 15 that penetrates the glass substrate 12 from the bottom surface 22 to the second surface 14. Although not shown, the conductive layer 37 of the second rewiring layer 35 may be electrically connected to the through electrode 25. The conductive layer 37 may include wiring 39 located on the insulating layer 36.

[0147] Although not shown in the diagram, the glass substrate 12 may further include through holes 15 that penetrate the glass substrate 12 from the first surface 13 to the second surface 14. The wiring board 10 may further include through electrodes 25 located in the through holes 15 that penetrate the glass substrate 12 from the first surface 13 to the second surface 14.

[0148] (Fourth variation) Figure 21 is a cross-sectional view showing the wiring board 10 in the fourth modified example. The glass substrate 12 includes the recess 20, but does not necessarily include the through hole 15.

[0149] (Fifth variation) Figure 22 is a cross-sectional view showing the wiring board 10 in the fifth modified example. The terminals 44 of the element 40 may include a power terminal 44A and a signal terminal 44B. The power terminal 44A is a terminal connected to a stable potential such as the power supply potential or ground potential. The signal terminal 44B is a terminal to which an electrical signal is input or output.

[0150] The conductive layer 32 may include a power supply layer 32A and a signal layer 32B. The power supply layer 32A is a conductive layer maintained at a stable potential such as the power supply potential or ground potential. The signal layer 32B is a conductive layer that propagates electrical signals.

[0151] The power supply layer 32A may be electrically connected to the power supply terminal 44A of the element 40. For example, the power supply layer 32A may include a via 33 connected to the power supply terminal 44A. The signal layer 32B may be electrically connected to the signal terminal 44B of the element 40. For example, the signal layer 32B may include a via 33 connected to the signal terminal 44B.

[0152] The metal layer 50 may be electrically connected to the power supply layer 32A. For example, the metal layer 50 may be electrically connected to the power supply layer 32A which has a ground potential. As a result, the potential of the metal layer 50 is stabilized to the ground potential. In this case, the metal layer 50 can function as an electrical shield. For example, the metal layer 50 can suppress the effect of electromagnetic fields generated when current flows through the through electrode 25 on the element 40. For example, the metal layer 50 can suppress the effect of static electricity generated on the glass substrate 12 on the element 40.

[0153] The metal layer 50 may include a side metal layer 52 located on the side surface 21 of the recess 20. The side metal layer 52 may be connected to the power supply layer 32A. For example, the power supply layer 32A may include a via 33 connected to the upper end 521 of the side metal layer 52. As a result, the metal layer 50 is maintained at a stable potential such as the power supply potential or ground potential.

[0154] The side metal layer 52 may be formed simultaneously with the bottom metal layer 51 in the metal layer formation process described above. For example, in the removal process of the metal layer formation process described above, etching may be performed so that the metal layer 50 remains on the side surface 21 and the bottom surface 22 of the recess 20.

[0155] When the metal layer 50 is connected to the power supply layer 32A, the heat dissipation characteristics of the metal layer 50 are also improved. For example, the metal layer 50 can efficiently transfer heat from the element 40 to the power supply layer 32A. As a result, the temperature rise inside the recess 20 is suppressed.

[0156] (Sixth variation) Figure 23 is a cross-sectional view showing the wiring board 10 in the sixth modified example. The through-electrode 25 may include a power supply through-electrode 25A and a signal through-electrode 25B. The power supply through-electrode 25A is a through-electrode electrically connected to the power supply layer 32A. The signal through-electrode 25B is a through-electrode electrically connected to the signal layer 32B.

[0157] The through-hole 15 in which the power supply through-electrode 25A is located has dimension S31 in the first direction D1. The through-hole 15 in which the signal through-electrode 25B is located has dimension S32 in the first direction D1. Dimension S31 may be larger than dimension S32. As a result, the potential of the power supply through-electrode 25A is stably maintained by stable potentials such as the power supply potential and ground potential. Dimensions S31 and S32 are measured on the first surface 13.

[0158] The ratio of dimension S31 to dimension S32, S31 / S32, is, for example, 1.0 or more, may be 1.1 or more, may be 1.5 or more, or may be 2.0 or more. S31 / S32 is, for example, 4.0 or less, may be 3.5 or less, or may be 3.0 or less.

[0159] (Seventh variation) Figure 24 is a cross-sectional view showing the wiring board 10 in the seventh modified example. The first redistribution layer 30 may include a conductive layer 32 located between the first surface 13 and the insulating layer 31. The conductive layer 32 may be in contact with the first surface 13. The conductive layer 32 may be the same layer as the metal layer 50 located in the recess 20. For example, the conductive layer 32 located on the first surface 13 may be formed simultaneously in the process of forming the metal layer 50 by physical deposition.

[0160] Figure 25 shows an example of a product on which the wiring board 10 is mounted. The wiring board 10 can be used in a variety of products. For example, it can be mounted in a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smartphone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, etc.

[0161] Although several modifications of the above-described embodiment have been explained, it is naturally possible to combine multiple modifications as appropriate and apply them to the above-described embodiment. [Explanation of symbols]

[0162] 10 Wiring board 12 Glass substrate 13 Page 1 14 Side 2 15 Through holes 16 Wall surface 20 recesses 21 Side view 22 Bottom 25 Through electrode 25A power through electrode 25B Signal through electrode 26 Resin layer 30 1st redistribution layer 31 Insulating layer 32 Conductive layer 32A power layer 32B signal layer 35 2nd redistribution layer 36 Insulating layer 37 Conductive layer 40 elements 44 terminals 44A power terminal 44B signal terminal 45 Next layer 46 Side View 47 Peripheral part 50 metal layers 51 Bottom metal layer 52 Side Metal Layer

Claims

1. A wiring board, A glass substrate comprising a first surface, a second surface located opposite the first surface, and at least one recess located on the first surface, The metal layer located in the recess comprises, The recess includes the side surface and the bottom surface, The wiring board comprises a metal layer, at least, a bottom metal layer located on the bottom surface of the recess.

2. The wiring substrate according to claim 1, wherein the metal layer contains titanium.

3. The element is located in the recess and overlaps the bottom metal layer in a plan view, The wiring board according to claim 1, wherein the element includes a top surface, a bottom surface, and a side surface, and a terminal located on the top surface.

4. The element comprises an adhesive layer located between the lower surface and the bottom metal layer, The wiring board according to claim 3, wherein the adhesive layer comprises a resin material and a curing agent.

5. The wiring board according to claim 3 or 4, further comprising an insulating layer including a portion in contact with the upper surface of the element.

6. The wiring board according to claim 5, wherein the insulating layer includes portions that are in contact with the upper surface and the side surface of the element.

7. The wiring board according to claim 5, wherein the insulating layer includes portions in contact with the upper surface of the element and the first surface of the glass substrate.

8. The first surface comprises at least one wiring layer, The wiring board according to claim 3 or 4, wherein the wiring layer includes a conductive layer electrically connected to the terminals of the element.

9. The terminals of the element include a power terminal and a signal terminal. The conductive layer includes a power layer electrically connected to the power terminal and a signal layer electrically connected to the signal terminal. The wiring board according to claim 8, wherein the metal layer is electrically connected to the power supply layer.

10. A wiring board according to any one of claims 1 to 4, comprising at least one through hole penetrating the glass substrate from the first surface to the second surface.

11. The wiring board according to claim 10, comprising at least one through electrode located in the through hole.

12. At least one through hole penetrating the glass substrate from the first surface to the second surface, The system comprises at least one through electrode located in the through hole, The wiring board according to claim 9, wherein the through-electrode includes a power through-electrode electrically connected to the power layer and a signal through-electrode electrically connected to the signal layer.

13. The wiring board according to claim 12, wherein the dimensions of the through-hole in which the power supply through-electrode is located are larger than the dimensions of the through-hole in which the signal through-electrode is located.

14. The wiring board according to claim 4, wherein the adhesive layer includes a side located inside the side of the element in a plan view.

15. The adhesive layer includes an outer peripheral portion located outside the side surface of the element in a plan view. The wiring board according to claim 4, wherein the outer peripheral portion includes a portion located above the lower surface of the element.

16. The wiring board according to any one of claims 1 to 4, wherein the recess has a depth of 30 μm or more and 150 μm or less.

17. The second surface comprises at least one wiring layer, The wiring substrate according to claim 11, wherein the wiring layer includes an insulating layer and a conductive layer electrically connected to the through electrode.

18. A method for manufacturing a wiring board, A step of preparing a glass substrate including a first surface, a second surface located opposite the first surface, and at least one recess located on the first surface, The process includes forming a metal layer in the recess, The recess includes the side surface and the bottom surface, A method for manufacturing a wiring board, wherein the metal layer includes at least a bottom metal layer located on the bottom surface of the recess.

19. The step of forming an adhesive layer on the bottom metal layer, A method for manufacturing a wiring board according to claim 18, comprising the step of arranging an element on the adhesive layer.

20. A first rewiring step in which an insulating layer and a conductive layer are formed on the first surface, A method for manufacturing a wiring board according to claim 18 or 19, comprising a second rewiring step of forming an insulating layer and a conductive layer on the second surface.

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