Data generation system

Abstract

Providing a new data generation system. [Solution] The system includes a first data processing device that has the function of converting a hardware description language into graph structure data and generating a netlist by performing calculations based on Monte Carlo tree search; a second data processing device that has the function of converting the graph structure data into matrix data based on a graph neural network; and a third data processing device that has a transformer model and generates a first command according to the input token sequence. The first data processing device has the function of generating random numbers, and the command to be executed in Monte Carlo tree search is selected based on the relationship between the random number and a specified value, either as a first command or as a second command selected based on a calculation formula for action selection.

Description

Technical Field

[0001] One aspect of the present invention relates to a data generation system for performing so-called logic synthesis that generates a netlist from a hardware description language.

Background Art

[0002] Digital circuit design goes through processes such as functional design, logic synthesis, and automatic placement and routing. Among them, logic synthesis is a process of converting the operation of a digital circuit described by a hardware description language (hereinafter referred to as HDL) into a format called a netlist. A netlist is also called a gate-level netlist.

[0003] A netlist is connection information of input terminals or output terminals of standard cells included in a digital circuit to be designed. A standard cell is a circuit element used during logic synthesis and automatic placement and routing, and has a function of a predetermined circuit element such as an AND gate or an OR gate.

[0004] In logic synthesis, the netlist is optimized to meet predetermined specifications such as operating speed and power consumption. If the designed digital circuit cannot obtain the predetermined specifications through logic synthesis, it is necessary to repeat the logic synthesis or start over from the functional design. If the number of repetitions or the number of restarts is large, the design period increases, and it becomes impossible to provide a digital circuit at a low price. Therefore, the development of logic synthesis software with higher optimization performance is being considered.

[0005] In recent years, there has been a surge in the development of models using artificial neural networks (ANNs, sometimes simply referred to as neural networks). As an approach to automating the aforementioned logic synthesis, machine learning methods have been proposed, such as configurations using neural networks (e.g., Non-Patent Document 1) and configurations using Monte Carlo Tree Search (MCTS) (e.g., Non-Patent Document 2). Furthermore, a natural language processing method using autoregressive models based on transformer architectures (e.g., Non-Patent Document 3) has been proposed. [Prior art documents] [Non-patent literature]

[0006] [Non-Patent Document 1] ABChowdhury, et al., "INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search," Cornell University, Internet <URL: https: / / arxiv.org / abs / 2305.13164> [Non-Patent Document 2] Zehua Pei, et al., "AlphaSyn: Logic Synthesis Optimization with Efficient Monte Carlo Tree Search," 2023 IEEE / ACM ICCAD, Internet (URL: https: / / ieeexplore.ieee.org / document / 10323856) [Non-Patent Document 3] Ashish Vaswani et al., "Attention Is All You Need," Internet (URL: https: / / arxiv.org / abs / 1706.03762) [Non-Patent Document 4] Cunxi Yu et al., “Fast Algebraic Rewriting Based on And-Inverter Graphs”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 37, No. 9, 1907-1911 (2018) [Non-Patent Document 5] Alan Mishchenko, et al., "DAG-Aware AIG Rewriting," University of California, Berkeley, Internet (URL: https: / / people.eecs.berkeley.edu / ~alanmi / publications / 2006 / dac06_rwr.pdf) [Overview of the project] [Problems that the invention aims to solve]

[0007] Automated logic synthesis using MCTS employs formulas such as UCT (Upper Confidence bounds applied to Trees). By using formulas that consider the balance between search and knowledge utilization, such as UCT, it is possible to increase the probability of obtaining the optimal solution. However, since the search is performed without considering the state of the target circuit, efficient processing is not easy, and there are limitations to the optimization performance. Further performance improvements are needed in automated logic synthesis using MCTS.

[0008] Furthermore, automating logic synthesis using neural networks requires optimizing weight data through learning to generate a netlist from a hardware description language. Since optimizing weight data requires a large amount of training data, if the training data is not available, the desired netlist may not be obtained. Further performance improvements are needed in the automation of logic synthesis using neural networks.

[0009] One aspect of the present invention aims to provide a novel data generation system, etc. Another aspect of the present invention aims to provide a data generation system, etc. that is highly convenient. Another aspect of the present invention aims to provide a data generation system, etc. that is highly useful.

[0010] The present invention does not necessarily need to solve all of these problems. Furthermore, the description of these problems does not preclude the existence of other problems addressed by the present invention. For example, it is possible to extract other problems from the description in the specification, drawings, and claims. [Means for solving the problem]

[0011] One aspect of the present invention is a data generation system for generating a netlist from a hardware description language, comprising: an input device for receiving a hardware description language; a first data processing device having the function of converting the hardware description language into graph structure data and generating a netlist by performing calculations based on Monte Carlo tree search; a second data processing device having the function of converting the graph structure data into matrix data based on a graph neural network; a third data processing device having a transformer model and generating a first command according to an input token sequence; and an output device for outputting a netlist, wherein the first data processing device has the function of generating random numbers, and the command to be executed in Monte Carlo tree search is selected based on the relationship between the random number and a specified value, either as a first command or as a second command selected based on a calculation formula for action selection.

[0012] In one embodiment of the present invention, a data generation system is preferred in which the token sequence consists of a plurality of commands selected immediately before the action selection in Monte Carlo tree search, and a plurality of matrix data corresponding to the graph structure data updated by said commands.

[0013] In one embodiment of the present invention, a data generation system is preferred in which the transformer model has an attention head, and the commands input to the attention head are input separately from the matrix data input to the attention head.

[0014] In one embodiment of the present invention, a data generation system in which the calculation formula for action selection is UCT (Upper Confidence bounds applied to Trees) is preferred.

[0015] In one embodiment of the present invention, a data generation system is preferred in which the graph structure data is data converted into an AND inverter graph.

[0016] Further embodiments of the present invention are described in the following descriptions of embodiments and in the drawings. [Effects of the Invention]

[0017] One aspect of the present invention can provide a novel data generation system, etc. Another aspect of the present invention can provide a data generation system, etc. that is highly convenient. Another aspect of the present invention can provide a data generation system, etc. that is highly useful.

[0018] The present invention does not necessarily have to possess all of these effects. Furthermore, the description of these effects does not preclude the existence of other effects of the present invention. For example, it is possible to extract other effects from the description in the specification, drawings, and claims. [Brief explanation of the drawing]

[0019] [Figure 1] Figure 1 is a block diagram illustrating a data generation system according to one embodiment of the present invention. [Figure 2] Figure 2 is a flowchart illustrating a data generation system according to one embodiment of the present invention. [Figure 3]FIG. 3(A) and FIG. 3(B) are schematic diagrams for explaining a data generation system according to one aspect of the present invention. [Figure 4] FIG. 4(A) and FIG. 4(B) are schematic diagrams for explaining a data generation system according to one aspect of the present invention. [Figure 5] FIG. 5(A) and FIG. 5(B) are schematic diagrams for explaining a data generation system according to one aspect of the present invention. [Figure 6] FIG. 6 is a block diagram for explaining a data generation system according to one aspect of the present invention. [Figure 7] FIG. 7(A) and FIG. 7(B) are schematic diagrams for explaining a data generation system according to one aspect of the present invention. [Figure 8] FIG. 8(A) and FIG. 8(B) are schematic diagrams for explaining a data generation system according to one aspect of the present invention. [Figure 9] FIG. 9 is a schematic diagram for explaining a data generation system according to one aspect of the present invention. [Figure 10] FIG. 10(A) and FIG. 10(B) are schematic diagrams for explaining a data generation system according to one aspect of the present invention. [Figure 11] FIG. 11 is a schematic diagram for explaining a data generation system according to one aspect of the present invention. [Figure 12] FIG. 12 is a schematic diagram for explaining a data generation system according to one aspect of the present invention.

Embodiments for Carrying Out the Invention

[0020] Embodiments of the present invention will be described with reference to the drawings. However, it is easily understood by those skilled in the art that the present invention can be variously modified without departing from the gist thereof. Therefore, the present invention is not construed as being limited to the contents described in the following embodiments.

[0021] In this specification, when the same symbol is used for multiple elements, and especially when it is necessary to distinguish them, the symbol may be accompanied by an identifying code such as "A", "B", "_1", "_2", or "[n]". Furthermore, when describing a common matter for multiple elements with identifying codes, or when it is not necessary to distinguish them, the identifying codes may be omitted.

[0022] (Embodiment) This embodiment describes an example of a data generation system that is one aspect of the present invention. Data generation in one aspect of the present invention corresponds to a series of processes that generate and output a netlist based on the input HDL.

[0023] <Example of a data generation system configuration> An example configuration of a data generation system according to one embodiment of the present invention will be described. Figure 1 is a block diagram illustrating a data generation system according to one embodiment of the present invention.

[0024] In this specification, the block diagrams classify components by function and show them as independent blocks. However, in actual devices or systems, it is difficult to separate components by function, and a single device may be involved in multiple functions, or a single function may be involved across multiple devices or systems. For example, multiple data processing devices are shown as separate data processing devices with different functions, but it is also possible to treat them as a single data processing device with different functions.

[0025] Figure 1 illustrates the terminal device 80 and the data generation system 100. The data generation system 100 includes an input device 10, an output device 11, a storage device 20, a data processing device 30, a data processing device 40, a data processing device 50, and a transmission unit 99.

[0026] The input device 10 has the function of receiving hardware description language (HDL) from an external terminal device 80 of the data generation system 100. In the case of digital circuit design, HDL is data from an RTL (register transfer level) source, such as VerilogHDL. Hereafter, HDL will be described as RTL.

[0027] The output device 11 has the function of outputting the netlist generated when the data generation system 100 receives the RTL to an external terminal device 80 of the data generation system 100.

[0028] The terminal device 80 is an information terminal such as a data server, desktop computer, notebook computer, smartphone, or tablet computer.

[0029] The transmission and reception of data between the data generation system 100 and the terminal device 80 is preferably carried out using a network such as a LAN (Local Area Network) established within an organization, for example, if the provider of a service using the data generation system and the user enjoying the service belong to the same company or organization. This allows for safer transmission and reception of data between the data generation system 100 and the terminal device 80 compared to transmission via the Internet. It also prevents information within the organization from leaking to the outside. Alternatively, the transmission and reception of data between the data generation system 100 and the terminal device 80 can be carried out using the Internet, which is the foundation of the World Wide Web (WWW).

[0030] The storage device 20 can store programs and / or data. Typical programs include those executed by data processing devices 30, 40, and 50. Data stored in the storage device 20 includes RTL transmitted from the input device 10. Other data stored in the storage device 20 may include data being processed by data processing devices 30, 40, and 50.

[0031] The storage device 20 includes at least one of volatile memory and non-volatile memory. Examples of volatile memory include DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory). Examples of non-volatile memory include ReRAM (Resistive Random Access Memory), PRAM (Phase Change Random Access Memory), FeRAM (Ferroelectric Random Access Memory), MRAM (Magnetoresistive Random Access Memory), and flash memory.

[0032] The transmission unit 99 has the function of transmitting data. Data can be transmitted and received between the input device 10, output device 11, storage device 20, and data processing devices 30, 40, and 50 via the transmission unit 99.

[0033] The data processing devices 30, 40, and 50 have functions for performing data processing such as calculations, analysis, and inference. The data processing devices 30, 40, and 50 store data in progress in the storage device 20. The data processing devices 30, 40, and 50 retrieve necessary data from the storage device 20. Each of the data processing devices 30, 40, and 50 has a function for performing different calculations on the data in the storage device 20.

[0034] The data processing units 30, 40, and 50 each have at least an arithmetic circuit to perform the above functions. For example, the arithmetic circuit may be a central processing unit (CPU). In addition to or instead of a CPU, the data processing units 30, 40, and 50 may also have a GPU (Graphics Processing Unit), an NPU (Neural Network Processing Unit), or the like.

[0035] The data processing units 30, 40, and 50 may have a microprocessor such as a DSP (Digital Signal Processor) in addition to a CPU or GPU. Since the DSP is specialized for digital signal processing, it is preferable to install it to control peripheral circuits of the CPU, GPU, or NPU. The microprocessor can also be implemented using a PLD (Programmable Logic Device) operating on hardware such as an FPGA (Field Programmable Gate Array) or FPAA (Field Programmable Analog Array).

[0036] Next, we will describe the data processing devices 30, 40, and 50, each of which has the function of performing different calculation processes.

[0037] The data processing device 30 includes a processing selection unit 31 and an MCTS calculation unit 32. The processing selection unit 31 has the function of converting the RTL before processing into graph structure data and the function of generating random numbers. The MCTS calculation unit 32 has the function of generating a netlist by performing calculations based on Monte Carlo Tree Search (MCTS). The data processing device 30 is also called the first data processing device.

[0038] Graph structure data is a data format that converts circuit diagram data contained in text data written in RTL into information such as labeled nodes and terminals. Converting circuit diagram data into graph structure data makes optimization easier.

[0039] Graph structure data can be processed using an AND-Inverter Graph, a type of directed cyclic graph (see, for example, Non-Patent Document 4). This configuration allows RTL, which describes the specifications of a digital circuit design, to be converted into graph structure data in the form of a Boolean function, thus enabling efficient data processing.

[0040] In MCTS, one way to balance exploration and knowledge utilization in action selection is to use the UCT (Upper Confidence bounds applied to Trees) formula. UCT can be expressed by formula (1). The first term W represents knowledge utilization and is the reward or the average reward. The reward can be the area of ​​the circuit represented by the netlist, the delay value, etc. The second term represents exploration, where c is a constant, m is the number of trials, and N is the cumulative number of trials.

[0041]

number

[0042] UCT is useful for determining the next promising command to take based on development and trial results from MCTS. Commands include balance, which optimizes delay reduction using commutative or combinator laws, and rewrite, which optimizes by converting to a partially equivalent circuit using pattern matching (see, for example, Non-Patent Document 5). Commands are also called command data.

[0043] In generating a netlist using MCTS, the optimal netlist can be found by repeatedly going through a process that transitions from the original state to the next state through four steps: action selection, expansion, trial, and update. The command action selection corresponds to the step of selecting the next node (child node) in MCTS, and selecting the appropriate command from the command candidates is important for generating the desired netlist.

[0044] The processing selection unit 31 generates random numbers before the action selection step and, based on the relationship between these random numbers and a specified value, selects either a command generated based on a transformer model (also called a transformer) (also called a first command) or a command selected based on an action selection calculation formula (also called a second command) as the action selection step in MCTS. The selected command becomes the command for the action selection step in MCTS. The transformer is an architecture also called an autoregressive model.

[0045] The MCTS calculation unit 32 performs calculation processing for the steps other than action selection in MCTS, namely deployment, trial, and update, based on the command (first command or second command) selected by the processing selection unit 31. Therefore, the MCTS calculation unit 32 performs calculation processing for deployment, trial, and update based on the command (second command) selected by the action selection calculation formula, or based on the command generated by the transformer.

[0046] The data processing device 40 includes a GNN calculation unit 41. The GNN calculation unit 41 has the function of performing calculations based on a graph neural network (GNN). By having the GNN calculation unit 41, the data processing device 40 can convert graph structure data into matrix data represented by an adjacency matrix and a feature matrix, and by processing this with a graph neural network, it can extract the features of the graph structure data as a matrix. The data processing device 40 is also called the second data processing device.

[0047] The data processing device 50 has a transformer 60. The transformer 60 is composed of multiple decoder layers (DECs). The transformer 60 has the function of generating a new token sequence according to the input token sequence. By having the transformer 60, the data processing device 50 can generate a token sequence according to the input token sequence.

[0048] The input token sequence includes, in addition to the command selected in the previous action selection, provided to the MCTS calculation unit 32 of the data processing device 30, and the matrix data updated with the command selected in the previous action selection, provided to the GNN calculation unit 41 of the data processing device 40. This configuration allows for the generation of candidate commands for the next action selection in the generated token sequence. The MCTS calculation unit 32 performs expansion, trial, and update calculations based on the command selected (first command) from the candidate commands generated by the data processing device 50. The data processing device 50 is also called the third data processing device.

[0049] Transformer 60 can be trained using graph structure data of previously designed circuit diagrams and corresponding commands as training data. For example, Transformer 60 can be trained using graph structure data labeled with known commands selected in previously designed digital circuits as training data. This allows it to generate commands to be selected when the graph structure data of the circuit diagram is unknown.

[0050] <Example of a data generation flow for a data generation system> Figure 2 is a flowchart illustrating the operation of the data generation system 100. The data generation system 100 can generate a netlist from the RTL through steps S01 to S13.

[0051] Step S01 is the input of RTL. The data generation system 100 receives RTL input from the terminal device 80 via the input device 10.

[0052] For example, in the functional design of a digital circuit, suppose we design a controller that alternately lights up two lamps at regular intervals. Figure 3(A) is a schematic diagram of the functional design, showing an example where the upper lamp L1 and the lower lamp L2 switch at timings T01 to T03 in response to a clock signal CLK. In this case, the RTL can be written in text, as illustrated in Figure 3(B). The text shown in Figure 3(B) is an example of the information needed to execute the functional design represented in Figure 3(A).

[0053] Step S02 is the conversion to graph structure data. Since RTL is text data, it is preferable to convert it to a data format that is easy to process. As mentioned above, an example of graph structure data is an AND inverter graph. An AND inverter graph, as illustrated in Figure 4(A), for example, in the case of the negated logical AND of a and b and the logical AND of c (data GA1), can be represented by data AIG1, which connects the AND node A1, the edge N1 representing the negation, and the terminals a to c. In the data generation system 100, the conversion from RTL to AIG can be performed by the processing selection unit 31.

[0054] Step S03 is random number generation. Random number generation is performed, for example, by generating random real numbers in the range of 0 to 1 within the data processing device 30. Random number generation is updated again after going through the steps of action selection, expansion, trial and update.

[0055] Step S04 is a determination of whether the value is greater than or equal to the specified value. From step S04 onward, the determination is based on the relationship between the random number generated in step S03 and the specified value. Specifically, if the value is greater than or equal to the specified value (YES), the action selection step in MCTS is determined in the command generation in the Transformer (steps S05 to S08). If the value is less than the specified value (NO), the command for the action selection step in MCTS is selected based on the calculation formula of UCT (step S09).

[0056] Figure 6 illustrates the four steps in MCTS: behavioral selection, deployment, trial, and updating.

[0057] In MCTS, the state of the following graph structure data can be optimized by repeating four steps C1 through C4 (for example, M times, where M is an integer).

[0058] Step C1 is action selection. In step C1 of Figure 6, node ST00 represents the initial state, and nodes ST11 and ST12 represent the next states. Through action selection, either node ST11 (with hatching) or node ST12 is selected from node ST00. Node ST00 is also called the parent node, and nodes ST11 and ST12 are also called child nodes.

[0059] Step C2 is a step in which a new child node ST21 is created for the node selected in step C1 if the number of times it has been selected exceeds a predetermined number. This newly created child node is called an expanded node.

[0060] Step C3 performs trials based on the node selected in Step C1 or the node deployed in Step C2. If node ST21 was generated in Step C2, the command attempts to create the next node ST21 (leaf node). The attempts for node ST21 can be based on randomly selected commands, etc.

[0061] Step C4 involves updating the trials and reward values ​​from Step C3. The update step in Step C4 is also called backpropagation. Nodes with higher scores based on reward values ​​are more likely to be selected in action selection.

[0062] The above explains the four steps in MCTS: action selection, deployment, trial, and updating.

[0063] Let's return to the explanation of Figure 2. Step S05 is the acquisition of the previous n (n is an integer) graph structure data. The previous n graph structure data correspond to the graph structure data updated by the execution of each step of MCTS by the action selected command. The previous n graph structure data can be acquired by storing them in the memory device 20 and reading them.

[0064] The graph structure data is converted into matrix data via the GNN calculation unit 41, with the adjacency matrix and feature matrix being input to the transformer. As an example of matrix data, Figure 4(B) shows the adjacency matrix and feature matrix of graph structure data. Figure 4(B) shows the adjacency matrix and feature matrix corresponding to the data AIG1 represented by the AND inverter graph in Figure 4(A).

[0065] Step S06 retrieves the n most recent commands. The n most recent commands (where n is an integer) correspond to the commands selected in the MCTS action selection step. The n most recent commands are stored in memory device 20 and can be retrieved by reading them.

[0066] Step S07 inputs the token sequence to the transformer. The transformer is given the matrix data corresponding to the n graph structure data immediately preceding step S05, and the n commands immediately preceding step S06, as the token sequence.

[0067] Step S08 involves selecting from a list of command candidates. The Transformer generates a list of command candidates, specifically probabilities for multiple commands, from the input token sequence. The appropriate command can then be selected from these candidate commands.

[0068] Step S10 is deployment and trial. The steps corresponding to deployment and trial in MCTS can be executed by selecting an action based on the command generated in step S08 for the transformer, or by selecting an action based on the command selected in step S09 based on the UCT calculation formula.

[0069] Step S11 is an update. Based on the steps corresponding to the deployment and trial of MCTS in step S10, the reward value of each node can be updated.

[0070] Step S12 is a determination of whether the iteration limit has been reached. The number of trials to determine whether the graph structure data obtained by each step of MCTS can be output as a netlist is predetermined, and each step of MCTS is repeated up to the iteration limit of the trial count (NO).

[0071] The netlist is written in text, as shown in Figure 5(A). The text shown in Figure 5(A) is connection information for the input or output terminals of the standard cells included in the digital circuit being designed. Therefore, the digital circuit can be represented by the NOT gate (NOT) and AND gate (AND) circuit elements shown in Figure 5(B). The circuit in Figure 5(B) can be used as a controller to alternately light two lamps at regular intervals by controlling a register (REG) with a clock signal (Clock) and a reset signal (Reset), and by using the outputs of the upper and lower terminals.

[0072] In step S12, if the iteration limit is reached (YES), the graph structure data obtained by repeating each step of MCTS is converted into a netlist and output (step S13).

[0073] As described above, in one embodiment of the present invention, in the action selection step in MCTS, it is possible to switch between selecting a command based on the UCT calculation formula or selecting a command using a transformer, depending on the relationship between the generated random number and the specified value. Therefore, flexible action selection is possible, not only through the automation of logic synthesis using MCTS that selects actions by the UCT calculation formula. Furthermore, even if sufficient learning has not been reflected in command selection using transformers, logic synthesis can be automated. As a result, for example, improvements in the performance of digital circuits, reduction in power consumption, reduction in chip area, reduction in design costs, and shortening of design period can be achieved. Consequently, a data generation system with excellent convenience and usefulness can be provided.

[0074] <Example of exploring behavioral choices based on Transformers> Next, we will explain an example of exploring action selection based on transformers, that is, a method for generating commands. Figure 7(A) is a schematic diagram illustrating the token sequence input to the data processing device 50 described above, and the token sequence generated by the data processing device 50.

[0075] Figure 7(A) illustrates the token sequence TC_IN input to the data processing device 50, which consists of the n commands CM (commands CM_1 to CM_n) selected immediately beforehand, and the graph structure data CS (graph structure data CS_1 to CS_n) updated by the aforementioned commands selected immediately beforehand. The graph structure data CS is converted into matrix data in the GNN calculation unit 41 of the data processing device 40 and input to the data processing device 50.

[0076] Figure 7(A) shows the token sequence TC_GN generated by the data processing device 50, which includes commands CM_2 through CM_n and the newly generated command CM_GN.

[0077] Figure 7(B) is a block diagram illustrating an example configuration of the data processing device 50 shown in Figure 7(A).

[0078] As shown in Figure 7(B), the data processing device 50 receives the token sequence TC_IN, which was explained in Figure 7(A). The token sequence TC_IN is converted into matrix data in one-hot format using one-hot formatting 51. Subsequently, after processing by the transformer 60, the token sequence TC_GN can be output after passing through linear layer 52, softmax 53, token probability 54, and token selection 55.

[0079] One-hot representation is a vector representation in which, in a K-dimensional vector (where K is a natural number), only the dimension of the numerical value assigned to the token is 1, and the values ​​of all other dimensions are 0. A linear sheath is a process also called a linear transformation or fully connected layer. Softmax is a process that outputs input data as token probabilities. Token probability input and token selection is a process that selects tokens from their probabilities and transforms the resulting token sequence with a token sequence containing the generated commands using a tokenizer.

[0080] The transformer 60 can assign a probability to a given data sequence that the next data follows. Therefore, the data processing device 50 can input the n commands CM selected immediately before and the graph structure data CS updated by the aforementioned commands as a token sequence to assign a probability to the command that follows the n commands CM selected immediately before, and generate a command corresponding to that probability.

[0081] Figure 8(A) is a block diagram illustrating an example configuration of the transformer 60 described above. As shown in Figure 8(A), the transformer 60 has N (where N is an integer of 2 or more) decoder layers DEC arranged in multiple layers (in series). Each of the multiple decoder layers DEC goes through an attention head 70, an addition process 61, layer normalization 62, a linear layer 63, an addition process 64, and layer normalization 65. The data input to the attention head may also undergo processes such as adding embedded representations and positional information. Layer normalization refers to the process of converting numerical values ​​so that the mean is 0 and the variance is 1 for each command.

[0082] Figure 8(B) is a block diagram illustrating an example configuration of the attention head 70 of the decoder layer DEC described above. As shown in Figure 8(B), the attention head 70 has H (×H) processing layers 71 arranged in parallel, and the output of each processing layer 71 is output via a linear layer 78.

[0083] Figure 9 is a block diagram illustrating the configuration of the processing layer 71 of the attention head 70. The processing layer 71 of the attention head 70 illustrates a processing method that can be adopted in one aspect of the present invention as an example. The processing layer 71 shown in Figure 9 has three input nodes Q, K, and V. The processing layer 71 includes a linear layer 72Q, a linear layer 72K, a linear layer 72V, a multiplication process 73, a scaling process 74, a mask 75, a softmax process 76, and a multiplication process 77.

[0084] Linear layers 72Q, 72K, and 72V perform multiplication with different matrices. This configuration allows input node Q and input node K to take on different data. The multiplication process 73 calculates the product of input node Q and the transpose matrix of input node K. Scaling 74 performs division on each element of the matrix. In scaling 74, the divisor k is determined according to the dimension of the embedding representation, the number of parallel processes, the embedding representation, etc. Masking 75 is performed by multiplying the resulting matrix by a negative number with a large absolute value. Softmax 76 performs a process to transform the matrix values ​​so that their sum is 1. The multiplication process 77 calculates the product of the output of softmax 76 and the transpose matrix of input node V. The data output from each processing layer 71 is output via the linear layer 78.

[0085] In the example of the processing layer 71 shown in Figure 9, the graph structure data CS selected by the command selected immediately before, that is, the matrix data output by the GNN calculation unit 41 of the data processing device 40, is provided to the input node Q via the linear layer 72Q. Similarly, the matrix data output by the GNN calculation unit 41 is provided to the input node K via the linear layer 72K. In addition, the n commands CM selected immediately before are provided to the input node V via the linear layer 72V. Therefore, the data containing the information of the n commands CM can be a separate system from the matrix data corresponding to the graph structure data CS updated by the command selected immediately before.

[0086] Figure 10(A) shows a block diagram of an attention head 70ST having a processing layer 71ST that provides matrix data output from the preceding decoder layer DEC using a standard processing method.

[0087] The processing layer 71ST shown in Figure 10(A) has three input nodes, Q, K, and V, similar to the processing layer 71. In the processing layer 71ST shown in Figure 10(A), the matrix data from the preceding decoder layer DEC is input to input nodes Q, K, and V. Note that input nodes Q, K, and V will be separate data because they undergo different processing in the linear layers 72Q, 72K, and 72V.

[0088] The configuration shown in Figure 9, in which the data provided to input nodes Q and K is on a separate system from the data provided to input node V, requires less computational processing on the data containing command CM information compared to the configuration shown in Figure 10(A), in which the data provided to input nodes Q, K, and V is on the same system. Therefore, the data output from each processing layer 71 in the configuration shown in Figure 9 can more easily reflect data containing graph structure data information via the GNN calculation unit 41 compared to the data output from each processing layer 71ST in the configuration shown in Figure 10(A).

[0089] As described above, in the transformer 60, N decoder layers are arranged in a multilayer configuration (arranged in series). Decoder layers having an attention head 70ST having the processing layer 71ST described above and decoder layers having an attention head 70 having the processing layer 71 may be mixed together. Figure 10(B) illustrates a configuration having a decoder layer DEC having an attention head 70ST and a decoder layer DEC having an attention head 70.

[0090] As shown in Figure 10(B), by layering a decoder layer DEC having an attention head 70 and a decoder layer DEC having an attention head 70ST, it becomes easier to generate data containing command CM information.

[0091] In one embodiment of the present invention, during the command selection step in MCTS, it is possible to switch between selecting a command based on UCT or selecting a command using a transformer, depending on the relationship between the generated random number and the specified value. Therefore, flexible action selection is possible, not only through the automation of logic synthesis using MCTS that select actions based on calculation formulas such as UCT. Furthermore, even if sufficient learning has not been reflected in command selection using transformers, logic synthesis can be automated. As a result, for example, improvements in the performance of digital circuits, reduction in power consumption, reduction in chip area, reduction in design costs, and shortening of design period can be achieved.

[0092] <Example of an information processing device equipped with a data generation system> Figure 11 is a schematic diagram illustrating an example of a data generation system according to one aspect of the present invention. The data generation system according to one aspect of the present invention is applicable to one or more information processing devices (sometimes referred to as computers). One aspect of the present invention can also be described as an information processing device that can use the data generation system according to one aspect of the present invention.

[0093] Figure 11 illustrates the information processing device 200, the terminal device 80, and the network 90.

[0094] The information processing device 200 has, for example, a configuration capable of executing a data generation system 100 according to one aspect of the present invention. That is, the information processing device 200 has, for example, the configurations of the data generation system 100 according to one aspect of the present invention described in Figure 1. The information processing device 200 and the terminal device 80 are each connected to the network 90.

[0095] As the information processing device 200, for example, a workstation, a server computer, or a supercomputer can be used. Preferably, the information processing device 200 has parallel computing capabilities. This allows for large-scale calculations necessary for processes such as AI learning and inference.

[0096] For example, a desktop computer can be used as the terminal device 80. The terminal device 80 can also be called a client computer or the like.

[0097] Network 90 can be, for example, a local network or a global network. Alternatively, it can be, for example, an intranet or an extranet. Furthermore, it can be, for example, a PAN (Personal Area Network), LAN (Local Area Network), CAN (Campus Area Network), MAN (Metropolitan Area Network), WAN (Wide Area Network), or GAN (Global Area Network). It can also be, for example, the Internet, which forms the basis of the World Wide Web (WWW).

[0098] When performing wireless communication, communication protocols or technologies that can be used include, for example, communication standards such as the 4th generation mobile communication system (4G), the 5th generation mobile communication system (5G), or the 6th generation mobile communication system (6G), or specifications standardized by IEEE such as Wi-Fi (registered trademark) or Bluetooth (registered trademark).

[0099] Here, a person who provides a service using a data generation system according to one aspect of the present invention can, for example, provide the service via a network 90.

[0100] Furthermore, if a provider of a service using a data generation system according to one aspect of the present invention and a person receiving the service belong to the same organization (such as a company), it is preferable to use a local network, such as an intranet built within the organization, as the network 90. ​​This allows for more secure information exchange compared to using a global network such as the internet. It also prevents the leakage of confidential information within the organization to the outside.

[0101] Here, a user (for example, a semiconductor device designer) can access a data generation system according to one embodiment of the present invention via, for example, dedicated application software or a web browser running on a terminal device 80. This allows them to enjoy services using the data generation system.

[0102] A data generation system according to one aspect of the present invention is not limited to the configuration example shown in Figure 11.

[0103] Figure 12 is a schematic diagram showing a modified version of the data generation system shown in Figure 11. The data generation system shown in Figure 12 differs from that in Figure 11 in that, in addition to the information processing device 200 and terminal device 80, it is also used in the information processing device 200A.

[0104] The data generation system 100 shown in Figure 12 is used in multiple information processing devices 200 and 200A. Specifically, information processing device 200A has a data processing device 50 equipped with a transformer, and information processing device 200 has a configuration other than the data processing device 50 in the data generation system 100 of one embodiment of the present invention described in Figure 1. As a result, information processing devices 200 and 200A can exchange information with each other via the network 90.

[0105] As the information processing device 200A, for example, a large computer such as a workstation, server computer, or supercomputer can be used. Preferably, the information processing device 200A has parallel computing capabilities. This allows for large-scale calculations necessary for processing such as AI learning and inference.

[0106] In this configuration, the information processing device 200 and the information processing device 200A are connected via the network 90, thereby distributing the load required for data generation processing. This reduces the introduction and operating costs of the data generation system.

[0107] A data generation system according to one aspect of the present invention is not limited to the above-described configuration example, but can have various configurations.

[0108] It should be noted that one aspect of the present invention is not limited to the data generation system and information processing device described in this embodiment. The data generation system, information processing device, and corresponding drawings, etc., exemplified in this embodiment can be combined in appropriate ways, at least in part. [Explanation of symbols]

[0109] CM: Command, CS: Graph Structure Data, TC_GN: Token Column, TC_IN: Token Column, 10: Input Device, 11: Output Device, 20: Memory Device, 30: Data Processing Device, 31: Processing Selection Unit, 32: MCTS Calculation Unit, 40: Data Processing Device, 41: GNN Calculation Unit, 50: Data Processing Device, 51: One-Hot Calculation, 52: Linear Layer, 53: Softmax Calculation, 54: Token Probability Calculation, 55: Selection Calculation, 60: Transformer Calculation, 61: Addition Calculation, 62: Layer Normalization Calculation, 63: Line Shape layer, 64: Addition, 65: Layer normalization, 70: Attention head, 70ST: Attention head, 71: Processing layer, 71ST: Processing layer, 72: Linear layer, 72K: Linear layer, 72Q: Linear layer, 72V: Linear layer, 73: Multiplication, 74: Scaling, 75: Mask, 76: Softmax, 77: Multiplication, 78: Linear layer, 80: Terminal device, 99: Transmission unit, 100: Data generation system, 110: Network, 200: Information processing device, 200A: Information processing device

Claims

1. A data generation system for generating a netlist from a hardware description language, An input device that accepts the aforementioned hardware description language, A first data processing device having the function of converting the hardware description language into graph structure data and generating the netlist by performing calculations based on Monte Carlo tree search, A second data processing device having the function of converting the aforementioned graph structure data into matrix data based on a graph neural network, A third data processing device having a transformer model and generating a first command according to an input token sequence, It has an output device that outputs the netlist, The first data processing device has a function for generating random numbers, The command to be executed in the Monte Carlo tree search is either the first command, selected based on the relationship between the random number and the specified value, or the second command, selected based on the action selection formula. Data generation block.

2. In claim 1, The token sequence consists of a plurality of commands selected immediately before the action selection in the Monte Carlo tree search, and a plurality of matrix data corresponding to the graph structure data updated by said commands. Data generation block.

3. In claim 2, The aforementioned Transformer model has an attention head, The command input to the attention head is input separately from the matrix data input to the attention head. Data generation block.

4. In claim 1 or 2, The formula for calculating the aforementioned action selection is UCT (Upper Confidence bounds applied to Trees). Data generation block.

5. In claim 1 or 2, The aforementioned graph structure data is an AND inverter graph. Data generation block.

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