Indication device

The display device integrates a sensor unit with metal blocks and light-shielding banks to prevent light interference and reduce wiring resistance, addressing stability and environmental impact issues in display devices with integrated sensors.

JP2026116742APending Publication Date: 2026-07-10LG DISPLAY CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
LG DISPLAY CO LTD
Filing Date
2025-12-25
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

Display devices with integrated sensors face issues of light interference from external sources affecting transistors and increased wiring resistance, requiring solutions that maintain element stability and reduce production energy while being environmentally friendly.

Method used

A display device design incorporating a sensor unit with a metal block surrounding it, utilizing light-shielding banks and metal blocks between layers to prevent light interference and reduce wiring resistance without adding polarizing plates or increasing layer count, and using multi-stack transistor structures with metal blocks to enhance reliability and recyclability.

Benefits of technology

The design effectively prevents light interference and reduces wiring resistance, maintaining element reliability and reducing production energy, while being environmentally friendly by minimizing the use of harmful substances and promoting recyclability.

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Abstract

The present invention provides a display device that prevents light received by a sensor at the bottom from flowing into the side and affecting elements such as transistors placed on the substrate. [Solution] A substrate including a display area and a non-display area surrounding the display area; a sensor portion disposed on the underside of the substrate in at least a part of the display area; a light-emitting element including a plurality of first electrodes provided in the display area, an intermediate layer including a light-emitting layer, and a second electrode; a light-shielding bank defining the light-emitting portion of each of the plurality of first electrodes; and a metal block positioned vertically between the substrate and the light-emitting element, and comprising two or more metal layers, and disposed adjacent to the sensor portion.
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Description

Technical Field

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[0001] This specification relates to a display device that includes a sensor in a display area, ensures element stability against external light, and can reduce wiring resistance.

Background Art

[0002] Display devices for displaying images are applied not only to single-image display devices such as televisions, monitors, smartphones, tablet PCs, and notebook computers, but also to devices with other functions, such as vehicle panels, display glass, wristwatches, and home appliances, and may be applied together with such devices on at least one surface.

[0003] A display device includes a plurality of pixels for embodying an image and includes transistors for controlling pixel-by-pixel operations.

[0004] Among display devices, a display device that does not have a separate light source and has a light-emitting element in a display panel is considered a competitive application for the purpose of making the device more compact and providing clear color display.

Summary of the Invention

Problems to be Solved by the Invention

[0005] Display devices include sensors for various purposes. As the integration degree of display devices increases, sensors can be arranged to overlap or be adjacent to the display area.

[0006] One problem of the embodiments of this specification is to provide a display device that prevents light received by sensors from the top to the bottom from flowing into the sides and affecting elements such as transistors arranged on a substrate.

[0007] One problem of the embodiments of this specification is to provide a display device that prevents external light reflection in a configuration around a light-emitting portion without adding a separate polarizing plate.

[0008] One objective of the embodiments described herein is to provide a display device that reduces the resistance of wiring.

[0009] One objective of the embodiments described herein is to provide a display device that maintains the light transmittance of a transparent portion provided in the sensor and improves the reliability of elements surrounding the transparent portion.

[0010] The technical objective of the embodiments described herein is to provide a display device that can reduce production energy for producing the display device by not increasing or decreasing the number of layers, reduce the use of harmful production substances or regulated substances, and move closer to realizing a display device that is favorable for recycling and environmentally friendly. [Means for solving the problem]

[0011] A display device according to one embodiment of this specification includes a sensor unit in the display area. A metal block is provided around the sensor unit to prevent the light received by the sensor unit from being transmitted to the side of the substrate and affecting the elements surrounding the sensor unit.

[0012] A display device according to one embodiment of this specification may include a substrate including a display area and a non-display area surrounding the display area; a sensor portion disposed below the substrate in at least a portion of the display area; a plurality of light-emitting elements provided in the display area, including an intermediate layer including a light-emitting layer and a second electrode; a light-shielding bank defining the light-emitting portion of each of the plurality of first electrodes; and a metal block positioned perpendicularly between the substrate and the light-shielding bank, comprising two or more metal layers, superimposed on the sensor portion or disposed adjacent to the sensor portion.

[0013] The display device of the embodiment described herein includes a metal block surrounding the sensor portion, which contains metal layers superimposed on each other and an upper metal layer material filling the holes between the metal layers. When light is transmitted vertically from the upper to the lower sensor, the metal block adjacent to the light path prevents lateral light transmission, thereby preventing transistors and other components placed on the substrate from being affected by the sensor light reception.

[0014] The display devices of the embodiments described herein can prevent external light reflection by using a light-shielding bank that defines the light-emitting portion and a black matrix and color filter array configuration arranged on a sealing layer, without adding a separate polarizing plate.

[0015] The display devices of the embodiments described herein feature vertical connections between metal layers provided in different layers, which can reduce wiring resistance when the metal layers are used as power supply voltage wiring.

[0016] In the embodiments of this specification, when a transparent section is provided in the sensor section to increase the light receiving efficiency, a metal block can be placed at the edge of the transparent section to maintain the light transmittance of the provided transparent section while simultaneously improving the reliability of the elements surrounding the transparent section. One of the objectives is to provide a display device.

[0017] In the embodiment of this specification, when the display device includes a multi-stack structure of transistors in a region superimposed on a substrate with a light-emitting element, multiple metal blocks with different vertical lengths can be provided, thereby effectively preventing the photosensitivity of each transistor in the multi-stack structure.

[0018] The display devices of this specification can realize a metal block by utilizing the configuration of the transistors placed between the substrate and the light-emitting element, or by using a metal layer on the same layer as the wiring, thereby avoiding increasing or decreasing the layer structure in the display device. Therefore, it is possible to reduce the production energy required to produce the display device, reduce the use of harmful production substances or regulated substances, be advantageous for recycling, and be more advantageous for realizing an environmentally friendly display device.

[0019] The display devices according to the embodiments of this specification can prevent a decrease in element reliability and reduce the defect rate, and can embody ESG (Environment / Social / Governance) through the effect of saving production energy through process optimization.

[0020] Together with the above-described effects, the specific effects of the present invention will be described together while explaining the specific matters for implementing the following invention.

Brief Description of the Drawings

[0021] [Figure 1] It is a plan view showing a display device according to an embodiment of the present specification. [Figure 2] It is a circuit diagram showing the sub-pixels of FIG. 1. [Figure 3] It is a plan view showing a display device according to the first embodiment of the present specification. [Figure 4] It is a cross-sectional view taken along the line I-I' of FIG. 3. [Figure 5] It is a plan view showing a display device according to the second embodiment of the present specification. [Figure 6] It is a plan view showing a display device according to the third embodiment of the present specification. [Figure 7a] It is a cross-sectional view showing various embodiments of the metal block. [Figure 7b] It is a cross-sectional view showing various embodiments of the metal block. [Figure 7c] It is a cross-sectional view showing various embodiments of the metal block. [Figure 7d] It is a cross-sectional view showing various embodiments of the metal block. [Figure 8] It is a plan view showing a display device according to the fourth embodiment of the present specification. [Figure 9] It is a cross-sectional view taken along the line II-II' of FIG. 6. [Figure 10] It is a plan view showing an example of the first metal layer in the C region of the display device of FIG. 8. [Figure 11] It is a plan view showing an example of the first hole and the second metal layer in the C region of the display device of FIG. 8. [Figure 12] It is a plan view showing an example of the second hole and the third metal layer in the C region of the display device of FIG. 8.

Modes for Carrying Out the Invention

[0022] The advantages and features of this specification, and the methods for achieving them, will become clearer with reference to the examples described below in detail with the accompanying drawings. However, this specification is not limited to the examples disclosed below, but can be embodied in a variety of different forms, and these examples are provided only to complete the disclosure of this specification and to fully inform those who are ordinary skill in the art to which this specification belongs of the scope of the invention, and this specification is defined solely by the scope of the claims.

[0023] Identical drawing reference numerals refer to the same component. Furthermore, in drawings, the thickness, proportions, and dimensions of components may be exaggerated for the sake of effective technical explanation. The scale of components depicted in drawings is not limited to the scale shown in the drawings, as it may differ from the actual scale for illustrative purposes.

[0024] In this specification, when a component (or region, layer, part, etc.) is referred to as "on top of," "connected to," or "joined" another component, it means that it may be directly connected to / joined to the other component, or a third component may be positioned between them.

[0025] "and / or" includes all possible combinations of one or more related configurations.

[0026] Terms such as "first," "second," etc., can be used to describe a variety of components, but the components are not limited by these terms. The terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the rights of this embodiment, the first component may be named the second component, and similarly, the second component may be named the first component. A singular expression includes plural expressions unless the context clearly indicates otherwise.

[0027] Terms such as "below," "on the underside," "above," and "on the upper side" are used to describe the relationships between components illustrated in a drawing. These terms are relative concepts, described in relation to the direction shown in the drawing. For example, unless "immediately" or "directly" is used, one or more different parts can be located between two parts. Spatially relative terms such as "below," "beneath," "lower," "above," and "upper" can be used to easily describe the correlation between one element or component and another, as shown in the drawing. Spatially relative terms should be understood as including not only the direction illustrated in the drawing, but also the different directions of elements in use or operation. For example, if elements illustrated in a drawing are flipped over, an element described as "below" or "beneath" another element may be placed "above" the other element. Therefore, the illustrative term "below" can include both downward and upward directions.

[0028] Terms such as "includes" or "has" are intended to specify the presence of features, numbers, stages, actions, components, parts, or combinations thereof as described in the specification, and should be understood not to preemptively exclude the possibility of the presence or addition of one or more other features, numbers, stages, actions, components, parts, or combinations thereof.

[0029] The features of each of the multiple embodiments described herein can be combined or combined in part or in whole, enabling a variety of technical interdependencies and drives, and each embodiment may be implemented independently of the others, or together in relation to one another.

[0030] The display devices described herein are described below, with reference to the attached drawings and embodiments.

[0031] Figure 2 is a plan view showing a display device according to one embodiment of this specification. Figure 2 is a circuit diagram showing the subpixels of Figure 1.

[0032] Referring to Figure 1, an example of a display device 100 according to this specification includes a display panel 110 having a display area AA and a non-display area NA, and a cover member 20 disposed on the display panel 110.

[0033] The cover member 20 is positioned on the top of the display panel 110 so as to cover the front of the display panel 110, and can protect the display panel 110 from external impacts. The edges of the cover member 20 may have a curved portion or a curved surface that bends in the direction of the back of the display device 100 (Z-axis direction). This allows the cover member 20 to be positioned to cover the side area of ​​the display panel 110 located on the back, thus protecting the display panel 110 from external impacts not only from the front but also from the sides of the display device 100.

[0034] Display area AA of the display device 100 is the area for displaying images, and areas other than display area AA may be designated as non-display areas NA. Display area AA and non-display areas NA of the display device 100 may be similarly applied to the display panel 110.

[0035] The display device 100 includes a substrate (see 111 in Figures 4 and below) having a display area AA and a non-display area NA. The display area AA on the substrate may have a plurality of data wirings DL extending in a first direction (e.g., the Y-axis direction) and a plurality of gate wirings GL extending in a second direction (e.g., the X-axis direction) intersecting the first direction.

[0036] The regions demarcated by the intersection of data wiring DL and gate wiring GL may each constitute a single subpixel SP. A single subpixel SP may be defined as the region in which a light-emitting unit is located. However, in the embodiments herein, the light-emitting unit is not necessarily limited to the region demarcated by the intersection of data wiring DL and gate wiring GL. That is, at least a portion of the light-emitting unit may intersect with data wiring DL and / or gate wiring GL.

[0037] The sub-pixel SP is positioned between gate wiring GL and data wiring DL that intersect each other, as shown in Figure 2, and may include a first transistor T1, a second transistor T2, a storage capacitor Cst, a compensation circuit CC, and a light-emitting element ED.

[0038] For example, the first transistor T1 may be a switching transistor, and the second transistor T2 may be a driving transistor.

[0039] Each of the first transistor T1 and the second transistor T2 may include an active layer, a gate electrode, and first and second source-drain electrodes. At least one active layer of the first and second transistors T1 and T2 may include at least one of amorphous silicon, crystalline silicon, or an oxide semiconductor. At least one active layer of the first and second transistors T1 and T2 may include an oxide semiconductor. For example, the oxide semiconductor may include oxide semiconductor materials such as IGZO (Indium-Gallium-Zinc-Oxide).

[0040] The first transistor T1 is electrically connected to the data trace DL and to the first node N1. The gate electrode of the first transistor T1 is electrically connected to the gate trace GL. The first transistor T1 transmits the data signal supplied via the data trace DL to the first node N1 in response to the scan signal supplied via the gate trace GL.

[0041] The storage capacitor Cst is electrically connected to the first node N1 and charges the voltage applied to the first node N1.

[0042] A high-potential drive voltage EVDD is applied to the second transistor T2 and electrically connected to the first electrode (e.g., the anode electrode) of the light-emitting element ED. The second transistor T2 may control the amount of drive current flowing to the light-emitting element ED depending on the voltage applied to its gate electrode. The high-potential drive voltage EVDD may be connected to the second transistor T2 via the first power supply voltage wiring VDDL.

[0043] The light-emitting element ED outputs light corresponding to the drive current supplied by the second transistor T2. The light-emitting element ED may output light corresponding to one of the following colors: red, green, blue, or white.

[0044] The light-emitting element ED includes a first electrode, an intermediate layer placed on the first electrode, and a second electrode. The second electrode of the light-emitting element ED is connected to a second power supply voltage wiring VSSL that supplies a low-potential drive voltage EVSS. The second power supply voltage wiring VSSL is provided in the non-display area NA and is connected to the second electrode. In some cases, the second power supply voltage wiring VSSL is also provided in the display area AA, supplying a low-potential drive voltage EVSS to each sub-pixel SP or a group of sub-pixel SPs to equalize the potential of the second electrode for each sub-pixel.

[0045] The intermediate layer includes an emissive layer and various functional layers, and may be implemented to emit light of the same color, such as white light, for each pixel, or to emit different colors in sub-pixel SPs, such as red, green, or blue light. Functional layers may include hole injection layers, hole transport layers, electron transport layers, electron injection layers, and charge generation layers. The intermediate layer may include multiple stacks, and multiple stacks may have charge generation layers between adjacent stacks to facilitate the supply of holes and electrons to both stacks. Each of the multiple stacks may include at least one emissive layer, a hole transport layer, and an electron transport layer.

[0046] The first electrode functions as the anode, and the second electrode functions as the cathode. The light-emitting element ED is substantially identical to the light-emitting element 160 (see Figure 4), which will be described later.

[0047] A compensation circuit CC may be provided within the first sub-pixel SP1 to compensate for the threshold voltage of the second transistor T2, etc. The compensation circuit CC may consist of one or more transistors. The compensation circuit CC may include one or more transistors and a capacitor, and may be configured in various ways depending on the compensation method. Pixels containing a compensation circuit CC may have various structures such as 3T1C, 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, 7T2C, etc. For example, multiple transistors may be electrically connected between the second transistor T2 and the light-emitting element ED.

[0048] Figure 2 shows a configuration in which the second transistor T2 and the light-emitting element ED are directly connected, but the embodiments described herein are not limited to this. Depending on the configuration of the compensation circuit CC, the light-emitting element ED may further include other transistors, compensation capacitors, etc., between it and the second transistor T2 that generates the drive current.

[0049] On the other hand, the display device 100 of this embodiment includes sensor units A and B in the display area AA.

[0050] The first sensor unit A may include multiple sensors A1 and A2. Examples of multiple sensors A1 and A2 include, for example, an image sensor or camera that receives video information, an infrared sensor that detects infrared light, and a fingerprint recognition sensor that detects fingerprint information. Figure 1 shows sensors A1 and A2 as having, for example, a circular shape, but is not necessarily limited to this. They may be changed to polygonal or elliptical shapes. Furthermore, the light-receiving area of ​​each sensor A1 and A2 may be limited to a portion of the area they occupy.

[0051] The second sensor unit B may be arranged adjacent to the first sensor unit A, or it may be arranged independently. The second sensor unit B may include an RGB sensor for detecting the color density of ambient light and / or an illuminance sensor for sensing the brightness of ambient light. The second sensor unit B may be used to automatically adjust the brightness and color of the display device 100 by detecting the color density and brightness of ambient light.

[0052] The first and second sensor units A and B are positioned below the display panel 110, overlapping with a portion of the display area AA of the display panel 110, respectively.

[0053] The following describes the specific configurations of the first and second sensor units A and B.

[0054] Figure 3 is a plan view showing a display device according to the first embodiment of this specification. Figure 4 is a cross-sectional view taken along the line I to I' in Figure 3.

[0055] As shown in Figure 3, the first sensor section A is a region that displays images and receives image information. Therefore, along with the light-emitting sections EM:EMA, EMB, and EMC for displaying images, it may also be equipped with a transmissive section TA to improve the light-receiving efficiency of the light-sensing region. The transmissive section TA is positioned so as not to overlap with the wiring L1 and L2 and not to overlap with the light-shielding member 170, and when light is sensed through the transmissive section TA, it may improve the light-receiving efficiency.

[0056] On the other hand, the light-emitting sections EM:EMA, EMB, and EMC may be arranged with the first wiring L1 and second wiring L2 overlapping each other.

[0057] In the subpixel SP, the first wiring L1, which is positioned in the second direction (X-axis direction), may be a gate wiring (see GL in Figure 2, scan wiring).

[0058] In some cases, depending on the number and type of transistors provided in the subpixel, additional gate wiring and / or light emission control lines may be provided in the subpixel SP in the second direction (X-axis direction) in addition to the gate wiring. At least a portion of the first wiring L1 may partially overlap with a portion of the light-emitting section EM (see EMB in Figure 3) in the second direction.

[0059] The second wiring L2, which is positioned in the first direction (Y-axis direction) in the subpixel SP, may also be a data wiring (see DL in Figure 2).

[0060] In some cases, a first power supply voltage wiring VDDL and / or a second power supply voltage wiring VSSL to which a high potential voltage is applied in at least one of the first direction (Y-axis direction) and the second direction (X-axis direction) may be further included in the sub-pixel SP in the form of a first wiring L1 or a second wiring L2.

[0061] The gate wiring GL, data wiring DL, first power supply voltage wiring VDDL, and second power supply voltage wiring VSSL, as the first wiring L1 or second wiring L2, may partially overlap with the light-emitting section EM:EMA, EMB, EMC in the second direction (X-axis direction) or the first direction (Y-axis direction).

[0062] The light-emitting area EM:EMA, EMB, EMC may be defined as the area of ​​the opening of the light-shielding bank 170. The opening of the light-shielding bank 170 may function as a light-emitting area.

[0063] Different light-emitting elements (EMA, EMB, and EMC) may emit different colors.

[0064] For example, the first light-emitting part EMA may emit blue light, the second light-emitting part EMB may emit green light, and the third light-emitting part EMC may emit red light. Depending on the luminous efficiency, the areas of the first to third light-emitting parts EMA, EMB, and EMC may be adjusted to be different. Light-emitting materials with relatively short wavelengths have low luminous efficiency, so the area of ​​the first light-emitting part EMA may be larger than that of the second and third light-emitting parts EMB and EMC. When white light is expressed, the contribution of green light emission is high, so the arrangement density of the second light-emitting part EMB may be made larger than that of the first and third light-emitting parts EMA, EMB, and EMC.

[0065] The relative arrangement density between the light-emitting parts (EM:EMA, EMB, EMC) and the shape of the light-emitting parts (EM:EMA, EMB, EMC) will be the same throughout the display area AA, including the first sensor parts A:A1, A2. However, the overall arrangement area of ​​the light-emitting parts in the first sensor parts A:A1, A2 may be reduced, and the arrangement area of ​​the transmissive part TA may be increased.

[0066] The light-shielding bank 170 may be placed between the light-emitting sections EMA, EMB, and EMC, and between the light-emitting sections EM:EMA, EMB, and EMC and the light-transmitting section TA.

[0067] The transparent section TA may overlap with the first and second wirings L1 and L2 to enhance the transmission efficiency of sensors A1 and A2 in the first sensor section A.

[0068] The light-shielding bank 170 may include, for example, a light-shielding organic insulating material. The light-shielding organic insulating material includes a substance that absorbs light, specifically a substance that absorbs light of at least the wavelength of a visible light source.

[0069] The light-shielding bank 170 is positioned adjacent to the light-emitting parts EMA, EMB, and EMC in at least the region within the first sensor section A:A1 or A2 where the light-emitting parts EMA, EMB, and EMC are densely packed.

[0070] On the other hand, Figure 3 shows an example in which the first light-emitting part EMA and the third light-emitting part EMC have a rhombus shape, and the second light-emitting part EMB has an elongated elliptical shape in the diagonal direction. This is just one example, and the light-emitting part EM may have a circular shape, a polygon with more than one triangle, or some corners may be curved while the other sides are straight.

[0071] The first and second wirings L1 and L2 may overlap with the light-shielding bank 170 in at least part of their length.

[0072] As shown in Figure 3, when the transparent sections TA are densely arranged in the second direction (X-axis direction) or the first direction (Y-axis direction), the first wiring L1 or second wiring L2 between the densely arranged transparent sections TA may not overlap with the light-shielding bank 170, either entirely or partially. The first wiring L1 or second wiring L2 may be positioned between adjacent transparent sections TA, dividing them. The first wiring L1 and second wiring L2 are made of light-shielding metal, and their relatively thin width compared to the width of the light-shielding bank 170 may not be visible even when positioned between the transparent sections TA.

[0073] The display device according to one embodiment shown in Figure 3 includes a metal block BLM positioned between the transmissive section TA and the light-emitting sections EM:EMA, EMB, and EMC.

[0074] The metal blocks BLM may be distributed along the most prominent positions of the translucent section TA. The metal blocks BLM may be arranged along the row direction or a second direction (X-axis direction). As shown in Figure 3, at least a portion of the metal blocks BLM may be arranged to overlap with the light-shielding bank 170, and further may be arranged in the same or adjacent rows as the metal blocks BLM that overlap with the light-shielding bank 170 in the second direction.

[0075] Since the light-shielding bank 170 is arranged to surround each light-emitting section EM:EMA, EMB, and EMC, the light-emitting section may have the position closest to a straight or curved shape in the region adjacent to the transmissive section TA.

[0076] Refer to Figure 4 to see the configuration on the substrate 111.

[0077] As shown in Figure 4, the first sensor unit A: A1 or A2 may be provided with a sensor SS on the underside of the substrate 111.

[0078] The metal blocks BLM: BLM1, BLM2, and BLM3 may be positioned vertically between the substrate 111 and the light-emitting element 160. Alternatively, the metal blocks BLM: BLM1, BLM2, and BLM3 may be positioned between the substrate 111 and the light-shielding bank 170. The metal blocks BLM: BLM1, BLM2, and BLM3 contain two or more metal layers and are either superimposed on the sensor section SS or positioned adjacent to the sensor section SS.

[0079] The light-emitting element 160 includes a plurality of first electrodes 161, an intermediate layer 162, and a second electrode 163. Of these, at least some of the intermediate layer 162 and the second electrode 163 are arranged across the entire display area AA and may overlap with metal blocks BLM: BLM1, BLM2, and BLM3.

[0080] Figure 4 shows that the first to third metal blocks BLM1, BLM2, and BLM3, each having a different layered structure, constitute a single metal block BLM. This is just one example; for instance, a metal block BLM may be composed of only one of the first to third metal blocks BLM1, BLM2, or BLM3, or two of the first to third metal blocks BLM1, BLM2, and BLM3 may be selectively used to constitute a metal block BLM.

[0081] The first to third metal blocks BLM1, BLM2, and BLM3 may include first to third holes CT1, CT2, and CT3, in which the material of the respective upper metal layers 118A, 141A, and 152 is filled between the lower metal layers 114A, 118B, and 141B and the upper metal layers 118A, 141A, and 152.

[0082] Therefore, when light travels vertically from the top to the bottom sensor in the sensor section, each of the first to third metal blocks BLM1, BLM2, and BLM3 prevents lateral light transmission between the light path and the adjacent metal block, thereby preventing transistors and other components placed on the substrate from being affected by the sensor light reception.

[0083] The material of the upper metal layers 118A, 141A, and 152 filling holes CT1, CT2, and CT3 may come into contact with the insulating film 125 / 12 positioned between the lower metal layers 114A, 118B, and 141B and the upper metal layers 118A, 141A, and 152.

[0084] The materials of the upper metal layers 118A, 141A, and 152 filling holes CT1, CT2, and CT3 function as shielding films that block light transmitted laterally from insulating films 125, 126, 127, 128, and 131.

[0085] In the display devices of the embodiments specified herein, the holes CT1, CT2, and CT3 are filled with an upper metal layer and primarily serve as a shielding film for side light, and in some cases, there may be no direct electrical connection between the holes CT1, CT2, and CT3 and the lower metal layer. Furthermore, even if the upper metal layer and the lower metal layer are connected via the holes CT1, CT2, and CT3, the upper metal layers 118A, 141A, and 152 and the lower metal layers 114A, 118B, and 141B may each be provided in an island-like manner and may not have electrical connections to the outside or electrical currents in other configurations.

[0086] The upper metal layers 118A, 141A, and 152 and the lower metal layers 114A, 118B, and 141B are each provided in an island-like manner and may be in a floating state without electrical connection to the outside. The metal block BLM may be placed on the substrate 111 in a floating state.

[0087] The widths of holes CT1, CT2, and CT3 may be thinner than the widths of the lower metal layers 114A, 118B, and 141B, or the widths of the upper metal layers 118A, 141A, and 152 located on each insulating film 127, 128, and 131. Even with their thin widths, holes CT1, CT2, and CT3 block light through the long vertical paths of metal blocks BLM1, BLM2, and BLM3, which are positioned through insulating films 125 / 126 / 127 or 128 or 131, which have a certain thickness or greater. Therefore, even without increasing the area of ​​metal blocks BLM1, BLM2, and BLM3 in the horizontal plane, metal blocks BLM1, BLM2, and BLM3 can prevent side light in the vertical paths of each hole CT1, CT2, and CT3. This means that even without reducing or adjusting the area of ​​the transparent portion TA of the first sensor portion A, the metal block BLM provided around the transparent portion TA of the first sensor portion A blocks the side light.

[0088] Referring to Figure 4, we will compare and explain the configuration of the first sensor unit A and the configuration of the sub-pixel SP outside the first sensor unit A.

[0089] Multiple sub-pixels SP are provided within the display area AA of the substrate 111, and these multiple sub-pixels SP may also be included within the first sensor section A.

[0090] The substrate 111 is a flexible material and is easily removed during laser irradiation when forming holes H. For example, the substrate 111 may consist of first and second organic films 1111 and 1112 that overlap each other via an inorganic interlayer insulating film 117. The inorganic interlayer insulating film 117 may have the function of blocking the transfer of moisture and impurities between the first and second organic films 1111 and 1112. The inorganic interlayer insulating film 117 is formed on the first organic film 1111 and may include a partially patterned configuration. The inorganic interlayer insulating film 117 may include at least one of the following: a silicon nitride film, a silicon oxide film, or a silicon oxynitride film.

[0091] The first and second organic films 1111 and 1112 may contain, for example, polyimide. In addition to polyimide, the first and second organic films 1111 and 1112 may contain different organic films from each other.

[0092] The substrate 111 may contain either the first or second organic film 1111 or 1112 as PET (polyethylene terephthalate) and the other as a polyimide film.

[0093] In other examples, the substrate 111 may include a thin, flexible glass material.

[0094] The substrate 111 serves to support and protect the components of the display device located on top of it.

[0095] The substrate 111 has a display area AA and a non-display area NA, and multiple stacked insulating films 120:121, 122, 123, 124, 125, 126, 127, 128 and planarization films 131, 132 are arranged therein, insulating the transistors T1, T1, T2 and the active layers 113, 137, the active layers 113, 137 from the gate electrodes 114, 118, and the gate electrodes 114, 118 from the source-drain electrodes 141, 142, 143, 144, so that the first storage electrode 115 and the second storage electrode 116 constituting the storage capacitor Cst are insulated from each other.

[0096] The first storage electrode 115 and the second storage electrode 116 may function as a light-shielding pattern for the second transistor T2.

[0097] A first light-shielding pattern 112 is placed below the first transistor T1 to prevent the influence of light from the underside of the substrate 111 toward the first active layer 113.

[0098] The first transistor T1 includes, for example, a first active layer 113, a first gate electrode 114, and first and second source-drain electrodes 141 and 142. The first light-shielding pattern 112 may be connected to one side of the first active layer 113 via the second source-drain electrode 142, as shown in the figure. In some cases, the first light-shielding pattern 112 is connected to the first gate electrode 114 of the first transistor T1 via a different connecting electrode 136, and the first light-shielding pattern 112 functions as a double gate together with the first gate electrode 114. In such a double-gate structure, the same gate voltage may be applied to the first light-shielding pattern 112 and the first gate electrode 114.

[0099] The first storage electrode 115 and the second storage electrode 116, which overlap each other, may form a storage capacitor Cst with an insulating film 125 between them.

[0100] The second transistor T2 includes, for example, a second active layer 137, a second gate electrode 118, a third source-drain electrode 143, and a fourth source-drain electrode 144. With respect to the second transistor T2, the first storage electrode 115 and the second storage electrode 116 may function as light-shielding patterns.

[0101] The second transistor T2 is connected to the first electrode 161 of the light-emitting element ED via a connecting electrode 151.

[0102] On the other hand, the circuit configuration of the subpixels of the first sensor unit A:A1, A2 shown in the figure is just an example, and the configuration of transistors and capacitors may be changed or added.

[0103] In a display device according to one embodiment of this specification, each wiring layer arranged on the substrate 111 from the first light-shielding pattern 112 may constitute a single layer of metal blocks. In the display device according to the embodiment of this specification, the first to third metal blocks BLM: BLM1, BLM2, BLM3 may include electrodes included in the transistors included in the sub-pixels SP as metal layers. Referring to Figure 4, the first to third metal blocks BLM1, BLM2, BLM3 may each include a metal layer arranged in the same layer as at least the electrode layers included in the first and second transistors T1, T2.

[0104] For example, the first metal block BLM1 includes a lower metal layer 114A in the same layer as the first gate electrode 114 or the first storage electrode 115, a first hole CT1 in the fifth to seventh insulating films 125, 126, 127 in a portion of the region overlapping with the lower metal layer 114A, and an upper metal layer 118A provided on a portion of the insulating film 127. The upper metal layer 118A may be the same layer as the second gate electrode 118 of the second transistor T2.

[0105] The second metal block BLM2 includes a lower metal layer 118B in the same layer as the second gate electrode 118 of the second transistor T2, a second hole CT2 in the eighth insulating film 128 filling a portion of the region overlapping with the lower metal layer 118B, and an upper metal layer 141A provided on a portion of the eighth insulating film 128. Here, the upper metal layer 141A may be the same metal layer as the first to fourth source-drain electrodes 141, 142, 143, and 144.

[0106] The third metal block BLM3 includes a lower metal layer 141B in the same layer as the first to fourth source-drain electrodes 141, 142, 143, and 144 of the second transistor T2, a third hole CT3 in the first planarization film 131 in a portion of the region superimposed with the lower metal layer 141B, and an upper metal layer 152 provided on a portion of the first planarization film 131, filling the third hole CT3. Here, the upper metal layer 152 may be the same metal layer as the connecting electrode 151 that connects the second transistor T2 and the first electrode 161 of the light-emitting element 160.

[0107] Thus, the metal blocks BLM1, BLM2, and BLM3 are provided with a structure having vertical paths in the insulating film holes CT1, CT2, and CT3, which include at least two metal layers among the metal layers provided between the substrate 111 and the light-emitting element 160, such as the first and second transistors T1 and T2, storage capacitor Cst, first light-shielding pattern 112, and connecting electrode 151. When light propagates vertically in relation to the sensor section SS, the metal blocks BLM1, BLM2, and BLM3 prevent vertical light from propagating horizontally through the transparent material of the insulating films 120, 131, and 132 on the substrate 111, thereby preventing phenomena that reduce optical reliability, such as fluctuations in threshold voltage or changes in mobility characteristics of elements such as transistors T1 and T2 arranged in or around the sensor section SS.

[0108] The insulating film 120 provided on the substrate 111 includes, for example, a first insulating film 121, a second insulating film 122, a third insulating film 123, a fourth insulating film 124, a fifth insulating film 125, a sixth insulating film 126, a seventh insulating film 127, and an eighth insulating film 128. The insulating film 120 may include an inorganic insulating material.

[0109] The first insulating film 121 is disposed on the display area AA and the non-display area NA on the substrate 111. The first insulating film 121 is called a buffer film and may have the same function as buffer films known in the art. The first insulating film 121 is disposed on the substrate 111 and may protect structures located on the substrate 111 from moisture penetrating the substrate 111 and flatten the surface of the substrate 111. The first insulating film 121 may contain multiple inorganic insulating films.

[0110] The first insulating film 121 may extend to the edge of the non-visible region NA of the substrate 111 to prevent moisture from penetrating from the edge of the substrate 111. The first insulating film 121 may be a single inorganic film or may consist of multiple inorganic films stacked alternately.

[0111] For example, the first insulating film 121 may include one or more inorganic films from among silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiOxNy), or it may include a multilayer film in which the described inorganic films are stacked.

[0112] For example, the first light-shielding pattern 112 may be provided on the first insulating film 121. For example, the first light-shielding pattern 112 may be made of a conductive metallic material. Specifically, the conductive metallic material may include at least one of the following: aluminum-based metals such as aluminum (Al) or aluminum alloys; silver-based metals such as silver (Ag) or silver alloys; copper-based metals such as copper (Cu) or copper alloys; molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys; chromium; tantalum (Ta); neodymium (Nd); and titanium (Ti).

[0113] A second insulating film 122 may be placed on the first insulating film 121. The second insulating film 122 may function, for example, as a second buffer layer. The transistor provided on the substrate 111 may include a polysilicon type transistor in which the active layer is made of crystalline silicon. In this case, the second insulating film 122 may stabilize and planarize the formation surface of the active layer containing crystalline silicon. The second insulating film 122 may include an inorganic film, such as a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a multiple film thereof.

[0114] The second insulating film 122 may further include a third insulating film 123 that functions as a buffer layer for the first active layer 113. The third insulating film 123 may include an inorganic film, such as a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a multiple film thereof.

[0115] A first active layer 113 containing crystalline silicon may be provided on the third insulating film 123. The first active layer 113 may be formed of crystalline silicon by first forming amorphous silicon over the entire surface of the third insulating film 123 and then proceeding with crystallization through a laser irradiation process.

[0116] A third insulating film 123 may be used to cover the first active layer 113, and a fourth insulating film 124 may be provided. The fourth insulating film 124 may be used as the gate insulating film of the first transistor T1, which includes crystalline silicon as the first active layer 113.

[0117] The fourth insulating film 124 is provided with the first gate electrode 114 of the first transistor T1, the first storage electrode 115 of the storage capacitor Cst, and the lower metal layer 114A of the first metal block BLM1.

[0118] The first gate electrode 114, the first storage electrode 115, and the lower metal layer 114A of the first metal block BLM1 may be made of, for example, a light-shielding conductive metallic material. Specifically, the light-shielding conductive metallic material may include at least one of the following: aluminum-based metals such as aluminum (Al) and aluminum alloys, silver-based metals such as silver (Ag) and silver alloys, copper-based metals such as copper (Cu) and copper alloys, molybdenum-series metals such as molybdenum (Mo) and molybdenum alloys, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti).

[0119] A fourth insulating film 124 may cover the first gate electrode 114 and the first storage electrode 115, and a fifth insulating film 125 may be placed on top of it. The fifth insulating film 125 may function as an insulator between the first and second storage electrodes 115 and 116, and may function as an interlayer insulating film of the first transistor T1, which includes polycrystalline silicon as the first active layer 113.

[0120] The fifth insulating film 125 may contain an inorganic substance. The inorganic substance may include, for example, a silicon nitride film (SiNx) or a silicon oxide film (SiOx).

[0121] A second storage electrode 116, which overlaps with the first storage electrode 115, may be formed on the fifth insulating film 125 using a conductive metallic material. Specifically, the conductive metallic material may include at least one of the following: aluminum (Al) or aluminum alloys; silver (Ag) or silver alloys; copper (Cu) or copper alloys; molybdenum (Mo) or molybdenum alloys; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti).

[0122] The first storage electrode 115 and the second storage electrode 116 may each be a single layer or have a laminated structure of multiple different metal materials.

[0123] A sixth insulating film 126 may be placed on a fifth insulating film 125 on which a second storage electrode 116 is located. The inorganic insulating material of the sixth insulating film 126 may planarize the formation surface on which the second transistor T2 is formed. The sixth insulating film 126 may include a single film of an inorganic insulating film containing a silicon oxide film (SiOx) or a multilayer film in which other inorganic insulating films are stacked together with the silicon oxide film.

[0124] The sixth insulating film 126 is located beneath the second active layer 137 and functions as a buffer layer, while also planarizing the surface on which the second active layer 137 is formed. Since the sixth insulating film 126 does not emit hydrogen particles during heat treatment processes, it is possible to prevent the reliability of the second active layer 137 of the oxide semiconductor layer adjacent to the sixth insulating film 126 from being reduced by hydrogen particles.

[0125] A second active layer 137 of the second transistor T2 may be placed on the sixth insulating film 126. The second active layer 137 may, for example, contain an oxide semiconductor material. The oxide semiconductor material may consist of a combination of at least one metal and oxide from zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti). In some cases, a highly conductive metal such as iron (Fe) may be further included in the oxide semiconductor material to increase mobility.

[0126] More specifically, the oxide semiconductor materials that make up the second active layer 137 include zinc oxide (ZnO), zinc-tin oxide (ZTO), zinc-indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO)-indium-gallium-zinc oxide (IGZO), and indium-zinc-tin oxide (IZTO).

[0127] A seventh insulating film 127 may be placed over the second active layer 137. The seventh insulating film 127 may include a silicon oxide film and a silicon nitride film. The seventh insulating film 127 may function as a gate insulating film of the second transistor T2.

[0128] A first hole CT1 is provided that sequentially penetrates the seventh insulating film 127, the sixth insulating film 126, and the fifth insulating film 125, exposing at least a portion of the lower metal layer 114A of the first metal block BLM.

[0129] A conductive metal material is deposited on the seventh insulating film 127 to form the second gate electrode 118. A photosensitive resist is applied to the conductive metal material, and it is exposed and developed so that the resist pattern is selectively left in the area including the formation of the second gate electrode and the region of the first hole CT1, and in the area where the lower metal layer 118B of the second metal block BLM2 is formed. The conductive metal material is patterned using the resist pattern, and together with the second gate electrode 118 of the second transistor T2, the first hole CT1 is filled, and the upper metal layer 118A of the first metal block BLM1 and the lower metal layer 118B of the second metal block BLM2, which are partially provided on the upper part of the seventh insulating film 127, are formed together.

[0130] Here, the upper metal layer 118A penetrates and fills the first hole CT1 and comes into contact with the lower metal layer 114A. The upper metal layer 118A of the first metal block BLM1 may block light incident laterally from the transparent part TA inside the sensor part SS due to the light shielding properties of the conductive metal material.

[0131] The conductive metallic material forming the second gate electrode 118, the upper metal layer 118A, and the lower metal layer 118B may include at least one of the following: aluminum-based metals such as aluminum (Al) or aluminum alloys; silver-based metals such as silver (Ag) or silver alloys; copper-based metals such as copper (Cu) or copper alloys; metals of the molybdenum family; chromium (Cr); tantalum (Ta); neodymium (Nd); and titanium (Ti).

[0132] The upper metal layer 118A of the first metal block BLM1 and the lower metal layer 118B of the second metal block BLM2 may be provided together on the seventh insulating film 127 on which the second gate electrode 118 is located.

[0133] The eighth insulating film 128 is positioned to cover the lower metal layer 118B of the first metal block BLM1 and the second metal block BLM2.

[0134] For example, the eighth insulating film 128 may consist of multiple inorganic insulating films stacked together to maintain interlayer insulation between the second gate electrode 118 and the third and fourth source-drain electrodes 143 and 144, and to flatten the formation surface on which the third and fourth source-drain electrodes 143 and 144 are formed.

[0135] A second hole CT2 is provided, which penetrates the eighth insulating film 128 and exposes at least a portion of the lower metal layer 118B of the second metal block BLM. In the same process as providing the second hole CT2, the fifth to eighth insulating films 125, 126, 127, and 128 are selectively removed from the upper sides of the first active layer 113 to provide holes that expose the upper sides of the first active layer 113, and at the same time, the seventh and eighth insulating films 127 and 128 are selectively removed together from the upper sides of the second active layer 137 to provide holes that expose the upper sides of the second active layer 137. In the same process, holes penetrating the second to eighth insulating films 122, 123, 124, 125, 126, 127, and 128 may also be provided to expose a predetermined portion of the first light-shielding pattern 112 that protrudes laterally from the first active layer 113.

[0136] A conductive metal material is deposited on the eighth insulating film 128 to form the first and second source-drain electrodes 141 and 142 of the first transistor T1 and the third and fourth source-drain electrodes 143 and 144 of the second transistor T2.

[0137] A photosensitive resist is applied to a conductive metallic material, and after exposure and development, the resist pattern selectively remains in the area where the first to fourth source-drain electrodes 141, 142, 143, and 144 are formed, as well as in the peripheral area including the region of the second hole CT2, and in the area where the upper metal layer 141A of the second metal block BLM2 and the lower metal layer 141B of the third metal block BLM3 are formed. The conductive metallic material is patterned using the resist pattern to provide the first to fourth source-drain electrodes 141, 142, 143, and 144, the upper metal layer 141A of the second metal block BLM2, and the lower metal layer 141B of the third metal block BLM3.

[0138] Here, the first and second source-drain electrodes 141 and 142 are connected to the upper sides of the first active layer 113 via contact holes provided through the fifth to eighth insulating films 125, 126, 127, and 128, respectively. The second source-drain electrode 142 extends to overlap with the first light-shielding pattern 112, which protrudes laterally from the first active layer 113, and is connected to the first light-shielding pattern 112 via contact holes provided in the second to eighth insulating films 122, 123, 124, 125, 126, 127, and 128, thereby stabilizing the potential of the first light-shielding pattern 112.

[0139] The third and fourth source-drain electrodes 143 and 144 are connected to the upper sides of the second active layer 137, respectively, via contact holes provided through the seventh and eighth insulating films 127 and 128 on both sides of the second active layer 137. The third source-drain electrode 143 is then connected to a connecting electrode 151 located above it, and may have a greater width than the fourth source-drain electrode 144.

[0140] The upper metal layer 141A of the second metal block BLM2 fills the second hole CT2 provided in the eighth insulating film 128 and connects to the lower metal layer 118B.

[0141] The lower metal layer 141B of the third metal block BLM3 may be provided in an island-like manner on the eighth insulating film 128.

[0142] A portion of the metal block can be placed in a portion of the transparent section TA, as shown in Figure 4. Since each metal block has a vertical structure, it takes up almost no planar area. Even if a portion of the metal block is provided in the transparent section TA, the transmittance of the transparent section TA can be maintained.

[0143] Subsequently, a planarization film PLN may be provided to flatten the surface on which the light-emitting element 160 is formed on the eighth insulating film 128.

[0144] For example, the planarization film PLN may include a first planarization film 131 and a second planarization film 132.

[0145] The first and second planarization films 131 and 132 may be formed from organic materials. The organic materials constituting the first and second planarization films 131 and 132 may include one or more materials from among acrylic resin, phenolic resin, polyimide resin, unsaturated polyester resin, polyamide resin, benzocyclobutene, polyphenylene resin, and polyphenylene sulfides resin. Each of the first and second planarization films 131 and 132 is thicker than each of the first to eighth insulating films 121, 122, 123, 124, 125, 126, 127, and 128, which is advantageous for planarization.

[0146] After applying the first planarization film 131, the device is provided with a contact hole that exposes the third source-drain electrode 143 of the second transistor T2, and a third hole CT3 that exposes at least a portion of the lower metal layer 141B of the third metal block BLM3.

[0147] A connecting electrode 151, provided on the first planarization film 131 through a contact hole that exposes the third source-drain electrode 143, is connected to the third source-drain electrode 143. The third hole CT3 is filled with a conductive metallic material in the same layer as the connecting electrode 151, and the upper metal layer 152 of the third metal block BLM3 is provided.

[0148] Here, the upper metal layer 152 of the third metal block BLM3, which is filled into the third hole CT3, is in contact with the first planarization film 131 on its side surface, and the region of the upper metal layer 152 on the first planarization film 131 is in contact with the second planarization film 132. Therefore, the third metal block BLM3 fills the third hole CT3 of the thick organic insulating film and may have a longer vertical height than the first and second holes CT1 and CT2, which consist of through holes in the inorganic insulating film.

[0149] The connecting electrode 151 and the upper metal layer 152 of the third metal block BLM3 may, for example, be formed from a multilayer of any or an alloy thereof selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or copper (Cu). However, the embodiments herein are not limited thereto. In some cases, the connecting electrode 151 may be omitted.

[0150] The metal block BLM may further utilize other metal layers of the first and second transistors T1 and T2, or the first light-shielding pattern 112, or the electrodes 115 and 116 of the storage capacitor.

[0151] If the connecting electrode 151 is omitted, the third source-drain electrode 143 is directly connected to the first electrode 161 of the light-emitting element 160.

[0152] The light-emitting element 160 consists of a stack of a first electrode 161, an intermediate layer 162, and a second electrode 163. The first electrode 161 is provided independently for each subpixel SP and may be separated from adjacent subpixels.

[0153] The first electrode 161 may include, for example, a highly reflective metallic material or a transparent electrode. For example, the first electrode 161 may be formed as a single layer structure of a transparent conductive film such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), TO (Tin Oxide), or ITZO (Indium Tin Zinc Oxide), a multilayer structure of aluminum (Al) and titanium (Ti) (Ti / Al / Ti) (ITO / Al / ITO), an APC (Ag / Pd / Cu) alloy, a multilayer structure of APC alloy and ITO (ITO / APC / ITO), or a multilayer structure of silver (Ag) and molybdenum / titanium alloy (Ag / MoTi), or it may include a single layer structure made of any material selected from silver (Ag), silver (Ag), gold (Au), magnesium (Mg), calcium (Ca), or barium (Ba), or two or more alloy materials. If the first electrode 161 consists of a single layer of transparent conductive film, light emitted from the light-emitting element 160 may pass through the first electrode 161 and be emitted. If the first electrode 161 includes a reflective electrode, light is emitted via the second electrode 163 facing the first electrode 161.

[0154] The first electrode 161 may include, for example, a reflective electrode and have the function of shielding light from incident on transistors T1 and T2 at the bottom of the light-emitting element 160. The first electrode 161 may consist of, for example, a stacked structure of a first transparent electrode, a reflective electrode, and a second transparent electrode. The second transparent electrode, which is the uppermost electrode of the first electrode 161, may act as a dielectric to lower the barrier at the interface with the intermediate layer 162 where holes are injected. Here, the first and second transparent electrodes may be transparent oxide electrodes such as ITO and IZO. The reflective electrode may include silver, a silver alloy such as APC (Ag-Pd-Cu), aluminum, or an aluminum alloy.

[0155] In a top-emitting type light-emitting display device, the second electrode 163 may include a transparent electrode or a thin reflective transmissive electrode that allows light transmission through the second electrode 163. Examples of transparent electrodes include ITO and IZO, while reflective transmissive electrodes may be any substance selected from silver (Ag), aluminum (Al), molybdenum (Mo), gold (Au), magnesium (Mg), ytterbium (Yb), and strontium (Sr), or an alloy of two or more of these substances.

[0156] The intermediate layer 162 on the first electrode 161 includes a hole-related first common layer CML1 of the hole injection layer HIL and hole transport layer HTL, an electron-related second common layer CML2 of the light-emitting layer EML, a hole blocking layer HBL, an electron transport layer ETL, and an electron injection layer EIL.

[0157] A light-shielding bank 170 is provided covering the top of the first electrode 161, and the opening of the light-shielding bank 170 on the first electrode 161 may be defined as a light-emitting portion. The light-shielding bank 170 contains a light-shielding organic insulating material and may maintain a vertical thickness of a certain magnitude or greater. The light-shielding organic insulating material of the light-shielding bank 170 may have a vertical thickness of, for example, 1 μm to 5 μm.

[0158] A transparent bank 180 may be further provided on the light-shielding bank 170 to protect the light-shielding bank 170 and prevent the inflow of impurities. The transparent bank 180 may be selectively provided on the light-shielding bank 170 and may function as a spacer.

[0159] The spacer is placed locally on a portion of the upper surface of the light-shielding bank 170 rather than on the entire upper surface of the light-shielding bank 170. This prevents the light-shielding bank 170 and the lower structure from collapsing when the deposition mask is aligned with the substrate 111 during the deposition process of the intermediate layer 162.

[0160] The intermediate layer 162 may include multiple functional layers together with the light-emitting layer. For example, the intermediate layer 162 may include a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, etc. The intermediate layer 162 may be formed in a tandem structure with multiple stacks, each containing a hole transport layer, a light-emitting layer, and an electron transport layer, and a charge generation layer between the stacks. The charge generation layer may include, for example, an n-type charge generation layer and a p-type charge generation layer.

[0161] Each subpixel SP is composed of a light-emitting element 160 and exhibits an individual color. The light-emitting layer may be patterned using a deposition mask that includes an aperture corresponding to the light-emitting portion for each subpixel and placed on each subpixel SP.

[0162] Functional layers other than the light-emitting layer, such as the hole injection layer, hole transport layer, electron transport layer, electron injection layer, and charge generation layer, are included in common to multiple subpixels. Furthermore, the second electrode 163 may also be included in common to multiple subpixels.

[0163] The second electrode 163 may be formed by thinning a transmissive electrode such as ITO or IZO, or a reflective transmissive electrode such as silver, silver alloy, magnesium, magnesium alloy, ytterbium (Yb), or ytterbium alloy.

[0164] A capping layer (not shown) may be further formed on the second electrode 163 to protect the second electrode 163 of the light-emitting element 160 and to improve the light emission efficiency to the upper surface.

[0165] A sealing layer 190 is provided on the upper part of the second electrode 163 to prevent moisture from permeating the internal structure and to protect the internal structure from the outside air.

[0166] The sealing layer 190 may, for example, include a structure in which a first inorganic sealing layer 191, an organic sealing layer 192, and a second inorganic sealing layer 193 are laminated together.

[0167] On the other hand, the sealing layer 190 may further include a black matrix 201 that overlaps with the light-shielding bank 170 and a color filter 202 that overlaps with the opening of the light-shielding bank 170.

[0168] The display may be equipped with a protective film 203 that covers the black matrix 201 and color filter 202 and protects the top surface of the display device.

[0169] In the embodiments of this specification, the display device has a black matrix 201 and a color filter 202 that enable color representation of the sub-pixel light-emitting portion of the light-emitting element. The black matrix 201 has light absorption properties in the visible light region, and the color filter 202 may block light in the remaining wavelength range other than the transmission wavelength of a predetermined color. Therefore, even if external light is incident through the protective film 203, the area where the black matrix 201 is located can block the light, and the area where the color filter 202 is provided can block the remaining light other than the wavelengths with selective transmission properties. This reduces the amount of external light incident on the light-emitting element side and may have both color transmission and external light reflection functions.

[0170] The display device according to the embodiments of this specification is equipped with a light-shielding bank 170 around the light-emitting element 160, which blocks light incident in an oblique direction from the external light and can more effectively prevent the visibility of external light reflection.

[0171] Furthermore, in the display device of this embodiment, as in the first sensor section A, metal blocks BLM: BLM1, BLM2, and BLM3 are provided along the very edge of the transmissive section TA in the region where the transmissive section TA is further provided in order to effectively collect light from the sensor SS.Therefore, when light travels vertically from top to bottom in the region receiving external light, even if there is lateral leakage light that leaks laterally from such vertical light, the light-shielding metallic material of the metal blocks blocks it, preventing light traveling from the substrate 111 to the sides from being transmitted to transistors T1 and T2, thereby ensuring element stability.

[0172] Furthermore, the metal blocks BLM:BLM1, BLM2, and BLM3 occupy almost no planar area, and their height can be measured from the vertical thickness on the substrate 111 and the first electrode 161 of the light-emitting element 160, thereby effectively improving the effect of side leakage light on the substrate 111.

[0173] On the other hand, the metal blocks BLM:BLM1, BLM2, and BLM3 may contain metals effective for hydrogen capture, such as titanium and tungsten. Therefore, the metal blocks BLM:BLM2, BLM2, and BLM3 can capture hydrogen remaining in the insulating film 120 on the substrate 111, and prevent the first and second active layers 113 and 137 adjacent to the insulating film from being affected by hydrogen.

[0174] The following describes other planar metal blocks.

[0175] Figure 5 is a plan view showing a display device according to a second embodiment of this specification.

[0176] As shown in Figure 5, the display device according to the second embodiment of this specification may have a light-shielding bank 170 that curves outwards toward the transmissive portion TA in some areas along the edges of the light-emitting portions EMA, EMB, and EMC, which have different shapes from each other, and may be provided with a metal block BLMA along the edge of the curved-out area. In this case, the metal block BLMA may be positioned along the edge of the light-shielding bank 170 adjacent to the transmissive portion TA.

[0177] In the illustrated region, the light-shielding bank 170, located outside the second light-emitting section EMB, protrudes in a partially curved shape along the edge of the second light-emitting section EMB. In this case, a metal block BLMA may be provided adjacent to the edge of the second light-emitting section EMB.

[0178] In the region where the transmissive portion TA is relatively positioned, light reception can be concentrated. When the metal block BLMA is positioned in a region protruding from the transmissive portion TA, the metal block BLMA adjacent to the transmissive portion TA can be effectively blocked when light is received by the first sensor portions A:A1 and A2.

[0179] In this case, the metal block BLMA may completely overlap with the light-shielding bank 170.

[0180] This is a plan view showing a display device according to a third embodiment of this specification.

[0181] As shown in Figure 6, the display device according to the third embodiment of this specification has a shape consisting of a first group of metal blocks BLMA arranged in a curved shape along the edge of the second light-emitting section EMB, and a second group of metal blocks BLM arranged in multiple rows along the row direction.

[0182] Here, the first group of metal blocks BLMA overlaps with the light-shielding bank 170 overall, while the second group of metal blocks BLMB may have a portion that does not overlap with the light-shielding bank 170. The second group of metal blocks BLMB has a vertical path in the upper metal layer filling the hole that is effective in preventing light from entering from the side, and by reducing the flat area, the non-overlapping area of ​​the light-shielding bank 170 can be reduced, and the flat area can be overlapped with the first wiring L1 or the second wiring L2 so that the influence of the transmittance of the first sensor part A1 is almost negligible.

[0183] In the embodiments of this specification, when a transmissive portion is provided in the sensor portion to improve light reception efficiency, a metal block can be placed at the edge of the transmissive portion to maintain the light transmittance of the provided transmissive portion and to improve the reliability of the elements around the transmissive portion.

[0184] The display device according to the embodiments of this specification includes a metal block surrounding the sensor portion, which contains overlapping metal layers of other layers and an upper metal layer material filled in the interlayer holes of the metal layers. When light travels vertically from the top to the lower sensor, the metal block adjacent to the light path prevents lateral light transmission, thereby preventing transistors and other components placed on the substrate from being affected by the sensor light reception.

[0185] The display devices of the embodiments specified herein may prevent external light reflection by comprising a light-shielding bank defining the light-emitting portion and a black matrix and color filter array configuration arranged on a sealing layer, without the addition of a separate polarizing plate.

[0186] The display device according to the embodiments of this specification includes vertical connections between metal layers located in different layers, which can reduce wiring resistance when the metal layers are used as power supply voltage wiring.

[0187] In the embodiments of this specification, when the display device includes a multi-stacked transistor structure in a region overlapping with the light-emitting element on the substrate, the metal block may comprise a plurality of metal blocks with different vertical lengths, thereby effectively preventing photosensitivity of each transistor in the multi-stacked structure.

[0188] The display devices of this specification can embody a metal block using a metal layer on the same layer as the transistor configuration or wiring placed between the substrate and the light-emitting element, and the layer structure of the display device may not be increased or decreased. Therefore, the production energy required to manufacture the display device can be reduced, and the use of harmful production substances or regulated substances can be reduced, which is advantageous for recycling and contributes to the realization of an environmentally friendly display device.

[0189] The following describes other examples of vertical connection configurations for metal blocks.

[0190] Figures 7a to 7d are cross-sectional views showing various embodiments of the metal block.

[0191] The metal block BLM shown in Figure 7a comprises a first metal layer 114C, a second metal layer 118C which fills the first hole CTA that penetrates the fifth to seventh insulating films 125, 126, and 127 and is located on the seventh insulating film 127, and a third metal layer 141C which overlaps with the second metal layer 118C but fills the second hole CTB provided in the eighth insulating film 128. Here, the first metal layer 114C is located on the same layer as the first gate electrode 114 of the first transistor T1. The second metal layer 118C is located on the same layer as the second gate electrode 118 of the second transistor T2. The third metal layer 141C may be located on the same layer as the first to fourth source-drain electrodes 141, 142, 143, and 144 of the first and second transistors T1 and T2.

[0192] Here, the hole CT of the metal block BLM includes a first hole CTA and a second hole CTB that overlap each other. The first hole CTA and the second hole CTB overlap, and the vertical length of the metal block is long. Furthermore, even without increasing the planar area of ​​the metal block, it is possible to block the transmission of lateral light from the sensor area to the non-sensor area in the long vertical fifth to eighth insulating films 125, 126, 127, and 128.

[0193] On the other hand, when a transistor includes an active layer made of an oxide semiconductor material, the off-state characteristics are excellent, but the characteristics of the active layer may deteriorate due to light transmission. As in the embodiment of this specification, the metal block penetrates the seventh insulating film 127 and the sixth insulating film 126 adjacent to the second active layer 137, which contains an oxide semiconductor material, and the metal layer of the metal block is filled, thereby ensuring the stability of the active layer made of an oxide semiconductor.

[0194] Similar to Figure 7a, the metal block BLM may be covered with first and second planarization films 131 and 132.

[0195] The metal block BLM prevents some of the light traveling through the surrounding sensor section SS from leaking out to the side, thereby preventing the effects of leaked light on elements including transistors around the metal block BLM.

[0196] As shown in Figure 7(b), a light-shielding bank 170 may be further provided on the first and second planarization films 131 and 132 in the region where the metal block BLM is placed. The light-shielding bank 170 may contain a material that absorbs light of at least several wavelengths in the visible light band. The light-shielding bank 170 may contain a black pigment.

[0197] The metal block BLM in the embodiments of this specification may, in addition to being a light-shielding bank 170 that directly prevents direct light, also have the function of preventing the transmission of side-leaking light by acting as a light-shielding film that propagates horizontally on the substrate 111.

[0198] The metal block shown in Figure 7(c) includes a second metal layer 118C placed on the seventh insulating film 127, and overlaps with the second metal layer 118C, but also includes a third metal layer 141C filled in the hole CT2A provided in the eighth insulating film 128. In this case as well, the metal layer of the metal block is filled on the seventh insulating film 127 adjacent to the active layer 137, ensuring the stability of the active layer made of oxide semiconductor.

[0199] The metal block shown in Figure 7d comprises a first metal layer 114C and a third metal layer 141C that fills a hole CT2B penetrating the fifth to eighth insulating films 125, 126, 127, and 128, and is provided in the eighth insulating film 128. Here, the first metal layer 114C is located on the same layer as the first gate electrode 114 of the first transistor T1. The second metal layer 118C is located on the same layer as the second gate electrode 118 of the second transistor T2. The third metal layer 141C may be located on the same layer as the first to fourth source-drain electrodes 141, 142, 143, and 144 of the first and second transistors T1 and T2. A single-hole CT2B configuration with a vertical path may be provided, and the metal block may have the same vertical length as the metal block shown in Figure 7a described above.

[0200] Figure 8 is a plan view showing a display device according to a fourth embodiment of this specification. Figure 9 is a cross-sectional view taken along lines II to II' in the figure.

[0201] Figure 8 shows the second sensor section B of Figure 1, and is a region that includes an RGB sensor for detecting the color density of ambient light and / or an illuminance sensor for sensing the brightness of ambient light.

[0202] As shown in Figure 8, the second sensor unit B does not detect ambient light in the region where the sensor SS is located and does not directly display an image in that region; therefore, light-emitting units EMA, EMB, and EMC are regularly arranged around the sensor SS.

[0203] As shown in Figure 4, the sensor SS can be positioned on the underside of the substrate 111. As shown in Figure 9, some of the metal blocks BLM may not overlap with the sensor SS. The drive chip of the sensor SS may not be positioned on the light-receiving part SST of the sensor SS.

[0204] The sensor SS may have an aperture in a light-shielding bank 170 that defines the light-emitting parts EMA, EMB, and EMC on the substrate 111, with an aperture the size of the light-receiving part SST of the sensor SS, in order to increase the transmittance of ambient light.

[0205] In Figure 8, the light-receiving SST of the sensor unit is shown as circular, but the embodiments described herein are not limited to this. The light-receiving SST may be elliptical, or it may have a polygonal shape including straight and curved sections.

[0206] Similar to Figures 8 and 9, the edge line 170E of the light-shielding bank 170 is adjacent to the periphery of the sensor's light-receiving part SST, and the light-shielding bank 170 is removed from the sensor's light-receiving part SST. The sensor's light-receiving part SST is left only as transparent films / layers 120, 131, 132, 162, 163, 190, and 203 from the substrate 111 to the upper protective film 203, and ambient light incident from the top of the protective film 203 may be sensed on the underside of the substrate 111 without any limitations on transmittance.

[0207] The area around the light-receiving part SST of the sensor may include a metal block BLM in some locations that overlap with the light-shielding bank 170.

[0208] The metal block BLM shown in Figure 9 includes a first metal layer 114C, a second metal layer 118C which fills the first hole CTA that penetrates the fifth to seventh insulating films 125, 126, and 127 and is located on the seventh insulating film 127, and a third metal layer 141C which overlaps with the second metal layer 118C but fills the second hole CTB provided in the eighth insulating film 128. The metal block BLM is formed such that the triple metal layers overlap the first and second holes CTA and CTB to form a long vertical path.

[0209] Here, the first metal layer 114C is located on the same layer as the first gate electrode 114 of the first transistor T1. The second metal layer 118C is located on the same layer as the second gate electrode 118 of the second transistor T2. The third metal layer 141C may be located on the same layer as the first to fourth source-drain electrodes 141, 142, 143, and 144 of the first and second transistors T1 and T2.

[0210] However, the presented metal block BLM is just one example, and the metal block BLM may also be arranged in a planar, divided shape as shown in Figures 3 to 6. Furthermore, the metal block BLM may have a vertical structure variation in which two layers of metal are bonded together through holes penetrating at least one insulating film, as shown in Figures 4, 7b, and 7c.

[0211] The metal block BLM is positioned between the sensor and the subpixels located around the sensor, even when light passes vertically through the light-receiving section SST of the sensor, preventing light from diffusing and transmitting to the sides from the insulating film 120 and the first and second planarization films 131 and 132 on the substrate 111. This prevents ambient light from affecting the characteristics of transistors T1 and T2 included in the pixel circuit electrically connected to the light-emitting element 160. Transmission of light to the sides due to ambient light can affect transistors including a photosensitive active layer. The display device of this embodiment can block the transmission of side light by the metal layer material filling the holes by arranging holes in at least the insulating film adjacent to the active layer, through which vertical connections are made between the multiple metal layers of the metal block BLM.

[0212] Figure 10 is a plan view showing an example of the first metal layer in region C of the display device shown in Figure 8. Figure 11 is a plan view showing an example of the first hole and second metal layer in region C of the display device shown in Figure 8. Figure 12 is a plan view showing an example of the second hole and third metal layer in region C of the display device shown in Figure 8.

[0213] As shown in Figure 10, for example, the first metal layer 114C may have a planar shape that surrounds the light-receiving part SST of the sensor. The first metal layer 114C may be located on the same layer as, for example, the first wiring L1 arranged along the X-axis direction in Figure 8.

[0214] Here, the first wiring L1 may include one or more gate wires, light emission control lines, etc. This is just one example; any wiring arranged in the X-axis direction may be considered the first wiring L1.

[0215] The first wiring L1 may have a curved region adjacent to the sensor SS, as shown in Figure 10, so as not to overlap with the sensor light receiving unit SST, and partially surrounding the sensor SS. This is to maintain light transmittance when the sensor light receiving unit SST detects ambient light.

[0216] Similar to Figure 11, the second metal layer 118C, located in a different layer from the first metal layer 114C, is positioned by filling the first hole CTA, as shown in Figure 9. The first hole CTA is limited to a portion of the planar area of ​​the second metal layer 118C and may appear as a very thin metal wire when the substrate 111 is observed in plan view.

[0217] Furthermore, second wirings L21 and L22, arranged along the Y-axis direction in Figure 8, may be placed on the same layer as the second metal layer 118C. Examples of second wirings L21 and L22 include data wiring DL, high-voltage wiring VDDL, and low-voltage wiring VSSL, as explained in Figure 2. This is just one example; any wiring arranged along the Y-axis direction may be referred to as second wiring L2.

[0218] As shown in Figure 12, the third metal layer 141C, which is placed on the second metal layer 118C, is positioned by filling the region that overlaps with the second metal layer 118C with second hole CTBs, as shown in Figure 9. The second hole CTBs are limited to a portion of the planar area of ​​the third metal layer 141C, and when the substrate 111 is observed in plan view, they may appear as very thin metal wires.

[0219] On the other hand, the third metal layer 141C, as shown in Figure 12, is connected to at least one second wiring L2 that extends vertically and is positioned in the Y-axis direction, thereby reducing the wiring resistance of the second wiring L2. The third metal layer 141C may have a width wider than the width of the second wiring L2. The third metal layer 141C is located on the same layer as the source and drain electrodes 141, 142, 143, and 144 of the transistor, and the third metal layer 141C, which constitutes part of the metal block BLM, can reduce the wiring resistance of part of the second wiring L2: L21, L22, for example, the high-potential DD to which a high potential voltage is supplied and the high-potential D to which a high potential voltage is supplied. This modification has the advantage of reducing wiring resistance in a configuration that does not require the addition of processes or materials. On the other hand, the illustrated example is just one example, and the position of the additional contact hole CTD can also be changed to connect the third metal layer 141C, etc., to wiring to which other voltages are applied, thereby reducing the resistance of other wiring.

[0220] The high-voltage wiring VDDL and low-voltage wiring VSSL, to which voltage is applied, occupy a relatively large area on the substrate 111 compared to other wirings. However, by connecting at least one of these voltage-applying wirings to at least one metal layer of the metal block, wiring resistance can be reduced, effectively preventing brightness unevenness caused by resistance differences in different areas across the entire display panel.

[0221] Thus, in the embodiments of this specification, the display device can be realized using a metal layer of the same layer as the transistor configuration or wiring placed between the substrate and the light-emitting element, thus avoiding increasing or decreasing the layer structure in the display device. Therefore, it is possible to reduce the production energy required to manufacture the display device and reduce the use of harmful production substances or regulated substances, which is advantageous for recycling and contributes to the realization of an environmentally friendly display device.

[0222] The display device according to the embodiments of this specification can prevent a decrease in element reliability and reduce the failure rate, and can achieve ESG (Environment / Social / Governance) through the effect of saving production energy by process optimization.

[0223] On the other hand, the display device of the embodiment described in Figures 8 to 12 shows that there is a change in the region on the substrate 111 that overlaps with the second sensor unit B that detects ambient light.

[0224] The metal block BLM, consisting of a lamination of the first to third metal layers 114C / 118C / 141C, may also be shaped to surround the light-receiving part SST of the sensor SS without overlapping it. Furthermore, the metal block BLM overlaps with the light-shielding bank 170 that defines the light-emitting parts EMA, EMB, and EMC, which are positioned around the sensor SS, thereby preventing external visibility.

[0225] A transparent bank 180 may be provided on top of the light-shielding bank 170 for further protection.

[0226] As shown in Figure 4, each light-emitting section EMA, EMB, and EMC around the sensor includes a light-emitting element 160 consisting of a stack of a first electrode 161, an intermediate layer 162, and a second electrode.

[0227] The light-emitting element 160 may be provided with a sealing layer 190 in which inorganic sealing layers 191, 193 and organic sealing layer 192 are alternately stacked.

[0228] The sealing layer 190 may include a black matrix 201 in a region corresponding to the light-shielding bank 170. The black matrix 201, together with the light-shielding bank 170, can perform the function of preventing reflection of external light by light absorption in the region where it is placed. Therefore, the display device of the embodiment specified herein can prevent reflection of external light by the configuration of the black matrix 201 and the light-shielding bank 170 without the need for a polarizing plate.

[0229] On the other hand, color filters (see 202 in Figure 4) are provided on the sealing layer 190 corresponding to the EMA, EMB, and EMC of each light-emitting section, and together with the black matrix 201 and light-shielding bank 170, they can perform an external light reflection prevention function.

[0230] The region shown in Figure 9 is the light-receiving section SST of the sensor and the area around the light-receiving section SST, and this region may not be suitable for positioning the color filter 202 for sensing without distortion of ambient light.

[0231] The display device according to the embodiments of this specification includes a metal block surrounding the sensor portion, which contains overlapping metal layers of other layers and an upper metal layer material filled in the interlayer holes. When light travels vertically from the top to the lower sensor, the metal block adjacent to the light path prevents lateral light transmission, thereby preventing transistors and other components on the substrate from being affected by the sensor's light reception.

[0232] The display devices of the embodiments described herein can prevent external light reflection by using a light-shielding bank that defines the light-emitting portion and a black matrix and color filter array configuration arranged on a sealing layer, without adding a separate polarizing plate.

[0233] The display devices of the embodiments described herein feature vertical connections between metal layers provided in different layers, which can reduce wiring resistance when the metal layers are used as power supply voltage wiring.

[0234] In the embodiments of this specification, when a transparent section is provided in the sensor section to increase the light receiving efficiency, a metal block can be placed at the edge of the transparent section to maintain the light transmittance of the provided transparent section while simultaneously improving the reliability of the elements surrounding the transparent section. One of the objectives is to provide a display device.

[0235] In the embodiment of this specification, when the display device includes a multi-stack structure of transistors in a region superimposed on a substrate with a light-emitting element, multiple metal blocks with different vertical lengths can be provided, thereby effectively preventing the photosensitivity of each transistor in the multi-stack structure.

[0236] In one embodiment of this specification, the display device can be realized as a metal block by utilizing the configuration of the transistors placed between the substrate and the light-emitting element, or by using a metal layer on the same layer as the wiring, thereby avoiding increasing or decreasing the layer structure in the display device. Consequently, the production energy required to produce the display device can be reduced, the use of harmful production substances or regulated substances can be reduced, it is advantageous for recycling, and it is advantageous for realizing an environmentally friendly display device.

[0237] The display devices according to the embodiments of this specification can prevent a decrease in element reliability and reduce the defect rate, and can embody ESG (Environment / Social / Governance) through the effect of saving production energy through process optimization.

[0238] A display device according to one embodiment of this specification may include a substrate including a display area and a non-display area surrounding the display area; a sensor portion disposed on the underside of the substrate in at least a portion of the display area; a plurality of light-emitting elements provided in the display area, including an intermediate layer including a light-emitting layer and a second electrode; a light-shielding bank defining the light-emitting portion of each of the plurality of first electrodes; and a metal block positioned perpendicularly between the substrate and the light-emitting elements and adjacent to the sensor portion, including two or more metal layers.

[0239] In a display device according to one embodiment of this specification, the metal block may include a first hole between the first metal layer and the second metal layer, in which the material of the second metal layer is filled.

[0240] In one embodiment of the present invention, the material of the second metal layer filling the first hole can be in contact with an insulating film disposed between the first metal layer and the second metal layer.

[0241] A display device according to one embodiment of this specification may include an inorganic insulating film between the first metal layer and the second metal layer, comprising a plurality of different inorganic insulating materials.

[0242] In a display device according to one embodiment of this specification, at least one transistor is provided vertically between the substrate and one of the plurality of first electrodes, the transistor comprising oxide semiconductor layers, a gate electrode and a source-drain electrode, each arranged in different layers, and at least a portion of the first holes may be adjacent in planar to the side surface of the oxide semiconductor layer.

[0243] The metal block of the display device according to one embodiment of this specification includes a third metal layer overlapping the second metal layer, and may further include a second hole between the second metal layer and the third metal layer, which is filled with the material of the third metal layer.

[0244] The material of the third metal layer filling the second hole may come into contact with the planarization film.

[0245] One of the plurality of first electrodes is electrically connected to a transistor positioned between the substrate and the light-emitting element, and the metal block may include at least one electrode included in the transistor and an additional first metal layer.

[0246] A display device according to one embodiment of this specification further includes connecting electrodes arranged vertically between each of the plurality of first electrodes and the transistors, in a layer different from the electrodes included in the transistors, and the metal block may further include a second metal layer, the same as the connecting electrodes.

[0247] The transistor may include a first transistor containing crystalline silicon as a first active layer and a second transistor containing an oxide semiconductor as a second active layer.

[0248] The metal block may contain at least one layer of hydrogen-collecting metal.

[0249] At least one of the metal layers included in the metal block can be arranged in the row or column direction within the display area.

[0250] In a display device according to one embodiment of this specification, the region of the substrate overlapping the sensor portion includes a plurality of light-emitting portions and a transmissive portion, the light-shielding bank is disposed between the plurality of light-emitting portions and between the plurality of light-emitting portions and the transmissive portion, and the metal block can be positioned vertically between the substrate and the layer of the light-shielding bank and superimposed on the sensor portion.

[0251] In a display device according to one embodiment of this specification, the metal block can be arranged along the edge of the light-shielding bank adjacent to the transmissive portion.

[0252] In a display device according to one embodiment of this specification, additional metal blocks may be further included, which are parallel to the metal blocks in the row or column direction and do not overlap with the light-shielding bank.

[0253] The display device according to one embodiment of this specification, wherein the additional metal block is disposed at the end of the transparent portion, as described in claim 14.

[0254] In a display device according to one embodiment of this specification, the light-shielding bank can be arranged so as to surround the sensor portion without overlapping it.

[0255] In a display device according to one embodiment of this specification, the metal block may be provided with a width smaller than the light-shielding bank surrounding the sensor portion.

[0256] In a display device according to one embodiment of this specification, at least one metal layer included in the metal block may be a power supply voltage wiring.

[0257] In a display device according to one embodiment of this specification, the metal block can be floated.

[0258] A display device according to one embodiment of this specification may further include a transparent bank on which the light-shielding bank is superimposed.

[0259] A display device according to one embodiment of this specification further includes a sealing layer covering a light-emitting element and a light-shielding bank, and an anti-reflective coating disposed on the sealing layer, comprising a black matrix and a color filter layer, wherein the sealing layer can overlap with a sensor portion.

[0260] On the other hand, the present invention described above is not limited to the embodiments and accompanying drawings, and it will be obvious to those with ordinary skill in the art to which the present invention belongs that various substitutions, modifications, and changes are possible without departing from the technical spirit of the present invention. [Explanation of symbols]

[0261] 100: Display device AA: Display area NA: Hidden area A, B: Sensor section A1, A2: Sensors SP: Subpixel GL: Gate wiring DL: Data wiring EM, EMA, EMB, EMC: Light-emitting part L1, L2: Wiring 111: Circuit board 120: Insulating film TA: Transparent part 170: Light-shielding bank 112: First light-blocking pattern 113: First Active Tier 114: First gate 115: First storage electrode 116: Second storage electrode 137: Second Active Layer 118: Second gate electrode 131: First planarization film 132: Second planarization film PLN: Planarization film 141,142,143,144: Source and drain electrodes 114A,114C: 1st metal layer CT1: Hole 1 118A, 118B, 118C: 2nd metal layer CT2: Hole 2 151: Connecting electrode 141C: 3rd metal layer CT3: Hole 3 160: Light-emitting element 161: 1st electrode 162: Middle Class 163: 2nd electrode 180: Transparent Bank 190: Sealing layer 191,193: Inorganic sealing layer 192: Organic sealing layer 201: Black Matrix 202: Color Filter 203: Protective film SST: Light receiving section VDDL: High-voltage wiring

Claims

1. A substrate including a display area and a non-display area outside the display area, At least a portion of the display area contains a sensor unit located on the lower side of the substrate. A light-emitting element comprising a plurality of first electrodes, an intermediate layer including a light-emitting layer on the first electrodes, and a second electrode on the intermediate layer, provided on the display area of ​​the substrate, A light-shielding bank that defines the light-emitting portion of the light-emitting element, which is positioned on each of the plurality of first electrodes, and A display device comprising a metal block positioned between the substrate and the light-emitting element, comprising two or more metal layers, and arranged adjacent to the sensor portion, extending vertically.

2. In the cross-sectional view, at least one insulating film is further included between the substrate and the light-emitting element. The display device according to claim 1, wherein the metal block includes a first metal layer beneath the at least one insulating film, a second metal layer on top of the at least one insulating film, and a first hole between the first metal layer and the second metal layer, on top of the at least one insulating film, filled with the material of the second metal layer.

3. The display device according to claim 2, wherein the material of the second metal layer filling the first hole is in contact with the at least one insulating film disposed between the first metal layer and the second metal layer.

4. The display device according to claim 2, wherein the at least one insulating film comprises an inorganic insulating film containing a plurality of different inorganic insulating materials.

5. The substrate and one of the plurality of first electrodes are perpendicular to each other, The transistor includes oxide semiconductor layers, a gate electrode, and source and drain electrodes, each arranged in different layers. The display device according to claim 2, wherein at least a portion of the first hole is adjacent in a planar manner to the side surface of the oxide semiconductor layer.

6. The second metal layer and the light-emitting element further include another insulating film, The display device according to claim 4, wherein the metal block further comprises a third metal layer overlapping the second metal layer on the other insulating film, and a second hole between the second metal layer and the third metal layer in which the material of the third metal layer is filled on the other insulating film.

7. The display device according to claim 6, wherein the material of the third metal layer filling the second hole is in contact with the planarization film.

8. The present invention further includes a transistor disposed between the substrate and the light-emitting element and electrically connected to one of the plurality of first electrodes, The display device according to claim 1, wherein the metal block includes at least one electrode included in the transistor and a first metal layer.

9. The plurality of first electrodes and the transistor further include connecting electrodes arranged perpendicular to a different layer from the electrodes included in the transistor, The display device according to claim 8, wherein the metal block further comprises a second metal layer, the same as the connecting electrode.

10. The display device according to claim 8, wherein the transistor includes a first transistor having crystalline silicon as a first active layer and a second transistor having an oxide semiconductor as a second active layer.

11. The display device according to claim 1, wherein the metal block comprises at least one layer of hydrogen-collecting metal.

12. The display device according to claim 1, wherein the metal block is arranged adjacent to the sensor portion in the row or column direction.

13. The region of the substrate that overlaps with the sensor portion includes a plurality of light-emitting portions and a transmission portion. The light-shielding bank is arranged between the plurality of light-emitting parts and between the plurality of light-emitting parts and the transmissive part. The display device according to claim 1, wherein the metal block is positioned perpendicularly between the substrate and a part of the light-shielding bank and is arranged superimposed on the sensor portion.

14. The display device according to claim 13, wherein the metal block is arranged along the edge of the light-shielding bank adjacent to the transparent portion.

15. The metal further includes additional metal blocks arranged along the row or column direction with respect to the aforementioned metal blocks, The display device according to claim 13, wherein the additional metal block does not overlap with the light-shielding bank.

16. The display device according to claim 15, wherein the additional metal block is positioned at the end of the transparent portion.

17. The display device according to claim 1, wherein the light-shielding bank is arranged to surround the sensor portion without overlapping it with the sensor portion.

18. The display device according to claim 15, wherein the metal block is provided with a width smaller than the light-shielding bank surrounding the sensor portion.

19. The display device according to claim 1, wherein at least one metal layer included in the metal block is a power supply voltage wiring.

20. The display device according to claim 1, wherein the metal block is in the shape of an island that is not electrically connected to other components on the substrate, or is floating.

21. The display device according to claim 1, further comprising a transparent bank superimposed on the light-shielding bank.

22. A sealing layer covering the light-emitting element and the light-shielding bank, The present invention further includes an anti-reflective film disposed on the sealing layer, which includes a black matrix and a color filter layer, The display device according to claim 1, wherein the sealing layer overlaps with the sensor portion.