Transistors and display devices

Abstract

In a transistor having an oxide semiconductor film, improving the field-effect mobility Together, we will improve reliability. [Solution] The following oxide semiconductors are used for the semiconductor layer of the transistor. Oxide semiconductors are It is a composite oxide semiconductor in which a first region and a second region are mixed. The first region is Multiple components, one or more selected from ionium, zinc, and oxygen. It has the first cluster. The second region has indium, element M (where M is Al, Ga, The main components are one or more selected from Y (or Sn), zinc, and oxygen. It has multiple second clusters. The first region is where multiple first clusters are connected to each other. The second region has a portion where multiple second clusters are connected to each other.

Description

[Technical Field]

[0001] One aspect of the present invention is a semiconductor device having an oxide semiconductor film and a display having the semiconductor device. Regarding the device.

[0002] Furthermore, one aspect of the present invention is not limited to the above-mentioned technical field. One aspect of the technical field includes semiconductor devices, display devices, light-emitting devices, energy storage devices, memory devices, and related technologies. This relates to a method for driving or manufacturing such devices.

[0003] In this specification, a semiconductor device is defined as a device that can function by utilizing semiconductor properties. This refers to all types of devices, including semiconductor elements such as transistors, semiconductor circuits, computing devices, and memory devices. The device is a form of semiconductor device. Examples include imaging devices, display devices, liquid crystal display devices, light-emitting devices, and electric devices. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic equipment are subject to the following regulations: It may have a semiconductor device. [Background technology]

[0004] A transistor (field-effect transistor) is formed using a semiconductor thin film on a substrate having an insulating surface. The technology for constructing transistors (FETs, also known as thin-film transistors (TFTs)) is attracting attention. It is anticipated that the transistor will be used in integrated circuits (ICs) and image display devices (display devices), etc. It is widely applied in electronic devices. Silicon is a semiconductor thin film applicable to transistors. While semiconductor materials such as crystalline silicon are widely known, oxide semiconductors are attracting attention as other materials. It is being watched.

[0005] Furthermore, multiple oxide semiconductor layers are stacked, and within these multiple oxide semiconductor layers, channels and The oxide semiconductor layer contains indium and gallium, and the proportion of indium is equal to the proportion of gallium. By making it larger than the ratio, the field effect mobility (simply called mobility or μFE) A semiconductor device that enhances (the presence of) has been disclosed (see Patent Document 1). [Prior art documents] [Patent Documents]

[0006] [Patent Document 1] Japanese Patent Publication No. 2014-7399 [Overview of the Initiative] [Problems that the invention aims to solve]

[0007] As a transistor that uses an oxide semiconductor film in the channel region, it has high field-effect mobility. This is preferable. However, if the field-effect mobility of the transistor is increased, the transistor There is a problem in that the characteristics of Normalion tend to become the characteristics of Normalion. This means that a channel exists even without applying voltage to the gate electrode, and current flows through the transistor. This refers to a state in which something ends up happening.

[0008] Furthermore, in a transistor that uses an oxide semiconductor film in the channel region, The oxygen deficiencies that form within the transistor are problematic because they affect its characteristics. For example, When oxygen vacancies are formed in an oxide semiconductor film, hydrogen binds to these vacancies, supplying carriers. It becomes a source. When a carrier source is generated in an oxide semiconductor film, the oxide semiconductor film has The electrical characteristics of a transistor can fluctuate, typically resulting in a shift in the threshold voltage.

[0009] For example, if there are too many oxygen vacancies in an oxide semiconductor film, the threshold voltage of the transistor will be too high. It shifts to the negative side, resulting in normally-on characteristics. Therefore, in an oxide semiconductor film... In particular, in the channel region, there is little oxygen deficiency, or the characteristics are normal-on. It is preferable that the oxygen deficiency is such that it does not cause any problems.

[0010] In view of the above problems, one aspect of the present invention relates to a transistor having an oxide semiconductor film, One of the challenges is to improve field-effect mobility and reliability. One aspect of the present invention relates to a transistor having an oxide semiconductor film, wherein fluctuations in electrical characteristics are reduced. One of the challenges is to suppress it while also improving reliability. Alternatively, one aspect of the present invention One of the challenges is to provide a semiconductor device with reduced power consumption. One aspect of the present invention aims to provide a novel semiconductor device. One embodiment aims to provide a novel display device.

[0011] Furthermore, the description of the above problems does not preclude the existence of other problems. The approach does not necessarily need to solve all of these problems. Other problems are addressed in the details. This will become clear from the descriptions in the documents, etc., and it is not possible to extract any issues other than those mentioned above from the descriptions in the specifications, etc. It is possible to release it. [Means for solving the problem]

[0012] One aspect of the present invention is a composite oxide semiconductor having a first region and a second region mixed together. The first region is selected from indium (In), zinc (Zn), and oxygen (O). It has multiple first clusters, each having one or more of the following as its main components. It is selected from indium, element M (where M is Al, Ga, Y, or Sn), zinc, and oxygen. It has multiple second clusters, each having one or more of the selected elements as its main components. The region has parts where multiple first clusters are connected to each other, and the second region has parts where multiple second The clusters are characterized by having parts that are connected to each other.

[0013] Furthermore, in the above, it is preferable that the first region be surrounded by the second region. It's nice.

[0014] Furthermore, in the above, the first cluster has higher conductivity than the second cluster, and the second The cluster is preferably more semiconducting than the first cluster.

[0015] Furthermore, the above composite oxide semiconductor has a first cluster size of 0.5 nm to 1.5 nm. It is preferable that the portion has a value of m or less.

[0016] Furthermore, in the above, the atomic ratio of In, element M, and Zn is In:M:Zn = 4:2 :3 is in the vicinity, and if In is 4, then element M is between 1.5 and 2.5, and Zn is 2 Preferably, the value is 4 or less.

[0017] Alternatively, in the above, the atomic ratio of In, element M, and Zn is In:M:Zn=5: If the ratio is in the vicinity of 1:6 and In is 5, then element M is between 0.5 and 1.5, and Zn is It is preferable that the value is between 5 and 7.

[0018] Furthermore, one aspect of the present invention relates to a semiconductor device having a semiconductor layer, a gate, and a gate insulating layer. The semiconductor layer is characterized by having one of the above-mentioned composite oxide semiconductors. At this time, the gate voltage is greater than 0V and less than or equal to 10V, and the drain voltage is greater than 0V. In the range of 20V or less, the maximum field effect mobility is 100cm. 2 / Vs or more 200c m 2 It is preferable that it is less than or equal to / Vs.

[0019] Another aspect of the present invention is a method for producing a composite oxide semiconductor, wherein a substrate is placed in a film deposition chamber. The first step involves placing the device, and then introducing either argon gas or oxygen gas, or both, into the deposition chamber. The second step involves adding indium, element M (where M is Al, Ga, Y, or Sn), zinc, and a third step of applying a voltage to a target containing oxygen, and multiplying the target onto the substrate. The process includes a fourth step of depositing an oxide semiconductor. Here, in the fourth step, The first step involves preferentially sputtering elements M and zinc from the gelatinous material, and the second step involves sputtering the zinc from the gelatinous material. After the indium forms clusters, the clusters of indium are sputtered from the target. It is characterized by having a second step, which is performed.

[0020] Another aspect of the present invention is a method for producing a composite oxide semiconductor, wherein a substrate is placed in a deposition chamber. The first step involves arranging the materials, and then depositing a film in a deposition chamber containing argon gas but not oxygen gas. The second step involves introducing indium, element M (where M is Al, Ga, Y, or Sn), and sub A third step involves applying a voltage to a target containing lead and oxygen, and then transferring the voltage from the target onto the substrate. The process includes a fourth step of depositing a composite oxide semiconductor on the material. Here, in the fourth step, A first step in which elements M and zinc are preferentially sputtered from the target, and After the zinc forms clusters, the clusters of indium are sputtered from the target. It is characterized by having a second step of being performed.

[0021] Furthermore, in the above manufacturing method, it is preferable that the substrate is not intentionally heated. stomach.

[0022] Another aspect of the present invention is a display device having any of the above semiconductor devices and a display element. It is placed. Another aspect of the present invention is a display module having the display device and a touch sensor. It is a rule. Another aspect of the present invention is a semiconductor described in any one of the above aspects. The device comprises the above-mentioned display device or display module and an operation key or battery. It is an electronic device. [Effects of the Invention]

[0023] According to one aspect of the present invention, in a transistor having an oxide semiconductor film, the field effect transfer The degree can be improved and reliability can be improved. Alternatively, according to one aspect of the present invention In transistors having an oxide semiconductor film, the fluctuation of electrical characteristics is suppressed, and the reliability Reliability can be improved. Alternatively, according to one aspect of the present invention, power consumption can be reduced. A semiconductor device can be provided. Or, according to one aspect of the present invention, a novel semiconductor device can be provided. It is possible to provide a novel display device according to one aspect of the present invention. It is possible.

[0024] Furthermore, the description of these effects does not preclude the existence of other effects. One embodiment does not necessarily have to possess all of these effects. Furthermore, other effects may be considered. This information can be extracted from descriptions such as specifications, drawings, and claims. [Brief explanation of the drawing]

[0025] [Figure 1] Schematic top view and cross-sectional view illustrating a composite oxide semiconductor. [Figure 2] A diagram illustrating the atomic ratio of oxide semiconductors. [Figure 3] Schematic top view and cross-sectional view illustrating a composite oxide semiconductor. [Figure 4] Schematic top view and cross-sectional view illustrating a composite oxide semiconductor. [Figure 5] Schematic top view and cross-sectional view illustrating a composite oxide semiconductor. [Figure 6] Schematic top view and cross-sectional view illustrating a composite oxide semiconductor. [Figure 7] A diagram illustrating a sputtering apparatus. [Figure 8] A process flow diagram illustrating the method for fabricating composite oxide semiconductors. [Figure 9] A diagram illustrating a cross-section near the target. [Figure 10] A diagram illustrating the analysis method. [Figure 11] A diagram illustrating SEM observation results and EDX mapping. [Figure 12] A diagram illustrating SEM observation results and EDX mapping. [Figure 13] A diagram illustrating the composition of the sample. [Figure 14] A diagram illustrating the composition of the sample. [Figure 15] A diagram illustrating SEM observation results and EDX mapping. [Figure 16] A diagram illustrating SEM observation results and EDX mapping. [Figure 17] A diagram illustrating SEM observation results and EDX mapping. [Figure 18] A diagram illustrating SEM observation results and EDX mapping. [Figure 19] A diagram illustrating SEM observation results and EDX mapping. [Figure 20] A diagram illustrating SEM observation results and EDX mapping. [Figure 21] Top view and cross-sectional view illustrating a semiconductor device. [Figure 22] A cross-sectional view illustrating a semiconductor device. [Figure 23] A cross-sectional view illustrating a semiconductor device. [Figure 24] A cross-sectional view illustrating a semiconductor device. [Figure 25] A cross-sectional view illustrating a semiconductor device. [Figure 26] A cross-sectional view illustrating a semiconductor device. [Figure 27] A cross-sectional view illustrating a semiconductor device. [Figure 28] A cross-sectional view illustrating a semiconductor device. [Figure 29] A cross-sectional view illustrating a semiconductor device. [Figure 30] A cross-sectional view illustrating a semiconductor device. [Figure 31] A diagram illustrating the band structure. [Figure 32] Top view and cross-sectional view illustrating a semiconductor device. [Figure 33] Top view and cross-sectional view illustrating a semiconductor device. [Figure 34] Top view and cross-sectional view illustrating a semiconductor device. [Figure 35] Top view and cross-sectional view illustrating a semiconductor device. [Figure 36] A cross-sectional view illustrating a semiconductor device. [Figure 37] A cross-sectional view illustrating a semiconductor device. [Figure 38] Top view and cross-sectional view illustrating a semiconductor device. [Figure 39] A top view showing one embodiment of a display device. [Figure 40] A cross-sectional view showing one embodiment of a display device. [Figure 41] A cross-sectional view showing one embodiment of a display device. [Figure 42] A cross-sectional view showing one embodiment of a display device. [Figure 43] A cross-sectional view showing one embodiment of a display device. [Figure 44] A cross-sectional view showing one embodiment of a display device. [Figure 45] A cross-sectional diagram illustrating the method for fabricating the EL layer. [Figure 46] A conceptual diagram illustrating a droplet dispensing device. [Figure 47] Block diagrams and circuit diagrams illustrating the display device. [Figure 48] A diagram illustrating the display module. [Figure 49] A diagram illustrating electronic devices. [Figure 50] A diagram illustrating electronic devices. [Figure 51] A perspective view illustrating the display device. [Figure 52] Planar HAADF-STEM images and EDX mapping. [Figure 53] Cross-sectional HAADF-STEM images and EDX mapping. [Figure 54] XRD analysis results. [Figure 55] A diagram illustrating the Id-Vg characteristics of a transistor. [Figure 56] A diagram illustrating the Id-Vg characteristics of a transistor. [Figure 57] A diagram illustrating a cross-sectional STEM image of a transistor. [Modes for carrying out the invention]

[0026] The embodiments will be described below with reference to the drawings. However, many embodiments are described. It can be implemented in different ways, without deviating from its purpose and scope. Those skilled in the art will readily understand that the form and details can be modified in various ways. Therefore, the present invention This shall not be interpreted as being limited to the contents described in the following embodiments.

[0027] Furthermore, in the drawings, the size, layer thickness, or area is exaggerated for clarity. There are cases where this is not the case. Therefore, it is not necessarily limited to that scale. Note that the drawing is an ideal example. This is a schematic representation and is not limited to the shapes or values ​​shown in the drawings.

[0028] Furthermore, the ordinal numbers "1st," "2nd," and "3rd" used in this specification refer to the constituent elements. This note is added to avoid confusion and does not imply any numerical limitation.

[0029] Furthermore, in this specification, phrases indicating placement such as "above" and "below" refer to the relative positions of the components. The positional relationships are used for convenience in explaining them by referring to the drawings. The relationship changes as appropriate depending on the direction in which each component is described. Therefore, as explained in the specification... It is not limited to the same words or phrases, and can be appropriately rephrased depending on the situation.

[0030] Furthermore, in this specification, the term "transistor" includes a gate, a drain, and a source. It is an element having at least three terminals. And, drain (drain terminal, drain Between the drain region (or drain electrode) and the source (source terminal, source region, or source electrode) It has a channel region, and current flows between the source and drain through the channel region. This is possible. In this specification, the channel region is defined as a region where current is mainly present. It refers to the area in which something flows.

[0031] Furthermore, the source and drain functions may differ when using transistors with different polarities, or when the circuit The direction of the current may change during operation, which can cause the current to switch positions. In detailed documents, the terms "source" and "drain" may be used interchangeably. ru.

[0032] Furthermore, in this specification, etc., "electrically connected" means "having some kind of electrical effect." This includes cases where the connection is made via ". Here, "has some electrical effect The term "of" is not particularly limited as long as it enables the exchange of electrical signals between connected objects. For example, "things that have some kind of electrical effect" include electrodes and wiring, as well as transistors. Switching elements such as resistors, inductors, capacitors, and other various functional elements are available. This includes elements such as [specific components].

[0033] Furthermore, in this specification, "parallel" means that two straight lines have an angle of -10° or more and 10° or less. This refers to a state where objects are arranged in degrees. Therefore, it also includes cases where the angle is between -5° and 5°. Furthermore, "perpendicular" refers to a state in which two straight lines are positioned at an angle of 80° to 100°. Therefore, this includes cases where the angle is between 85° and 95°.

[0034] Furthermore, in this specification, the terms "membrane" and "layer" are interchangeable. It is possible to change the term. For example, the term "conductive layer" can be changed to the term "conductive film." It may be possible to change it. Or, for example, change the term "insulating film" to "insulating layer". In some cases, it may be possible to change the terminology to this.

[0035] Furthermore, unless otherwise specified in this specification, off-current refers to the current when the transistor is turned off. This refers to the drain current when the device is in a state (also called a non-conductive state or an interrupted state). Unless otherwise specified, in an n-channel transistor, the voltage between the gate and source is V When gs is lower than the threshold voltage Vth, in a p-channel transistor, the gate and socket are... This refers to a state where the voltage Vgs between channels is higher than the threshold voltage Vth. For example, n channels. The off-current of a transistor is defined as the voltage between the gate and source (Vgs) and the threshold voltage (Vt). Sometimes, this refers to the drain current when it is lower than h.

[0036] The off-current of a transistor may depend on Vgs. Therefore, when it is said that the off-current of the transistor is I or less, it may mean that there exists a value of Vgs for which the off-current of the transistor becomes I or less. The off-current of a transistor may refer to the off-current in an off-state at a predetermined Vgs, in an off-state at Vgs within a predetermined range, or in an off-state at Vgs where a sufficiently reduced off-current is obtained, etc. That is, when it is said that the off-current of the transistor is I or less, it may mean that there exists a value of Vgs for which the off-current of the transistor becomes I or less. The off-current of a transistor may refer to the off-current in an off-state at a predetermined Vgs, in an off-state at Vgs within a predetermined range, or in an off-state at Vgs where a sufficiently reduced off-current is obtained, etc. in an off-state at Vgs within a predetermined range, or in an off-state at Vgs where a sufficiently reduced off-current is obtained, etc. The off-current of a transistor may refer to the off-current in an off-state at a predetermined Vgs, in an off-state at Vgs within a predetermined range, or in an off-state at Vgs where a sufficiently reduced off-current is obtained, etc.

[0037] As an example, assume an n-channel transistor with a threshold voltage Vth of 0.5V, a drain current of 1×10 A at Vgs = 0.5V, a drain current of 1×10 -9 A at Vgs = 0.1V, a drain current of 1×10 -1 3 A at Vgs = -0.5V, and a drain current of 1×10 -19 A at Vgs = -0.8V. Since the drain current of this transistor is 1×10 A or less at Vgs = -0.5V or in the range of Vgs from -0.5V to -0.8V, it may be said that the off-current of this transistor is 1×10 -22 A or less. Since there exists a Vgs for which the drain current of this transistor becomes 1×10 A or less, it may be said that the off-current of this transistor is 1×10 A or less. -19 A or less Since the drain current of this transistor is 1×10 -19 A or less, it may be said that the off-current of this transistor is 1×10 A or less. -22 Since there exists a Vgs for which the drain current of this transistor becomes 1×10 A or less, it may be said that the off-current of this transistor is 1×10 -22 A or less.

[0038] Also, in this specification, etc., the off-current of a transistor having a channel width W may be represented by the current value flowing per channel width W, or may be represented by the current value flowing per a predetermined channel width (for example, 1μm). It is sometimes expressed as the value of the current flowing through it. In the latter case, the unit of off-current is the second of current / length. It may be expressed in units that have an element (for example, A / μm).

[0039] The off-current of a transistor may be temperature-dependent. In this specification, the off-current Unless otherwise specified, the device is turned off at room temperature, 60°C, 85°C, 95°C, or 125°C. It may represent electric current. Alternatively, it may indicate that the reliability of the semiconductor device containing the transistor is maintained. The temperature at which the transistor is proven, or the temperature at which the semiconductor device containing the transistor is used (e.g.) For example, it may represent the off-current at any one temperature between 5°C and 35°C. The off-current of the inverter is less than or equal to I, meaning that at room temperature, 60°C, 85°C, 95°C, and 125°C, The temperature at which the reliability of the semiconductor device, etc., containing the transistor is guaranteed, or the transistor The operating temperature of semiconductor devices containing radiators (for example, any temperature between 5°C and 35°C) There exists a value of Vgs such that the transistor's off-current at temperature 1 is less than or equal to I. It may refer to something else.

[0040] The off-current of a transistor may depend on the voltage Vds between the drain and source. In this specification, unless otherwise specified, the off-current is defined as Vds = 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, and This may represent the off-current at 20V. Or, the semiconductor containing the transistor in question. The reliability of the device, etc., is guaranteed by Vds, or the semiconductor device containing the transistor in question. It may represent the off-current at Vds used in applications such as transistor off-voltage. The current is less than or equal to I, meaning that Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, the transistor in question The reliability of the semiconductor device, etc., is guaranteed by Vds, or the semiconductor containing the transistor. The off-current of the transistor at Vds used in conductive devices, etc., is less than or equal to I. This can sometimes refer to the existence of a Vgs value.

[0041] In the above explanation of off-current, drain may be read as source. The term "current" can also refer to the current flowing through the source of a transistor when it is in the off state.

[0042] Furthermore, in this specification, the term "leakage current" may be used interchangeably with "off-current." Furthermore, in this specification, off-current refers to, for example, when a transistor is in the off state. It can also refer to the current flowing between the source and the drain.

[0043] Furthermore, in this specification, the threshold voltage of a transistor refers to the channel of a transistor. This refers to the gate voltage (Vg) when the threshold voltage is formed. Specifically, it is the threshold voltage of the transistor. Voltage is plotted with the gate voltage (Vg) on ​​the horizontal axis and the square root of the drain current (Id) on the vertical axis. In the curve (Vg-√Id characteristic), the straight line obtained by extrapolating the tangent line with the maximum slope is The gate voltage (Vg) at the intersection of the square root of the drain current (Id) and 0 (Id is 0A) is... ) may refer to the threshold voltage of a transistor, where the channel length is L and the channel length is L. Let W be the channel width, and the value of Id[A]×L[μm] / W[μm] is 1×10 -9 [A] It may refer to the gate voltage (Vg).

[0044] Furthermore, even when the term "semiconductor" is used in this specification, for example, if the conductivity is If the value is sufficiently low, it may have the properties of an "insulator". Also, "semiconductor" and " The term "insulator" has an ambiguous boundary and may not be strictly distinguishable in some cases. Therefore, this specification... The term "semiconductor" as used in this document may sometimes be replaced with "insulator." Similarly, this In some cases, the term "insulator" as used in specifications, etc., can be replaced with "semiconductor." In some cases, the term "insulator" as used in this specification may be replaced with "semi-insulator." .

[0045] Furthermore, even when the term "semiconductor" is used in this specification, for example, if the conductivity is If the value is sufficiently high, it may possess the properties of a "conductor." Also, "semiconductor" and " The term "conductor" has an ambiguous boundary and may not be strictly distinguishable in some cases. Therefore, this specification... The term "semiconductor" as used in the above text may sometimes be replaced with "conductor." Similarly, this In some cases, the term "conductor" as used in specifications, etc., can be replaced with "semiconductor."

[0046] Furthermore, in this specification, the term "impurity of a semiconductor" refers to any component other than the main components that make up the semiconductor. For example, elements with a concentration of less than 0.1 atomic percent are considered impurities. The presence of impurities can lead to... , the formation of DOS (Density of States) in semiconductors, and carrier In some cases, the mobility of the semiconductor may decrease, or the crystallinity may decrease. When an ionized semiconductor is present, impurities that alter the properties of the semiconductor include, for example, Group 1 elements. These include elements, Group 2 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components, in particular Hydrogen (also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen There are elements such as [elements]. In the case of oxide semiconductors, for example, oxygen vacancies can be created by the inclusion of impurities such as hydrogen. It may form. Also, if the semiconductor contains silicon, it can change the properties of the semiconductor. Impurities include, for example, Group 1 elements, Group 2 elements, Group 13 elements, and other elements excluding oxygen and hydrogen. This includes elements from Group 15, among others.

[0047] (Embodiment 1) In this embodiment, an oxide semiconductor containing a composite oxide semiconductor according to one aspect of the present invention is provided. This paper will describe films and semiconductor devices that utilize them.

[0048] <1-1. Oxide Semiconductor Films>

[0049] The oxide semiconductor film preferably contains at least indium. In particular, it is preferable that it contains indium It is preferable to include zinc. In addition to these, aluminum, gallium, and t It is preferable that it contains elements such as lium or tin. Also, boron, silicon, and titanium are preferable. Iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neo One of the following: gymite, hafnium, tantalum, tungsten, or magnesium. , or may include multiple types.

[0050] Here, we consider the case where the oxide semiconductor film contains indium, element M, and zinc. Element M may be aluminum, gallium, yttrium, or tin, etc. Elements applicable to element M include boron, silicon, titanium, iron, nickel, and germanium. Umium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum Examples include tungsten and magnesium. However, as element M, multiple of the aforementioned elements may be used. They can also be combined. Note that oxide semiconductor films contain indium, element M, and sub Let the terms in the atomic ratio of lead be [In], [M], and [Zn].

[0051] <1-2. Structure of oxide semiconductor films> Figure 1 shows a conceptual diagram of an oxide semiconductor film containing a composite oxide semiconductor according to one aspect of the present invention. .

[0052] Figure 1(A) is a conceptual diagram of the top surface of an oxide semiconductor film (referred to here as the ab-plane direction). Figure 1(B) shows a cross-section of an oxide semiconductor film formed on a substrate (sub.) (here, the c-axis). This is a conceptual diagram of what we call direction.

[0053] Note that Figure 1 illustrates the case where an oxide semiconductor film is formed on a substrate. , but not limited to, insulating films such as underlayers or interlayers between the substrate and the oxide semiconductor film, Alternatively, other semiconductor films, such as oxide semiconductor films, may be formed.

[0054] An oxide semiconductor film according to one aspect of the present invention is shown in Figures 1(A) and 1(B) as having a region It is a composite oxide semiconductor having a structure in which region A1 and region B1 are mixed. In the following explanation, oxide semiconductor films may be referred to as composite oxide semiconductors. .

[0055] The region A1 shown in Figures 1(A) and 1(B) is [In]:[M]:[Zn]=x:y:z(x> This is a region where there are many In such that (0, y≧0, z≧0). On the other hand, region B1 is [In]:[M This is a region where there is little In such that ]:[Zn]=a:b:c (a>0, b>0, c>0).

[0056] In this specification, the atomic ratio of In to element M in region A1 is defined as the atomic ratio of element M in region B1. Region A1 is greater than the atomic ratio of In to elementary M, compared to region B1, Assume that the concentration of n is high. Therefore, in this specification, region A1 is defined as an in-rich region. Region B1 is also referred to as the "in-poor" region.

[0057] For example, region A1 has an In concentration 1.1 times or more, preferably 2 times or more, than region B1. It is preferable that the ratio is 10 times or less. Also, region A1 is an oxide containing at least In. Often, elements M and Zn are not necessarily included.

[0058] Here, the atomic ratio of elements in a composite oxide semiconductor according to one aspect of the present invention will be described. .

[0059] In a composite oxide semiconductor, for example, region A1 has In, element M, and Zn. In some cases, the atomic ratio of each element can be shown using the phase diagram shown in Figure 2. In, element M, The atomic ratio of Zn is expressed as x:y:z, where x, y, and z are the atoms. The ratio can be represented in the figure as coordinates (x:y:z). Note that Figure 2 shows the number of oxygen atoms. The ratio will not be mentioned.

[0060] In Figure 2, the dashed line represents the equation [In]:[M]:[Zn]=(1+α):(1-α):1 The line where the atomic ratio is (-1≦α≦1), [In]:[M]:[Zn]=(1+α):( The line with an atomic ratio of 1-α):2, [In]:[M]:[Zn]=(1+α):(1 The line with an atomic ratio of -α):3, [In]:[M]:[Zn]=(1+α):(1- The line where the atomic ratio is α):4, and [In]:[M]:[Zn]=(1+α):( This represents the line where the atomic ratio is 1-α):5.

[0061] Furthermore, the dashed line represents the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0) The line where the atomic ratio is [In]:[M]:[Zn]=1:2:β, [In [In]:[M]:[Zn] = 1:3:β is the atomic ratio line, [In]:[M]:[Zn The line where the atomic ratio of [In]:[M]:[Zn]=1:7:β Line representing the atom ratio, line representing the atomic ratio of [In]:[M]:[Zn]=2:1:β This represents a line where the atomic ratio is [In]:[M]:[Zn]=5:1:β.

[0062] Furthermore, as shown in Figure 2, the atomic ratio of [In]:[M]:[Zn]=0:2:1 or a near-percentage of this ratio is used. Oxide semiconductors with a specific value tend to have a spinel-type crystal structure.

[0063] Region A2 shown in Figure 2 is the atomic ratio of indium, element M, and zinc that region A1 possesses. An example of a preferred range is shown. Note that region A2 is [In]:[M]:[Zn ]=(1+γ):0:Includes the line where the atomic ratio of (1-γ) is (-1≦γ≦1). Let's assume that.

[0064] Region B2 shown in Figure 2 is the atomic ratio of indium, element M, and zinc that region B1 possesses. An example of a preferred range is shown. Note that region B2 is [In]:[M]:[Zn ] = 4:2:3 to 4.1, and its neighboring values. Neighboring values ​​include, for example, atomic ratios [In]:[M]:[Zn]=5:3:4 is included. Also, region B2 is [In]:[ M]:[Zn] = 5:1:6, and its neighboring values.

[0065] Region A2 has a higher concentration of In, so its conductivity is higher than that of region B2, resulting in an oxide semiconductor film. It has the function of increasing the carrier mobility (or the field-effect mobility of the transistor). Therefore, the on-current and carrier of a transistor using an oxide semiconductor film having region A1 It can increase mobility.

[0066] On the other hand, region B2 has a lower concentration of In, so its conductivity is lower than region A2, and it is an oxide semiconductor. It has the function of reducing leakage current of films or transistors. Therefore, it has region B1. This allows for lowering the off-current of transistors using oxide semiconductor films.

[0067] In an oxide semiconductor film according to one aspect of the present invention, region A1 and region B1 form a composite. In other words, in region A1, carrier migration is likely to occur, and in region B1, carrier Movement is less likely to occur. Therefore, the oxide semiconductor according to one aspect of the present invention has high carrier mobility. Furthermore, it can be used as a material with high switching characteristics and good semiconductor properties.

[0068] In other words, region A1 is a region with lower semiconductivity and higher conductivity than region B1. It can also be said that it exists. On the other hand, region B1 has higher semiconductivity and conductivity than region A1. It can also be said that this is a region with low semiconductivity. Here, high semiconductivity refers to the band gap. This can be rephrased as having a wide bandwidth, good switching characteristics, and being similar to an i-type semiconductor.

[0069] As an example, as shown in Figures 1(A) and 1(B), region A1 is in the direction of the ab plane, and In the c-axis direction, multiple granular structures (also called clusters) exist. Note that clusters are not The rules may be unevenly distributed. Also, multiple clusters may be in a superimposed or connected state. This can happen. For example, one cluster may overlap with another cluster, creating a chain of overlapping shapes. Region A1 may sometimes be observed as spreading out in a cloud-like manner.

[0070] In other words, the clusters in region A1 are half the size of the clusters in region B1. It can also be said that it has low conductivity and high electrical conductivity. On the other hand, the crystal included in region B1 The sta is a region that has higher semiconductivity and lower conductivity than the clusters included in region A1. It can also be said that...

[0071] In other words, a composite oxide semiconductor according to one aspect of the present invention comprises a first region with a high concentration of In and I n has a second region with a low concentration, and the first region and the second region are connected in a cloud-like manner. Alternatively, in one embodiment of the present invention, the composite oxide semiconductor has a high concentration of In spread throughout. It has a first region and a second region in which In is not spread to a high concentration, and the first region and the second Area 2 and Area 2 are connected in a cloud-like manner.

[0072] As shown in Figures 1(A) and 1(B), the regions A1 are connected to each other in the direction of the ab plane, Region A1 can become a current path. This can improve the conductivity of the oxide semiconductor film. This allows us to increase the field-effect mobility of transistors using this method.

[0073] Furthermore, the region B1 shown in Figures 1(A) and 1(B) can be said to be scattered within region A1. Therefore, region B1 can exist in a state where it is three-dimensionally sandwiched between region A1. In other words, Region B1 can exist surrounded by region A1. In other words, region B1 is surrounded by region A It is a structure contained within 1.

[0074] Furthermore, region B1 is different from the cluster (also called the first cluster) that region A1 possesses. It can also be seen as a configuration that has a raster (also called a second cluster). In this configuration, Region B1 has multiple second clusters, and these multiple second clusters are interconnected. It has a portion. In other words, the first cluster that region A1 has is a portion of the other first cluster They have parts that are connected to each other in a cloud-like manner, and the second cluster that region B1 has is connected to the other second It has clusters and cloud-like components that are interconnected.

[0075] The proportion of scattered regions A1 depends on the fabrication conditions or composition of the composite oxide semiconductor. It can be adjusted. For example, a composite oxide semiconductor with a small proportion of region A1, or region A composite oxide semiconductor with a high proportion of region A1 can be formed. Furthermore, in one aspect of the present invention... In composite oxide semiconductors, the proportion of region A1 is not necessarily small compared to region B1. Region A1 In composite oxide semiconductors where the proportion is very large, depending on the area being observed, region B may be present within region A1. In some cases, 1 may be formed. Also, for example, the size of the granular region formed by region A1. This can be appropriately adjusted depending on the fabrication conditions or composition of the composite oxide semiconductor.

[0076] In Figures 3(A) and 3(B), the proportion of region A1 is smaller compared to Figures 1(A) and 3(B), and region B This shows a composite oxide semiconductor with a high proportion of 1.

[0077] Furthermore, in Figures 4(A) and 4(B), the proportion of region A1 is smaller than in Figures 3(A) and 3(B), and the region This shows a composite oxide semiconductor with a high proportion of B1. Because the proportion of region A1 is low, Figure 4 shows... As shown, this may include a first cluster that is scattered without overlapping.

[0078] Furthermore, depending on the fabrication conditions or composition of the composite oxide semiconductor, region A may differ from that shown in Figures 1(A) and 1(B). It is also possible to form a composite oxide semiconductor with a high proportion of region 1 and a low proportion of region B1.

[0079] Here, if all regions A1 are connected in the ab-plane direction, the switching of the transistor The characteristics may deteriorate. For example, the off-current of the transistor may increase. Therefore, as shown in Figures 3(A)(B) and 4(A)(B), region A1 is region B1 It is preferable that they are scattered within. Therefore, region A1 is three-dimensionally sandwiched between region B1. It can exist in such a state. In other words, region A1 can exist in a state surrounded by region B1. Therefore, region A1 is a structure contained within region B1. The switching characteristics of the transistor are improved. In particular, the off-current can be reduced.

[0080] Furthermore, a clear boundary may not be observed between region A1 and region B1. The size of region 1 and region B1 is determined by energy-dispersive X-ray spectroscopy (EDX). EDX mapping using (spersive X-ray spectroscopy) It can be evaluated using a cross-sectional or planar photograph. For example, the cluster in region A1 can be evaluated using a cross-sectional or planar photograph. In true EDX mapping, clusters with a diameter between 0.1 nm and 2.5 nm were observed. This may occur. Preferably, the cluster diameter is 0.5 nm or more and 1.5 nm or less. do.

[0081] Thus, in one aspect of the present invention, the oxide semiconductor is a mixture of region A1 and region B1. It is a composite oxide semiconductor, and the functions of region A1 and region B1 are different. Regions A1 and B1 function complementaryly. For example, In-Ga, where element M is Ga. -In the case of Zn oxide (hereinafter referred to as IGZO), an oxide semiconductor according to one aspect of the present invention is Co It can be referred to as simple IGZO (abbreviated as C / IGZO).

[0082] On the other hand, for example, in a configuration where region A1 and region B1 are stacked in layers, region A1 and region Because there is no interaction with region B1, or interaction is unlikely to occur, the function of region A1 and The functions of region B1 and region A1 may function independently. In this case, region A1 Even if carrier mobility can be increased, the transistor's off-current will increase. In some cases, this may be due to the use of the aforementioned composite oxide semiconductor or C / IGZO. It simultaneously possesses both high carrier mobility and excellent switching characteristics. This can be achieved. This is an excellent effect obtained with a composite oxide semiconductor according to one embodiment of the present invention. be.

[0083] Furthermore, when depositing oxide semiconductors using a sputtering apparatus, the atomic ratio of the target is... A film with a shifted atomic ratio is formed. In particular, depending on the substrate temperature during film formation, [Zn] In some cases, the atomic ratio of the film may be smaller than the atomic ratio of the target.

[0084] Furthermore, the properties of a composite oxide semiconductor according to one aspect of the present invention can be uniquely determined by the atomic ratio. Therefore, the regions shown are region A1 and region B, which are part of the composite oxide semiconductor. This region exhibits a favorable atomic ratio for element 1, and its boundaries are not strictly defined.

[0085] Here, region B1 may be a crystalline region. More preferably, C AAC-OS(c-axis aligned crystalline oxide It may contain semiconductors. CAAC-OS has c-axis orientation It has a crystalline structure in which multiple nanocrystals are linked in the ab-plane direction and have strain. Furthermore, distortion refers to the difference between regions with aligned lattice arrangements and regions with aligned lattice arrangements. This refers to the region where the orientation of the grid arrangement changes between the region and the surrounding area.

[0086] Figure 5(A) schematically shows multiple nanocrystals contained in region B1 with dashed lines. Nanocrystals are based on a hexagonal structure, but they are not necessarily regular hexagons; they can also be non-regular hexagonal. There are also areas in the strained region that have polygonal nanocrystals such as pentagons and heptagons. There is a match.

[0087] Furthermore, in CAAC-OS, clear grain boundaries were confirmed even in the vicinity of the strained area. It is not possible to do so. In other words, the formation of grain boundaries is suppressed by distorting the lattice arrangement. It can be seen that CAAC-OS has a dense arrangement of oxygen atoms in the ab plane. Due to factors such as the lack of density and the change in interatomic bond distances caused by the substitution of metallic elements, This is thought to be because it allows for some distortion.

[0088] Furthermore, Figure 5(B) shows that the nanocrystals have c-axis orientation, and the c-axis forms a CAAC-OS film. Schematically, this refers to the direction that is approximately perpendicular to the surface (also called the surface to be formed) or the upper surface. This indicates that CAAC-OS has a layered crystal structure with orientation along the c axis (also known as a layered structure). (u) is taken, and a layer containing indium and oxygen (hereinafter referred to as the In layer), and elements M, zinc, and It has a structure in which layers containing oxygen (hereinafter referred to as the (M,Zn) layer) are stacked.

[0089] Furthermore, indium and element M can be substituted for each other. Therefore, the (M,Zn) layer... Some of the element M is substituted with indium, and it can also be represented as an (In,M,Zn) layer. In this case, a layered structure is formed by stacking an In layer and an (In,M,Zn) layer.

[0090] Furthermore, in Figures 6(A) and (B), the proportion of region A1 is smaller compared to Figures 5(A) and (B). This example shows a case where the proportion of region B1 is large.

[0091] Oxide semiconductors can take on various structures, each possessing various properties. One embodiment of the present invention These oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, and a-like semiconductors, which will be described later. A complex oxidation having two or more of the following: OS, nc-OS (described later), and CAAC-OS (described later). It may also be a material semiconductor. Furthermore, region A1 and region B1 may have different crystallinity. good.

[0092] For example, region A1 is preferably non-single crystal. In the case where region A1 is indium, it tends to have a tetragonal crystal system. Also, region A1 In the case of indium oxide ([In]:[M]:[Zn]=x:0:0(x>0)), It tends to have a crystalline structure of the oxbite type. Also, region A1 is In-Zn oxide ([I In the case n]:[M]:[Zn]=x:0:z(x>0, z>0), a layered crystal structure is formed. There is a tendency for this to happen.

[0093] Furthermore, for example, region B1 is preferably non-single crystal. Also, region B1 is CAAC- It is preferable to have an OS. However, region B1 does not need to consist solely of CAAC-OS. Furthermore, it may have regions of polycrystalline oxide semiconductors and nc-OS, etc.

[0094] CAAC-OS is a highly crystalline oxide semiconductor. On the other hand, CAAC-OS has a clear Since grain boundaries cannot be identified, a decrease in electron mobility caused by grain boundaries occurs. It can be said that it is difficult. Also, the crystallinity of oxide semiconductors is affected by the inclusion of impurities and the formation of defects. Because it may decrease, CAAC-OS is an oxidation product with fewer impurities and defects (such as oxygen deficiencies). It can also be called a material semiconductor. Therefore, by having CAAC-OS, it functions as a composite oxide semiconductor. The physical properties of the composite oxide semiconductor are stable, making it heat-resistant and highly reliable. It is possible.

[0095] <1-3. Transistors having oxide semiconductor films> Next, we will explain the case where the above oxide semiconductor film is used in a transistor.

[0096] Furthermore, by using the above composite oxide semiconductor in a transistor, carrier mobility is increased. Furthermore, it is possible to realize transistors with high switching characteristics. In addition, high reliability This allows for the realization of a transistor.

[0097] Furthermore, it is preferable to use an oxide semiconductor film with a low carrier density for the transistor. For example, an oxide semiconductor film has a carrier density of 8 × 10⁻¹⁶. 11 / cm 3 Less than 1 ×10 11 / cm3 less than, more preferably 1×10 10 / cm 3 less than, and 1×10 -9 / cm 3 or more is sufficient.

[0098] When reducing the carrier density of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced, and the density of defect levels may be reduced. In this specification and the like, a low impurity concentration , and a low density of defect levels are referred to as high purity intrinsic or substantially high purity intrinsic. An oxide semiconductor film that is high purity intrinsic or substantially high purity intrinsic has few carrier generation sources, so the carrier density can be reduced. In addition, an oxide semiconductor film that is high purity intrinsic or substantially high purity intrinsic may have a low trap level density because the density of defect levels is low.

[0099] In addition, the charge trapped in the trap levels of the oxide semiconductor film may take a long time to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel region is formed in an oxide semiconductor with a high trap level density may have unstable electrical characteristics. Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor film. In addition, in order to reduce the impurity concentration in the oxide semiconductor film < / /

[0100] it is preferable to also reduce the impurity concentration in the adjacent film. Examples of impurities include hydrogen, nitrogen , alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0101]

[0102] Here, the effects of various impurities in the oxide semiconductor film will be described.

[0102] In an oxide semiconductor film, when silicon or carbon, which is one of the Group 14 elements, is contained, defects levels are formed in the oxide semiconductor. Therefore, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (the concentration obtained by secondary ion mass spectrometry (SIMS)) are set to be 2×10 atoms / cm or less, preferably 2×10 atoms / cm or less. 18 3 17 3

[0103] In addition, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor film, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor film containing an alkali metal or an alkaline earth metal tends to have normally-on characteristics. For this reason, it is preferable to reduce the concentration of the alkali metal or the alkaline earth metal in the oxide semiconductor film. Specifically, the concentration of the alkali metal or the alkaline earth metal in the oxide semiconductor film obtained by SIMS is set to be 1×10 atoms / cm or less, preferably 2×10 atoms / cm or less. 18 3 16 3

[0104] In addition, in the oxide semiconductor film, when nitrogen is contained, electrons as carriers are generated, the carrier density increases, and it tends to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen tends to have normally-on characteristics. Therefore, in the oxide semiconductor, it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen in the oxide semiconductor ​​​​​​​​​​​​The elementary cardinality in SIMS is 5 × 10⁻⁶. 19 atoms / cm 3 Less than 5 × 1 0 18 atoms / cm 3 More preferably 1 × 10 18 atoms / cm 3 below, More preferably 5 × 10 17 atoms / cm 3 The following applies:

[0105] Furthermore, the hydrogen contained in the oxide semiconductor film reacts with the oxygen bonded to the metal atoms to form water. Therefore, oxygen deficiency (V o This may form an oxygen deficiency (V o ) when hydrogen enters In some cases, electrons, which act as carriers, are generated. Also, some of the hydrogen atoms bond with metal atoms. It can combine with oxygen to produce electrons, which are carriers. Therefore, hydrogen is present. Transistors using oxide semiconductors tend to exhibit normally-on characteristics. Therefore, It is preferable that the hydrogen content in the oxide semiconductor is reduced as much as possible. Specifically, In a conductor, the hydrogen concentration obtained by SIMS is 1 × 10⁻⁶. 20 atoms / cm 3 Not yet Full, preferably 1 × 10 19 atoms / cm 3 Less than 5x10 18 at oms / cm 3 Less than 1 × 10 18 atoms / cm 3 Less than.

[0106] Furthermore, oxygen vacancies (V) in oxide semiconductor films o ) is the process of introducing oxygen into an oxide semiconductor film. Therefore, it can be reduced. In other words, oxygen vacancies (V) in oxide semiconductor films o ) Oxygen is supplied By filling, oxygen deficiency (V o ) disappears. Therefore, oxygen is spread in the oxide semiconductor film. By dispersing the oxygen, the oxygen deficiency (V) in the transistor is reduced. o This reduces the risk and improves reliability. can.

[0107] Furthermore, as a method for introducing oxygen into an oxide semiconductor film, for example, by bringing the oxide semiconductor into contact with the film, It is possible to create an oxide containing more oxygen than the oxygen that satisfies the stoichiometric composition. Furthermore, oxides contain regions where oxygen is present in excess of the stoichiometric composition (hereinafter referred to as the excess oxygen region). It is preferable that a (also known as) is formed. In particular, when an oxide semiconductor film is used in the transistor If present, oxides containing excess oxygen regions may be present in the underlayer or interlayer near the transistor. By implementing this feature, oxygen deficiency in transistors can be reduced, thereby improving reliability.

[0108] An oxide semiconductor film with sufficiently reduced impurities is used in the channel formation region of the transistor. This allows for the provision of stable electrical characteristics.

[0109] One aspect of the present invention is a semiconductor device having a transistor, wherein the transistor is a first A gate electrode, a first insulating film on the first gate electrode, and an oxide semiconductor on the first insulating film. A film, a second insulating film on the oxide semiconductor film, a second gate electrode on the second insulating film, and an oxide The device comprises an oxide semiconductor film and a third insulating film on a second gate electrode, wherein the oxide semiconductor film is the A channel region overlapping with the first or second gate electrode, and a source region in contact with the third insulating film. It has a drain region in contact with a third insulating film, and a first gate electrode and a second gate electrode. This means they are electrically connected.

[0110] Also, in terms of its electrical characteristics, the transistor has a maximum value of the field-effect mobility in the range where the gate voltage of the transistor is greater than 0 V and less than or equal to 10 V, which is 10 cm 2 / Vs or more and less than 200 cm 2 / Vs in the first region, a threshold voltage in the range of -1 V or more and 1 V or less in the second region, an S value less than 0.3 V / decade in the third region, and an off-current of 1 × 10 - 12 A / cm 2 less than in the fourth region. Further, when the maximum value of the field-effect mobility of the transistor is represented as μFE(max) and the value of the field-effect mobility when the gate voltage of the transistor is 2 V is represented as μFE(Vg = 2V), μFE(max) / μFE(V g = 2V) is 1 or more and less than 10. Preferably, in terms of its electrical characteristics, the transistor has a maximum value of the field-effect mobility in the range where the gate voltage of the transistor is greater than 0 V and less than or equal to 10 V, which is 60 cm / Vs or more and less than 200 cm[[ID=:24]]

[0111] / Vs in the first region, a threshold voltage in the range of -1 V or more and 1 V or less in the second region, an S value less than 0.3 V / decade in the third region, and an off-current of 1 2 × 10 A / cm 2 less than in the fourth region. Further, when the maximum value of the field-effect mobility of the transistor is represented as μFE(max) and the value of the field-effect mobility when the gate voltage of the transistor is 2 V is represented as μFE(Vg = 2V), μFE(max) / μ FE(Vg = 2V) is 1 or more and less than 2. × 10 -12 A / cm 2 less than in the fourth region. Further, when the maximum value of the field-effect mobility of the transistor is represented as μFE(max) and the value of the field-effect mobility when the gate voltage of the transistor is 2 V is represented as μFE(Vg = 2V), μFE(max) / μ FE(Vg = 2V) is 1 or more and less than 2. When represented, μFE(max) / μFE(Vg = 2V) is 1 or more and less than 2.

[0112] In other words, the above configuration is a semiconductor device according to one aspect of the present invention, wherein an oxide semiconductor is present in the channel region. A transistor having a membrane, wherein the field effect mobility and threshold voltage of the transistor This transistor has excellent off-current and S-value. Such a semiconductor device is, for example, For example, the transistors in the pixels of liquid crystal displays or organic EL displays, or liquid crystal displays Suitable for use in transistors and other components of driver circuits for displays such as OLED screens. .

[0113] <1-4. Methods for fabricating composite oxide semiconductors> Here, we will explain an example of a method for fabricating composite oxide semiconductors, as shown in Figures 1(A) and 1(B). A composite oxide semiconductor according to one aspect of the present invention can be formed using a sputtering apparatus. can.

[0114] [Sputtering equipment] Figure 7(A) is a cross-sectional view illustrating the deposition chamber 2501 of the sputtering apparatus. Figure 7(B) shows the magnet unit 2530a and the magnet of the sputtering apparatus. This is a plan view of the 2530b unit.

[0115] The deposition chamber 2501 shown in Figure 7(A) consists of a target holder 2520a and a target holder D2520b, backing plate 2510a, backing plate 2510b, Target 2502a, Target 2502b, Member 2542, and Substrate Holder 257 It has 0 and . The target 2502a is arranged on the backing plate 2510a. It is placed there. Also, the backing plate 2510a is placed on the target holder 2520a. It is placed there. Also, the magnet unit 2530a is connected via the backing plate 2510a. It is then placed below target 2502a. Also, target 2502b is backing It is placed on plate 2510b. Also, the backing plate 2510b is the target It is positioned on holder 2520b. Also, the magnet unit 2530b is a backing It is positioned under target 2502b via plate 2510b.

[0116] As shown in Figures 7(A) and 7(B), the magnet unit 2530a is a magnet Net 2530N1, Magnet 2530N2, Magnet 2530S, Magnet It has a holder 2532 and, in the magnet unit 2530a, The 2530N1 magnet, 2530N2 magnet, and 2530S magnet are magnet holders. It is placed on the rod 2532. Also, magnet 2530N1 and magnet 2530N 2 is positioned at a distance from magnet 2530S. Unit 30b has the same structure as magnet unit 2530a. Note that film deposition chamber 2501 When loading the circuit board 2560, the circuit board 2560 is positioned in contact with the circuit board holder 2570. .

[0117] Target 2502a, backing plate 2510a, and target holder 2520 a, target 2502b, backing plate 2510b, and target holder 25 20b and 20b are separated by member 2542. Member 2542 is an insulator. This is preferable. However, member 2542 may be a conductor or a semiconductor. The component 2542 may be one in which the surface of a conductor or semiconductor is covered with an insulator. .

[0118] The target holder 2520a and the backing plate 2510a are connected by screws (bolts, etc.). It is fixed using ) and is at equipotential. Also, the target holder 2520a is battery It has the function of supporting the target 2502a via the king plate 2510a. The target holder 2520b and the backing plate 2510b are connected by screws (bolts, etc.). It is fixed using ) and is at equipotential. Also, the target holder 2520b is battery It has the function of supporting target 2502b via king plate 2510b.

[0119] The backing plate 2510a has the function of fixing the target 2502a. Furthermore, the backing plate 2510b has the function of fixing the target 2502b.

[0120] Figure 7(A) shows the magnetic field lines 25 formed by the magnet unit 2530a. 80a and 2580b are explicitly specified.

[0121] Furthermore, as shown in Figure 7(B), the magnet unit 2530a is rectangular or approximately long A rectangular magnet 2530N1 and a rectangular or nearly rectangular magnet 2530N2, A rectangular or nearly rectangular magnet 2530S is fixed to a magnet holder 2532. It has a configuration that is shown in Figure 7(B). The magnet unit 2530a is positioned as shown by the arrow. It can be swung from side to side as shown by the mark. For example, the magnet unit 2530a, The beat should be between 0.1Hz and 1kHz.

[0122] The magnetic field on target 2502a changes with the oscillation of magnet unit 2530a. Therefore, in the vicinity of the region with a strong magnetic field, the high-density plasma region will be affected. The sputtering phenomenon is prone to occur with 502a. This is due to the magnet unit 2530b The same applies to this matter.

[0123] <1-5. Fabrication Flow of Composite Oxide Semiconductors> Figure 8 is a process flow diagram illustrating the method for fabricating composite oxide semiconductors.

[0124] The composite oxide semiconductors shown in Figures 1(A) and 1(B) are made up of at least the first to fourth materials shown in Figure 8. It is produced over a period of time.

[0125] [Step 1: Placing the substrate in the film deposition chamber] The first step involves placing the substrate in the film deposition chamber (see step S101 in Figure 8).

[0126] The first step is, for example, the substrate holder 2570 in the deposition chamber 2501 shown in Figure 7 The circuit board 2560 is placed there.

[0127] The temperature of the substrate 2560 during film deposition affects the electrical properties of the composite oxide semiconductor. The higher the degree, the greater the crystallinity of the composite oxide semiconductor and the higher the reliability. On the other hand, Lower substrate temperatures reduce the crystallinity of the composite oxide semiconductor and increase carrier mobility. This is possible. In particular, the lower the substrate temperature during film deposition, the more transistors with composite oxide semiconductors can be formed. In this context, the field effect mobility at low gate voltages (e.g., greater than 0V and less than or equal to 2V) The improvement will be remarkable.

[0128] The temperature of the substrate 2560 should be between room temperature (25°C) and 200°C, preferably above room temperature. The substrate temperature should be 170°C or lower, more preferably between room temperature and 130°C. This allows for the use of large-area glass substrates (for example, the 8th or 10th generation glass substrates described later). This is particularly suitable when using a lath substrate. In particular, the substrate temperature during film formation of composite oxide semiconductors By keeping the temperature at room temperature, or in other words, by intentionally avoiding heating, the bending or distortion of the circuit board can be prevented. It is preferable because it can be suppressed.

[0129] Furthermore, the substrate holder 2570 may be equipped with a cooling mechanism to cool the substrate 2560. good.

[0130] Furthermore, by setting the temperature of the substrate 2560 to between 100°C and 130°C, the composite oxide Water can be removed from semiconductors. By removing water, which is an impurity, electricity can be removed. This allows for improved reliability while simultaneously increasing the mobility of the field effects.

[0131] Furthermore, by keeping the temperature of the substrate 2560 between 100°C and 130°C, sputtering This prevents excessive heat-induced distortion in the semiconductor device. This allows for improved productivity of the equipment. Therefore, productivity becomes stable, and large-scale production equipment Because it is easy to install, it is possible to easily manufacture large display devices using large-area substrates. Cut.

[0132] Furthermore, increasing the temperature of the substrate 2560 allows for more effective water removal in the composite oxide semiconductor. Not only can it remove the material, but it can also improve the crystallinity of the composite oxide semiconductor. Example For example, the temperature of the substrate 2560 should be 80°C or higher but 200°C or lower, preferably 100°C or higher. By maintaining a temperature below 0°C, highly crystalline composite oxide semiconductor films can be deposited.

[0133] [Second step: Introducing gas into the deposition chamber] The second step involves introducing gas into the film deposition chamber (see step S201 in Figure 8).

[0134] The second step involves introducing a gas into the deposition chamber 2501 shown in Figure 7. For this purpose, either argon gas or oxygen gas, or both, can be introduced. Alternatively, inert gases such as helium, xenon, or krypton may be used instead of argon gas. .

[0135] When depositing a composite oxide semiconductor film using oxygen gas, the proportion of oxygen in the total deposition gas is... Therefore, it is sometimes written as "oxygen flow rate ratio".

[0136] A higher oxygen flow rate ratio can improve the crystallinity and reliability of composite oxide semiconductors. On the other hand, the smaller the oxygen flow rate ratio, the lower the crystallinity of the composite oxide semiconductor, and carrier transfer. Mobility can be increased. In particular, the smaller the oxygen flow rate ratio, the more effective the composite oxide semiconductor. In a transistor, at low gate voltages (for example, in the range greater than 0V and less than or equal to 2V) The improvement in field effect mobility becomes significant.

[0137] The oxygen flow rate ratio should be 0% or higher to obtain desirable properties according to the application of the composite oxide semiconductor. It can be set appropriately within a range of 100% or less.

[0138] For example, when used in the semiconductor layer of a transistor with high field-effect mobility, composite oxides are used. The oxygen flow rate ratio during semiconductor film deposition is greater than 0% and less than or equal to 30%, preferably 5%. The amount shall be 30% or less, more preferably 7% to 15%. Alternatively, composite oxide semiconductors When forming the film, it is also possible to do so without using oxygen gas, and in this case the oxygen flow rate ratio is 0%. be.

[0139] Furthermore, it is possible to obtain a transistor that achieves both relatively high field-effect mobility and relatively high reliability. To achieve this, the oxygen flow rate ratio during the deposition of composite oxide semiconductors must be greater than 30% but less than 70%. Preferably, it shall be greater than 30% and 50% or less. Alternatively, when forming a composite oxide semiconductor film. The oxygen flow rate ratio should be 10% or more and 50% or less, preferably 30% or more and 50% or less.

[0140] Furthermore, in order to obtain a transistor with high reliability, when depositing a composite oxide semiconductor film... The oxygen flow rate ratio shall be between 70% and 100%.

[0141] In this way, by controlling the substrate temperature and oxygen flow rate ratio during film formation, the desired electrical characteristics can be achieved. It is possible to deposit composite oxide semiconductor films. For example, lowering (raising) the substrate temperature. The contributions of lowering (increasing) the oxygen flow rate ratio to the field effect mobility are as follows: In some cases, they may be equivalent. Therefore, for example, due to equipment limitations, the substrate temperature may not be raised sufficiently. Even if this is not possible, increasing the oxygen flow rate ratio will raise the substrate temperature and allow for film deposition. It is also possible to realize a transistor with field-effect mobility equivalent to that of the case described above.

[0142] Furthermore, by controlling the substrate temperature and oxygen flow rate ratio during film formation, carrier mobility is increased. Even when using a composite oxide semiconductor, oxygen vacancies and impurities can be reduced by the method described later. By doing so, it is possible to realize highly reliable transistors.

[0143] Furthermore, it is also necessary to purify the above gases. For example, oxygen gas and algonium used as gases. The gas has a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower. Furthermore, by using gas purified to a comfortable temperature of -120°C or lower, the composite oxide semiconductor This prevents moisture and other substances from being absorbed into the conductor as much as possible.

[0144] Furthermore, the deposition chamber 2501 removes as much water and other impurities as possible from the composite oxide semiconductor. To achieve a high vacuum (5 × 10⁻¹⁰), use an adsorption-type vacuum pump such as a cryopump. - 7 Pa to 1 × 10 -4 It is preferable to exhaust to a pressure of approximately Pa. In particular, sputtering During standby of the deposition apparatus, gas molecules equivalent to H2O in the deposition chamber 2501 (m / z=1 The partial pressure of the gas molecules corresponding to 8 is 1 × 10 -4 Pa or less, preferably 5 × 10 -5 Pa or less It is preferable to do so.

[0145] [Third step: Applying voltage to the target] The third step involves applying a voltage to the target (see step S301 in Figure 8). ).

[0146] The third step involves, for example, the target holder 2520a and target shown in Figure 7. Apply voltage to holder 2520b. For example, connect it to target holder 2520a. The potential applied to terminal V1 is applied to terminal V2 connected to the substrate holder 2570. Set the potential to be lower than the specified potential. Also, mark terminal V4 connected to target holder 2520b. The applied potential is set to be lower than the potential of terminal V2 connected to the substrate holder 2570. The potential applied to terminal V2 connected to the substrate holder 2570 is defined as the ground potential. The potential applied to terminal V3, which is connected to the magnet holder 2532, is defined as the ground potential.

[0147] The potential applied to terminals V1, V2, V3, and V4 is the same as the potential described above. Not limited. Also, target holder 2520, substrate holder 2570, magnet holder It is not necessary for a potential to be applied to all of the 2532. For example, if the substrate holder 2570 is electrically charged... It may be in a floating state. Furthermore, the potential applied to terminal V1 is controlled. It is assumed that a power supply is electrically connected. The power supply may be a DC power supply, an AC power supply, or An RF power supply can be used for this.

[0148] Furthermore, indium, element, is used as target 2502a and target 2502b. Using a target containing M (where M is Al, Ga, Y, or Sn), zinc, and oxygen, Preferred. Examples of target 2502a and target 2502b include In-G α-Zn metal oxide target (In:Ga:Zn = 4:2:4.1 [atomic ratio]), I n-Ga-Zn metal oxide target (In:Ga:Zn=5:1:7 [atomic ratio]) These can be used. Below, we will discuss In-Ga-Zn metal oxide targets (In:G We will explain the case where a:Zn = 4:2:4.1 [atomic ratio] is used.

[0149] [Fourth step: Depositing a composite oxide semiconductor onto the substrate] In the fourth step, sputtered particles are ejected from the target and a composite oxide semiconductor is placed on the substrate. The process includes a step of depositing (see step S401 in Figure 8).

[0150] The fourth step is, for example, in the deposition chamber 2501 shown in Figure 7, argon gas or acid The elementary gas is ionized, separating into positive ions and electrons to form a plasma. Subsequently, in the plasma... The cations are affected by the potential applied to the target holders 2520a and 2520b. - Accelerated towards GET 2502a and 2502b. Cations are in the In-Ga-Zn metal. By colliding with the oxide target, sputtered particles are generated and sputtered onto the substrate 2560. Particles accumulate.

[0151] Furthermore, for targets 2502a and 2502b, the atomic ratio is In:Ga:Zn=4: In-Ga-Zn metal oxides with an atomic ratio of 2:4.1 or In:Ga:Zn=5:1:7 When using a physical target, the target may contain multiple crystal grains with different compositions. Yes. For example, the multiple crystal grains in question often have a diameter of 10 μm or less. Also, for example, When the In-Ga-Zn metal oxide target contains crystal grains with a high proportion of In, The proportion of region A1, as explained earlier, that is formed may increase.

[0152] <1-6. Film Deposition Model> Next, in the fourth step, we consider the film deposition model shown in Figures 9(A), 9(B), and 9(C). can.

[0153] Figures 9(A),(B), and(C) are schematic cross-sectional views of the vicinity of target 2502a shown in Figure 7. Figure 9(A) shows the state of the target before use, and Figure 9(B) shows the target before film deposition. Figure 9(C) shows the state of the target during film deposition. Also, Figure 9(A)( B)(C) contains target 2502a, plasma 2190, cation 2192, and spa Particles 2504a, 2506a, etc., are explicitly identified.

[0154] In Figure 9(A), the surface of target 2502a is relatively flat, and the composition ( For example, the composition of In, Ga, and Zn is uniform. On the other hand, in Figure 9(B), Through sputtering and other processes, irregularities are formed on the surface of the target 2502a. Furthermore, segregation occurs in the composition. This unevenness and segregation are due to sputtering performed prior to the process. It can be caused by plasma (e.g., Ar plasma) during processing. Note that Figure 9(B) This shows segregation region 2504 and segregation region 2506. Here, segregation region 250 Region 4 is defined as a region rich in Ga and Zn (Ga,Zn-Rich region), and segregation region 2506 This region is defined as an In-rich region. Note that this is a segregation region containing a large amount of Ga. The reason why region 2504 is formed is that Ga is a material with a lower melting point than In, During the rasma treatment, the heat that target 2502a receives causes a portion of it to melt and aggregate. This is thought to be because segregation region 2504 is formed as a result.

[0155] [Step 1] In Figure 9(C), argon gas or oxygen gas is ionized, and cation 2192 and electrons (Figure It then separates into (not shown) and forms plasma 2190. Subsequently, the positive in plasma 2190 Ion 2192 targets target 2502a (in this case, an In-Ga-Zn oxide target). It accelerates towards the target. Cation 2192 collides with the In-Ga-Zn oxide target. As a result, sputtered particles 2504a and 2506a are generated, and In-Ga-Zn oxide ter Sputtered particles 2504a and 2506a are ejected from the GET. 2504a is ejected from the segregation region 2504, and is therefore a Ga,Zn-rich class. In some cases, a tangle may be formed. Also, sputtered particles 2506a originate from segregation region 2506. Because they are pushed out, they sometimes form in-rich clusters.

[0156] Furthermore, in the In-Ga-Zn oxide target, the segregation region 2504 is the first to appear. It is thought that putter particles 2504a are preferentially sputtered. This is because they are positive ions. When 2192 collides with the In-Ga-Zn oxide target, the relative atomic mass is In Because Ga and Zn are lighter than In-Ga-Zn oxide targets, projectiles preferentially target them. This is because the ejected sputtered particles 2504a are deposited on the substrate. As a result, region B1, as shown in Figures 1(A) and 1(B), is formed.

[0157] [Step 2] Next, as shown in Figure 9(C), sputtered particles 2506a are ejected from segregation region 2506. The puttering process is performed. Sputtered particles 2506a collide with the previously deposited region B1 on the substrate. This creates a protrusion, forming region A1 as shown in Figures 1(A) and 1(B).

[0158] Furthermore, as shown in Figure 9(C), target 2502a is continuously sputtered during film deposition. Therefore, the formation and disappearance of segregation regions 2504 occur intermittently. .

[0159] By repeating the film deposition model of the first step and the second step described above, Figure 1(A) A composite oxide semiconductor according to one embodiment of the present invention, as shown in (B), can be obtained.

[0160] In other words, an in-rich segregation region 2506 and a Ga,Zn-rich segregation region 2 From 504, sputtered particles (2504a and 2506a) are individually ejected. It deposits on the substrate. On the substrate, in-rich regions connect to each other in a cloud-like manner. A composite oxide semiconductor according to one embodiment of the present invention can be formed as shown in Figures 1(A) and 1(B). In a composite oxide semiconductor film, in-rich regions connect to each other in a cloud-like manner, Transistors using composite oxide semiconductors exhibit high on-current (Ion) and high field effect. It has mobility (μFE).

[0161] Thus, a trap that satisfies high on-current (Ion) and high field-effect mobility (μFE) In an inverter, In is important, and other metals (e.g., Ga) are not necessarily important. It's not necessary.

[0162] In the above, argon gas is used to form the composite oxide semiconductor of the present invention. The model is illustrated. In this case, the composite oxide semiconductor contains many oxygen vacancies. When a composite oxide semiconductor contains many oxygen vacancies, shallow vacancies form in the composite oxide semiconductor. Vacancies (also called sDOS) may form. Once formed, the sDOS becomes a carrier trap, and the on-current and field-effect mobility are It will decrease.

[0163] Therefore, when a composite oxide semiconductor is formed using argon gas, After the formation of the oxide semiconductor, oxygen is supplied into the composite oxide semiconductor, thereby causing the composite oxidation It is preferable to fill in oxygen vacancies in the semiconductor material and reduce sDOS.

[0164] As for the above method of supplying oxygen, for example, after the formation of the composite oxide semiconductor, an oxygen-containing atmosphere is provided. Examples include heat treatment under gas or plasma treatment in an oxygen-containing atmosphere. It can be made. Alternatively, an insulating film in contact with a composite oxide semiconductor according to one aspect of the present invention, or a composite acid The insulating film near the semiconductor material should have excess oxygen. The configuration will be described in detail in Embodiment 2.

[0165] Although this explanation describes the sputtering method, it is not limited to this method. Pulsed laser deposition (PLD), plasma chemical vapor deposition (PECVD), and thermal CV are also used. D (Chemical Vapor Deposition) method, ALD (Atomic Layer deposition (CVD) or vacuum deposition methods may also be used. An example is MOCVD (Metal Organic Chemical Vapor One example is the Deposition method.

[0166] <1-7. Verification of the film deposition model> Next, in order to verify the above film deposition model, the shape and combination of the sputtering target surface The composition of the fabric was investigated. Here, we examined the sputtering process before and after sputtering. We investigated changes in the target audience.

[0167] Figure 10 illustrates the sample preparation and analysis methods.

[0168] The sample used was a portion cut from a metal oxide target. Here, the metal element A metal oxide target with an atomic ratio of In:Ga:Zn = 4:2:3, In:Ga: Metal oxide targets with Zn=1:1:1, gold with In:Ga:Zn=5:1:6 There are four types of metal oxide targets: group oxide targets and metal oxide targets with an In:Ga:Zn ratio of 5:1:8. Use the same type.

[0169] Next, the surface of the sample was polished. After that, the polished surface was scanned using SEM (Scanning). Observation using an ing Electron Microscope, and SEM-EDX ( Energy Dispersive X-ray spectroscopy Compositional analysis was performed. A Horiba EX-370 was used for SEM image observation and EDX measurement. The acceleration voltage was set to 15kV.

[0170] Next, the sample surface was subjected to sputtering. Sputtering is a film deposition process. Using argon gas as the gas, under conditions of a pressure of 0.4 Pa and a DC power of 200 W, the test was performed for 1 hour. He carried out the rationale.

[0171] Subsequently, the sputtered surface was observed using SEM in the same manner as above, and SE Compositional analysis was performed using M-EDX.

[0172] In EDX analysis, electron beam irradiation is performed on each point in the analyte area of ​​the sample, and this generates The energy and number of characteristic X-rays emitted from the sample were measured, and the corresponding EDX spectrum was obtained for each point. Here, the peaks in the EDX spectrum at each point represent the electron transitions of the In atom to the L shell, and Ga In the electron transitions of atoms to the L shell, electron transitions of Zn atoms to the L shell, and electron transitions of O atoms to the K shell The atoms were assigned to each point, and the ratio of each atom at each point was calculated. This was then applied to the analyte region of the sample. By doing so, it is possible to obtain an EDX mapping that shows the distribution of the ratios of each atom. Cut.

[0173] First, we measured S for a metal oxide target with In:Ga:Zn=4:2:3. EM images and EDX mapping are shown in Figures 11 and 12. Figure 11 shows the image before sputtering. Figure 12 shows the SEM image and EDX mapping of the sample surface, and the image after sputtering treatment. These are SEM images and EDX mappings of the sample surface. In each figure, at the same position as the SEM image, This shows the EDX mapping of O, Zn, Ga, and In atoms.

[0174] As shown in Figure 11, although voids (pores) are visible in the SEM image, the sample surface is relatively It can be seen that it is flat. In addition, multiple grains are observed in the SEM image, indicating that the sample is polycrystalline. This can be confirmed. Furthermore, EDX mapping revealed some Zn-rich regions. However, it was confirmed that each element was distributed fairly uniformly.

[0175] On the other hand, as shown in Figure 12, sputtering treatment creates an uneven surface on the sample. It was confirmed that this was the case. More specifically, the sample surface had a diameter of approximately 0.1 μm to 5 μm. The following granular precipitates were observed. Furthermore, in the EDX mapping shown in Figure 12, Due to the surface irregularities, there are points where the EDX spectrum could not be obtained.

[0176] Furthermore, looking at the EDX mapping in Figure 12, the O atoms, Zn atoms, and Ga atoms are It has a distribution that reflects the shape of the sample surface, and its proportion varies greatly depending on the location. This can be confirmed. Furthermore, the precipitate surface tends to have a high composition of Ga and Zn atoms. I understand. On the other hand, for In atoms, the shape of the sample surface is not reflected, and compared to other atoms... It can be confirmed that they are distributed uniformly.

[0177] Figure 13 is a pie chart showing the relative abundances of In, Ga, and Zn at several locations. Figure 14 is a bar graph showing the results shown in Figure 13. As shown in 14, the composition is generally uniform before sputtering, and the composition of the target While it takes a value close to that, after sputtering, the composition varies depending on the location. It was confirmed that the precipitates observed after sputtering had a low amount of In. It was confirmed that there are regions where Ga and Zn are segregated.

[0178] Figures 15 and 16 show a metal oxide target with In:Ga:Zn=1:1:1 The measured SEM images and EDX mappings are shown. Figures 17 and 18 also show: SEM and EDX images were measured for a metal oxide target with Ga:Zn=5:1:6. The mapping is shown. Also, Figures 19 and 20 show gold with In:Ga:Zn=5:1:8. The SEM images and EDX mappings measured for the genus oxide target are shown.

[0179] Thus, sputtering can be applied to metal oxide targets of different compositions. After treatment, precipitates with a low proportion of In and a high proportion of Ga and Zn are present on the surface. This was confirmed. Furthermore, In was found to be more uniformly distributed compared to O, Ga, and Zn. This was confirmed.

[0180] From the above results, it can be seen that sputtering treatment produces Ga on the surface of the metal oxide target. Furthermore, it can be confirmed that a segregation region containing a large amount of Zn has been formed. In addition, In is uniformly separated. It can be seen that it is fabricated. Therefore, the film deposition model explained earlier is sufficiently valid. It becomes clear that...

[0181] <1-8. Classification of Oxide Semiconductors> Next, we will explain the classification of oxide semiconductors.

[0182] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. It is possible. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Solid semiconductor, nc-OS (nanocrystalline oxide semiconductor) ductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- Examples of oxide semiconductors, and amorphous oxide semiconductors, etc. be.

[0183] From another perspective, oxide semiconductors include amorphous oxide semiconductors and other crystalline oxides. Semiconductors can be divided into two categories. Crystalline oxide semiconductors include single-crystal oxide semiconductors and CAAC. Examples include -OS, polycrystalline oxide semiconductors, and nc-OS.

[0184] Amorphous structures are generally isotropic and lack heterogeneity; they are metastable states with a specific arrangement of atoms. The position is not fixed, the connection angle is flexible, and it has short-range order but not long-range order. It is said that there isn't one.

[0185] In other words, a stable oxide semiconductor is completely amorphous. It cannot be called an oxide semiconductor. Also, it is not isotropic (for example, in a minute region). Oxide semiconductors (with periodic structures) cannot be called perfectly amorphous oxide semiconductors. On the other hand, a -like OS is an unstable structure that is not isotropic but has voids (also called porous structures). Yes, in terms of being unstable, a-like OS is an amorphous oxide semiconductor in terms of its physical properties. It's close to it.

[0186] [CAAC-OS] First, let me explain CAAC-OS.

[0187] CAAC-OS is an oxide having multiple c-axis oriented crystalline portions (also called pellets). It is a type of semiconductor.

[0188] CAAC-OS is a highly crystalline oxide semiconductor. The crystallinity of oxide semiconductors depends on the impurities. CAAC-OS may decrease in quality due to impurities and defects. It can be described as an oxide semiconductor with few oxygen vacancies.

[0189] Impurities are elements other than the main components of oxide semiconductors, such as hydrogen, carbon, silicon, and transition gold. There are group elements, for example. For example, silicon and other metal elements that make up oxide semiconductors are more acidic than the metal elements that make up oxide semiconductors. Elements with strong bonding forces can remove oxygen from oxide semiconductors, thereby altering the atomic arrangement of the oxide semiconductor. This disrupts the crystallinity and reduces its properties. Also, heavy metals such as iron and nickel, and argon, Because carbon dioxide and other elements have large atomic radii (or molecular radii), the atomic arrangement of oxide semiconductors This disrupts the crystallinity and reduces its properties.

[0190] [nc-OS] Next, I will explain nc-OS.

[0191] This section describes the case of analyzing nc-OS using XRD. For example, when analyzing nc-OS... Furthermore, when structural analysis is performed using the out-of-plane method, peaks indicating orientation do not appear. In other words, nc-OS crystals do not have orientation.

[0192] nc-OS is an oxide semiconductor with higher orderliness than amorphous oxide semiconductors. nc-OS has a lower defect level density than a-like OS and amorphous oxide semiconductors. However, nc-OS does not show any regularity in crystal orientation between different pellets. Therefore, nc-OS may have a higher defect level density compared to CAAC-OS.

[0193] [a-like OS] a-like OS is an oxide having a structure between nc-OS and amorphous oxide semiconductors. It is a semiconductor.

[0194] a-like OS has porous or low-density regions. a-like OS has porosity Therefore, it has an unstable structure.

[0195] Furthermore, because a-like OS has porosity, it is different from nc-OS and CAAC-OS. It has a low-density structure. Specifically, the density of a-like OS is the same as that of a single crystal of the same composition. The density is between 78.6% and 92.3%. Also, the density of nc-OS and CAAC- The density of OS is between 92.3% and 100% of the density of a single crystal of the same composition. Oxide semiconductors with a density of less than 78% are inherently difficult to deposit into films.

[0196] For example, in an oxide semiconductor satisfying In:Ga:Zn=1:1:1 [atomic ratio], The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm³. 3 That is. For example, in an oxide semiconductor that satisfies In:Ga:Zn=1:1:1 [atomic ratio] The density of a-like OS is 5.0 g / cm³. 3 More than 5.9g / cm 3 It is less than. For example, in an oxide semiconductor satisfying In:Ga:Zn=1:1:1 [atomic ratio] The densities of nc-OS and CAAC-OS are 5.9 g / cm³. 3 More than 6.3g / cm 3 It is less than.

[0197] If single crystals with the same composition do not exist, single crystals with different compositions can be combined in any proportion. By combining these, it is possible to estimate the density equivalent to a single crystal at the desired composition. The density corresponding to a single crystal of the desired composition is determined by the ratio of single crystals of different compositions combined. The density can be estimated using a weighted average. However, the density should be calculated using as few types of single crystals as possible. It is preferable to estimate by combining the factors.

[0198] As described above, oxide semiconductors can take on various structures, each possessing a variety of properties. Furthermore, the oxide semiconductor film according to one aspect of the present invention is an amorphous oxide semiconductor, a-like OS, Two or more types of nc-OS and CAAC-OS may be mixed together.

[0199] Furthermore, region A1, as explained earlier, is preferably a non-single crystal. Also, region B1 is It is preferable that the material is not a single crystal. Furthermore, it is preferable that region A1 and region B1 have different crystals. That's fine.

[0200] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0201] (Embodiment 2) In this embodiment, a transistor of a different form from the transistor shown in Embodiment 1 is used. The term "Ta" will be explained using Figures 21 to 38.

[0202] <2-1. Examples of Transistor Configurations> The structure of a transistor according to one aspect of the present invention will be described.

[0203] [Transistor Configuration Example 1] Figure 21(A) is a top view of transistor 100A, and Figure 21(B) is a top view of Figure 21(A). Figure 21(C) is a cross-sectional view between the dashed line X1-X2, and Figure 21(C) is a cross-sectional view of Figure 21(A) between the dashed line Y1- This is a cross-sectional view between Y2. Note that in Figure 21(A), for clarity, the structure of the insulating film 110 and other components is shown. The constituent elements are omitted in the diagram. Note that in the top view of the transistor, the following diagrams... Similarly to Figure 21(A), some components may be omitted from the illustration. The direction of the dashed line X1-X2 represents the channel length (L), and the direction of the dashed line Y1-Y2 represents the channel width. This is sometimes referred to as the (W) direction.

[0204] The transistor 100A shown in Figure 21(A),(B),(C) is connected to the conductive film 10 on the substrate 102. 6, an insulating film 104 on the conductive film 106, an oxide semiconductor film 108 on the insulating film 104, and acid An insulating film 110 on the semiconductor film 108, a conductive film 112 on the insulating film 110, and an insulating film 10 4. It comprises an oxide semiconductor film 108 and an insulating film 116 on a conductive film 112. The semiconductor film 108 has a channel region 108i that overlaps with the conductive film 112, and an insulating film 116. It has a source region 108s that is in contact with the insulating film 116 and a drain region 108d that is in contact with the insulating film 116. .

[0205] Furthermore, the insulating film 116 contains nitrogen or hydrogen. The insulating film 116 and the source region 108 When s and the drain region 108d come into contact, nitrogen or hydrogen in the insulating film 116 becomes s It is added to the source region 108s and the drain region 108d. In the rain region 108d, the carrier density increases with the addition of nitrogen or hydrogen.

[0206] Furthermore, transistor 100A has an insulating film 118 on the insulating film 116, and insulating film 116, 1 The conductor is electrically connected to the source region 108s through the opening 141a provided in 18. Through the opening 141b provided in the insulating film 116 and 118, the drain It may also have a conductive film 120b that is electrically connected to region 108d. The film 118, conductive film 120a, and conductive film 120b may have an insulating film 122 on them. Note that in Figures 21(B) and 21(C), an example configuration is shown in which an insulating film 122 is provided. The configuration is not limited to this, and a configuration without an insulating film 122 is also possible.

[0207] In this specification, etc., insulating film 104 is referred to as the first insulating film, and insulating film 110 as the second insulating film. The edge film, insulating film 116 as the third insulating film, insulating film 118 as the fourth insulating film, insulating film 122 These are sometimes referred to as the fifth insulating film. Also, the insulating film 104 is the first gate The insulating film 110 functions as an insulating film, and the insulating film 110 also functions as a second gate insulating film. Furthermore, insulating films 116 and 118 function as protective insulating films, and insulating film 122 is planar. It functions as an insulating film.

[0208] Furthermore, the insulating film 110 has an excess oxygen region. This allows excess oxygen to be supplied into the channel region 108i of the oxide semiconductor film 108. This can be achieved. Therefore, any oxygen deficiency that may form in the channel region 108i can be compensated for by excess oxygen. Because it can be filled, a highly reliable semiconductor device can be provided.

[0209] In order to supply excess oxygen to the oxide semiconductor film 108, Excess oxygen may be supplied to the insulating film 104 formed below 8. In this case, insulating film 10 The excess oxygen contained in 4 is located in the source region 108s of the oxide semiconductor film 108, and It can also be supplied to the rain region 108d. Source region 108s and drain region 108d When excess oxygen is supplied to the source region 108s and the drain region 108d, The price may increase.

[0210] On the other hand, the insulating film 110 formed on top of the oxide semiconductor film 108 has excess oxygen. By doing so, it becomes possible to selectively supply excess oxygen only to channel region 108i. Alternatively, channel region 108i, source region 108s, and drain region 10 After supplying excess oxygen to 8d, the source region 108s and drain region 108d are subjected to By selectively increasing the rear density, the resistance of the source region 108s and the drain region 108d is increased. It is possible to suppress the increase in resistance.

[0211] Furthermore, the source region 108s and drain region 108d of the oxide semiconductor film 108 are Each element preferably has an element that forms an oxygen vacancy or an element that bonds with the oxygen vacancy. i. Typical elements that form the oxygen vacancy, or elements that bond with the oxygen vacancy, are Examples include hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, and noble gases. Also, representative examples of noble gas elements include helium, neon, argon, krypton, and Examples include xenon. The insulating film 116 contains one or more of the elements that form the oxygen vacancies. If this occurs, the material will diffuse from the insulating film 116 to the source region 108s and the drain region 108d. The elements that form the above oxygen vacancies are added to the source region 108s and the do It may be added to the rain region 108d.

[0212] When impurity elements are added to an oxide semiconductor film, the bonds between metal elements and oxygen in the oxide semiconductor film are formed. The bond is cleaved, and an oxygen vacancy is formed. Alternatively, an impurity element is added to the oxide semiconductor film. Then, the oxygen that was bonded to the metal element in the oxide semiconductor film combines with the impurity element, and the metal element Oxygen is removed from the film, forming an oxygen vacancy. As a result, in oxide semiconductor films, Carrier density increases, and conductivity improves.

[0213] Figure 22 shows a magnified view of the vicinity of the oxide semiconductor film 108 in Figure 21(B). As shown above, the channel region 108i contains oxygen released from the insulating film 110 by heat treatment or the like. (O) is supplied, and the oxygen deficiency is reduced. This causes the channel region 108i to become i-type. This can be done. On the other hand, hydrogen (H) is present in the source region 108s and the drain region 108d. ) is supplied, and this hydrogen combines with the oxygen vacancy. As a result, source region 108s and The drain region 108d can be made n-type. The hydrogen in question is the insulating film 116 Hydrogen contained in the deposition gas during film formation, and hydrogen released from the insulating film 116 due to heat treatment, etc. These are some examples.

[0214] Furthermore, the conductive film 106 shown in Figures 21(B) and 21(C) functions as a first gate electrode. Furthermore, the conductive film 112 functions as a second gate electrode, and the conductive film 120a is a source The conductive film 120b functions as an electrode, and the conductive film 120b functions as a drain electrode.

[0215] Furthermore, as shown in Figure 21(C), the insulating films 104 and 110 are provided with openings 143. Furthermore, the conductive film 106 is electrically connected to the conductive film 112 through the opening 143. Therefore, the same potential is applied to the conductive film 106 and the conductive film 112. Note that the opening 1 Alternatively, instead of providing 43, different potentials may be applied to the conductive film 106 and the conductive film 112. Alternatively, the conductive film 106 may be used as a light-shielding film without providing the opening 143. For example, conductive By forming the film 106 with a light-shielding material, the downward irradiation of the channel region 108i is prevented. It can suppress light from that source.

[0216] Furthermore, as shown in Figures 21(B) and 21(C), the oxide semiconductor film 108 is the first gate electrode The conductive film 106 functions as a gate electrode, and the conductive film 112 functions as a second gate electrode. It is positioned opposite to it and sandwiched between two conductive films that function as gate electrodes.

[0217] Furthermore, the length of the conductive film 112 in the channel width direction is the same as the length of the oxide semiconductor film 108 in the channel width direction. The entire channel width direction of the oxide semiconductor film 108 is longer than the length in the direction of the insulating film 110. It is sandwiched between and covered by the conductive film 112. Also, the conductive film 112 and the conductive film 106 are insulating films. Since they are connected at the opening 143 provided in 104 and the insulating film 110, the oxide semiconductor One side of the conductive film 108 in the channel width direction has a conductive film 112 sandwiched between it and an insulating film 110. It is in opposition to that.

[0218] In other words, in the channel width direction of transistor 100A, the conductive film 106 and the conductive The film 112 is connected at the opening 143 provided in the insulating film 104 and the insulating film 110. At the same time, the oxide semiconductor film 108 is surrounded by insulating film 104 and insulating film 110 sandwiched in between. It has a complex structure.

[0219] With this configuration, the oxide semiconductor film 10 included in the transistor 100A 8 is a conductive film 106 that functions as a first gate electrode and a second gate electrode that functions as a second gate electrode. The conductive film 112 can electrically surround the transistor 100A. Thus, a channel region is formed by the electric fields of the first and second gate electrodes. The device structure of the transistor electrically surrounding the oxide semiconductor film 108 is called Surro This can be called an underdated channel (S-channel) structure. The Rangitor 100A can also be called a Dual Gate structure based on the number of gate electrodes. .

[0220] Since transistor 100A has an S-channel structure, the conductive film 106 or The conductive film 112 effectively induces an electric field in the oxide semiconductor film 108 to create a channel. Because it can be applied to the transistor, the current driving capability of the 100A transistor is improved, resulting in a high ON It becomes possible to obtain current characteristics. Also, it is possible to increase the on-current, It becomes possible to miniaturize transistor 100A. Also, transistor 100A is acid The structure has a crystalline semiconductor film 108 surrounded by conductive films 106 and 112. Therefore, the mechanical strength of transistor 100A can be increased.

[0221] Furthermore, in the channel width direction of transistor 100A, the aperture of the oxide semiconductor film 108 An opening different from the opening 143 may be formed on the side where section 143 is not formed.

[0222] Furthermore, the position of the transistor 100A relative to the oxide semiconductor film 108 of the conductive film 112, Alternatively, from the method of forming the conductive film 112, TGSA (Top Gate Self Alignment) It may also be referred to as an n) type FET. However, the semiconductor device according to one aspect of the present invention is not limited thereto. It was not used as a BGTC (Bottom Gate Top Contact) type FET. That's fine.

[0223] <2-2. Components of a transistor> Next, we will explain the details of the transistor components shown in Figures 21(A), (B), and (C). ru.

[0224] [substrate] The substrate 102 is made of a material that has sufficient heat resistance to withstand the heat treatment during the manufacturing process. It is possible.

[0225] Specifically, alkali-free glass, soda-lime glass, alkali glass, crystal glass Materials such as quartz or sapphire can be used. Inorganic insulating films may also be used. Examples of such inorganic insulating films include silicon oxide films, silicon nitride films, and silicon oxide nitride. Examples include films, aluminum oxide films, and the like.

[0226] Furthermore, the alkali-free glass mentioned above has a thickness of, for example, 0.2 mm to 0.7 mm. This would be appropriate. Alternatively, the above thickness can be achieved by polishing alkali-free glass.

[0227] Furthermore, as alkali-free glass, the 6th generation (1500mm x 1850mm) and the 7th generation... (1870mm x 2200mm), 8th generation (2200mm x 2400mm), 9th generation Areas such as (2400mm x 2800mm), 10th generation (2950mm x 3400mm), etc. This allows for the use of large glass substrates, enabling the fabrication of large display devices. It is possible.

[0228] Furthermore, the substrate 102 can be a single-crystal semiconductor substrate made of silicon or silicon carbide, or a polycrystalline substrate. Semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI substrates, etc. may be used. .

[0229] Furthermore, inorganic materials such as metals may be used as the substrate 102. Examples include stainless steel or aluminum.

[0230] Furthermore, the substrate 102 may be made of an organic material such as resin, resin film, or plastic. The resin film may be polyester, polyolefin, polyamide (na Iron, aramid, etc.), polyimide, polycarbonate, polyurethane, acrylic resin, Epoxy resin, polyethylene terephthalate (PET), polyethylene naphthalate (P Examples include EN, polyethersulfone (PES), or resins containing siloxane bonds. It can be done.

[0231] Furthermore, a composite material combining inorganic and organic materials may be used as the substrate 102. The composite material is made by laminating a metal plate or a thin glass plate with a resin film. Combined materials, fibrous metal, particulate metal, fibrous glass, or particulate glass Materials dispersed in an oil film, or fibrous resins, or particulate resins dispersed in an inorganic material. Materials, etc., are examples.

[0232] Furthermore, the substrate 102 can support at least a film or layer formed above or below it. Any film will do, and it may be one or more of the following: insulating film, semiconductor film, or conductive film. stomach.

[0233] [First insulating film] The insulating film 104 can be deposited using sputtering, CVD, vapor deposition, or pulsed laser deposition. It can be formed using appropriate methods such as PLD, printing, and coating. Also, insulating film 104 For example, this involves forming an oxide insulating film or a nitride insulating film as a single layer or in multiple layers. This can be done. Furthermore, in order to improve the interface characteristics with the oxide semiconductor film 108, the insulating film 104 is In this case, it is preferable that at least the region in contact with the oxide semiconductor film 108 be formed of an oxide insulating film. Furthermore, an oxide insulating film that releases oxygen upon heating is used as the insulating film 104. Then, the heat treatment transfers the oxygen contained in the insulating film 104 to the oxide semiconductor film 108. It is possible.

[0234] The thickness of the insulating film 104 is 50 nm or more, or 100 nm to 3000 nm, This can be between 200 nm and 1000 nm. By increasing the thickness of the insulating film 104 This can increase the amount of oxygen released from the insulating film 104, and also allow the insulating film 104 and the oxide semiconductor to separate. Interface states at the interface with the conductive film 108, and channel regions 1 of the oxide semiconductor film 108 It is possible to reduce the oxygen deficiency contained in 08i.

[0235] Examples of dielectric film 104 include silicon oxide, silicon oxide nitride, silicon nitride oxide, and nitrile oxide. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn oxide The following can be used, and it can be provided in a single layer or in a multilayer structure. In this embodiment, the insulating film As 104, a laminated structure of silicon nitride film and silicon oxidizide film is used. In addition, an insulating film 104 is used as a laminated structure, with a silicon nitride film on the lower layer and a silicon oxidative nitride film on the upper layer. By using a silicon film, oxygen can be efficiently introduced into the oxide semiconductor film 108. Cut.

[0236] [Oxide semiconductor film] The oxide semiconductor film 108 can be the composite oxide semiconductor described earlier, or C / IGZO It is preferable to use this.

[0237] [Second insulating film] The insulating film 110 supplies oxygen to the oxide semiconductor film 108, particularly to the channel region 108i. It has a function. For example, the insulating film 110 may be an oxide insulating film or a nitride insulating film as a single layer. Alternatively, they can be formed by stacking. Furthermore, the interface characteristics with the oxide semiconductor film 108 can be improved. To achieve this, in the insulating film 110, the region in contact with the oxide semiconductor film 108 is at least It is preferable to form it using an oxide insulating film. As the insulating film 110, for example, silica oxide For example, silicon oxide nitride, silicon oxide nitride, or silicon nitride can be used.

[0238] Furthermore, the thickness of the insulating film 110 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm. It can be less than or equal to m, or between 10 nm and 250 nm.

[0239] Furthermore, the insulating film 110 preferably has few defects, and typically, electron spin resonance (EMR) The signal observed in (ESR: Electron Spin Resonance) A smaller value is preferable. For example, the signal mentioned above is observed when the g value is 2.001. E' centers are one example. Note that E' centers occur in dangling bonds of silicone. This is due to the fact that the insulating film 110 has a spin density originating from the E' center of 3 × 10⁻¹⁰ 17 SPI ns / cm 3 The following is preferably 5 × 10 16 spins / cm 3 The following is silicon oxide A film, or a silicon oxidizride film, can be used.

[0240] In addition, the insulating film 110 also contains signals caused by nitrogen dioxide (NO2) in addition to the signals mentioned above. Nulls may be observed. This signal is divided into three signals by the nuclear spin of N. The grain is cracked, and each g-value is between 2.037 and 2.039 (considered the first signal). , g value between 2.001 and 2.003 (considered a second signal), and g value of 1.96 Observed when the value is between 4 and 1.966 (considered the third signal).

[0241] For example, as an insulating film 110, the spin density due to nitrogen dioxide (NO2) is 1 × 10⁻⁶. 1 7 spins / cm 3 The above 1 x 10 18 spins / cm 3 If an insulating film less than 100% is used It is suitable.

[0242] Furthermore, nitrogen oxides (NO2) containing nitrogen dioxide (NO2) x ) creates energy levels in the insulating film 110 It is formed. The level is located within the energy gap of the oxide semiconductor film 108. Therefore, nitrogen oxides (NOx) diffuse to the interface between the insulating film 110 and the oxide semiconductor film 108. As a result, the level in question may trap electrons on the insulating film 110 side. Because the wrapped electrons remain near the interface between the insulating film 110 and the oxide semiconductor film 108, This shifts the threshold voltage of the transistor in the positive direction. Therefore, insulating film 11 As for 0, if a film with a low nitrogen oxide content is used, the threshold voltage of the transistor is This can reduce the need for shifting.

[0243] Nitrogen oxides (NO x Examples of insulating films with low emission of ) include silicon oxide nitride films. The silicon oxidnitride film can be analyzed by temperature-controlled desorption gas analysis (TDS:Th In ermal desorption spectroscopy, nitrogen oxides (NO x This is a membrane that releases more ammonia than the amount of ) released, and typically, it is a membrane that releases ammonia Output is 1 x 10 18 / cm 3 The above 5 x 10 19 / cm 3 The following applies. Note that the above ammo The amount of nia released is when the heat treatment temperature in TDS is between 50°C and 650°C, or 50 This is the total amount within the temperature range of 550°C or higher.

[0244] Nitrogen oxides (NO x ) reacts with ammonia and oxygen during heat treatment, therefore By using an insulating film that emits a large amount of monia, nitrogen oxides (NOx) can be released. x ) is reduced.

[0245] Furthermore, when the insulating film 110 was analyzed by SIMS, the nitrogen concentration in the film was 6 × 10⁻⁶. 20 ato ms / cm 3 The following is preferable:

[0246] Also, as the insulating film 110, hafnium silicate (HfSiO x ), hafnium silicate (HfSi to which nitrogen is added x O y N z ), hafnium aluminate (HfAl to which nitrogen is added x O y N z ), or a high-k material such as hafnium oxide may be used. <00,01866>By using the high-k material, the gate leakage of the transistor can be reduced.

[0247] [Third Insulating Film] [[ID=,26]]The insulating film 116 contains nitrogen or hydrogen. Also, the insulating film 116 may contain fluorine. Examples of the insulating film 116 include a nitride insulating film. The nitride insulating film can be formed using, for example, silicon nitride, silicon oxynitride, silicon nitride oxide, silicon nitride fluoride, fluorosilicon nitride, etc. The hydrogen concentration contained in the insulating film 116 is preferably 1×10 atoms / cm 22 or more. Also, the insulating film 116 is in contact with the source region 108s and the drain region 108d of the oxide semiconductor film 108. Therefore, 3 the concentration of impurities (nitrogen or hydrogen) in the source region 108s and the drain region 108d in contact with the insulating film 116 becomes high, and the carrier density of the source region region 108s and the drain region 108d can be increased. (nitrogen or hydrogen) concentration becomes high, and the carrier density of the source region 108s and the drain region 108d can be increased.

[0248] [Fourth Insulating Film] As the insulating film 118, an oxide insulating film can be used. Also, as the insulating film 118, a laminated film of an oxide insulating film and a nitride insulating film can be used. The insulating film 118 and It should be noted that there may be some inaccuracies in the translation due to the complexity and potential errors in the original text, especially in the chemical formula and technical term parts. It is recommended to double-check with relevant technical materials for highly accurate translations in a professional context.For example, silicon oxide, silicon nitride, silicon nitride oxide, aluminum oxide, Hafnium oxide, gallium oxide, or Ga-Zn oxide can be used.

[0249] Furthermore, the insulating film 118 functions as a barrier film against external elements such as hydrogen and water. It is preferable to do so.

[0250] The thickness of the insulating film 118 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm. It can be less than or equal to m.

[0251] [The fifth insulating film] The insulating film 122 can be any insulating material and can be formed using an inorganic or organic material. The inorganic material includes silicon oxide film, silicon oxide nitride film, and silicon nitride oxide film. Examples include silicon nitride film, aluminum oxide film, aluminum nitride film, etc. The organic material Examples of materials include photosensitive resin materials such as acrylic resin or polyimide resin. It is possible.

[0252] [Conductive film] The conductive films 106, 112, 120a, and 120b were produced using sputtering and vacuum deposition methods. They can be formed using pulsed laser deposition (PLD), thermal CVD, etc. The conductive films 106, 112, 120a, and 120b are conductive metal films, visible light If a conductive film having the function of reflecting light, or a conductive film having the function of transmitting visible light is used, good.

[0253] Examples of conductive metal films include aluminum, gold, platinum, silver, copper, chromium, and tantalum. Titanium, molybdenum, tungsten, nickel, iron, cobalt, palladium, or manganese Materials containing metal elements selected from the above can be used. Alternatively, the above metal elements can be used. Alloys containing these alloys may also be used.

[0254] Specifically, the conductive metal film mentioned above is a two-layer structure in which a copper film is laminated on a titanium film. Two-layer structure with a copper film laminated on a titanium nitride film, and two-layer structure with a copper film laminated on a tantalum nitride film. The structure uses a three-layer structure in which a copper film is laminated on a titanium film, and then another titanium film is formed on top of that. This is sufficient. In particular, by using a conductive film containing copper, the resistance can be lowered. Suitable. Also suitable as a conductive film containing copper elements, or an alloy film containing copper and manganese. The alloy film is suitable because it can be processed using a wet etching method. .

[0255] Furthermore, tantalum nitride films are used as conductive films 106, 112, 120a, and 120b. This is preferable. The tantalum nitride film has conductivity and high resistance to copper or hydrogen. It has excellent barrier properties. Furthermore, tantalum nitride films release very little hydrogen from themselves. Therefore, the metal film in contact with the oxide semiconductor film 108, or the metal film in the vicinity of the oxide semiconductor film 108 It can be most preferably used as such.

[0256] Furthermore, instead of the conductive metal film mentioned above, a conductive polymer or conductive polymer can be used. It's okay to be there.

[0257] Furthermore, the conductive film having the function of reflecting visible light as described above may be gold, silver, copper, or paraben. Materials containing metallic elements selected from zinc can be used. In particular, conductive materials containing silver can be used. Using a film is preferable because it can increase the reflectivity in visible light.

[0258] Furthermore, the conductive films having the function of transmitting visible light as described above include indium, tin, zinc, Materials containing gallium or elements selected from silicon can be used. Specifically These include In oxide, Zn oxide, In-Sn oxide (also called ITO), and In-Sn-Si Examples include oxides (also called ITSO), In-Zn oxide, In-Ga-Zn oxide, etc. ru.

[0259] Furthermore, the conductive film having the function of transmitting visible light as described above is graphene or graph A film containing a phytomethic acid may also be used. Examples of films containing graphene include films containing graphene oxide. By forming a film containing graphene oxide and reducing the film containing graphene oxide, a film containing graphene is formed. It is possible to reduce it. Methods of reduction include applying heat and using reducing agents. It is possible.

[0260] Furthermore, the conductive films 112, 120a, and 120b can be formed by electroless plating. Materials that can be formed by this electroless plating method include, for example, Cu, Ni, Al, One or more of the following materials can be used: Au, Sn, Co, Ag, and Pd. This is possible. In particular, using Cu or Ag makes it possible to lower the resistance of the conductive film. Therefore, it is suitable.

[0261] Furthermore, when a conductive film is formed by electroless plating, the constituent elements of the conductive film may spread to the outside. To prevent diffusion, a diffusion-preventing film may be formed beneath the conductive film. A seed layer on which a conductive film can be grown may be formed between the film and the conductive film. The above-mentioned diffusion prevention film can be formed, for example, using a sputtering method. Furthermore, as the diffusion prevention film, for example, a tantalum nitride film or a titanium nitride film may be used. This can be done. Furthermore, the above seed layer can be formed by electroless plating. Furthermore, the seed layer may be a conductive film material that can be formed by electroless plating. The same materials as those used for the ingredients can be used.

[0262] Furthermore, an oxide semiconductor, such as In-Ga-Zn oxide, is used as the conductive film 112. This may be done. The oxide semiconductor is supplied with nitrogen or hydrogen from the insulating film 116, Carrier density increases. In other words, oxide semiconductors are oxide conductors (OC: Oxide It functions as a conductor. Therefore, the oxide semiconductor is used as the gate electrode. It can be used.

[0263] For example, the conductive film 112 may be a single-layer structure of an oxide conductor (OC) or a single-layer structure of a metal film. Examples include a laminated structure of an oxide conductor (OC) and a metal film.

[0264] Furthermore, the conductive film 112 may be a single-layer structure of a light-shielding metal film, or an oxide conductor. When using a laminated structure of OC and a light-shielding metal film, the conductive film 112 is formed below the conductive film 112. It is preferable because the channel region 108i can be shielded from light. Also, the conductive film 11 As for the second, lamination of an oxide semiconductor or oxide conductor (OC) and a light-shielding metal film. When using this structure, a metal film (for example, a metal film) is placed on an oxide semiconductor or oxide conductor (OC). By forming a tungsten film (or similar), the constituent elements in the metal film become oxide semiconductors. Alternatively, it diffuses to the oxide conductor (OC) side and reduces resistance, or damage during metal film deposition (for example) Resistance is reduced due to sputtering damage, etc., or an oxide semiconductor in the metal film. Alternatively, oxygen diffusion in oxide conductors (OCs) can create oxygen vacancies, resulting in lower resistance. ru.

[0265] The thickness of the conductive films 106, 112, 120a, and 120b is between 30 nm and 500 nm. The following ranges are possible, or ranges from 100 nm to 400 nm.

[0266] <2-3. Transistor Configuration Example 2> Figures 23(A) and 23(B) are cross-sectional views of transistor 100B, and Figures 24(A) and 24(B) are Figure 25(A)(B) is a cross-sectional view of transistor 100C, and Figure 25(A)(B) is a cross-sectional view of transistor 100D. This is a cross-sectional view of transistor 100B, transistor 100C, and transistor The top view of transistor 100D is the same as that of transistor 100A shown in Figure 21(A). I will omit the explanation here.

[0267] The transistor 100B shown in Figure 23(A)(B) has a layered structure of conductive film 112, conductive film The shape of 112 and the shape of the insulating film 110 are different from those of transistor 100A.

[0268] The conductive film 112 of transistor 100B is conductive film 112_1 on the insulating film 110, and It has a conductive film 112_2 on a film 112_1. For example, the conductive film 112_1 is acid By using a hydrocarbon conductive film, excess oxygen can be added to the insulating film 110. The oxide conductive film is formed using the sputtering method in an atmosphere containing oxygen gas. This can be done. Furthermore, as the above oxide conductive film, for example, an oxide having indium and tin A substance, an oxide having tungsten and indium, tungsten, indium and zinc Oxides containing titanium and indium, oxides containing titanium, indium and tin Oxides containing indium and zinc, acids containing silicon, indium and tin Examples include oxides containing indium, gallium, and zinc.

[0269] Furthermore, as shown in Figure 23(B), in the opening 143, the conductive film 112_2 and the conductive The film 106 is connected. When forming the opening 143, the conductive film that becomes the conductive film 112_1 After forming the opening 143, the shape shown in Figure 23(B) can be achieved. It is possible. When an oxide conductive film is applied to conductive film 112_1, conductive film 112_2 and conductive film 1 By configuring it so that 06 is connected, the contact resistance between conductive film 112 and conductive film 106 is reduced. It is possible.

[0270] Furthermore, the conductive film 112 and insulating film 110 of transistor 100B have a tapered shape. More specifically, the lower end of the conductive film 112 is formed outside the upper end of the conductive film 112. Furthermore, the lower end of the insulating film 110 is formed outside the upper end of the insulating film 110. Furthermore, the lower end of the conductive film 112 is formed at approximately the same position as the upper end of the insulating film 110.

[0271] By making the conductive film 112 and insulating film 110 of transistor 100B tapered, Compared to the case where the conductive film 112 and insulating film 110 of transistor 100A are rectangular, insulating film 1 It is preferable because it can improve the coverage of 16.

[0272] The other configurations of transistor 100B are the same as those of transistor 100A shown earlier. And it produces a similar effect.

[0273] The transistor 100C shown in Figure 24(A)(B) has a layered structure of conductive film 112, conductive film The shape of 112 and the shape of the insulating film 110 are different from those of transistor 100A.

[0274] The conductive film 112 of transistor 100C is conductive film 112_1 on the insulating film 110, and It has a conductive film 112_2 on film 112_1, and the lower end of conductive film 112_1 is It is formed outside the upper end of the conductive film 112_2. For example, conductive film 112_1 and conductive The film 112_2 and the insulating film 110 are processed with the same mask, and the conductive film 112_2 is wet The conductive film 112_1 and the insulating film 110 were etched by a dry etching method, respectively. The above structure can be achieved through processing.

[0275] Furthermore, by adopting the structure of transistor 100C, region 1 is formed in the oxide semiconductor film 108. Region 08f may be formed. Region 108f consists of channel region 108i and source region 1 It is formed between 08s and the channel region 108i and the drain region 108d.

[0276] Region 108f functions as either a high-resistance region or a low-resistance region. The anti-region has the same resistance as the channel region 108i and functions as a conductive gate electrode. This is a region where film 112 does not overlap. If region 108f is a high-resistance region, then region 108f is It functions as a so-called offset region. In order to suppress the decrease in the on-current of transistor 100C, the channel length (L In the direction, the region 108f should be 1 μm or less.

[0277] Furthermore, the low-resistance region is the region where the resistance is lower than that of the channel region 108i, and also the source region 10 This region has higher resistance than 8s and the drain region 108d. Region 108f is a low-resistance region. In this case, region 108f is a so-called LDD (Lightly Doped Drain) region. It functions as a region. When region 108f functions as an LDD region, the drain Because the electric field in the region can be relaxed, the threshold of the transistor caused by the electric field in the drain region can be reduced. This can reduce fluctuations in the voltage value.

[0278] Furthermore, if region 108f is to be the LDD region, for example, from insulating film 116 to region 10 8f is supplied with one or more of nitrogen, hydrogen, and fluorine, or insulating film 110 and conductive film 11 By using 2_1 as a mask and adding impurity elements from above the conductive film 112_1, Impurities pass through the conductive film 112_1 and the insulating film 110 and are added to the oxide semiconductor film 108. It can be formed by doing so.

[0279] Furthermore, as shown in Figure 24(B), in the opening 143, the conductive film 112_2 and the conductive The membrane 106 is connected to it.

[0280] The other configurations of transistor 100C are the same as those of transistor 100A shown earlier. And it produces a similar effect.

[0281] The transistor 100D shown in Figures 25(A) and (B) has a layered structure of conductive film 112, conductive film The shape of 112 and the shape of the insulating film 110 are different from those of transistor 100A.

[0282] The conductive film 112 of transistor 100D is conductive film 112_1 on insulating film 110, and It has a conductive film 112_2 on film 112_1, and the lower end of conductive film 112_1 is It is formed outside the lower end of the conductive film 112_2. Also, the lower end of the insulating film 110 is conductive It is formed outside the lower end of the conductive film 112_1. For example, conductive film 112_1 and conductive film 112_2 and insulating film 110 are processed with the same mask, and conductive film 112_2 and conductive film 1 12_1 was processed by the wet etching method, and the insulating film 110 was processed by the dry etching method. By performing the necessary modifications, the above structure can be achieved.

[0283] Also, similar to transistor 100C, transistor 100D has an oxide semiconductor film 1 Region 108f may be formed within 08. Region 108f is channel region 108i Between the source region 108s and the channel region 108i and the drain region 108d It is formed in this way.

[0284] Furthermore, as shown in Figure 25(B), in the opening 143, the conductive film 112_2 and the conductive The membrane 106 is connected to it.

[0285] The other configurations of transistor 100D are the same as those of transistor 100A shown earlier. And it produces a similar effect.

[0286] <2-4. Transistor Configuration Example 3>

[0287] Figures 26(A) and 26(B) are cross-sectional views of transistor 100E, and Figures 27(A) and 27(B) are Figure 28(A)(B) shows a cross-sectional view of transistor 100F, and Figure 28(A)(B) shows a cross-sectional view of transistor 100G. Figure 29(A)(B) is a cross-sectional view of transistor 100H, and Figure 30 (A) and (B) are cross-sectional views of transistor 100J. Note that transistor 100E, Transistor 100F, Transistor 100G, Transistor 100H, and Transistor The top view of transistor 100J is the same as that of transistor 100A shown in Figure 21(A). I will omit the explanation here.

[0288] Transistor 100E, Transistor 100F, Transistor 100G, Transistor Transistors 100H and 100J are made of oxide semiconductor material and are based on transistor 100A as shown above. The structure of film 108 is different. Other components are the same as those of transistor 100A shown earlier. They have a similar configuration and produce the same effect.

[0289] The oxide semiconductor film 108 of the transistor 100E shown in Figure 26(A)(B) is an oxide semiconductor film. The oxide semiconductor film 108_1 on the edge film 104, and the oxide semiconductor film on the oxide semiconductor film 108_1 It has a body film 108_2 and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2. Furthermore, the channel region 108i, the source region 108s, and the drain region 108d are These are oxide semiconductor film 108_1, oxide semiconductor film 108_2, and oxide semiconductor film, respectively. It has a 3-layer laminated structure of 108_3.

[0290] The oxide semiconductor film 108 of the transistor 100F shown in Figures 27(A) and (B) is an oxide semiconductor film. The oxide semiconductor film 108_2 on the edge film 104, and the oxide semiconductor film on the oxide semiconductor film 108_2 It has a body membrane 108_3, and a channel region 108i, a source region 108s, and The drain region 108d is comprised of oxide semiconductor film 108_2 and oxide semiconductor film 1 It has a two-layer laminated structure of 08_3.

[0291] The oxide semiconductor film 108 of transistor 100G shown in Figure 28(A)(B) is an oxide semiconductor film. The oxide semiconductor film 108_1 on the edge film 104, and the oxide semiconductor film on the oxide semiconductor film 108_1 It has a body membrane 108_2, and a channel region 108i, a source region 108s, and The drain region 108d consists of oxide semiconductor film 108_1 and oxide semiconductor film 1 It has a two-layer laminated structure of 08_2.

[0292] The oxide semiconductor film 108 of transistor 100H shown in Figure 29(A)(B) is an insulating The oxide semiconductor film 108_1 on the edge film 104, and the oxide semiconductor film on the oxide semiconductor film 108_1 It has a body film 108_2 and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2. Furthermore, the channel region 108i is an oxide semiconductor film 108_1, an oxide semiconductor film 108 _2, and the oxide semiconductor film 108_3 are stacked in a three-layer structure, with the source region 108s and The drain region 108d is an oxide semiconductor film 108_1 and an oxide semiconductor film It has a 2-layer stacked structure of 108_2. Note that the channel width (W) of transistor 100H is... In the cross-section, the oxide semiconductor film 108_3 is made up of oxide semiconductor film 108_1 and oxide It covers the side surface of the semiconductor film 108_2.

[0293] The oxide semiconductor film 108 of the transistor 100J shown in Figures 30(A)(B) is an insulating The oxide semiconductor film 108_2 on the edge film 104, and the oxide semiconductor film on the oxide semiconductor film 108_2 It has a body film 108_3 and a channel region 108i, which is an oxide semiconductor film 108_ 2, and the oxide semiconductor film 108_3 are stacked in a two-layer structure, with the source region 108s and Each drain region 108d is a single-layer structure of the oxide semiconductor film 108_2. In the cross-section of transistor 100J in the channel width (W) direction, the oxide semiconductor film 108 _3 covers the side surface of the oxide semiconductor film 108_2.

[0294] On the side surface or near the channel width (W) direction of the channel region 108i, processing Damage in this area makes it easy for defects (e.g., oxygen deficiencies) to form, or impurities It is easily contaminated by adhesion. Therefore, even if channel region 108i is substantially intrinsic When stress such as an electric field is applied, the channel width of channel region 108i ( The side surface in the W direction or its vicinity is activated, making it prone to becoming a low-resistance (n-type) region. If the side surface or its vicinity in the channel width (W) direction of channel region 108i is an n-type region, Because the n-type region in question serves as a carrier path, parasitic channels may be formed.

[0295] Therefore, in transistors 100H and 100J, the channel region The 108i is configured as a stacked structure, and the side surface of the channel region 108i in the channel width (W) direction is stacked. The structure is configured to cover one layer. This configuration allows the side of the channel region 108i to be covered. or suppress defects in the vicinity of or near the channel region 108i This makes it possible to reduce the adhesion of impurities to the material.

[0296] [Band structure] Here, insulating film 104, oxide semiconductor films 108_1, 108_2, 108_3, and The band structure of the edge film 110, the insulating film 104, the oxide semiconductor films 108_2, 108_3, and The band structure of insulating film 110, and insulating film 104, oxide semiconductor film 108_1, 108_ 2. The band structure of the insulating layer 110 will be explained using Figures 31(A), (B), and (C). Figures 31(A), (B), and (C) show the band structure in channel region 108i. ru.

[0297] Figure 31(A) shows insulating film 104 and oxide semiconductor films 108_1, 108_2, and 108_3. This is an example of a band structure in the film thickness direction of a laminated structure having an insulating film 110. Also, Figure 3 1(B) consists of insulating film 104, oxide semiconductor films 108_2, 108_3, and insulating film 110 This is an example of a band structure in the film thickness direction of a laminated structure having the above characteristics. Figure 31(C) also shows an insulating film. A stacked structure having 104, oxide semiconductor films 108_1, 108_2, and insulating film 110 This is an example of the band structure in the film thickness direction. Note that the band structure is shown for ease of understanding of the insulating film. 104, Conductivity of oxide semiconductor films 108_1, 108_2, 108_3, and insulating film 110 This shows the energy level (Ec) at the bottom of the belt.

[0298] Furthermore, Figure 31(A) shows that silicon oxide films are used as insulating films 104 and 110, and oxide semi-oxide films are used. Conductor film 108_1 has a metal oxide with an atomic ratio of metal elements of In:Ga:Zn=1:3:2. Using an oxide semiconductor film formed with a material target, the oxide semiconductor film 108_2 is used. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn = 4:2:4.1 is used. Using an oxide semiconductor film formed by this process, the oxide semiconductor film 108_3 contains atoms of a metal element. Oxides formed using metal oxide targets with a numerical ratio of In:Ga:Zn = 1:3:2 This is a band diagram of a configuration using a semiconductor film.

[0299] Furthermore, Figure 31(B) shows that silicon oxide films are used as insulating films 104 and 110, and oxide semi-oxide films are used. The conductive film 10⁸⁻² has an atomic ratio of metal elements of In:Ga:Zn = 4:2:4.1. Using an oxide semiconductor film formed with an oxide target, oxide semiconductor film 108_3 As such, a metal oxide target with an atomic ratio of metal elements of In:Ga:Zn=1:3:2 is used. This is a band diagram of a configuration using an oxide semiconductor film formed by [processing].

[0300] Furthermore, Figure 31(C) shows that silicon oxide films are used as insulating films 104 and 110, and oxide semi-oxide films are used. Conductor film 108_1 has a metal oxide with an atomic ratio of metal elements of In:Ga:Zn=1:3:2. Using an oxide semiconductor film formed with a material target, the oxide semiconductor film 108_2 is used. A metal oxide target with an atomic ratio of metal elements of In:Ga:Zn = 4:2:4.1 is used. This is a band diagram of a configuration using an oxide semiconductor film formed by [processing].

[0301] As shown in Figure 31(A), the oxide semiconductor films 108_1, 108_2, and 108_3 As shown in Figure 31(B), the energy levels at the lower end of the conduction band change smoothly. In the oxide semiconductor films 108_2 and 108_3, the energy level at the lower end of the conduction band is It changes smoothly. Also, as shown in Figure 31(C), the oxide semiconductor film 108_1, 1 In 08_2, the energy levels at the lower end of the conduction band change smoothly. In other words, It can also be said that it changes continuously or joins continuously. For example, at the interface between oxide semiconductor film 108_1 and oxide semiconductor film 108_2, or the oxide At the interface between the semiconductor film 108_2 and the oxide semiconductor film 108_3, trap centers and regeneration Assume that there are no impurities that form defect levels such as convergent centers.

[0302] In order to form a continuous junction between oxide semiconductor films 108_1, 108_2, and 108_3, Using a multi-chamber type film deposition apparatus (sputtering apparatus) equipped with a load lock chamber Therefore, it is necessary to continuously stack each film without exposing it to the atmosphere.

[0303] By using the configuration shown in Figures 31(A), (B), and (C), the oxide semiconductor film 108_2 forms a well (Well) In a transistor using the above stacked structure, the channel region is an oxide semiconductor It can be seen that it is formed on the conductive film 108_2.

[0304] Furthermore, by providing oxide semiconductor films 108_1 and 108_3, the defect levels are set in the oxide It can be kept away from the semiconductor film 108_2.

[0305] Furthermore, the lower end of the conduction band of the oxide semiconductor film 108_2 where the defect level functions as a channel region. The energy level (Ec) can be farther from the vacuum level than the defect level, and electrons can accumulate in the defect level. This makes it easier for electrons to accumulate in the defect levels, resulting in a negative fixed charge. Therefore, the transistor's threshold voltage shifts in the positive direction. Consequently, the defect level The energy level (Ec) at the lower end of the conduction band of the oxide semiconductor film 108_2 is closer to the vacuum level. It is preferable to have a configuration that makes it difficult for electrons to accumulate at defect levels. This makes it possible to increase the on-current of the transistor, as well as the field-effect mobility. It can improve.

[0306] Furthermore, oxide semiconductor films 108_1 and 108_3 transmit more efficiently than oxide semiconductor film 108_2. The energy level at the lower end of the guide band is close to the vacuum level, and typically, in oxide semiconductor film 108_2 The energy levels at the lower end of the conduction band and the lower end of the conduction band of oxide semiconductor films 108_1 and 108_3 The difference from the energy level is 0.15 eV or greater, or 0.5 eV or greater and 2 eV or less. Or it is less than 1 eV. That is, electron affinity of oxide semiconductor films 108_1 and 108_3 The electron affinity of the oxide semiconductor film 108_2 is greater than the force, and the oxide semiconductor film 108_1 and the electron affinity of oxide semiconductor film 108_3 and the electron affinity of oxide semiconductor film 108_2 The difference is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, or 1 eV or less. It is below.

[0307] With this configuration, the oxide semiconductor film 108_2 becomes the main current path. In other words, the oxide semiconductor film 108_2 has the function of a channel region, and the oxide semiconductor Films 108_1 and 108_3 function as oxide insulating films. Furthermore, oxide semiconductors... Films 108_1 and 108_3 constitute the oxide semiconductor film 108_2 in which the channel region is formed. It is preferable to use an oxide semiconductor film composed of one or more of the metal elements that make up the film. By adopting this configuration, the interface between the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2, Alternatively, at the interface between the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3, interfacial dispersion Disturbance is less likely to occur. Therefore, carrier movement is not hindered at this interface, The field-effect mobility of the inverter increases.

[0308] Furthermore, the oxide semiconductor films 108_1 and 108_3 function as part of the channel region. To prevent this, materials with sufficiently low conductivity shall be used. Conductor films 108_1 and 108_3 are, based on their physical properties and / or functions, oxide insulating films, respectively. It can also be called a film. Alternatively, oxide semiconductor films 108_1 and 108_3 have electron affinity (vacuum The difference between the energy level and the energy level at the bottom of the conduction band is smaller than that of the oxide semiconductor film 10⁸⁻². The energy level at the bottom of the conduction band is the energy level at the bottom of the conduction band of the oxide semiconductor film 108_2 A material with a difference (band offset) shall be used. Also, the magnitude of the drain voltage In order to suppress the occurrence of threshold voltage differences that depend on the material, the oxide semiconductor film 108 The energy levels at the lower end of the conduction band of _1 and 10⁸_3 are the same as the energy levels at the lower end of the conduction band of the oxide semiconductor film 10⁸_2. It is preferable to use a material whose energy level is closer to the vacuum level than the lower limit energy level. For example, an oxide. The energy levels at the lower end of the conduction band of semiconductor film 108_2 and oxide semiconductor films 108_1, 10 The difference between the energy level of the lower end of the conduction band at 8_3 and the current level is 0.2 eV or greater, preferably 0.5 eV. It is preferable to keep the above in place.

[0309] Furthermore, the oxide semiconductor films 108_1 and 108_3 contain a spinel-type crystal structure within the film. It is preferable that spinel-type crystals do not form in the oxide semiconductor films 108_1 and 108_3. If a crystalline structure is present, at the interface between the spinel-type crystalline structure and other regions, the conductive film 120 In some cases, the constituent elements of a and 120b may diffuse into the oxide semiconductor film 108_2. When the oxide semiconductor films 108_1 and 108_3 are CAAC-OS as described later, the conductive film The blocking properties of the constituent elements of 120a and 120b, such as copper, become higher, which is preferable.

[0310] Furthermore, in this embodiment, the oxide semiconductor films 108_1 and 108_3 are metal The atomic ratio of elements is formed using a metal oxide target with In:Ga:Zn = 1:3:2. Although examples have been given of configurations using an oxide semiconductor film, the system is not limited to this. For example, acid For ionized semiconductor films 10⁸⁻¹ and 10⁸⁻³, In:Ga:Zn = 1:1:1 [atomic ratio] ], In:Ga:Zn=1:1:1.2[atomic ratio], In:Ga:Zn=1:3:4[ [Atomic ratio] In:Ga:Zn=1:3:6 [Atomic ratio] In:Ga:Zn=1:4 5 [atomic ratio], In:Ga:Zn = 1:5:6 [atomic ratio], or In:Ga:Zn Oxide semiconductor film formed using a metal oxide target with an atomic ratio of =1:10:1 Alternatively, the oxide semiconductor films 108_1 and 108_3 may be made of metal elements. Oxide semiconductors formed using a metal oxide target with an atomic ratio of Ga:Zn = 10:1 A body film may also be used. In this case, the atomic ratio of the metal elements in the oxide semiconductor film 108_2 is Oxide semiconductor formed using a metal oxide target with an In:Ga:Zn=1:1:1 ratio. Using films, the atomic ratio of metal elements is set as oxide semiconductor films 10⁸⁻¹ and 10⁸⁻³, with Ga:Z. When an oxide semiconductor film is formed using a metal oxide target with n=10:1, acid The energy levels at the lower end of the conduction band of the oxide semiconductor film 108_2 and the oxide semiconductor film 108_1, The difference between the energy level at the lower end of the conduction band of 10⁸³ can be set to 0.6 eV or more. It is suitable.

[0311] Note that the oxide semiconductor films 108_1 and 108_3 are defined as In:Ga:Zn=1:1:1 When using a metal oxide target with [atomic ratio], oxide semiconductor film 108_1, 108 _3 is the case where In:Ga:Zn = 1:β1 (0 < β1 ≤ 2):β2 (0 < β2 ≤ 2) There is a combination. Also, as oxide semiconductor films 10⁸⁻¹ and 10⁸⁻³, In:Ga:Zn=1 When using a metal oxide target with an atomic ratio of 3:4, the oxide semiconductor film 108_1 , 10⁸⁻³ is In:Ga:Zn = 1:β3 (1≦β3≦5):β4 (2≦β4≦6) This can sometimes occur. Also, as oxide semiconductor films 108_1 and 108_3, In:Ga: When using a metal oxide target with Zn=1:3:6 [atomic ratio], the oxide semiconductor film 1 08_1 and 108_3 are In:Ga:Zn=1:β5(1≦β5≦5):β6(4≦β There are cases where 6 ≤ 8.

[0312] <2-5. Transistor Configuration Example 4> Figure 32(A) is a top view of transistor 300A, and Figure 32(B) is a top view of transistor 300A. This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown in Figure 3, and Figure 32(C) is the same as Figure 3 This corresponds to the cross-sectional view of the section between Y1 and Y2 shown by the dashed line in 2(A). Note: Figure 32 In (A), to avoid complexity, some of the components of transistor 300A are shown. The diagram omits details such as the insulating film that functions as a gate insulating film. Also, the dashed line X1 -When the X2 direction is referred to as the channel length direction, and the Y1-Y2 direction (marked with a dashed line) is referred to as the channel width direction. There is. Furthermore, in the top view of the transistor, the following drawings also refer to Figure 32(A) and Similarly, some components may be omitted when illustrating.

[0313] The transistor 300A shown in Figure 32 has a conductive film 304 on the substrate 302 and the substrate 302 and And insulating film 306 on conductive film 304, insulating film 307 on insulating film 306, and insulating film 307 The oxide semiconductor film 308, the conductive film 312a on the oxide semiconductor film 308, and the oxide semiconductor It has a conductive film 312b on film 308. Also, on transistor 300A, more details In addition, insulating films 314 and 316 are located on the conductive films 312a and 312b and the oxide semiconductor film 308. And an insulating film 318 is provided.

[0314] Furthermore, in transistor 300A, insulating films 306 and 307 are in transistor 300 A functions as a gate insulating film, and insulating films 314, 316, and 318 are transistors. It functions as a protective insulating film for transistor 300A. In addition, in transistor 300A, The electrode film 304 functions as a gate electrode, and the conductive film 312a functions as a source electrode. The conductive film 312b has a function, and it functions as a drain electrode.

[0315] Furthermore, in this specification, insulating films 306 and 307 are referred to as the first insulating film, and insulating film 314, 316 is sometimes referred to as the second insulating film, and insulating film 318 as the third insulating film. .

[0316] The transistor 300A shown in Figure 32 has a channel-etched transistor structure. An oxide semiconductor film according to one aspect of the present invention is suitably used in channel etch type transistors. It is possible.

[0317] <2-6. Transistor Configuration Example 5> Figure 33(A) is a top view of transistor 300B, and Figure 33(B) is a top view of transistor 300B. This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown in Figure 3, and Figure 33(C) is the same as Figure 3 This corresponds to the cross-sectional view of the section between the dashed line Y1 and Y2 shown in 3(A).

[0318] The transistor 300B shown in Figure 33 has a conductive film 304 on the substrate 302 and the substrate 302 and And insulating film 306 on conductive film 304, insulating film 307 on insulating film 306, and insulating film 307 The oxide semiconductor film 308, the insulating film 314 on the oxide semiconductor film 308, and the insulating film 314 The insulating film 316 and the opening 341a provided in the insulating film 314 and the insulating film 316 A conductive film 312a electrically connected to the oxide semiconductor film 308, an insulating film 314, and an insulating film. The oxide semiconductor film 308 is electrically connected through the opening 341b provided in 316. It has a conductive film 312b. Also, on transistor 300B, more specifically, conductive film 31 An insulating film 318 is provided on 2a, 312b, and insulating film 316.

[0319] Furthermore, in transistor 300B, insulating films 306 and 307 are in transistor 300 It functions as a gate insulating film for B, and insulating films 314 and 316 are oxide semiconductor films 308 The insulating film 318 functions as a protective insulating film for transistor 300B. It has the function of a gate. In addition, in transistor 300B, the conductive film 304 is the gate The conductive film 312a has the function of an electrode, and the conductive film 3 has the function of a source electrode. 12b functions as a drain electrode.

[0320] In transistor 300A shown in Figure 32, although it had a channel etch type structure... In contrast, transistor 300B shown in Figures 33(A), (B), and (C) has a channel-protected structure. The oxide semiconductor film according to one aspect of the present invention is also suitable for channel-protected transistors. It can be used.

[0321] <2-7. Transistor Configuration Example 6> Figure 34(A) is a top view of transistor 300C, and Figure 34(B) is a top view of transistor 300C. This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown in Figure 3, and Figure 34(C) is the same as Figure 3 This corresponds to the cross-sectional view of the section between the dashed line Y1 and Y2 shown in 4(A).

[0322] The transistor 300C shown in Figure 34 is the same as the transistor shown in Figures 33(A), (B), and (C). The shapes of 300B and insulating films 314 and 316 are different. Specifically, transistor 300C The insulating films 314 and 316 are provided in an island-like manner on the channel region of the oxide semiconductor film 308. The other components are the same as those of the 300B transistor.

[0323] <2-8. Transistor Configuration Example 7> Figure 35(A) is a top view of transistor 300D, and Figure 35(B) is a top view of transistor 300D. This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown in Figure 3, and Figure 35(C) is the same as Figure 3 This corresponds to the cross-sectional view of the section between Y1 and Y2 shown by the dashed line Y1-Y2 in 5(A).

[0324] The transistor 300D shown in Figure 35 has a conductive film 304 on the substrate 302 and the substrate 302 and And insulating film 306 on conductive film 304, insulating film 307 on insulating film 306, and insulating film 307 The oxide semiconductor film 308, the conductive film 312a on the oxide semiconductor film 308, and the oxide semiconductor The conductive film 312b on film 308, the oxide semiconductor film 308, and the conductive films 312a and 312b The insulating film 314 on top, the insulating film 316 on the insulating film 314, and the insulating film 318 on the insulating film 316 It also has conductive films 320a and 320b on an insulating film 318.

[0325] Furthermore, in transistor 300D, insulating films 306 and 307 are in transistor 300 The insulating films 314, 316, and 318 function as the first gate insulating film of D, and the transistors It functions as the second gate insulating film of transistor 300D. Also, transistor 300 In D, the conductive film 304 functions as the first gate electrode, and the conductive film 320a The conductive film 320b functions as a second gate electrode, and the conductive film 320b is used as a pixel electrode in a display device. It has the function of a conductive film. Furthermore, the conductive film 312a has the function of a source electrode and is conductive. The film 312b functions as a drain electrode.

[0326] Furthermore, as shown in Figure 35(C), the conductive film 320a consists of insulating films 306, 307, 314, In the openings 342b and 342c provided in 316 and 318, the conductive film 304 is connected Therefore, conductive film 320a and conductive film 304 are given the same potential.

[0327] Furthermore, in transistor 300D, openings 342b and 342c are provided, and a conductive film 3 The example given illustrates a configuration in which 20a and the conductive film 304 are connected, but the system is not limited to this. , forming only one of the openings, either opening 342b or opening 342c, and the conductive film 3 A configuration that connects 20a and the conductive film 304, or provides openings 342b and 342c. Alternatively, the conductive film 320a and conductive film 304 may not be connected. In the configuration where 0a and conductive film 304 are not connected, conductive film 320a and conductive film 304 are not connected. Each can be given a different electrical potential.

[0328] Furthermore, the conductive film 320b is provided in the openings 342a in the insulating films 314, 316, and 318. It is connected to the conductive film 312b via this.

[0329] Furthermore, transistor 300D has the S-channel structure described earlier.

[0330] <2-9. Transistor Configuration Example 8> Furthermore, the oxide semiconductor film of transistor 300A shown in Figures 32(A), (B), and (C) 308 may be configured as a multi-layered structure. An example of this is shown in Figures 36(A)(B) and 37. (A)(B) are shown.

[0331] Figures 36(A) and 36(B) are cross-sectional views of transistor 300E, and Figures 37(A) and 37(B) are This is a cross-sectional view of transistor 300F. Also shown are the top surfaces of transistors 300E and 300F. The diagram is similar to that of transistor 300A shown in Figure 32(A).

[0332] The oxide semiconductor film 308 of the transistor 300E shown in Figure 36(A)(B) is acid Oxide semiconductor film 308_1, oxide semiconductor film 308_2, oxide semiconductor film 308_3 , has. Also, the oxide semiconductor of transistor 300F shown in Figures 37(A)(B) The body membrane 308 has an oxide semiconductor film 308_2 and an oxide semiconductor film 308_3.

[0333] Note that conductive film 304, insulating film 306, insulating film 307, oxide semiconductor film 308, oxide semiconductor Conductor film 308_1, oxide semiconductor film 308_2, oxide semiconductor film 308_3, conductive film 31 2a, 312b, insulating film 314, insulating film 316, insulating film 318, and conductive film 320a, 3 20b refers to the conductive film 106, insulating film 116, and oxide semiconductor film 10 described above, respectively. 8. Oxide semiconductor film 108_1, Oxide semiconductor film 108_2, Oxide semiconductor film 108_3 , conductive films 120a, 120b, insulating film 104, insulating film 118, insulating film 116, and conductive film Similar materials to those used in 112 can be used.

[0334] <2-10. Transistor Configuration Example 9> Figure 38(A) is a top view of transistor 300G, and Figure 38(B) is a top view of transistor 300G. This corresponds to a cross-sectional view of the section between the dashed line X1 and X2 shown in Figure 3, and Figure 38(C) is the same as Figure 3 This corresponds to the cross-sectional view of the section between the dashed line Y1 and Y2 shown in 8(A).

[0335] The transistor 300G shown in Figure 38 has a conductive film 304 on the substrate 302 and the substrate 302 and And insulating film 306 on conductive film 304, insulating film 307 on insulating film 306, and insulating film 307 The oxide semiconductor film 308, the conductive film 312a on the oxide semiconductor film 308, and the oxide semiconductor The conductive film 312b on film 308, oxide semiconductor film 308, conductive film 312a, and conductive film 3 Insulating film 314 on 12b, insulating film 316 on insulating film 314, and conductive film on insulating film 316 It has 320a and a conductive film 320b on the insulating film 316.

[0336] Furthermore, insulating film 306 and insulating film 307 have an opening 351, insulating film 306 and insulating On film 307 is a conductive film 312 that is electrically connected to conductive film 304 via an opening 351. c is formed. Also, insulating film 314 and insulating film 316 have openings that reach the conductive film 312b. It has a section 352a and an opening 352b that reaches the conductive film 312c.

[0337] Furthermore, the oxide semiconductor film 308 is oxide semiconductor film 308_2 on the conductive film 304 side, It comprises an oxide semiconductor film 308_3 on a monocrystalline semiconductor film 308_2.

[0338] Furthermore, an insulating film 318 is provided on top of the transistor 300G. The insulating film 318 is It is formed to cover the insulating film 316, the conductive film 320a, and the conductive film 320b.

[0339] Furthermore, in transistor 300G, insulating films 306 and 307 are in transistor 300 The insulating films 314 and 316 function as the first gate insulating film of transistor 3. The insulating film 318 functions as the second gate insulating film of transistor 300. It functions as a protective insulating film for G. In addition, in transistor 300G, conductive film 3 04 functions as the first gate electrode, and the conductive film 320a functions as the second gate electrode. The conductive film 320b has the function of a pixel electrode used in a display device. Furthermore, in transistor 300G, the conductive film 312a functions as a source electrode. The conductive film 312b has the function of a drain electrode. Also, transistor 30 At 0G, the conductive film 312c functions as a connecting electrode.

[0340] Furthermore, the 300G transistor has the S-channel structure described earlier.

[0341] Furthermore, the structures of transistors 300A through 300G can be freely combined. They can be used together.

[0342] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0343] (Embodiment 3) In this embodiment, one of the display devices having the semiconductor device illustrated in the previous embodiment An example will be explained below using Figures 39 to 46.

[0344] Figure 39 is a top view showing an example of a display device. The display device 700 shown in Figure 39 is the first A pixel section 702 provided on the substrate 701 and a source drive provided on the first substrate 701 The Pixel circuit section 704 and the gate driver circuit section 706, and the pixel section 702 and the source driver circuit A sealing material 712 is arranged to surround the path section 704 and the gate driver circuit section 706. It includes a second substrate 705 provided opposite the first substrate 701. The first substrate 701 and the second substrate 705 are sealed by a sealing material 712. The pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are It is sealed by the first substrate 701, the sealing material 712, and the second substrate 705. Although not shown in Figure 39, a display element is provided between the first substrate 701 and the second substrate 705. It gets kicked.

[0345] Furthermore, the display device 700 is surrounded by a sealing material 712 on the first substrate 701. In a region different from the region, the pixel section 702, the source driver circuit section 704, and the gate driver are located. The circuit section 706 and the FPC terminal section 708 (FPC: Flex) are electrically connected to each other. A flexible printed circuit (FPC) is provided. Also, the FPC terminal section 708 An FPC716 is connected to it, and the FPC716 controls the pixel unit 702 and the source driver circuit. Various signals are supplied to the path section 704 and the gate driver circuit section 706. Also, the pixel section 702, source driver circuit section 704, gate driver circuit section 706, and FPC terminal section Signal lines 710 are connected to each of the 708s. Various signals are supplied by FPC716. The numbers, etc., are transmitted via the signal line 710 to the pixel unit 702, the source driver circuit unit 704, and the gated This is provided to the driver circuit section 706 and the FPC terminal section 708.

[0346] Furthermore, the display device 700 may be provided with multiple gate driver circuit units 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example is shown in which the pixel portion 702 is formed on the same first substrate 701, this configuration is not limited to this example. It is not necessary. For example, the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit section 704 may be formed on the first substrate 701. In this case, a substrate on which a source driver circuit or gate driver circuit, etc., is formed (for example, a single-wired board) A drive circuit substrate (formed from a crystalline semiconductor film or a polycrystalline semiconductor film) is formed on the first substrate 701. This configuration is also acceptable. Furthermore, the method of connecting the separately formed drive circuit board is not particularly limited. Instead, methods such as COG (Chip On Glass) and wire bonding are used. You can use it.

[0347] Furthermore, the display device 700 includes a pixel section 702, a source driver circuit section 704, and a gate The driver circuit section 706 has multiple transistors.

[0348] Furthermore, the display device 700 can have various elements. An example of such elements is: For example, electroluminescent (EL) elements (EL elements including organic and inorganic materials, (Mechanical EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistor elements (light-emitting depending on the current) Transistors, electron emission elements, liquid crystal elements, electron ink elements, electrophoretic elements, electro Lowwetting element, plasma display panel (PDP), MEMS (micro-electromechanical systems) Electro-mechanical systems) displays (e.g., grating light bulbs) GLV (Global Micromirror Device), Digital Micromirror Device (DMD), Digital Micro-Shatter DMS (Dynamic Modulation System) element, Interferometric Modulation (IMOD) element Examples include piezoelectric ceramic displays.

[0349] Another example of a display device using EL elements is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat display (SED: Surface-conductivity Examples include (n Electron-emitter Display), which uses liquid crystal elements. Examples of such display devices include liquid crystal displays (transmissive liquid crystal displays, semi-transmissive liquid crystal displays). Display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display Examples include (Ray). An example of a display device using an electronic ink element or electrophoretic element is: Examples include electronic paper. Furthermore, there are semi-transmissive liquid crystal displays and reflective liquid crystal displays. If implemented, some or all of the pixel electrodes would function as reflective electrodes. This is how it should be done. For example, some or all of the pixel electrodes could be made of aluminum, silver, etc. It would be good to have it. Furthermore, in that case, a memory circuit such as SRAM should be placed below the reflective electrode. It is also possible to implement this feature. This will further reduce power consumption.

[0350] The display method used in the display device 700 is either progressive or interlaced. These can be used. Also, when displaying in color, the color elements controlled by pixels include R It is not limited to the three colors GB (R stands for red, G for green, and B for blue). For example, if the pixels have R and G It may consist of four pixels: a pixel, a B pixel, and a W (white) pixel. Alternatively, a pentile arrangement. As shown in the column, two of the RGB colors make up one color element, and different two colors are used depending on the color element. You can select and configure colors. Alternatively, you can use RGB with one or more colors such as yellow, cyan, and magenta. You may add more above. Note that the size of the display area for each dot of the color element may differ. However, the disclosed invention is not limited to a color display device, but also includes monochrome displays. It can also be applied to display devices.

[0351] In addition, the backlight (organic EL elements, inorganic EL elements, LEDs, fluorescent lamps, etc.) emits white light. (W) is used to enable the display device to display in full color, and the coloring layer (also called a color filter) You may also use ( ). The colored layer may be, for example, red (R), green (G), blue (B ), yellow (Y), etc. can be used in appropriate combinations. By using a colored layer This allows for higher color reproduction compared to cases where a colored layer is not used. By arranging a region having a colored layer and a region without a colored layer, a region without a colored layer is created. White light in the area may be used directly for display. A portion of the area may be placed without a colored layer. By placing it in this position, the reduction in brightness caused by the colored layer during bright displays can be minimized, and power consumption is reduced by 2 In some cases, the emission can be reduced by 10% to 30%. However, this is due to the spontaneous generation of organic EL elements and inorganic EL elements. When using optical elements for full-color display, R, G, B, Y, and W are used, each with its own emitted color. It is also acceptable to emit light from the element. By using a self-luminescent element, it is possible to achieve better results than when using a colored layer. Furthermore, it may be possible to reduce power consumption even further.

[0352] Furthermore, the colorization method involves passing a portion of the light emitted from the white light source through a color filter. In addition to the method of converting to red, green, and blue (color filter method), red, green, blue A method that uses each color of light emission separately (three-color method), or a method that uses red or a portion of the light emitted from blue light emission. A method for converting to green (color conversion method, quantum dot method) may also be applied.

[0353] In this embodiment, regarding the configuration in which liquid crystal elements and EL elements are used as display elements: This will be explained using Figures 40 to 42. Figures 40 and 41 are based on the single-point chain shown in Figure 39. This is a cross-sectional view of a line QR, and it is configured using liquid crystal elements as display elements. 42 is a cross-sectional view of the dashed line QR shown in Figure 39, and an EL element is used as the display element. This is the configuration used.

[0354] First, I will explain the common parts shown in Figures 40 to 42, and then I will explain the different parts. I will explain below.

[0355] <3-1. Explanation of Common Parts of Display Devices> The display device 700 shown in Figures 40 to 42 includes a wiring section 711 and a pixel section 702. It has a source driver circuit section 704 and an FPC terminal section 708. The line section 711 has a signal line 710. The pixel section 702 has a transistor 750 and It has a capacitive element 790. The source driver circuit section 704 also has a transistor 752. To possess.

[0356] Transistors 750 and 752 are similar to transistor 100A shown earlier. This is the configuration. Note that the configurations of transistors 750 and 752 are described previously. Other transistors shown in the embodiment may also be used.

[0357] The transistor used in this embodiment is made of an oxide that has been purified to suppress the formation of oxygen vacancies. It has a semiconductor film. The transistor can reduce the off-current. Therefore, the image The holding time of electrical signals such as signals can be extended, and the writing interval is also extended when the power is on. It can be set to a certain value. Therefore, the frequency of refresh operations can be reduced, thus reducing power consumption. It has the effect of suppressing force.

[0358] Furthermore, the transistor used in this embodiment is capable of obtaining a relatively high field-effect mobility. Therefore, high-speed operation is possible. For example, a transistor capable of such high-speed operation can be used in a liquid crystal display. By using it in a display device, the switching transistors in the pixel section and the drive circuit section are used. Driver transistors can be formed on the same substrate. That is, they can be used as a separate drive circuit. Therefore, since there is no need to use semiconductor devices formed from silicon wafers, etc., This reduces the number of parts. In addition, the pixel section also has a transistor that can be driven at high speed. By using ZISTA, high-quality images can be provided.

[0359] Capacitive element 790 functions as the first gate electrode of transistor 750. The lower electrode is formed through a process of processing the same conductive film as the main film, and the transistor 750 is located there. A conductive film that functions as a source electrode and drain electrode, or as a second gate electrode It has an upper electrode formed through a process of processing the same conductive film as the functional conductive film. Furthermore, between the lower electrode and the upper electrode is the first gate insulating film of transistor 750. An insulating film formed through a process of forming an insulating film identical to an insulating film that functions as an insulating film, and a trap The process involves forming an insulating film identical to the insulating film that functions as a protective insulating film on the 750. An insulating film is provided, which is formed between the pair of electrodes. It is a multilayer structure in which insulating films, which function as films, are sandwiched together.

[0360] Furthermore, in Figures 40 to 42, transistor 750, transistor 752, and A planarizing insulating film 770 is provided on the quantitative element 790.

[0361] Furthermore, in Figures 40 to 42, the transistor 750 of the pixel unit 702 and - The transistor 752 in the driver circuit section 704 and a transistor with the same structure While examples of configurations have been given, the system is not limited to these. For example, a pixel unit 702 and a source Different transistors may be used for the driver circuit section 704. Specifically, the pixel section 7 A top-gate transistor is used in 02, and a bottom-gate transistor is used in the source driver circuit section 704. A configuration using a T-type transistor, or a bottom-gate type transistor in the pixel section 702 The configuration uses a top-gate type transistor in the source driver circuit section 704. These are some examples. Furthermore, the source driver circuit section 704 described above is combined with the gate driver circuit section. You may interpret it differently.

[0362] Furthermore, signal line 710 is connected to the source and drain electrodes of transistors 750 and 752. It is formed through the same process as a conductive film that functions as a signal line 710, for example, a copper element When using materials containing [specific material], signal delays caused by wiring resistance are reduced, and large-screen displays are possible. It becomes Noh.

[0363] Furthermore, the FPC terminal section 708 includes a connecting electrode 760, an anisotropic conductive film 780, and FPC 71 It has 6. The connecting electrode 760 is the source electrode of transistors 750 and 752 and It is formed through the same process as the conductive film that functions as a rain electrode. Also, the connecting electrode 760 is The terminals of the FPC716 are electrically connected via the anisotropic conductive film 780.

[0364] Furthermore, for example, glass substrates can be used as the first substrate 701 and the second substrate 705. This is possible. Also, the first substrate 701 and the second substrate 705 are flexible substrates. A flexible substrate may be used. Examples of such flexible substrates include plastic substrates. ru.

[0365] Furthermore, a structure 778 is provided between the first substrate 701 and the second substrate 705. The fabricated body 778 is a columnar spacer obtained by selectively etching an insulating film. It is provided to control the distance (cell gap) between the first substrate 701 and the second substrate 705. It is possible to use a spherical spacer as the structure 778.

[0366] Furthermore, the second substrate 705 side has a light-shielding film 738 that functions as a black matrix, A colored film 736 that functions as a color filter, and a light-shielding film 738 and a film in contact with the colored film 736 An insulating film 734 is provided.

[0367] <3-2. Example of a display device configuration using liquid crystal elements> The display device 700 shown in Figure 40 has a liquid crystal element 775. The liquid crystal element 775 is a conductive film It has 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is on the second substrate 705 It is provided on the side and functions as a counter electrode. The display device 700 shown in Figure 40 is a conductive film The orientation state of the liquid crystal layer 776 changes depending on the voltage applied to 772 and the conductive film 774. By controlling the transmission and opacity of light, an image can be displayed.

[0368] Furthermore, the conductive film 772 serves as the source electrode and drain electrode of the transistor 750. It is electrically connected to a conductive film that functions as a conductive film. The conductive film 772 is formed on the planar insulating film 770. It then functions as a pixel electrode, that is, one of the electrodes of the display element.

[0369] The conductive film 772 is a conductive film that is transparent in visible light, or a conductive film that is transparent in visible light. A conductive film with light-transmitting properties can be used. Examples of conductive films that are transparent in visible light include: For example, a material containing one element selected from indium (In), zinc (Zn), and tin (Sn). It is advisable to use a material. Examples of conductive films that are reflective in visible light include aluminum. Alternatively, materials containing silver may be used.

[0370] When a conductive film that is reflective in visible light is used for the conductive film 772, the display device 700 is: It will be a reflective liquid crystal display device. In addition, the conductive film 772 is a conductive film that is transparent in visible light. When using this method, the display device 700 becomes a transmissive liquid crystal display device.

[0371] Furthermore, by changing the configuration on the conductive film 772, the driving method of the liquid crystal element can be changed. An example of this case is shown in Figure 41. Also, the display device 700 shown in Figure 41 is a liquid crystal element This is an example of a configuration using a transverse electric field method (e.g., FFS mode) as the driving method. Figure 41 In the configuration shown, an insulating film 773 is provided on the conductive film 772, and a conductive film is provided on the insulating film 773. A 774 is provided. In this case, the conductive film 774 is a common electrode. It has the function of generating electricity between the conductive film 772 and the conductive film 774 via the insulating film 773. The orientation state of the liquid crystal layer 776 can be controlled by the boundary.

[0372] Also, although not shown in Figures 40 and 41, conductive film 772 or conductive film 774 The configuration includes providing an alignment film on one or both sides of the offset, on the side that is in contact with the liquid crystal layer 776. It is also possible to use polarizing members, phase difference members, and reflectors, although these are not shown in Figures 40 and 41. Optical components (optical substrates) such as protective members may be provided as appropriate. For example, polarizing substrates and position Circular polarization using a phase-difference substrate may also be used. Furthermore, backlights and sidelights may be used as light sources. You may use any of these.

[0373] When using liquid crystal elements as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, and polymer liquid crystals are used. Crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. Depending on the conditions, the liquid crystal material can be classified into cholesteric phase, smectic phase, cubic phase, and chi. It exhibits the ranematic phase, isotropic phase, etc.

[0374] Furthermore, when employing a transverse electric field method, it is also possible to use a liquid crystal that exhibits a blue phase without using an alignment layer. The blue phase is one of the liquid crystal phases, and as the temperature of cholesteric liquid crystal is increased, the cholesteric phase This phase appears just before the transition from the blue phase to the isotropic phase. The blue phase only appears within a narrow temperature range. To improve the temperature range, a liquid crystal assembly containing several weight percent or more of chiral agent was mixed in. The resulting material is used in the liquid crystal layer. The liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent provides a fast response. Because the degree of polarization is short and the optical properties are isotropic, orientation treatment is unnecessary. Furthermore, an orientation film is not required. Therefore, rubbing is unnecessary, thus eliminating the electrostatic discharge damage caused by rubbing. This can prevent defects and reduce damage to liquid crystal displays during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have low dependence on viewing angle.

[0375] Furthermore, when using liquid crystal elements as display elements, TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin (Field Switching) mode, ASM (Axially Symmetry) tric aligned Micro-cell) mode, OCB(Optical Compensated Birefringence mode, FLC (Ferroe) lectric Liquid Crystal) mode, AFLC (AntiFerr Features such as the (electric Liquid Crystal) mode can be used. .

[0376] Furthermore, a normally black type liquid crystal display device, for example, one that employs vertical alignment (VA) mode, It may also be used as a transmissive liquid crystal display device. Several vertical orientation modes can be listed. For example, MVA (Multi-Domain Vertical Alignment) ) Mode, PVA (Patterned Vertical Alignment) Mode You can use modes such as ASV mode.

[0377] <3-3. Display devices using light-emitting elements> The display device 700 shown in Figure 42 has a light-emitting element 782. The light-emitting element 782 is made of a conductive film It has 772, an EL layer 786, and a conductive film 788. The display device 700 shown in Figure 42 is The EL layer 786 of the optical element 782 emits light, allowing an image to be displayed. Furthermore, the EL layer 786 contains organic compounds or inorganic compounds such as quantum dots.

[0378] Examples of materials that can be used with organic compounds include fluorescent materials or phosphorescent materials. It can be made. Also, as a material that can be used for quantum dots, colloidal quantum dots Materials, alloy-type quantum dot materials, core-shell type quantum dot materials, core-type quantum dot materials, These are some examples. Also, the origins of groups 12 and 16, 13 and 15, or 14 and 16. Materials containing elementary groups may be used. Alternatively, cadmium (Cd), selenium (Se), Zinc (Zn), sulfur (S), phosphorus (P), indium (In), tellurium (Te), lead (P) b) Quantum having elements such as gallium (Ga), arsenic (As), and aluminum (Al). Dot material may also be used.

[0379] Furthermore, the above-mentioned organic and inorganic compounds include, for example, those produced by vapor deposition (including vacuum deposition). Methods such as droplet ejection (also called inkjet method), coating method, and gravure printing are used. It can be formed by using low molecular weight materials, medium molecular weight materials (O It may also contain ligomers, dendrimers, or polymeric materials.

[0380] Here, we will explain the method for forming the EL layer 786 using the droplet ejection method, with reference to Figure 45. To clarify, Figures 45(A) to 45(D) are cross-sectional views illustrating the method for fabricating the EL layer 786. be.

[0381] First, a conductive film 772 is formed on the planar insulating film 770, and a part of the conductive film 772 is covered. A uni-shaped insulating film 730 is formed (see Figure 45(A)).

[0382] Next, liquid droplets from the droplet dispensing device 783 are dispensed onto the exposed portion of the conductive film 772, which is an opening in the insulating film 730. A droplet 784 is dispensed to form a layer 785 containing the composition. The droplet 784 is a composition containing a solvent. It adheres to the conductive film 772 (see Figure 45(B)).

[0383] The process of dispensing the droplet 784 may also be carried out under reduced pressure.

[0384] Next, the solvent is removed from the layer 785 containing the composition and solidified to form the EL layer 786. Form (see Figure 45(C)).

[0385] The solvent can be removed by either a drying or heating process.

[0386] Next, a conductive film 788 is formed on the EL layer 786 to form the light-emitting element 782 (Figure 45( See D).

[0387] By performing the EL layer 786 using the droplet ejection method, the composition can be selectively ejected. Therefore, material waste can be reduced. Also, lithography for processing shapes Because no additional steps are required, the process can be simplified, resulting in lower costs.

[0388] The droplet dispensing method described above refers to a nozzle having a dispensing port for the composition, or one or This term refers to a general category of devices that have means for discharging droplets, such as heads with multiple nozzles.

[0389] Next, the droplet dispensing device used in the droplet dispensing method will be explained using Figure 46. This is a conceptual diagram illustrating the droplet dispensing device 1400.

[0390] The droplet dispensing device 1400 has a droplet dispensing means 1403. Unit 3 has head 1405 and head 1412.

[0391] Heads 1405 and 1412 are connected to control means 1407, which is a computer By controlling it with the -1410, it is possible to draw on a pre-programmed pattern. can.

[0392] Furthermore, as for the timing of drawing, for example, the marker 1 formed on the substrate 1402 You can use 411 as the reference point. Alternatively, you can determine the reference point by using the outer edge of substrate 1402 as the reference point. It is also acceptable to do so. Here, marker 1411 is detected by imaging means 1404, and image processing means 1 The signal converted to digital in 409 is recognized by computer 1410 and a control signal is issued. It is then sent to the control unit 1407.

[0393] The imaging means 1404 may be a charge-coupled device (CCD) or a complementary metal-oxide-semiconductor ( Image sensors using CMOS (CMOS) can be used. The information of the pattern to be formed is stored in the storage medium 1408, and this information Based on this, a control signal is sent to the control means 1407, and the individual heads 1 of the droplet ejection means 1403 405 and head 1412 can be controlled individually. The material to be dispensed is from material supply source 1 413, from material supply source 1414, through piping to head 1405 and head 1412 respectively It will be supplied.

[0394] The inside of head 1405 is a space for filling with liquid material, as indicated by the dotted line 1406, and discharge It has a structure that includes a nozzle, which is the outlet. Although not shown in the diagram, head 1412 is also head 1 It has a similar internal structure to the 405. The nozzles of head 1405 and head 1412 are different. By setting up the size, it is possible to draw different materials at different widths simultaneously with a single head. It can extrude and draw with multiple types of luminescent materials, and when drawing over a wide area... To improve throughput, the same material is simultaneously dispensed from multiple nozzles for drawing. This is possible. When using a large substrate, heads 1405 and 1412 move across the substrate as shown in Figure 4. The X, Y, and Z arrows shown in section 6 can be freely scanned, and the area to be drawn can be freely set. This allows for the drawing of multiple identical patterns on a single circuit board.

[0395] Furthermore, the process of dispensing the composition may be carried out under reduced pressure. The substrate is heated during dispensing. This may also be done. After the composition is extruded, one or both of the following steps are performed: drying and / or calcination. Drying and calcination steps Both processes involve heat treatment, but their purpose, temperature, and time differ. The drying and firing processes are carried out under normal pressure or reduced pressure using laser irradiation, instantaneous heat annealing, or heating. This is done using a furnace or similar device. The timing and number of times this heat treatment is performed are not particularly limited. It is not possible. In order to carry out the drying and firing processes properly, the temperature at that time depends on the material and composition of the substrate. It depends on the properties of the finished product.

[0396] As described above, the EL layer 786 can be fabricated using a droplet ejection device.

[0397] Let's return to the explanation of the display device 700 shown in Figure 42.

[0398] The display device 700 shown in Figure 42 has an insulating film 770 on a planarized insulating film 770 and a conductive film 772. 30 is provided. The insulating film 730 covers a portion of the conductive film 772. Note that the light-emitting element 782 It has a top emission structure. Therefore, the conductive film 788 is light-transmitting, and the EL layer 7 It transmits the light emitted by 86. In this embodiment, the top emission structure The following are examples, but are not limited to these. For example, a bottle that emits light on the conductive film 772 side Mu emission structure and dual emission that emits light to both conductive film 772 and conductive film 788 It can also be applied to the mission structure.

[0399] Furthermore, a colored film 736 is provided in a position that overlaps with the light-emitting element 782, and overlaps with the insulating film 730. A light-shielding film 738 is provided at the location, the routing wiring section 711, and the source driver circuit section 704. Furthermore, the colored film 736 and the light-shielding film 738 are covered with an insulating film 734. Furthermore, the space between the light-emitting element 782 and the insulating film 734 is filled with a sealing film 732. (See Figure 42) In the display device 700 shown, an example was given of a configuration in which a colored film 736 is provided, It is not limited to this. For example, when the EL layer 786 is formed by coloring, A configuration without the film 736 is also possible.

[0400] <3-4. Example of a configuration in which an input / output device is provided to the display device> Furthermore, an input / output device may be provided to the display device 700 shown in Figures 41 and 42. Examples of power devices include touch panels.

[0401] The configuration in which a touch panel 791 is provided on the display device 700 shown in Figure 41 is shown in Figure 43 and Figure 42. Figure 44 shows the configurations in which a touch panel 791 is provided on the display device 700.

[0402] Figure 43 is a cross-sectional view of a configuration in which a touch panel 791 is provided to the display device 700 shown in Figure 41. Figure 44 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in Figure 42. be.

[0403] First, the touch panel 791 shown in Figures 43 and 44 will be explained below.

[0404] The touch panel 791 shown in Figures 43 and 44 is a second substrate 705 and a colored film 736. It is a so-called in-cell type touch panel that is placed in between. The touch panel 791 is a colored film Before forming 736, it is sufficient to form it on the second substrate 705 side.

[0405] The touch panel 791 consists of a light-shielding film 738, an insulating film 792, an electrode 793, and an electrode. It has 794, an insulating film 795, an electrode 796, and an insulating film 797. For example, a finger or When a detected object such as a tyrus comes into close proximity, the capacitance between electrode 793 and electrode 794 changes. It can detect transformation.

[0406] Furthermore, above the transistor 750 shown in Figures 43 and 44, there is an electrode 793 and, The intersection with electrode 794 is clearly indicated. Electrode 796 is an opening provided in the insulating film 795. Through this, electrode 794 is electrically connected to the two electrodes 793 that sandwich it. (See Figure 43) Figure 44 illustrates a configuration in which the region where the electrode 796 is provided is located in the pixel section 702. However, it is not limited to this, and for example, it may be formed in the source driver circuit section 704.

[0407] Electrodes 793 and 794 are provided in the region overlapping with the light-shielding film 738. Also, see Figure 43. As shown, it is preferable that the electrode 793 is provided so as not to overlap with the light-emitting element 782. Furthermore, as shown in Figure 44, the electrode 793 is provided so as not to overlap with the liquid crystal element 775. It is preferable that the electrode 793 overlaps with the light-emitting element 782 and the liquid crystal element 775. It has an opening in the region. That is, the electrode 793 has a mesh shape. By doing so, the electrode 793 is configured not to block the light emitted by the light-emitting element 782. This is possible. Alternatively, the electrode 793 can be configured not to block the light transmitted through the liquid crystal element 775. This is possible. Therefore, the reduction in brightness due to the placement of the touch panel 791 is extremely small. Because it is small, it is possible to realize a display device that has high visibility and reduced power consumption. The Extreme 794 should have a similar configuration.

[0408] Furthermore, since electrodes 793 and 794 do not overlap with the light-emitting element 782, electrodes 793 and A metal material with low visible light transmittance can be used for electrode 794. Alternatively, electrode 7 Since electrode 93 and electrode 794 do not overlap with liquid crystal element 775, electrodes 793 and 794 This allows the use of metal materials with low visible light transmittance.

[0409] Therefore, compared to electrodes using oxide materials with high visible light transmittance, electrode 793 and This makes it possible to lower the resistance of electrode 794, improving the sensor sensitivity of the touch panel. It is possible.

[0410] For example, conductive nanowires may be used for electrodes 793, 794, and 796. The nanowires have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 nm. The size should be less than or equal to m, more preferably between 5 nm and 25 nm. The wires include metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires. A wire or carbon nanotube can be used. For example, electrodes 793, 7 When using Ag nanowires for either 94 or 796, or all of them, in visible light The light transmittance must be 89% or higher, and the sheet resistance must be between 40Ω / □ and 100Ω / □. can.

[0411] Furthermore, Figures 43 and 44 illustrate the configuration of an in-cell type touch panel. However, it is not limited to this. For example, a so-called on-cell type tactile paving can be formed on the display device 700. A so-called out-cell type touch panel, used by being attached to a touch panel or display device 700. That is also acceptable.

[0412] Thus, the display device according to one aspect of the present invention can be combined with various forms of touch panels. It can be used.

[0413] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0414] (Embodiment 4) In this embodiment, a display device having a semiconductor device according to one aspect of the present invention is shown in Figure 47. We will use this to provide an explanation.

[0415] <4. Circuit configuration of the display device> The display device shown in Figure 47(A) has a region having pixels of the display element (hereinafter referred to as the pixel portion 502 and ( ) and a circuit section ( ) which is located outside the pixel section 502 and has a circuit for driving the pixels. Hereinafter referred to as the drive circuit section 504, and a circuit having a function to protect the element (hereinafter referred to as the protection circuit 504) It has a (6) and a terminal section 507. Note that the protection circuit 506 is not provided. That's fine.

[0416] Part or all of the drive circuit section 504 is formed on the same substrate as the pixel section 502. This is desirable. This allows for a reduction in the number of components and terminals. Drive circuit section 504 If part or all of it is not formed on the same substrate as the pixel section 502, the drive cycle Part or all of road section 504 is COG or TAB (Tape Automated B It can be implemented by (onding).

[0417] The pixel section 502 is arranged in X rows (where X is a natural number greater than or equal to 2) and Y columns (where Y is a natural number greater than or equal to 2). It has a circuit for driving multiple display elements (hereinafter referred to as the pixel circuit 501), and the drive cycle The path section 504 is a circuit that outputs a signal (scan signal) for selecting pixels (hereinafter referred to as a gate driver). 504a) is used to supply signals (data signals) for driving the pixel display elements. It has a drive circuit such as the circuit (hereinafter referred to as source driver 504b).

[0418] The gate driver 504a has a shift register, etc. The gate driver 504a is A signal to drive the shift register is input via terminal 507, and the signal is output. For example, the gate driver 504a receives input such as a start pulse signal and a clock signal. The gate driver 504a outputs a pulse signal. The scanning signal is applied to the wiring (and It has the function of controlling the potential of the scan lines (referred to as GL_1 to GL_X) below. Multiple drivers 504a are provided, and multiple gate drivers 504a are used to control the scan line GL_1 The path to GL_X may be divided and controlled. Alternatively, the gate driver 504a may use an initialization signal. It has the function of supplying, however, the gate driver 50 4a can also supply another signal.

[0419] The source driver 504b has a shift register, etc. The source driver 504b Through terminal 507, in addition to signals for driving the shift register, the data signals are generated. A signal (image signal) is input. The source driver 504b uses the image signal to create a pixel circuit. It has the function of generating data signals to write to 501. Also, source driver 504b The data signal is transmitted according to the pulse signal obtained by inputting the start pulse, clock signal, etc. It has the function of controlling the output of the number. In addition, the source driver 504b is given a data signal. It has the function of controlling the potential of the wiring (hereinafter referred to as data lines DL_1 to DL_Y). Alternatively, source driver 504b may have the ability to supply initialization signals. However, this is not limited to the source driver 504b, which may also supply other signals. It is possible.

[0420] The source driver 504b is configured using, for example, multiple analog switches. The source driver 504b sequentially turns on multiple analog switches, The image signal can be time-divided and output as a data signal. It can also use shift registers, etc. You may use this to configure source driver 504b.

[0421] Each of the multiple pixel circuits 501 receives a scan signal from one of the multiple scan lines GL. A pulse signal is input via one of several data lines DL to which a data signal is supplied. A data signal is input. In addition, each of the multiple pixel circuits 501 is a gate driver. 504a controls the writing and retention of data in the data signal. For example, m rows and n columns. The pixel circuit 501 of the eye is connected to the gate driver via the scan line GL_m (where m is a natural number less than or equal to X). A pulse signal is input from 504a, and the data line DL_n( A data signal is input from the source driver 504b via n (where n is a natural number less than or equal to Y).

[0422] The protection circuit 506 shown in Figure 47(A) is, for example, a gate driver 504a and a pixel circuit 5 It is connected to scan line GL, which is the wiring between 01. Alternatively, the protection circuit 506 is connected to source driver It is connected to the data line DL, which is the wiring between the light bar 504b and the pixel circuit 501. Alternatively, The protection circuit 506 is connected to the wiring between the gate driver 504a and the terminal section 507. Yes, it is possible. Alternatively, the protection circuit 506 provides a connection between the source driver 504b and the terminal section 507. It can be connected to a wire. The terminal 507 is used to supply power and to the display device from an external circuit. This refers to the part equipped with terminals for inputting control signals and image signals.

[0423] The protection circuit 506, when a potential outside a certain range is applied to the wiring to which it is connected, This is a circuit that creates a conductive state between two wires.

[0424] As shown in Figure 47(A), the pixel unit 502 and the drive circuit unit 504 each have a protection circuit 50 By providing 6, ESD (Electrostatic Discharge: This can improve the resistance of display devices to overcurrents generated by electrostatic discharge, etc. However, the configuration of the protection circuit 506 is not limited to this, for example, the gate driver 504a Configuration with protection circuit 506 connected, or with protection circuit 506 connected to source driver 504b. This configuration is also possible. Alternatively, a configuration in which the protection circuit 506 is connected to the terminal 507. It can also be done this way.

[0425] Furthermore, in Figure 47(A), the gate driver 504a and the source driver 504b are Therefore, although an example is shown in which the drive circuit section 504 is formed, the configuration is not limited to this. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed from a single-crystal semiconductor film or a polycrystalline semiconductor film) is put into practice. It can also be used as a mounting configuration.

[0426] Furthermore, the multiple pixel circuits 501 shown in Figure 47(A) have, for example, the configuration shown in Figure 47(B). It can be done this way.

[0427] The pixel circuit 501 shown in Figure 47(B) includes a liquid crystal element 570, a transistor 550, and It has a quantitative element 560 and a transistor 550 as shown in the previous embodiment. It can be applied.

[0428] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set according to the data being written to it. A common potential is set on one of the pairs of electrodes of the liquid crystal element 570 that each of the pixel circuits 501 possesses. (Common potential) may be applied. Also, a pair of liquid crystal elements 570 of the pixel circuit 501 in each row One of the electrodes may be given a different potential.

[0429] For example, the driving method for a display device equipped with a liquid crystal element 570 is TN mode, STN mode Code, VA mode, ASM (Axially Symmetric Aligned Motor) icro-cell) mode, OCB (Optically Compensated Birefringence mode, FLC (Ferroelectric Liqu id Crystal) mode, AFLC (AntiFerroelectric Li) quid Crystal) mode, MVA mode, PVA (Patterned Ve (Critical Alignment) mode, IPS mode, FFS mode, or TBA You may also use modes such as (Transverse Bend Alignment). In addition, as a method of driving the display device, there is also ECB (Electric Ally Controlled Birefringence) mode, PDLC (P Olymer Dispersed Liquid Crystal (PNLC) mode, (Polymer Network Liquid Crystal) mode, guest host There are modes such as St Mode. However, this is not limited to these, and various types of liquid crystal elements and their driving methods exist. Various materials can be used.

[0430] In the pixel circuit 501 of row m, column n, the source electrode or drain electrode of transistor 550 One electrode is electrically connected to the data line DL_n, and the other is connected to a pair of liquid crystal elements 570. It is electrically connected to the other electrode. Also, the gate electrode of transistor 550 is connected to the scan line G It is electrically connected to L_m. Transistor 550 can be in an on or off state. This provides a function to control the writing of data to the data signal.

[0431] One of the pair of electrodes of the capacitive element 560 is connected to a wiring to which a potential is supplied (hereinafter referred to as the potential supply line VL). ) is electrically connected to the other end, and the other end is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The potential value of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitive element 560 functions as a holding capacitor to retain the written data.

[0432] For example, in a display device having the pixel circuit 501 shown in Figure 47(B), for example, Figure 47(A) The gate driver 504a shown in the diagram sequentially selects the pixel circuit 501 for each row, and the transistor Turn on 550 to write the data signal.

[0433] When data is written to the pixel circuit 501, the transistor 550 turns off. The image is then held. By performing this process row by row, the image can be displayed.

[0434] Furthermore, the multiple pixel circuits 501 shown in Figure 47(A) have, for example, the configuration shown in Figure 47(C). It can be done this way.

[0435] Furthermore, the pixel circuit 501 shown in Figure 47(C) consists of transistors 552 and 554, and a capacitance element It has a child 562 and a light-emitting element 572. Transistor 552 and transistor 554 The transistors shown in the previous embodiment can be applied to either one or both of them. .

[0436] One of the source and drain electrodes of transistor 552 is supplied with a data signal. It is electrically connected to the wiring (hereinafter referred to as the signal data line DL_n). Furthermore, a transistor The gate electrode of the 552 is connected to the wiring to which the gate signal is applied (hereinafter referred to as scan line GL_m). It is electrically connected.

[0437] Transistor 552, by being either on or off, controls the data signal. It has a function to control the writing of data.

[0438] One of the pair of electrodes of the capacitive element 562 is connected to a wiring to which a potential is supplied (hereinafter referred to as the potential supply line VL). It is electrically connected to (a), and the other is the source electrode and drain of transistor 552. It is electrically connected to the other electrode.

[0439] The capacitive element 562 functions as a holding capacitor to retain the written data.

[0440] One of the source and drain electrodes of transistor 554 is connected to the potential supply line VL_a. They are electrically connected. Furthermore, the gate electrode of transistor 554 is connected to the gate electrode of transistor 552. It is electrically connected to the other of the source electrode and drain electrode.

[0441] One of the anodes and cathodes of the light-emitting element 572 is electrically connected to the potential supply line VL_b. The other end is electrically connected to the source and drain electrodes of transistor 554. It will be done.

[0442] Examples of light-emitting elements 572 include organic electroluminescent elements (also known as organic EL elements). (For example) can be used. However, the light-emitting element 572 is not limited to this. Inorganic EL elements made of inorganic materials may also be used.

[0443] Furthermore, a high power supply potential VDD is supplied to one of the potential supply lines VL_a and VL_b. On the other hand, a low power supply potential VSS is applied.

[0444] In a display device having the pixel circuit 501 shown in Figure 47(C), for example, the ge shown in Figure 47(A) The driver 504a sequentially selects the pixel circuit 501 for each row, and the transistor 552 Turn it on and write the data signal.

[0445] When data is written to the pixel circuit 501, the transistor 552 turns off. It enters a holding state. Furthermore, in accordance with the potential of the written data signal, transistor 554 The amount of current flowing between the source electrode and the drain electrode is controlled, and the light-emitting element 572 controls the amount of current flowing through it. It emits light with brightness corresponding to the flow rate. By performing this sequentially for each row, an image can be displayed.

[0446] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination.

[0447] (Embodiment 5) In this embodiment, a display module and electronic device having a semiconductor device according to one aspect of the present invention are provided. This will be explained using Figures 48 to 51.

[0448] <5-1. Display Module> The display module 7000 shown in Figure 48 consists of an upper cover 7001 and a lower cover 7002. In between, the touch panel 7004 connected to FPC7003 and the FPC7005 are connected Display panel 7006, backlight 7007, frame 7009, printed circuit board 701 0, has battery 7011.

[0449] A semiconductor device according to one aspect of the present invention can be used, for example, as a display panel 7006.

[0450] The upper cover 7001 and the lower cover 7002 are the touch panel 7004 and the display panel. The shape and dimensions can be appropriately modified to match the size of the 7006.

[0451] The 7004 touch panel is a display panel using either a resistive or capacitive touch panel. It can be used superimposed on 7006. Also, the opposing substrate (sealing substrate) of the display panel 7006 It is also possible to give the board a touch panel function. It is also possible to install a light sensor in each pixel of 006 to create an optical touch panel.

[0452] The backlight 7007 has a light source 7008. Note that in Figure 48, the backlight The example given shows a configuration in which the light source 7008 is placed on the T7007, but it is not limited to this. For example, a light source 7008 is placed at the edge of the backlight 7007, and a light diffuser plate is also used. It may also be made into a component. Furthermore, when using self-emissive light-emitting elements such as organic EL elements, or when using reflection In the case of type panels, etc., a configuration without backlight 7007 is also acceptable.

[0453] Frame 7009 provides protection for the display panel 7006, as well as the movement of the printed circuit board 7010. It has the function of an electromagnetic shield to block electromagnetic waves generated by the operation. The 7009 may also function as a heat sink.

[0454] The printed circuit board 7010 contains power supply circuits and signals for outputting video and clock signals. It has a power processing circuit. The power supply that provides power to the power supply circuit is an external commercial power supply. Alternatively, a separate power source, battery 7011, may be used. This can be omitted when using commercial power.

[0455] Furthermore, the display module 7000 includes components such as polarizing plates, phase difference plates, and prism sheets. They may also be provided.

[0456] <5-2.Electronic equipment 1> Next, Figures 49(A) to 49(E) show examples of electronic devices.

[0457] Figure 49(A) shows the appearance of the camera 8000 with the viewfinder 8100 attached. This is a diagram.

[0458] The camera 8000 consists of a housing 8001, a display unit 8002, operation buttons 8003, and a shutter. It has buttons 8004, etc. The camera 8000 also has a detachable lens 8006. It is attached.

[0459] Here, we'll use camera 8000 and replace lens 8006 by removing it from housing 8001. The configuration allows for this, but the lens 8006 and the housing may be integrated.

[0460] Camera 8000 can take an image by pressing the shutter button 8004. Furthermore, the display unit 8002 also functions as a touch panel, and touching the display unit 8002... This also makes it possible to take images.

[0461] The camera 8000's housing 8001 has a mount with electrodes, and the viewfinder 810 In addition to the above, a strobe device and other equipment can be connected.

[0462] The viewfinder 8100 has a housing 8101, a display unit 8102, buttons 8103, etc. .

[0463] The housing 8101 has a mount that engages with the mount of the camera 8000, and The mount 8100 can be attached to the camera 8000. The mount also has electrodes. The electrode has the ability to display images and other data received from the camera 8000 on the display unit 8102. It can be done.

[0464] Button 8103 functions as a power button. Button 8103 controls the display. You can switch the display of 8102 on or off.

[0465] The display unit 8002 of the camera 8000 and the display unit 8102 of the viewfinder 8100 are equipped with this A display device according to one embodiment of the invention can be applied.

[0466] Note that in Figure 49(A), the camera 8000 and the viewfinder 8100 are treated as separate electronic devices. These components are designed to be detachable, and the camera 8000's housing 8001 is equipped with a display device. It may also have a built-in viewfinder.

[0467] Figure 49(B) shows the external appearance of the head-mounted display 8200.

[0468] The head-mounted display 8200 consists of a mounting part 8201, lenses 8202, and a main body 82 03, it has a display unit 8204, a cable 8205, etc. Also, the mounting part 8201 has It has a built-in 8206 battery.

[0469] Cable 8205 supplies power from battery 8206 to main unit 8203. Main unit 82 03 is equipped with a wireless receiver and displays video information such as received image data on the display unit 8204. It can also detect the movement of the user's eyeballs and eyelids using a camera located on the main unit 8203. By capturing the user's perspective and calculating the coordinates of their viewpoint based on that information, the user's viewpoint is determined. It can be used as an input method.

[0470] Furthermore, the attachment portion 8201 may be provided with multiple electrodes in positions that come into contact with the user. The main unit 8203 detects the current flowing through the electrodes in response to the user's eye movements, It may also have a function to recognize the user's viewpoint. Furthermore, it may detect the current flowing through the electrode. By doing so, it may have a function to monitor the user's pulse. Also, the attachment part 820 1 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor. The display unit 8204 may also have a function to display the user's biometric information. The movement of the unit is detected, and the image displayed on the display unit 8204 is changed in accordance with that movement. That's good too.

[0471] A display device according to one aspect of the present invention can be applied to the display unit 8204.

[0472] Figures 49(C),(D), and(E) show the external appearance of the head-mounted display 8300. Yes. The head-mounted display 8300 consists of a housing 8301, a display unit 8302, and It comprises a band-shaped fixing device 8304 and a pair of lenses 8305.

[0473] The user can view the display on the display unit 8302 through the lens 8305. Furthermore, it is preferable to arrange the display unit 8302 in a curved shape. This allows the user to experience a high level of realism. Although an example has been given of a configuration in which one display unit 8302 is provided, the example is not limited to this, for example, The display unit 8302 may be configured to have two units. In this case, one display unit is shown to one eye of the user. By arranging the parts in such a configuration, it becomes possible to perform 3D displays using parallax, etc. .

[0474] Furthermore, a display device according to one embodiment of the present invention can be applied to the display unit 8302. A display device having a semiconductor device in one embodiment has extremely high resolution, as shown in Figure 49(E). Even when magnified using the Uni lens 8305, the pixels are not visible to the user. It can display highly realistic images.

[0475] <5-3.Electronic equipment 2> Next, Figure 5 shows an example of an electronic device different from the electronic devices shown in Figures 49(A) to 49(E). These are shown in Figures 0(A) through 50(G).

[0476] The electronic device shown in Figures 50(A) to 50(G) consists of a housing 9000, a display unit 9001, and Speaker 9003, operation key 9005 (including power switch or operation switch), connection terminal Child 9006, Sensor 9007 (force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, Light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power, radiation, (Including functions for measuring flow rate, humidity, gradient, vibration, odor, or infrared radiation), Microphone It has n9008, etc.

[0477] The electronic devices shown in Figures 50(A) to 50(G) have various functions. For example, various Functions to display various information (still images, videos, text images, etc.) on the display unit, touch panel function Features that display a calendar, date or time, and various software (programs). Functions to control processing, wireless communication functions, and various computers using wireless communication functions It has the ability to connect to a network and transmit or receive various types of data using wireless communication. The function reads programs or data recorded on the recording medium and displays them on the display unit. It can have functions such as the above. The electronic devices shown in Figures 50(A) to 50(G) are also included. The functions it can possess are not limited to these, and it can have a variety of functions. Although not shown in Figures 50(A) to 50(G), electronic devices have multiple display units. The configuration may also include a camera or the like to capture still images. The camera has a function to record videos and save the captured images to a recording medium (external or built into the camera). It may also have functions such as displaying captured images on a display unit.

[0478] Details of the electronic equipment shown in Figures 50(A) to 50(G) will be explained below.

[0479] Figure 50(A) is a perspective view showing the television equipment 9100. 100 is, for example, a large screen display unit 9001 of 50 inches or more, or 100 inches or more. It is possible to incorporate it.

[0480] Figure 50(B) is a perspective view showing the personal digital assistant 9101. The personal digital assistant 9101 is It has one or more functions selected from, for example, a telephone, a notebook, or an information viewing device. Physically, it can be used as a smartphone. Furthermore, the mobile information terminal 9101 is... Speakers, connection terminals, sensors, etc. may be provided. Also, the portable information terminal 9101 may display text and Image information can be displayed on multiple surfaces. For example, three operation buttons 9050( An operation icon (also called simply an icon) may be displayed on one side of the display unit 9001. Yes, it is possible. Furthermore, the information 9051, indicated by the dashed rectangle, can be displayed on another surface of the display unit 9001. This is possible. For example, information 9051 can be transmitted via email or SNS (Social Networking Services). A display that notifies you of incoming calls (such as twerking services) and phone calls, as well as emails and social media messages. Subject, sender name (email, social media, etc.), date, time, battery level, antenna reception. This includes the strength of the information. Alternatively, in the position where information 9051 is displayed, a substitute for information 9051 may be displayed. Alternatively, you may display operation buttons such as 9050.

[0481] Figure 50(C) is a perspective view showing the personal digital assistant 9102. The personal digital assistant 9102 is The display unit 9001 has the function of displaying information on three or more sides. Here, information 9052, This shows an example where information 9053 and information 9054 are displayed on different sides. For example, The user of the mobile information terminal 9102 stores the mobile information terminal 9102 in the breast pocket of their clothing. In this state, you can check the display (information 9053 in this case). Specifically, when an incoming call is received... The phone number or name of the caller can be observed from above the mobile information terminal 9102. The information is displayed on the device. The user can view the information without taking the portable information terminal 9102 out of their pocket. This allows you to check and decide whether or not to answer the call.

[0482] Figure 50(D) is a perspective view showing the wristwatch-type personal information terminal 9200. Personal information terminal The 9200 is a mobile phone, email, document viewing and creation, music playback, and internet communication. It can run various applications such as computer games. The display unit 9001 has a curved display surface, and displays are performed along the curved display surface. It can do this. Furthermore, the personal information terminal 9200 can perform standardized short-range wireless communication. This is possible. For example, by communicating with a wireless headset, It is also possible to make calls using the free-call function. In addition, the mobile information terminal 9200 has a connection terminal 9006. It has the capability to directly exchange data with other information terminals via a connector. Charging can also be performed via connection terminal 9006. Note that the charging operation is performed via connection terminal 900 This may also be done by wireless power transfer without using 6.

[0483] Figures 50(E),(F), and(G) are perspective views showing a foldable portable information terminal 9201. Furthermore, Figure 50(E) is a perspective view of the mobile information terminal 9201 in an unfolded state, and Figure 50 (F) changes the mobile information terminal 9201 from one state to the other, either unfolded or folded. This is a perspective view of the device in the process of being folded, with Figure 50(G) showing the portable information terminal 9201 in its folded state. This is a perspective view of the device. The 9201 portable information terminal offers excellent portability when folded, and when unfolded... In this configuration, the seamless, wide display area provides excellent readability. (Portable Information Terminal 92) The display unit 9001 of 01 is connected by three housings 9000 via a hinge 9055. It is supported by bending the two housings 9000 via the hinge 9055. Furthermore, the mobile information terminal 9201 can be reversibly transformed from an unfolded state to a folded state. This is possible. For example, the mobile information terminal 9201 can bend with a radius of curvature of 1 mm or more and 150 mm or less. It is possible to do so.

[0484] Next, the electronic equipment shown in Figures 49(A) to 49(E), and Figures 50(A) to 50( Figure 51(A)(B) shows an example of an electronic device different from the one shown in G). Figure 51(A) (B) is a perspective view of a display device having multiple display panels. Note that Figure 51(A) is Figure 51(B) is a perspective view of a configuration in which multiple display panels are rolled up. This is a perspective view of the unit in its unfolded state.

[0485] The display device 9500 shown in Figures 51(A) and (B) consists of multiple display panels 9501 and a shaft portion 9 It has 511 and a bearing portion 9512. In addition, the multiple display panels 9501 have a display area It has a region 9502 and a translucent region 9503.

[0486] Furthermore, the multiple display panels 9501 are flexible. Also, two adjacent display panels The 9501 is provided such that parts of them overlap each other. For example, two adjacent The translucent areas 9503 of the display panel 9501 can be superimposed. By using the display panel 9501, a large-screen display device can be created. Depending on the situation, the display panel 9501 can be rolled up, making it a highly versatile display. It can be used as a display device.

[0487] Furthermore, in Figures 51(A)(B), the display area 9502 is adjacent to the display panel 950 The diagram illustrates the state of separation at point 1, but it is not limited to this; for example, adjacent display panels 9 By overlapping the 501 display area 9502 without any gaps, a continuous display area 9502 and You may do so.

[0488] The electronic device described in this embodiment has a display unit for displaying some kind of information. It is characterized by having the following characteristics. However, one embodiment of the present invention is an electronic device that does not have a display unit. It can also be applied to containers.

[0489] This embodiment may be appropriately combined with other embodiments described herein, at least in part. They can be implemented in combination. [Examples]

[0490] In this embodiment, an InGa-Zn oxide film was formed using the method described in the above embodiment. This section describes the results of observation and elemental analysis of the IGZO film (hereinafter referred to as the IGZO film).

[0491] In the sample according to this embodiment, In-Ga-Zn oxide (atomic ratio In:Ga:Zn=5: 1:7) Using a target sputtering method, glass substrates are targeted to a film thickness of 100 nm. An IGZO film was deposited on a plate. The IGZO film deposition was carried out using 200 sccm of argon gas. The pressure is controlled to 0.6 Pa by ambient pressure, the substrate temperature is set to room temperature, and 2.5 kW of AC power is applied. He did that.

[0492] The IGZO film of the prepared sample was observed using HAADF-STEM imaging and EDX. The measurements were performed. HAADF-STEM imaging and EDX measurements were performed by JEOL Ltd. Using a sub-resolution analytical electron microscope JEM-ARM200F, with an acceleration voltage of 200kV and a beam The procedure was performed by irradiating with an electron beam with a diameter of approximately 0.1 nm.

[0493] Furthermore, for EDX measurements, the JED-2 energy-dispersive X-ray spectrometer is used as the elemental analyzer. A 300T thermometer was used. A Si drift detector was used to detect the X-rays emitted from the sample. Ta.

[0494] In EDX measurement, electron beam irradiation is performed on each point in the analyte region of the sample, and this generates The energy and number of characteristic X-rays emitted from the sample were measured, and the corresponding EDX spectrum was obtained for each point. In this example, the peaks in the EDX spectrum at each point represent the electron transition of the In atom to the L shell. Electron transitions of Ga atoms to the K shell, electron transitions of Zn atoms to the K shell, and electron transitions of O atoms to the K shell The atoms were assigned to different regions, and the ratio of each atom at each point was calculated. This was then used to analyze the sample's analyte region. By performing this operation on a specific region, we can obtain an EDX mapping that shows the distribution of the ratios of each atom. It is possible.

[0495] Figure 52 shows the HAADF-STEM image and EDX mapping of the IGZO film of the sample. This is shown in Figure 53. Figure 52 shows the planar HAADF-STEM image and EDX mapping of the IGZO film. Figure 53 shows the HAADF-STEM image and EDX mapping of the cross-section of the IGZO film. Figures 52(A) and 53(A) are HAADF-STEM images of the sample. Furthermore, Figures 52(B) and 53(B) are EDX mappings of O atoms, and Figure 52(C) and Figure 53(C) is the EDX mapping of Zn atoms, and Figures 52(D) and 53(D) are Figures 52(E) and 53(E) show the EDX mapping of Ga atoms, and the EDX mapping of In atoms. This is mapping. Note that Figures 52 and 53 show HAADF-STEM images and EDX mapping. The magnification of G is 7.2 million times.

[0496] Furthermore, ED shown in Figures 52(B) to 52(E) and Figures 53(B) to 53(E) The bar located above the X-map represents the ratio of each atom at each point in the IGZO film [atom]. This indicates [mic%].

[0497] In the EDX mapping shown in Figures 52 and 53, a relative distribution of brightness and darkness can be seen in the image. Figure 5 shows how each atom in the IGZO film is distributed. Frames 1A and 1B shown in 2(B) to 52(E), and in Figures 53(B) to 53(E) Let's focus on frames 2A and 2B shown.

[0498] In Figures 52(E) and 53(E), frames 1A and 2A contain a relatively large number of bright areas. Frames 1B and 2B contain a relatively large amount of dark areas. In other words, frames 1A and 2A are In This region has a relatively high concentration of atoms, while frames 1B and 2B are regions with a relatively low concentration of In atoms. In Figures 52(E) and 53(E), the relatively bright area is area A as shown in the above embodiment. The region corresponding to 1, which is relatively dark, corresponds to region B1 shown in the above embodiment.

[0499] In Figures 52(D) and 53(D), in contrast to Figures 52(E) and 53(E), frame 1 Frames A and 2A contain many relatively dark areas, while frames 1B and 2B contain relatively bright areas. It contains a large amount. In other words, frames 1A and 2A are regions with relatively few Ga atoms, and frames 1B and Frame 2B is a region with a relatively high concentration of Ga atoms. Similarly, a region with a relatively high concentration of In atoms... In the region where Ga atoms are relatively few, and in the region where In atoms are relatively few, Ga atoms are relatively... A tendency for this to be more common is observed. Therefore, the relatively bright areas in Figures 52(D) and 53(D) are The region B1 shown in the above embodiment is roughly corresponding to the relatively dark region shown in the above embodiment. This roughly corresponds to area A1.

[0500] In Figures 52(C) and 53(C), frames 1B and 2B contain a relatively large number of bright areas. Furthermore, frames 1A and 2A contain bright areas, though not as bright as frames 1B and 2B. In other words, Frames 1B and 2B are regions with a relatively high concentration of Zn atoms, while frames 1A and 2A are regions with a relatively high concentration of Zn atoms. This region contains Zn atoms, though not to the same extent as frame 2B.

[0501] Similarly, looking at Figures 52(B) and 53(B), we see frame 1A, frame 1B, and frame 2A. Furthermore, frame 2B can be seen as a region with a relatively high concentration of oxygen atoms.

[0502] Thus, region A1 of the IGZO film contains many In and O atoms, and region B1 contains many more. It does not contain Zn atoms, but it is a region containing Zn atoms. Therefore, region A1 is, for example, indium This suggests that it contains a large amount of indium oxide, In-Zn oxide, etc. Therefore, the region A1 functions as a region with higher conductivity than region B1, thus affecting the field effect transfer of the transistor. This contributes to increased mobility and increased on-current.

[0503] Here, the region corresponding to region A1 shown in Figures 52(E) and 53(E) (for example, frame 1A) And, focusing on frame 2A), multiple granular parts can be seen in region A1. These granular parts They are observed with a diameter of 0.5 nm to 1.5 nm. Region A1 is multiple The granular parts appear to be formed by each being connected to one another. In this way, the region A1 is formed in a cloud-like manner. The granular portion contained in region A1 is the actual This corresponds to the cluster in area A1 shown in the configuration of the installation.

[0504] Furthermore, region B1 of the IGZO film contains a large amount of Ga atoms, Zn atoms, and O atoms, while region A It is a region containing In atoms, though not as much as region 1. Therefore, region B1 is, for example, I This suggests that it contains a large amount of n-Ga-Zn oxide, etc. Therefore, region B1 is region A1 Because it functions as a region with higher semiconductor properties, it contributes to the switching characteristics of the transistor. ru.

[0505] Here, the region corresponding to region B1 shown in Figures 52(D) and 53(D) (for example, frame 1B) And focusing on frame 2B), multiple granular parts can be seen in region B1. Region B1 also has multiple The granular parts appear to be formed by each being connected to one another. In this way, the region B1 is also formed in a cloud-like manner. The granular parts included in region B1 are the actual This corresponds to the cluster in area B1 shown in the configuration of the installation.

[0506] Thus, the IGZO film of the sample prepared in this example has an in-rich region A1 and I This is a composite oxide semiconductor in which an n-poor region B1 is formed. Region A1 is a transient This contributes to the on-current and field-effect mobility of the transistor, and region B1 is the switching characteristic of the transistor. To contribute to this, using this composite oxide semiconductor results in a large on-current and high mobility. Yes, it is possible to fabricate transistors with low S-values ​​and good electrical characteristics.

[0507] This embodiment is at least a part of an embodiment or other embodiment described herein. This can be implemented by combining it with examples as appropriate. [Examples]

[0508] In this example, a composite oxide semiconductor film was formed, and its crystallinity was investigated by XRD. I will explain.

[0509] [Sample preparation] In this embodiment, the oxygen flow rate ratio and the substrate temperature during film formation are varied, and an oxide semiconductor is formed. A sample containing a membrane was prepared.

[0510] Each sample involves depositing an oxide semiconductor film on a 600mm x 720mm glass substrate. I gained more.

[0511] The deposition conditions for oxide semiconductor films involve sputtering with a deposition gas flow rate of 200 sccm. The device is introduced into a chamber, the pressure is set to 0.6 Pa, and indium, gallium, and zinc are added. A metal oxide target having (In:Ga:Zn=5:1:7 [atomic ratio]) is given 2 It was formed by applying 0.5kW of AC power.

[0512] Here, we prepared a total of 18 different samples by using three substrate temperature conditions and six oxygen flow rate conditions. The substrate temperature during film deposition was set to three conditions: room temperature, 130°C, and 170°C. The oxygen flow rate ratio was 0%. Six conditions were used: 10%, 30%, 50%, 70%, and 100%. The film-forming gas was oxygen. The ratio of the gas flow rate and the argon gas flow rate should be such that the sum of the two is 200 sccm. The changed conditions were used.

[0513] [XRD analysis results] XRD analysis is a type of out-of-plane method called the powder method (also known as the θ-2θ method). The procedure was performed using ). The θ-2θ method involves changing the incident angle of the X-rays and facing the X-ray source. This method involves setting the angle of the detector to be the same as the angle of incidence to measure the X-ray diffraction intensity. Furthermore, X-rays are incident from an angle of approximately 0.40° from the film surface, and the angle of the detector is changed to measure the X-rays. GIXRD (Grazin) is a type of out-of-plane method used to measure diffraction intensity. g-Incidence XRD) method (thin film method or Seemann-Bohlin method) You may also use ( ).

[0514] Figure 54 shows the results of XRD measurements performed on each sample. The horizontal axis in Figure 54 represents angle. The graph is 2θ, and the vertical axis shows the diffraction intensity in arbitrary units. Also, in Figure 54, the measurements are shown. Three diffraction profiles from different locations are shown. The profile in each graph is The upper part is the center of the circuit board (A), the lower part is the outer edge of the circuit board (C), and the middle part is the measurement point midway between A and C. It is the result.

[0515] The diffraction angle at which the diffraction intensity peak was observed (around 2θ = 31°) was for single crystal InGaZnO4. This matches the diffraction angle of the (009) plane in the structural model. Therefore, the PEE of this diffraction intensity In the sample in which the c-axis was confirmed, the crystalline portion was oriented in the direction of film thickness (hereinafter referred to as "oriented crystal"). It can be confirmed that it includes (also called a section).

[0516] As shown in Figure 54, under conditions of room temperature film deposition and an oxygen flow rate ratio of 0%, a clear peak was observed. This suggests that the proportion of oriented crystalline regions in the film is extremely low. It is.

[0517] On the other hand, even under room temperature deposition conditions, by including oxygen in the deposition gas, a clear peak can be obtained. It has been confirmed that, under room temperature film deposition conditions, if the oxygen flow rate ratio is 70% or higher, the peak intensity is A downward trend is also being observed.

[0518] Furthermore, when the substrate temperature is increased, a clear peak is observed even when the oxygen flow rate ratio is 0%. Furthermore, under substrate temperatures of 130°C and 170°C, oxygen is included in the film deposition gas. As a result, a clearer peak is obtained. Also, similar to the room temperature film deposition conditions, a high oxygen flow rate ratio Under conditions of 70% or higher, a tendency for peak intensity to decrease has also been observed.

[0519] From the above, the crystallinity of the deposited oxide semiconductor film depends on the oxygen flow rate ratio during film formation and the substrate. It was confirmed that it could be controlled by two temperature conditions. Also, under the condition of an oxygen flow rate ratio of 0% Even if crystallinity is present, it was found that the crystallinity can be improved by increasing the substrate temperature. Furthermore, even under conditions where the substrate temperature is room temperature, increasing the oxygen flow rate ratio can improve crystallinity. It was discovered that this is possible.

[0520] This embodiment is at least a part of an embodiment or other embodiment described herein. This can be implemented in appropriate combinations. [Examples]

[0521] In this example, a transistor equivalent to transistor 100A shown in Embodiment 2 is created. A transistor was manufactured, and its electrical characteristics were evaluated. In this embodiment, the sample S shown below was used. Sample 1 was prepared. Note that sample S1 had a channel length L of 3 μm and a channel width W of 50 μm. This is a sample in which a lunger has formed.

[0522] [Method for preparing sample S1] First, a 10nm thick titanium film and a 100nm thick copper film are placed on a glass substrate, It was formed using a taring device. Subsequently, the conductive film was processed by photolithography. Ta.

[0523] Next, four insulating films were laminated onto the substrate and conductive film. The insulating films were formed using plasma chemical gas The film was formed continuously in a vacuum using a phase deposition (PECVD) apparatus. The insulating film was formed from bottom to top in thickness 50nm silicon nitride film, 300nm thick silicon nitride film, 50nm thick silicon nitride A silicon oxidizide film with a thickness of 50 nm was used, respectively.

[0524] Next, an oxide semiconductor film is formed on an insulating film, and the oxide semiconductor film is processed into an island shape. Then, a semiconductor layer was formed. The oxide semiconductor film 108 was an oxide semiconductor with a thickness of 40 nm. A film was formed. Note that this oxide semiconductor film is made of the composite oxide semiconductor described earlier, or C / It's IGZO.

[0525] For the deposition conditions of the oxide semiconductor film, the substrate temperature is set to room temperature (25°C) and the flow rate is 200 s. Argon gas at ccm is introduced into the sputtering apparatus chamber, and the pressure is set to 0.6 Pa. A metal oxide target having indium, gallium, and zinc (In:Ga: It was formed by applying 2.5 kW of AC power to Zn (5:1:7 [atomic ratio]). In this example, the oxygen flow rate ratio during the deposition of the oxide semiconductor film is 0%.

[0526] Next, an insulating film was formed on the insulating film and semiconductor layer. The insulating film had a thickness of 150 nm. The silicon oxidizride film was formed using a PECVD apparatus.

[0527] Next, heat treatment was performed. This heat treatment involved 3 [units of gas] under a mixed gas atmosphere of nitrogen and oxygen. The treatment involved heat treatment at 50°C for 1 hour.

[0528] Next, an opening was formed in a desired region of the insulating film. The method for forming the opening was dryer The etching method was used.

[0529] Next, a conductive film was formed on the insulating film so as to cover the opening, and the conductive film was processed into an island shape. Furthermore, after forming the conductive film, an insulating film is subsequently processed to be in contact with the underside of the conductive film, It formed.

[0530] The conductive films include an oxide semiconductor film with a thickness of 10 nm and a titanium nitride film with a thickness of 50 nm. A copper film with a thickness of 100 nm was formed sequentially. The deposition conditions for the oxide semiconductor film were as follows: With the plate temperature set to 170°C, oxygen gas at a flow rate of 200 sccm is supplied to the sputtering apparatus. A gold containing indium, gallium, and zinc is introduced into a bar and the pressure is set to 0.6 Pa. A 2.5kW ion generator is applied to a group oxide target (In:Ga:Zn = 4:2:4.1 [atomic ratio]). The titanium nitride film and copper film were formed by applying AC power. It was formed using a ring device.

[0531] Next, plasma treatment was performed on the semiconductor layer, insulating film, and conductive film. For this purpose, a PECVD apparatus was used, the substrate temperature was set to 220°C, and argon gas and nitrogen gas were used. The procedure was carried out under a mixed gas atmosphere.

[0532] Next, a semiconductor layer, an insulating film, and an insulating film were formed on the conductive film. The insulating film had a thickness of 1 A 00nm silicon nitride film and a 300nm thick silicon oxide nitride film are processed using a PECVD apparatus. It was formed by lamination using [a specific material / method].

[0533] Next, a mask is formed on the formed insulating film, and an opening is formed in the insulating film using the mask. did.

[0534] Next, a conductive film is formed to fill the opening, and the conductive film is processed into an island shape. A conductive film was formed to serve as the source electrode and drain electrode. The conductive film had a thickness of 10 A titanium film of nm thickness and a copper film of 100 nm thickness are produced using a sputtering apparatus, respectively. It was formed.

[0535] Next, an insulating film and an insulating film were formed on the conductive film. The insulating film was 1.5 μm thick. An acrylic-based photosensitive resin was used.

[0536] Sample S1 was prepared in the manner described above.

[0537] [Transistor Id-Vg characteristics] Next, the Id-Vg characteristics of the transistor of the sample S1 prepared above were measured. The measurement conditions for the Id-Vg characteristics of the inverter are as follows: Conductive film functioning as the first gate electrode The voltage applied to the gate (hereinafter also called the gate voltage (Vg)), and the second gate electrode as the device The voltage applied to the conductive film (hereinafter also called the back gate voltage (Vbg)) is -10 The voltage was applied in 0.25V steps from V to +10V. It also functioned as a source electrode. The voltage applied to the conductive film (hereinafter also called the source voltage (Vs)) is set to 0V (comm), The voltage applied to the conductive film that functions as a drain electrode (hereinafter also called the drain voltage (Vd)) (u) was set to 0.1V and 20V.

[0538] Figure 55 shows the Id-Vg characteristic results for sample S1. Note that in Figure 55, the first vertical axis is Id[A] is the field effect mobility (μFE[cm]) on the second vertical axis. 2 [Vs]) with Vg[ V] represents the respective values. Note that the field effect mobility is measured at Vd = 20V. It is a value.

[0539] Note that in Figure 55, the upper limit of Id during measurement was set to 1 mA. Under the condition Vd=20V, when Vg=7.5V, Id exceeds this upper limit. Therefore, in Figure 55, the field effect mobility estimated from this Id-Vg characteristic is shown as The range Vg = 7.5V or less is explicitly specified.

[0540] As shown in Figure 55, a transistor, which is a semiconductor device according to one aspect of the present invention, has good electrical It has certain characteristics. Here, the characteristics of the transistor shown in Figure 55 are shown in Table 1.

[0541] [Table 1]

[0542] Thus, the transistor, which is a semiconductor device according to one aspect of the present invention, has a field-effect mobility of 1 00cm 2 It exceeds / Vs. This is comparable to transistors using low-temperature polysilicon. This is such a high value that it represents an astonishing characteristic for a transistor using oxide semiconductors. It can be said that...

[0543] As shown in Table 1, sample S1 has a transistor gate voltage greater than 0V and less than 10V. The maximum field effect mobility in the range below is 60 cm. 2 / Vs or more 150cm 2 / Vs less than The first region is defined as such, and the second region is defined as such, where the threshold voltage is between -1V and 1V, and the S value is defined as such. , in the third region where the voltage is less than 0.3V / decade, the off-current is 1 × 10 -12 A / c m 2 It has a fourth region which is less than μFE, and the maximum value of the field-effect mobility of the transistor is μFE Represented as (max), μFE is the value of the field-effect mobility when the gate voltage of the transistor is 2V. When expressed as (Vg=2V), μFE(max) / μFE(Vg=2V) is greater than or equal to 1 or 2. It will be less than.

[0544] The characteristics of the above transistors include the composite oxide semiconductor described earlier, or C / IGZ It can be obtained by using O. A composite oxide semiconductor, or C / IGZO, is used as the semiconductor of a transistor. When used in the conductor layer, it provides high carrier mobility and good switching characteristics. It becomes possible to combine Noh and [another skill] simultaneously.

[0545] This embodiment is at least a part of an embodiment or other embodiment described herein. This can be implemented by combining it with examples as appropriate. [Examples]

[0546] In this example, a transistor equivalent to transistor 100A shown in Embodiment 2 is created. The transistor was manufactured, and its electrical characteristics and cross-sectional shape were evaluated. In this example, sample S2 was prepared as shown below. Note that sample S2 has a channel length L of 2 μm. This is a sample on which a transistor with a channel width W of 3 μm has been formed.

[0547] [Method for preparing sample S2] First, a 10nm thick titanium film and a 100nm thick copper film are placed on a glass substrate, It was formed using a taring device. Subsequently, the conductive film was processed by photolithography. Ta.

[0548] Next, four insulating films were laminated onto the substrate and conductive film. The insulating films were formed using plasma chemical gas The film was formed continuously in a vacuum using a phase deposition (PECVD) apparatus. The insulating film was formed from bottom to top in thickness 50nm silicon nitride film, 100nm thick silicon nitride film, 50nm thick silicon nitride A silicon oxidizide film with a thickness of 50 nm was used, respectively.

[0549] Next, an oxide semiconductor film is formed on an insulating film, and the oxide semiconductor film is processed into an island shape. Then, a semiconductor layer was formed. The oxide semiconductor film 108 was an oxide semiconductor with a thickness of 40 nm. A film was formed. Note that this oxide semiconductor film is made of the composite oxide semiconductor described earlier, or C / It's IGZO.

[0550] The deposition conditions for oxide semiconductor films are as follows: substrate temperature 70°C, flow rate 180 sccm. Argon gas and oxygen gas at a flow rate of 20 sccm are placed inside the chamber of the sputtering apparatus. It is introduced into a system with a pressure of 0.6 Pa, and contains metal oxides of indium, gallium, and zinc. A 2.5kW AC current is applied to a material target (In:Ga:Zn=4:2:4.1 [atomic ratio]). It was formed by applying power. In this embodiment, the oxygen flow during the deposition of the oxide semiconductor film The quantity ratio is 10%.

[0551] Next, an insulating film was formed on the insulating film and semiconductor layer. The insulating film had a thickness of 150 nm. The silicon oxidizride film was formed using a PECVD apparatus.

[0552] Next, heat treatment was performed. This heat treatment involved 3 [units of gas] under a mixed gas atmosphere of nitrogen and oxygen. The treatment involved heat treatment at 50°C for 1 hour.

[0553] Next, an opening was formed in a desired region of the insulating film. The method for forming the opening was dryer The etching method was used.

[0554] Next, a conductive film was formed on the insulating film so as to cover the opening, and the conductive film was processed into an island shape. Furthermore, after forming the conductive film, an insulating film is subsequently processed to be in contact with the underside of the conductive film, It formed.

[0555] The conductive film consists of a first oxide semiconductor film with a thickness of 10 nm and a second oxide semiconductor film with a thickness of 90 nm. A monocrystalline semiconductor film and a first oxide semiconductor film were formed in sequence. The deposition conditions for the first oxide semiconductor film were as follows: substrate temperature At a temperature of 170°C, oxygen gas at a flow rate of 200 sccm is introduced into the chamber of the sputtering apparatus. A metallic acid containing indium, gallium, and zinc is introduced into the atmosphere, and the pressure is set to 0.6 Pa. A 2.5kW alternating current is applied to a chromium target (In:Ga:Zn=4:2:4.1 [atomic ratio]). It was formed by applying current. Furthermore, the deposition conditions for the second oxide semiconductor film were as follows: At a temperature of 170°C, argon gas is supplied at a flow rate of 180 sccm, and oxygen at a flow rate of 20 sccm. The gas is introduced into the chamber of the sputtering apparatus, the pressure is set to 0.6 Pa, and the indicator... A metal oxide target containing um, gallium, and zinc (In:Ga:Zn=4:2 It was formed by applying 2.5 kW of AC power to 4.1 [atomic ratio].

[0556] Next, plasma treatment was performed on the semiconductor layer, insulating film, and conductive film. For this purpose, a PECVD apparatus was used, the substrate temperature was set to 220°C, and argon gas and nitrogen gas were used. The procedure was carried out under a mixed gas atmosphere.

[0557] Next, a semiconductor layer, an insulating film, and an insulating film were formed on the conductive film. The insulating film had a thickness of 1 A 00nm silicon nitride film and a 300nm thick silicon oxide nitride film are processed using a PECVD apparatus. It was formed by lamination using [a specific material / method].

[0558] Next, a mask is formed on the formed insulating film, and an opening is formed in the insulating film using the mask. did.

[0559] Next, a conductive film is formed to fill the opening, and the conductive film is processed into an island shape. A conductive film was formed to serve as the source electrode and drain electrode. The conductive film had a thickness of 50 A titanium film of nm thickness, an aluminum film with a thickness of 400 nm, and a titanium film with a thickness of 100 nm The layers were then formed sequentially using a sputtering apparatus.

[0560] Next, an insulating film and an insulating film were formed on the conductive film. The insulating film was 1.5 μm thick. An acrylic-based photosensitive resin was used.

[0561] Sample S2 was prepared in the manner described above.

[0562] [Transistor Id-Vg characteristics] Next, the Id-Vg characteristics of the transistor of the sample S2 prepared above were measured. The measurement conditions for the Id-Vg characteristics of the converter were the same as those used in Example 3 described above.

[0563] Figure 56 shows the Id-Vg characteristic results for sample S2.

[0564] As shown in Figure 56, a transistor, which is a semiconductor device according to one aspect of the present invention, has good electrical It has certain characteristics. Here, the characteristics of the transistor shown in Figure 56 are shown in Table 2.

[0565] [Table 2]

[0566] As shown in Table 2, sample S2 has a transistor gate voltage greater than 0V and less than 10V. The maximum field effect mobility in the range below is 60 cm. 2 / Vs or more 150cm 2 / Vs less than The first region is defined as such, and the second region is defined as such, where the threshold voltage is between -1V and 1V, and the S value is defined as such. , in the third region where the voltage is less than 0.3V / decade, the off-current is 1 × 10 -12 A / c m 2 It has a fourth region which is less than μFE, and the maximum value of the field-effect mobility of the transistor is μFE Represented as (max), μFE is the value of the field-effect mobility when the gate voltage of the transistor is 2V. When expressed as (Vg=2V), μFE(max) / μFE(Vg=2V) is greater than or equal to 1 or 2. It will be less than.

[0567] The characteristics of the above transistors include the composite oxide semiconductor described earlier, or C / IGZ It can be obtained by using O. A composite oxide semiconductor, or C / IGZO, is used as the semiconductor of a transistor. When used in the conductor layer, it provides high carrier mobility and good switching characteristics. It becomes possible to combine Noh and [another skill] simultaneously.

[0568] [Transistor cross-sectional shape] Next, the cross-sectional shape of the transistor of the sample S2 prepared above was evaluated. To evaluate the cross-sectional shape of the sample, cross-sectional STEM observation was performed. Figure 57 shows the transient of sample S2. A cross-sectional STEM image of the sta is shown.

[0569] As shown in Figure 57, it was confirmed that the sample S2 prepared in this embodiment has a good cross-sectional shape. Furthermore, for the channel length L, the design was 2 μm, but the finished dimensions were 1.78 It was confirmed to be μm.

[0570] This embodiment is at least a part of an embodiment or other embodiment described herein. This can be implemented by combining it with examples as appropriate. [Explanation of Symbols]

[0571] A1 area A2 area B1 area B2 area 100A Transistor 100B transistor 100C Transistor 100D Transistor 100E Transistor 100F transistor 100G transistor 100H Transistor 100J transistor 102 circuit boards 104 Insulating film 106 Conductive film 10⁸ Oxide semiconductor film 108_1 Oxide semiconductor film 108_2 Oxide semiconductor film 108_3 Oxide semiconductor film 108d Drain area 108f area 108i channel area 108s Source Area 110 Insulating Film 112 Conductive film 112_1 Conductive film 112_2 Conductive film 116 Insulating film 118 Insulating Film 120a conductive film 120b Conductive film 122 Insulating film 141a opening 141b opening 143 Opening 300A Transistor 300B transistor 300C Transistor 300D Transistor 300E Transistor 300F transistor 300G Transistor 302 circuit board 304 Conductive film 306 Insulating Film 307 Insulating film 308 Oxide semiconductor film 308_1 Oxide semiconductor film 308_2 Oxide semiconductor film 308_3 Oxide semiconductor film 312a Conductive film 312b Conductive film 312c conductive film 314 Insulating Film 316 Insulating film 318 Insulating film 320a conductive film 320b Conductive film 341a opening 341b opening 342a opening 342b opening 342c opening 351 Opening 352a opening 352b opening 501 Pixel Circuit 502 pixel section 504 Drive Circuit Section 504a Gate Driver 504b Source Driver 506 Protection circuit 507 Terminal section 550 transistors 552 transistors 554 transistors 560 Capacitive elements 562 Capacitance element 570 liquid crystal elements 572 Light-emitting element 700 Display device 701 circuit board 702 pixel section 704 Source Driver Circuit 705 circuit board 706 Gate Driver Circuit Section 708 FPC terminal section 710 signal line 711 Wiring section 712 Sealant 716 FPC 730 Insulating Film 732 Encapsulation film 734 Insulating Film 736 Colored film 738 Light-shielding film 750 transistors 752 transistors 760 connecting electrodes 770 Planarizing Insulator 772 Conductive film 773 Insulating Film 774 Conductive film 775 liquid crystal elements 776 Liquid Crystal Layer 778 Structure 780 Anisotropic conductive film 782 Light-emitting element 783 Droplet discharge device 784 Droplet 785 layers 786 EL layer 788 Conductive film 790 Capacitive elements 791 Touch Panel 792 Insulating film 793 Electrode 794 Electrode 795 Insulating film 796 Electrode 797 Insulating film 1400 Droplet discharge device 1402 circuit board 1403 Droplet discharge means 1404 Imaging means 1405 Head 1406 Dotted line 1407 Control means 1408 Storage medium 1409 Image processing means 1410 Computer 1411 markers 1412 head 1413 Material Source 1414 Material Source 2190 Plasma 2192 Cations 2501 Deposition chamber 2502a Target 2502b Target 2504a Sputtered particles 2504 Segregation region 2506a Sputtered particles 2506 Segregation area 2510a Backing Plate 2510b Backing Plate 2520 Target Holder 2520a Target holder 2520b Target Holder 2530a Magnet Unit 2530b Magnet Unit 2530N1 Magnet 2530N2 Magnet 2530S Magnet 2532 Magnetic Holder 2542 components 2560 circuit board 2570 PCB holder 2580a magnetic field lines 2580b magnetic field lines 7000 Display Module 7001 Top cover 7002 Lower cover 7003 FPC 7004 Touch Panel 7005 FPC 7006 Display Panel 7007 Backlight 7008 Light source 7009 Frame 7010 Printed Circuit Board 7011 Battery 8000 Camera 8001 enclosure 8002 Display section 8003 Operation Buttons 8004 Shutter button 8006 Lens 8100 Finder 8101 enclosure 8102 Display section 8103 button 8200 Head-Mounted Display 8201 Mounting part 8202 Lens 8203 Main Unit 8204 Display section 8205 Cable 8206 Battery 8300 Head-Mounted Display 8301 enclosure 8302 Display section 8304 Fixtures 8305 Lens 9000 cabinets 9001 Display section 9003 Speaker 9005 Operation Keys 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Operation Buttons 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9100 Television equipment 9101 Mobile Information Terminal 9102 Mobile Information Terminal 9200 Mobile Information Terminal 9201 Mobile Information Terminal 9500 display device 9501 Display Panel 9502 Display area 9503 area 9511 Shaft 9512 Bearing section

Claims

1. A transistor having a semiconductor layer, a gate, and a gate insulating layer, The semiconductor layer includes a composite oxide semiconductor having a first region and a second region. The first region has a plurality of first clusters containing In, element M, Zn, and O, The second region has a plurality of second clusters containing In, element M, Zn, and O, The element M is Al, Ga, Y, or Sn. The first region has a higher atomic ratio of In to element M than the second region. The first region has a portion where the plurality of first clusters are connected to each other. The second region has a portion where the plurality of second clusters are connected to each other. Off-current is 1 x 10 －１９ A transistor with an A rating of 0.

2. A transistor having a semiconductor layer, a gate, and a gate insulating layer, The semiconductor layer includes a composite oxide semiconductor having a first region and a second region. The first region has a plurality of first clusters containing In, element M, Zn, and O, The second region has a plurality of second clusters containing In, element M, Zn, and O, The element M is Al, Ga, Y, or Sn. The first region has a higher atomic ratio of In to element M than the second region. One of the plurality of first clusters is connected to another of the plurality of first clusters via one of the remaining plurality of first clusters. One of the plurality of second clusters is connected to another of the plurality of second clusters via one of the remaining plurality of second clusters, Off-current is 1 x 10 －１９ A transistor with an A rating of 0.

3. In claim 1 or claim 2, The first region is a transistor that is surrounded by the second region.

4. In claim 1 or claim 2, A transistor in which one of the plurality of first clusters is connected to another of the plurality of first clusters via one of the plurality of second clusters.

5. In any one of claims 1 to 4, The second cluster is a transistor with a wider band gap than the first cluster.

6. In any one of claims 1 to 5, The transistor having a first cluster size of 0.5 nm or more and 1.5 nm or less.

7. The substrate has a pixel section and a drive circuit section for driving the pixel section, The pixel portion has a first transistor, The aforementioned drive circuit section has a second transistor, A display device having the first transistor and the second transistor, respectively, as described in any one of claims 1 to 6.

8. The substrate has a pixel section and a drive circuit section for driving the pixel section, The pixel portion is a display device having a transistor according to any one of claims 1 to 6.

9. The substrate has a pixel section and a drive circuit section for driving the pixel section, The driver is a display device having a transistor according to any one of claims 1 to 6.

Images