Information technology systems, vehicles, and methods for introducing updates to target systems

The information technology system with data transfer acceleration modules addresses latency issues in vehicle updates, ensuring faster and more secure installation of updates by reducing waiting times through simultaneous system operation and data block management.

JP2026506151APending Publication Date: 2026-02-20MERCEDES BENZ GROUP AG
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Patent Information

Application Number
JP2025547892
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-02-20
Filing Date
2024-02-02
Publication Date
2026-02-20

AI Technical Summary

Technical Problem

Existing vehicle computer systems face challenges in efficiently and promptly updating their programs and firmware due to latency in data transfer, which affects user convenience and security, especially when large updates are required.

Method used

An information technology system with data transfer acceleration modules in both the source and target systems, allowing simultaneous operation during latency periods to reduce waiting times by temporarily storing and managing data transfer blocks.

Benefits of technology

Significantly reduces the time required for updating vehicle systems by shortening latency periods, enabling faster installation of updates and enhancing security by minimizing downtime.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to an information technology system (1) comprising a source system (2) and a target system (5), wherein information contained in the source system (2) can be transmitted to the target system (5) via a bidirectional data line (9). The information technology system (1) according to the present invention is characterized in that the source system (2) and / or the target system (5) each comprise a data transfer acceleration module (11) for accelerating the transmission of information from the source system (2) to the target system (5).
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Description

[Technical Field]

[0001] The present invention relates to an information technology system as defined in more detail in the preamble of claim 1, a vehicle, and a method for introducing updates to a target system as defined in more detail in the preamble of claim 8. [Background technology]

[0002] As digitalization advances, the importance of computer systems in vehicles is also increasing. Today's modern vehicles have several different control units, for example, for controlling the combustion process in an internal combustion engine, for adjusting the chassis with active suspension, and for providing driver assistance systems such as adaptive cruise control and high beam assistant. As the level of automation increases, the corresponding control units must process more data in a shorter time. This increases the computational demands. This means that providing fully automated and even autonomous driving functions requires vehicles to incorporate cutting-edge graphics processors capable of quickly calculating a large number of matrix operations.

[0003] Over the life of a vehicle, it may be necessary to update the program executable by the corresponding control unit several times. This executable program can be the firmware of the control unit or an application program executed in the corresponding control unit. In addition to replacing individual sub-codes and introducing entirely new sub-codes, parameter sets can also be replaced. For example, the parameters of a humidity sensor can be changed so that automatically activated wipers are only activated when there is a relatively high amount of precipitation. Similarly, characteristic maps can be adapted, such as a characteristic map for the fuel pump speed as a function of the oil temperature. Furthermore, new functions can be implemented and security holes can be closed by introducing corresponding updates to the aforementioned computer systems in the vehicle.

[0004] It is desirable to install the corresponding update in the computer system as soon as possible. While the update is being installed, the computer system may become unavailable, and as a result, the functions provided by the computer system may not be available. This requires the vehicle user to wait, which reduces convenience. Furthermore, it is desirable to install updates, especially those related to security, promptly to prevent attackers such as hackers from tampering with the computer system. The larger the update, i.e., the more data to be installed, the greater the need for speed.

[0005] Communication with a vehicle's onboard computer system can be achieved in a variety of ways. Vehicles typically have an onboard diagnostic interface that handles communication between a vehicle's external computer system and its internal computer system. In this case, a special communication protocol is used, such as Unified Diagnostic Services (UDS), a communication protocol specified by ISO 14229. For example, a vehicle's external computer system, such as a desktop computer, laptop, or tablet computer, can be connected to a corresponding vehicle's internal computer system via a wired connection, e.g., via USB or Ethernet, or wirelessly, e.g., via Bluetooth or Wi-Fi. To improve user convenience, updates can also be introduced to vehicles via mobile communications. Thus, vehicle users no longer need to visit a repair shop to install updates, or manually download updates to a desktop computer via the Internet, transfer the updates to a USB stick, and then insert the USB stick into a corresponding socket in the vehicle for installation. Instead, the vehicle uses a telematics unit to access a corresponding server of the vehicle manufacturer via mobile communications and download the updates.

[0006] The interaction between a computer system inside a vehicle and a computer system outside the vehicle represents an innovative environment: for example, German Patent Application Publication No. 102012110559 describes a method for securely downloading firmware using a diagnostic link connector and an OnStar system. To improve cybersecurity, the firmware implemented in the computer system inside the vehicle is signed by two different actors and is therefore double-signed.

[0007] Furthermore, DE 10 2019 216 841 A1 describes a vehicle diagnostic communication device as well as a system including such a vehicle diagnostic communication device, which is configured to estimate the duration of a diagnosis to be performed.

[0008] U.S. Patent No. 7,787,481 discloses a network interface system for connecting a central computer to a network for data exchange. The network interface system includes a memory system with at least one local buffer and a media access control system, the local buffer configured to read a second data structure from the memory system while a first data structure is being transmitted to the network. This is expected to improve access to the memory system, particularly by multiple terminal devices connected to the network.

[0009] US Patent Application Publication No. 2014 / 0019571 discloses a method for processing data packets from a receive queue for data packets in a device for memory access, which proposes utilizing a separate queue provided for buffering heuristically predicted data packets depending on the utilization of the receive queue during program access to the data packets. Summary of the Invention [Problem to be solved by the invention]

[0010] The object on which the present invention is based is to provide an improved information technology system that allows for accelerating the introduction of updates to computer systems. [Means for solving the problem]

[0011] According to the invention, this object is achieved by an information technology system with the features of claim 1. Advantageous configurations and developments, as well as a vehicle comprising part of the aforementioned information technology system, and a method for introducing updates into a target system, emerge from the claims dependent on claim 1.

[0012] Information technology systems as mentioned at the beginning include: a source system having a source information memory, a file reading module, and a system interface module; a target system having a target information memory, a system interface module, a payload buffer module, and a memory access module; The source system and the target system are communicatively connected to each other via a bidirectional data line; - the source system is configured to read the source information memory using a file reading module after receiving the response message from the target system, pack the information read from the source information memory into a data transfer block, and send the data transfer block to the target system via a data line; The source system requires a first waiting time to read and pack the source information memory into a data transfer block; - the target system is configured to receive the data transfer block, extract information contained in the data transfer block and write it to a payload buffer module, and then generate a response message and transmit the information from the payload buffer module to the target information memory using a memory access module; The target system requires a second waiting period to extract and write the information and generate a response message; The information technology system is further developed according to the present invention by: - the source system and / or the target system further include a data transfer acceleration module each, the data transfer acceleration module including a data transfer block buffer; the data transfer acceleration module in the source system is disposed between the data line and the system interface module, and is configured to receive a first data transfer block and transmit it via the data line; after receiving the data transfer block, output a response message to the system interface module itself to pack the data transfer block into at least one other data transfer block, temporarily store the other data transfer block in a data transfer block buffer; and, after receiving the response message from the target system, transmit the other data transfer block temporarily stored in the data transfer block buffer to the target system; The data transfer acceleration module in the target system is arranged between the data line and the system interface module, and is configured to receive and transfer a first data transfer block to the system interface module, output a response message itself after receiving the data transfer block, send the response message via the data line to cause at least one other data transfer block to be sent from the source system to the target system, temporarily store the at least one other data transfer block in a data transfer block buffer, and transfer the other data transfer block to the system interface module after receiving the response message from the system interface module, or send the negative response message via the data line after receiving a negative response message from the system interface module, and erase all other data transfer blocks from the data transfer buffer.

[0013] The information technology system according to the present invention can shorten the time required to transmit information from a source system to a target system. The background here is that while the target system is operating, i.e., during the second waiting time, the source system is in an inactive or idle state. However, the source system requires the first waiting time to read the source information memory using the file reading module and pack it into the corresponding data transfer block. Since the information technology system according to the present invention is configured so that the source system is also active while the target system is operating, i.e., during the second waiting time, the waiting time until receiving another corresponding data transfer block from the source system after sending a response message is shortened. The first waiting time may be on the order of 100 ms, and the second waiting time may be on the order of 600 ms. For each data transfer block to be transmitted, the corresponding waiting time can be shortened, for example, by 200 to 300 ms. This significantly shortens the time required to introduce the corresponding data or information into the target system when the total number of data transfer blocks to be transmitted from the source system to the target system is taken into account.

[0014] Depending on the configurations of the source system and the target system, the first latency period may be longer than the second latency period.

[0015] The data transfer acceleration module can be implemented only in the source system, only in the target system, or one in each of the two systems. Due to the arrangement between the data lines and the respective system interface modules, the data transfer acceleration module can be very easily introduced into each system. Since the data transfer acceleration module is arranged upstream of the source system or the target system in the corresponding data flow direction, there is no need to adapt the architecture of the source system or the target system.

[0016] An information technology system is generally a combination of multiple computer systems. Thus, the source system and the target system form a single computer system. Each computer system includes hardware and / or software components. Each of these may be any computing device, such as a desktop computer, a laptop, a tablet computer, a smartphone, an embedded system implemented as a system-on-a-chip (SoC), a server, an edge computing device, etc.

[0017] The information to be transferred from the source system to the target system can be any conceivable information, i.e., a file and a corresponding file format, it can be program code forming an executable program such as firmware or an application program, or it can be information to be processed by a corresponding executable program, such as parameters, constants, etc.

[0018] The source information memory and the target information memory are each computer-readable physical memory media, and any and all possible configurations are contemplated herein.

[0019] The file reading module, the respective system interface modules, the payload buffer module, and the memory access module are formed by hardware and / or software. Particularly preferably, they are pure software modules. The source system can use the file reading module to at least read-access the source information memory. The file reading module can also be called a file reader. The system interface module serves as a connection interface and can also be called a dialog sequencer on the source system side. In the target system, the system interface module can also be called a diagnostic module, especially when the target system is a vehicle diagnostic communication module. The payload buffer module is used to temporarily store information to be written to the target information memory. The target information memory can have a different clock than the rest of the target system. To achieve this, the memory access module can operate on the clock of the target information memory and thus can asynchronously read information from the payload buffer module. The memory access module can also be called a flash access.

[0020] The source and target systems may each include other hardware and / or software modules, which will not be described in detail here.

[0021] Each data transfer acceleration module may be formed solely by hardware, solely by software, or by a combination of hardware and software.

[0022] The bidirectional data line can be a wired or wireless data line. The wired data line can be formed, for example, by an Ethernet cable or a USB cable. Appropriate communication protocols are used. The data line can also be a direct access to a bus system, such as a CAN (Controller Area Network) bus. The wireless data line can be formed, for example, by an NFC connection, a Bluetooth connection, a Wi-Fi connection, etc. Likewise, a mobile radio connection can be used as a wireless data line.

[0023] The response message output from the target system is used to inform the source system that the target system is ready to receive another data transfer block.

[0024] A data transfer block can also be represented as a message. This message or data transfer block contains one or more header lines or headers that contain information on how the respective data transfer block is to be further processed in the target system. Furthermore, a so-called payload is a constituent part of the corresponding message, i.e., data transfer block. The payload is the actual information to be written to the target information memory. As the data transfer block passes through the individual modules in the target system, parts of the header are sequentially removed by each module until the payload finally reaches the payload buffer module and then the memory access module or the target information memory.

[0025] The size of the data transfer block buffer can be set arbitrarily. In this case, the size of the data transfer block buffer of the data transfer acceleration module in the source system and the size of the data transfer block buffer of the data transfer acceleration module in the target system may be the same or different. For example, the data transfer block buffer has a size that allows at least 10 data transfer blocks to be written.

[0026] The target system can generate and send a negative acknowledgement message to the source system, which notifies the source system that the target system can no longer receive another data transfer block. A data transfer acceleration module implemented in the source system can then process such a negative acknowledgement message. In this case, the data transfer acceleration module in the source system can also empty the data transfer block buffer. The file reading module and the system interface module in the source system are then instructed by the data transfer acceleration module not to generate any more data transfer blocks until a response message is received again from the target system.

[0027] In an advantageous development of the information technology system, the data transfer acceleration modules in the source system and / or the target system are further configured to output response messages until the respective data transfer block buffers are full, thereby further reducing the time required for transmitting information from the source system to the target system. In other words, the respective data transfer acceleration modules can operate continuously until the respective data transfer block buffers are full, regardless of the operating mode of the target system.

[0028] According to another advantageous configuration of the information technology system, the source system and the target system are configured to use Unified Diagnostic Services (UDS) as a communication protocol. This allows the information technology system to be used in an automotive environment. The target system can be, for example, a computer architecture in a vehicle, or part of the computer architecture forms the target system. The target system can be approached from the source system, colloquially speaking, by vehicle diagnostics. In this case, the source system is a corresponding developer computer or software running on such a developer computer. In this context, the source system is also referred to as a tester. The target system is also referred to as a target. For example, the source system is configured as a DTS9 development tester.

[0029] In another advantageous configuration of the information technology system according to the invention, the source information memory and / or the target information memory further comprise flash memory. Flash memory can respond very quickly and does not contain any moving parts that may make access difficult in the event of vibrations, for example, when the corresponding vehicle is traveling on a rough road. Flash memory is therefore highly suitable for forming the aforementioned source information memory and / or target information memory. The flash memory can be fixedly integrated into the source system and / or the target system, or it may be a removable memory module, such as an M.2 SSD, an SD card, etc.

[0030] According to another advantageous configuration of the information technology system, the target system is configured as an embedded system. Here, the target system may have one or more computing units. Such computing units are, for example, system-on-a-chips (also called SoCs). The target system may be integrated into a vehicle, for example. The target system or the computing units forming the target system may be formed by a control device of the vehicle.

[0031] Preferably, the source system is configured as a server or a server group (server cluster), and at least some of the data lines are via the Internet. The target system can be connected to the Internet, for example via mobile radio, so that the target system can receive information from the server or server group. The server can be operated or used by the vehicle manufacturer. Information can thus be distributed by the vehicle manufacturer to its vehicle fleet. The use of the Internet, and in particular the vehicle's mobile connection to the Internet, eliminates the need for the vehicle to visit a workshop to receive the information.

[0032] In the vehicle according to the invention, the aforementioned target system is implemented as part of the vehicle or in the aforementioned vehicle, i.e. the vehicle comprises at least one data transfer acceleration module. The vehicle may be any vehicle, such as a car, a truck, a transporter, a bus, etc. In addition to road vehicles, the vehicle may also be a rail vehicle, a watercraft, or an aircraft.

[0033] Furthermore, a method for introducing an update to a target system using the aforementioned information technology system is described, in which, according to the invention, parameter data sets, application programs and / or firmware are adapted in the target system or newly introduced into the target system by means of an update.

[0034] The method according to the invention can be used to reduce the time required to install the aforementioned updates in the target system, which is achieved by virtue of the functionality of a data transfer acceleration module included in the information technology system used.

[0035] Further advantageous configurations of the information technology system and the method for introducing updates into a target system according to the invention will become apparent from the exemplary embodiments which are described in more detail below with reference to the figures. [Brief explanation of the drawings]

[0036] [Figure 1] 1 shows a schematic diagram of an information technology system known from the prior art; [Figure 2] 1 shows a schematic diagram of an information technology system according to the invention with a data transfer acceleration module implemented in a source system; [Figure 3] 1 shows a schematic diagram of an information technology system according to the invention with a data transfer acceleration module implemented in a target system; [Figure 4] 1 shows a schematic diagram of an information technology system according to the present invention, in which a data transfer acceleration module is implemented in each of a source system and a target system; [Figure 5] 5 shows a schematic diagram of the information technology system shown in FIG. 4 with the data transfer block buffers of the two data transfer acceleration modules in a full state. DETAILED DESCRIPTION OF THE INVENTION

[0037] 1 shows an information technology system 1 known from the prior art. The information technology system 1 includes a source system 2, which establishes a bidirectional communication connection with a target system 5 via a data line 9. The source system 2 itself includes a file reading module 3 and a system interface module 4. The target system 5 itself similarly includes a system interface module 6, a payload buffer module 7, and a memory access module 8. Each module is formed by hardware and / or software. The source system 2 and the target system 5 can similarly be formed by hardware and / or software components. In the illustrated embodiment of the figures, the corresponding modules are formed as software modules 14. As illustrated for the target system 5, the source system 2 and the target system 5 can also have other software modules 14.

[0038] Each figure shows a part of the process of data transmission between the source system 2 and the target system 5. For example, information from a source information memory included in the source system 2 is transmitted to a target information memory of the target system 5 via a data line 9. Here, the file reading module 3 performs at least read access to each information memory, and the memory access module 8 performs at least write access to each information memory. Both the file reading module 3 and the memory access module 8 can perform read access and write access.

[0039] As soon as the target system 5 is ready to receive information, it sends a response message 10 to the system interface module 4 of the source system 2 via the system interface module 6. Because data transmission is not instantaneous but involves a certain latency, the corresponding arrow 101 symbolically representing the response message 10 in FIG. 1 points downward as well as leftward. The source system 2 requires a first latency t1 to process the corresponding query or request of the target system 5. That is, the system interface module 4 communicates with the file read module 3, which accesses the source information memory. The information read from the source information memory is then packed into a data transfer block. The respective processing times of the file read module 3 and the system interface module 4 are indicated by vertical lines. Because file transmission between the file read module 3 and the system interface module 4 also involves a certain latency, the arrow is also vertically slanted.

[0040] The source system 2 sends each data transfer block to the target system 5 using an information message 15 .

[0041] The target system 5 requires a second latency t2 to process the information message 15, i.e., to process the data transfer block. The second latency t2 is measured from the reception of the information message 15 by the system interface module 6 until the output of the response message 10 by the system interface module 6. The information message 15 includes a header and a payload. The header contains information describing how the information message 15 should be processed in the target system 5. The payload is information read from the aforementioned source information memory. The data transfer block or information message 15 passes sequentially through the individual software modules 14 of the target system 5, whereby each software module 14 processes or deletes part of the header. The remaining payload is written to the payload buffer module 7. If the write is successful, the target system 5 outputs the response message 10. The memory access module 8 asynchronously accesses the payload buffer module 7 to write the corresponding information to the target information memory. The above-described cycle then begins anew.

[0042] Furthermore, the target system 5 has a first time difference Δt between the output of the response message 10 and the reception of the next data transfer block using the information message 15 .

[0043] 2 shows an information technology system 1 according to the invention, in which a data transfer acceleration module 11 is integrated into a source system 2. Again, the system interface module 6 transmits a response message 10 to the source system 2, which is passed on from the data transfer acceleration module 11 to the system interface module 4.

[0044] Correspondingly, the source system 2 packs to form data transfer blocks and sends them to the data transfer acceleration module 11 as indicated by arrow 201 .

[0045] The data transfer acceleration module 11 sends the corresponding data transfer block to the system interface module 6 of the target system 5 in the form of an information message 15. However, by using the data transfer acceleration module 11, it is possible to prevent the source system 2 from being in an inactive state and waiting to receive the response message 10 from the target system 5 again. That is, the data transfer acceleration module 11 itself outputs a response message 12, after which the system interface module 4 and the file reading module 3 become active again and generate a new data transfer block. This other data transfer block is then written and temporarily stored in a data transfer block buffer included in the data transfer acceleration module 11. This process continues until the data transfer block buffer is full or until no more information needs to be read from the source information memory.

[0046] The process in the target system 5 is similar to the embodiment illustrated in Figure 1. However, the advantage of implementing a data transfer acceleration module 11 in the source system 2 becomes apparent as soon as the target system 5 transmits a new response message 10 to the source system 2 again. For example, after receiving the response message 10 from the source system 2, there is no need to wait the first waiting time t1 before the source system 2 sends an information message 15 back to the target system 5. That is, the data transfer acceleration module 11 reads another data transfer block from the data transfer block buffer and transfers this another data transfer block to the system interface module 6 of the target system 5 using an information message 15, as indicated by arrow 203, either immediately or after a relatively short time, as indicated by the relatively short vertical line 202 in Figure 2.

[0047] 1 and 2, it can be seen that the first time difference Δt is shorter in this case than in the information technology system 1 known from the prior art shown in Fig. 1. This time saving is summed up over all data transfer blocks to be exchanged between the source system 2 and the target system 5 via the data line 9, so that the period required for the transmission of information is significantly reduced. This means that, for example, parameter data sets, firmware or application programs can be updated or newly introduced in the target system 5 faster.

[0048] 3 shows another possible embodiment of an information technology system 1 according to the invention, where a data transfer acceleration module 11 is implemented in the target system 5. The system interface module 6 outputs the aforementioned response message 10, which the data transfer acceleration module 11 forwards to the source system 2. Here, a data transfer block is generated accordingly by the source system 2 and transmitted to the target system 5 in an information message 15 (see arrow 301).

[0049] The data transfer acceleration module 11 transfers the data transfer block contained in the information message 15 to the system interface module 6. The subsequent process in the target system 5 is similar to the embodiment in FIGS.

[0050] However, to accelerate the data transfer, the data transfer acceleration module 11 sends a unique response message 13 to the source system 2 (see arrow 302). The source system 2 then generates another data transfer block and sends it back to the data transfer acceleration module 11 of the target system 5 via the data line 9. Again, the data transfer acceleration module 11 includes a data transfer block buffer in which the received data transfer block is temporarily stored. This process can be performed multiple times in succession until the data transfer block buffer is completely filled or no more information needs to be transmitted between the source system 2 and the target system 5.

[0051] After the payload has been written to the payload buffer module 7, the system interface module 6 transfers the response message 10 to the data transfer acceleration module 11, as indicated by arrow 303. The data transfer acceleration module 11 can then access the data transfer block buffer and immediately transmit another data transfer block, which has been temporarily stored in the data transfer block buffer, to the system interface module 6, as indicated by arrow 304. Thus, not only the waiting period associated with the first latency t1 but also the waiting period associated with the data transmission over the data line 9 is eliminated. Correspondingly, the first time difference Δt is also reduced here.

[0052] If the corresponding data transmission method continues, the data transfer acceleration module 11 sends the response message 10 to the system interface module 4 of the source system 2, as indicated by the arrow 305, where a further data transfer block is generated. If the transmission of the response message 10 and the transmission of the response message 13 overlap in time (intersect, cross), the data transfer acceleration module 11 can also wait here, so that in this case the response message 10 is transmitted instead of the response message 13 (not shown).

[0053] On the other hand, if the data transfer acceleration module 11 receives a negative acknowledgement message (not shown) from the system interface module 6, which means that the target system 5 no longer receives any other information, the data transfer acceleration module 11 can forward the negative acknowledgement message to the system interface module 4 of the source system 2. This causes the source system 2 to finish generating data transfer blocks or temporarily stop generating data transfer blocks at least until it receives another acknowledgement message 10 from the target system 5. At the same time, the data transfer acceleration module 11 clears the data transfer block buffer.

[0054] Figure 4 shows another configuration of an information technology system 1 according to the invention, in which both the source system 2 and the target system 5 each have one data transfer acceleration module 11. Thus, the advantages described in figures 2 and 3 in terms of the time required for the transmission of information from the source system 2 to the target system 5 are combined.

[0055] In other words, in general, by combining one data transfer acceleration module 11 each in the source system 2 and the target system 5, the data transfer block buffer of the data transfer acceleration module 11 in the target system 5 can be filled more quickly. However, this depends on whether the data transfer block buffer of the data transfer acceleration module 11 in the source system 2 already contains a data transfer block, as well as the first latency t1 and the latency of data transmission over the data line 9. In the embodiment shown in FIG. 4, the data transfer block buffer of the data transfer acceleration module 11 in the source system 2 is initially empty. Furthermore, the first latency t1 is longer than the latency of data transmission over the data line 9. Therefore, the data transfer acceleration module 11 in the source system 2 can transmit another data transfer block to the data transfer acceleration module 11 in the target system 5 only immediately after another data transfer block has been sent from the system interface module 4. On the other hand, if the first latency t1 is shorter than the latency of data transmission via the data line 9, the data transfer block will already be present in the data transfer block buffer when the data transfer acceleration module 11 of the source system 2 receives the response message 13, and in this case the data transfer block may be transmitted directly to the target system 5 via the data line 9.

[0056] 5 shows an example in which both data transfer block buffers are already partially filled and will be fully filled in the future. As indicated by arrow 501, another data transfer block is written to the data transfer block buffer of the data transfer acceleration module 11 in the source system 2.

[0057] The target system 5 notifies the source system 2 that it is ready to receive information by sending a response message 10. Since the corresponding data transfer block is already contained in the data transfer block buffer of the data transfer acceleration module 11 of the source system 2, such data transfer block can be transmitted directly to the target system 5, as indicated by arrow 502.

[0058] As indicated by arrow 503, this data transfer block is transmitted from the data transfer acceleration module 11 in the target system 5 to the system interface module 6. In response, the data transfer acceleration module 11 in the target system 5 sends a response message 13 to the source system 2, as indicated by arrow 504.

[0059] Since the data transfer block is contained in the data transfer block buffer in the source system 2 as already mentioned, the data transfer acceleration module 11 of the source system 2 can transmit another data transfer block directly to the target system 5, as indicated by arrow 505. In the illustrated embodiment, since the data transfer block buffer of the data transfer acceleration module 11 in the target system 5 is full, another response message 13 is no longer transmitted to the source system 2. However, since the data transfer block buffer in the source system 2 is not yet full, this data transfer block buffer in the source system 2 continues to fill.

[0060] As indicated by arrow 506, the system interface module 6 outputs a response message 10 that is received by the data transfer acceleration module 11 of the target system 5. The data transfer acceleration module 11 of the target system 5 can then immediately read another data transfer block from the data transfer block buffer and transmit the other data transfer block to the system interface module 6, as indicated by arrow 507. This frees up space in the data transfer block buffer of the data transfer acceleration module 11 of the target system 5. The data transfer acceleration module 11 of the target system 5 is therefore again able to receive data transfer blocks and sends a response message 10 to the source system 2 to have another data transfer block sent. This other data transfer block is sent in a corresponding information message 15, as indicated by arrow 508. After that, the data transfer block buffer in the target system 5 is full again, so no further response messages 13 are sent.

[0061] The data transfer block buffer of the data transfer acceleration module 11 of the source system 2 also becomes full, as indicated by arrow 509. Only when the data transfer acceleration module 11 of the source system 2 receives the response message 10 again, as indicated by arrow 510, can another data transfer block be transmitted to the target system 5, as indicated by arrow 511, and corresponding space can be created in the data transfer block buffer in the source system 2.

[0062] On the one hand, Fig. 5 illustrates by arrows 501 to 505 how providing one data transfer acceleration module 11 each in the source system 2 and the target system 5 can accelerate the data transfer block buffer of the data transfer acceleration module 11 in the target system 5. On the other hand, Fig. 5 illustrates that, as indicated by arrow 511, data transfer blocks can be transmitted to the target system 5 at a faster rate, thereby realizing time savings during data transmission despite the data transfer block buffers of the two data transfer acceleration modules 11 being full. [Prior art documents] [Patent documents]

[0063] [Patent Document 1] German Patent Application Publication No. 102019216841 [Patent Document 2] U.S. Patent No. 7,787,481 [Patent Document 3] US Patent Application Publication No. 2014 / 0019571

Claims

1. An information technology system (1), comprising: a source system (2) comprising a source information memory, a file reading module (3) and a system interface module (4); a target system (5) having a target information memory, a system interface module (6), a payload buffer module (7) and a memory access module (8), - the source system (2) and the target system (5) are communicatively connected to each other via a bidirectional data line (9); the source system (2) is configured to read the source information memory using the file reading module (3) after receiving a response message (10) from the target system (5), pack the information read from the source information memory into a data transfer block, and send the data transfer block to the target system (5) via the data line (9); - the source system (2) requires a first latency (t1) to read and pack the source information memory into the data transfer block; the target system (5) is configured to receive the data transfer block, extract the information contained in the data transfer block and write it into the payload buffer module (7), and subsequently generate a response message (10) and transmit the information from the payload buffer module (7) to the target information memory using the memory access module (8); in said information technology system (1), wherein said target system (5) requires a second waiting time (t2) to extract and write said information and to generate said response message (10); The source system (2) and / or the target system (5) further include a data transfer acceleration module (11), respectively, the data transfer acceleration module (11) including a data transfer block buffer; the data transfer acceleration module (11) in the source system (2) is arranged between a data line (9) and a system interface module (4), and is configured to receive a first data transfer block and transmit it via the data line (9); after receiving the data transfer block, output a response message (12) to the system interface module (4) itself to pack the data transfer block into at least one other data transfer block; temporarily store the other data transfer block in the data transfer block buffer; and, after receiving a response message (10) from the target system (5), transmit the other data transfer block temporarily stored in the data transfer block buffer to the target system (5); the data transfer acceleration module (11) in the target system (5) is arranged between a data line (9) and a system interface module (6), and is configured to receive and transfer a first data transfer block to the system interface module (6), output a response message (13) itself after receiving the data transfer block, transmit the response message (13) via the data line (9) to cause at least one other data transfer block to be transmitted from the source system (2) to the target system (5), temporarily store the at least one other data transfer block in the data transfer block buffer, and transfer the other data transfer block to the system interface module (6) after receiving a response message (10) from the system interface module (6), or transmit the negative response message via the data line (9) after receiving a negative response message from the system interface module (6), and erase all the other data transfer blocks from the data transfer buffer; An information technology system (1).

2. The data transfer acceleration module (11) in the source system (2) and / or the target system (5) is further configured to output response messages (12, 13) until the respective data transfer block buffers are filled. An information technology system (1) according to claim 1, characterized in that

3. The source system (2) and the target system (5) are configured to use Unified Diagnostic Services (UDS) as a communication protocol. An information technology system (1) according to claim 1 or 2, characterized in that

4. The source information memory and / or the target information memory include flash memory. An information technology system (1) according to any one of claims 1 to 3, characterized in that it

5. The target system (5) is configured as an embedded system. An information technology system (1) according to any one of claims 1 to 4, characterized in that

6. The source system (2) is configured as a server or a group of servers, and at least a part of the data line (9) is via the Internet. An information technology system (1) according to any one of claims 1 to 5, characterized in that

7. In the vehicle, The information technology system (1) is provided with a target system (5) according to any one of claims 1 to 6. A vehicle characterized by:

8. A method for introducing updates to a target system (5) using an information technology system (1) according to any one of claims 1 to 6, comprising: The update adapts parameter data sets, application programs and / or firmware in the target system (5) or introduces new ones into the target system (5). A method characterized by:

Citation Information

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