Pulse width modulation electrode control and corresponding method

Abstract

Embodiments of this disclosure provide a method for generating a signal applied to the electrodes of an ion trap and for using pulse-width modulation (PWM) to reduce noise. In some embodiments, a PWM signal generator is configured to generate at least one signal, a filter network is configured to filter at least one signal, and a controller is configured to control the operation of the PWM signal generator and the filter network. The controller may cause the PWM signal generator to generate at least one signal. At least one signal may be provided to the filter network. The controller may cause the filter network to filter at least one signal according to noise requirements, and the filtered at least one signal may be provided to the electrical components of the system.

Claims

1. A system for providing signals to electrical components, wherein the system A PWM signal generator configured to produce at least one signal, A filter network configured to filter at least one of the aforementioned signals, A controller configured to control the operation of the PWM signal generator and the filter network. Equipped with, The controller causes the PWM signal generator to generate the at least one signal, the at least one signal is provided to the filter network, the controller causes the filter network to filter the at least one signal according to noise requirements, and the filtered at least one signal is provided to the electrical components of the system. system.

2. The system according to claim 1, wherein the PWM signal generator is an FPGA-based PWM signal generator.

3. The system according to claim 1, wherein the at least one signal is a high-frequency PWM signal.

4. The system according to claim 3, wherein the PWM signal generator comprises a first clock, a second clock, and an XOR gate, and the first clock is associated with a delay relative to the second clock.

5. The system according to claim 4, wherein the high-frequency PWM signal is generated at least in part on a switching frequency generated using the XOR gate, and the XOR gate is configured to perform an XOR operation on a first clock signal generated by the first clock and a second clock signal generated by the second clock.

6. The system according to claim 1, wherein a first signal generated by the PWM signal generator and a second signal generated by the PWM signal generator are combined to generate a PWM signal having suppressed harmonic components.

7. The system according to claim 1, wherein the low harmonic frequencies in the at least one signal are suppressed at least partially based on the switching frequency of the at least one signal.

8. The system according to claim 1, wherein the filter network comprises a passive filter.

9. The system according to claim 1, wherein the system is a quantum computer.

10. The system according to claim 9, wherein the electrical component is an electrode of an ion trap having a plurality of ions trapped inside, and at least a portion of the plurality of ions is used as qubits of the quantum computer.

11. A method for providing signals to electrical components of a system, wherein the method is The controller of the aforementioned system causes the PWM signal generator to generate at least one signal, The controller of the system causes the filter network to filter the at least one signal, Includes, The at least one signal generated by the PWM signal generator is provided to the filter network, which filters the at least one signal according to noise requirements, and the filtered at least one signal is provided to the electrical components of the system. method.

12. The method according to claim 11, wherein the PWM signal generator is an FPGA-based PWM signal generator.

13. The method according to claim 11, wherein the at least one signal is a high-frequency PWM signal.

14. The method according to claim 13, wherein the PWM signal generator comprises a first clock, a second clock, and an XOR gate, and the first clock is associated with a delay relative to the second clock.

15. The method according to claim 14, wherein the high-frequency PWM signal is generated at least in part on a switching frequency generated using the XOR gate, and the XOR gate is configured to perform an XOR operation on a first clock signal generated by the first clock and a second clock signal generated by the second clock.

16. The method according to claim 11, wherein a first signal generated by the PWM signal generator and a second signal generated by the PWM signal generator are combined to generate a PWM signal having suppressed harmonic components.

17. The method according to claim 11, wherein the low-frequency harmonic components of the at least one signal are suppressed at least partially based on a selected switching frequency of the at least one signal.

18. The method according to claim 11, wherein the filter network comprises a passive filter.

19. The method according to claim 11, wherein the system is a quantum computer.

20. A computer program product, wherein when the computer program product is executed by the controller's processor, the controller, The PWM signal generator is made to generate at least one signal, The filter network is used to filter at least one of the aforementioned signals. It comprises a non-temporary machine-readable storage medium for storing executable instructions, The at least one signal generated by the PWM signal generator is provided to the filter network, which filters the at least one signal according to noise requirements, and the filtered at least one signal is provided to the electrical components of the system. Computer program products.

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