Methods and apparatus used in nodes for wireless communication

By defining a method to multiplex UCI with multiple PUSCHs based on coresetPoolIndex values, the method enhances UCI transmission performance and reduces complexity in wireless communication systems, addressing unclear multiplexing relationships and performance degradation.

JP2026519428APending Publication Date: 2026-06-16SHANGHAI LANGBO COMM TECH CO LTD

Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
SHANGHAI LANGBO COMM TECH CO LTD
Filing Date
2024-03-06
Publication Date
2026-06-16

AI Technical Summary

Technical Problem

The multiplexing relationship between Uplink Control Information (UCI) and multiple Physical Uplink Shared Channels (PUSCHs) associated with different coresetPoolIndex values is not clearly defined when they overlap, leading to potential communication performance degradation and complexity in wireless communication systems.

Method used

A method for determining the multiplexing relationship between UCI and multiple PUSCHs by considering the distribution of PUSCHs, including rules for multiplexing UCI on the earliest or configured PUSCH based on coresetPoolIndex values, which simplifies the process and reduces hardware complexity.

Benefits of technology

This approach improves UCI transmission performance, reduces transmission delay, and minimizes standardization efforts while maintaining flexibility across various wireless communication scenarios.

✦ Generated by Eureka AI based on patent content.

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Abstract

Disclosed in this application are a method and apparatus used for a node for wireless communication. A first receiver receives multiple signalings, a first transmitter transmits multiple PUSCHs, the multiple PUSCHs are on the same serving cell, each of the multiple PUSCHs depends on multiple signalings, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values. A first PUSCH overlaps with all of the multiple PUSCHs, and a first UCI is associated with a first PUSCH. The multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.
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Description

Technical Field

[0001] This application relates to a transmission method and apparatus in a wireless communication system, and particularly to a method and apparatus for transmitting a wireless signal in a wireless communication system supporting a cellular network.

Background Art

[0002] UCI multiplexing is an important aspect of uplink transmission.

Summary of the Invention

[0003] When the PUCCH overlaps with multiple PUSCHs and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values, the multiplexing relationship between the UCI and the multiple PUSCHs is an important issue to be considered. This application discloses a solution to the above problem. This application can be applied to various wireless communication scenarios such as single transmit / receive point (TRP) transmission, multi-TRP transmission, single panel transmission, and multi-panel transmission, and can achieve similar technical effects. In addition, adopting a unified solution for different scenarios (including but not limited to single TRP transmission, multi-TRP transmission, single panel transmission, and multi-panel transmission) can also help reduce the hardware complexity and cost or improve the performance. If there is no conflict, the embodiments and features in any node in this application can be applied to any other node. If there is no conflict, the embodiments and features of this application can be arbitrarily combined with each other.

[0004] As an embodiment, the interpretation of the terms in this application is carried out by referring to the definitions of the 3GPP specification protocol TS36 series.

[0005] As an embodiment, the interpretation of the terms in this application is carried out by referring to the definitions of the 3GPP specification protocol TS38 series.

[0006] In one embodiment, the interpretation of terms in this application is made with reference to the definitions in the 3GPP specification protocol TS37 series.

[0007] In one embodiment, the interpretation of terms in this application is made with reference to the definitions of specifications and protocols of the Institute of Electrical and Electronics Engineers (IEEE).

[0008] This application discloses a method used for a first node for wireless communication, the method being Receiving multiple signaling signals, Sending multiple PUSCHs, including multiple PUSCHs on the same serving cell, multiple PUSCHs each depending on multiple signalings, and multiple PUSCHs associated with different coresetPoolIndex values, The first PUCCH overlaps with all of the multiple PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.

[0009] In one embodiment, the advantages of the above method include good flexibility.

[0010] As one embodiment, the advantage of the above method is that it facilitates the improvement of uplink transmission performance. This includes.

[0011] In one embodiment, the advantages of the above method include facilitating the simultaneous transmission of multiple panels.

[0012] As one embodiment, the advantages of the above method include providing a simple and effective solution for the challenges associated with UCI multiplexing when a PUCCH overlaps with multiple PUSCHs, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values.

[0013] In one embodiment, the advantages of the above method include avoiding the degradation of communication performance caused by an unclear definition of the transmission operation.

[0014] As one embodiment, the advantages of the above method include minor modifications to existing 3GPP specifications and less work required for standardization.

[0015] According to one aspect of this application, the above method is The multiplexing relationship between the first UCI and the multiple PUSCHs is related to whether the earliest PUSCH is among the multiple PUSCHs, and if the earliest PUSCH is among the multiple PUSCHs, the first UCI is multiplexed on the earliest PUSCH among the multiple PUSCHs.

[0016] In one embodiment, the advantages of the above method include facilitating the improvement of UCI transmission performance.

[0017] In one embodiment, the advantages of the above method include facilitating the reduction of UCI transmission delay.

[0018] According to one aspect of this application, the above method is If the earliest PUSCH does not exist among the multiple PUSCHs, the first UCI is not multiplexed on any of the multiple PUSCHs.

[0019] As one embodiment, the advantage of the above method is to provide a simple and effective solution when a PUCCH overlaps with multiple PUSCHs, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values.

[0020] In one embodiment, the advantage of the above method is that it involves less work for standardization.

[0021] According to one aspect of this application, the above method is When the earliest PUSCH does not exist among a plurality of PUSCHs, the first UCI is multiplexed on each PUSCH among the plurality of PUSCHs, which is characterized in that.

[0022] As one embodiment, the advantages of the above method include facilitating the improvement of the UCI transmission performance.

[0023] According to one aspect of the present application, the above method is When the earliest PUSCH does not exist among a plurality of PUSCHs, the first UCI is multiplexed on one PUSCH among the plurality of PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default, which is characterized in that.

[0024] As one embodiment, the advantages of the above method include providing a simple and effective UCI multiplexing solution.

[0025] As one embodiment, the advantages of the above method include involving less work for standardization.

[0026] According to one aspect of the present application, the above method is When the earliest PUSCH does not exist among a plurality of PUSCHs, the first UCI is multiplexed on one PUSCH among the plurality of PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable, which is characterized in that.

[0027] As one embodiment, the advantages of the above method include being simple and effective, having good flexibility, and facilitating the optimization of the transmission performance.

[0028] According to one aspect of the present application, the above method is If the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0029] In one embodiment, the advantages of the above method include having good flexibility and facilitating the optimization of transmission performance.

[0030] According to one aspect of this application, the above method is The first UCI is characterized by being multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default value.

[0031] In one embodiment, the advantages of the above method include providing a simple and effective UCI multiplexing solution.

[0032] In one embodiment, the advantage of the above method is that it involves less work for standardization.

[0033] According to one aspect of this application, the above method is The first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0034] In one embodiment, the advantages of the above method include being simple and effective, having good flexibility, and facilitating the optimization of transmission performance.

[0035] According to one aspect of this application, the above method is The first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the first PUCCH is associated with the target coresetPoolIndex value.

[0036] In one embodiment, the advantages of the above method include having good flexibility and facilitating the optimization of transmission performance.

[0037] This application discloses a method used for a second node for wireless communication, the method being Sending multiple signaling signals, This includes receiving multiple PUSCHs, where multiple PUSCHs reside on the same serving cell, each PUSCH depends on multiple signalings, and each PUSCH is associated with a different coresetPoolIndex value. The first PUCCH overlaps with all of the multiple PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.

[0038] According to one aspect of this application, the above method is The multiplexing relationship between the first UCI and the multiple PUSCHs is related to whether the earliest PUSCH is among the multiple PUSCHs, and if the earliest PUSCH is among the multiple PUSCHs, the first UCI is multiplexed on the earliest PUSCH among the multiple PUSCHs.

[0039] According to one aspect of this application, the above method is If the earliest PUSCH does not exist among the multiple PUSCHs, the first UCI is not multiplexed on any of the multiple PUSCHs.

[0040] According to one aspect of this application, the above method is If the earliest PUSCH does not exist among the multiple PUSCHs, the first UCI is multiplexed on each of the multiple PUSCHs.

[0041] According to one aspect of this application, the above method is If the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default.

[0042] According to one aspect of this application, the above method is If the earliest PUSCH does not exist among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0043] According to one aspect of this application, the above method is If the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0044] According to one aspect of this application, the above method is The first UCI is characterized by being multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default value.

[0045] According to one aspect of this application, the above method is The first UCI is associated with the target coresetPoolIndex value. It is characterized by being multiplexed on the earliest PUSCH among multiple PUSCHs, and the target coresetPoolIndex value is configurable.

[0046] According to one aspect of this application, the above method is The first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the first PUCCH is associated with the target coresetPoolIndex value.

[0047] This application discloses a first node for wireless communication, the first node being, A first receiver configured to receive multiple signaling signals, A first transmitter configured to transmit multiple PUSCHs, wherein the multiple PUSCHs are on the same serving cell, each of the multiple PUSCHs depends on multiple signalings, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values. The first PUCCH overlaps with all of the multiple PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.

[0048] This application discloses a second node for wireless communication, the second node being, A second transmitter configured to transmit multiple signaling signals, A second receiver configured to receive multiple PUSCHs, wherein the multiple PUSCHs are on the same serving cell, each of the multiple PUSCHs depends on multiple signalings, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values. The first PUCCH overlaps with all of the multiple PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.

[0049] Other features, purposes, and advantages of this application will become clearer by reading the detailed description of non-limiting embodiments in the following drawings. [Brief explanation of the drawing]

[0050] [Figure 1] A processing flowchart for the first node according to one embodiment of this application is shown. [Figure 2] A schematic diagram of a network architecture according to one embodiment of this application is shown. [Figure 3] A schematic diagram of a wireless protocol architecture for the user plane and control plane according to one embodiment of this application is shown. [Figure 4] A schematic diagram of a first communication device and a second communication device according to one embodiment of this application is shown. [Figure 5] A signal transmission flowchart according to one embodiment of this application is shown. [Figure 6] This diagram provides an explanatory schematic representation of the multiplexing relationship between a first UCI and multiple PUSCHs according to one embodiment of this application. [Figure 7] This diagram provides an explanatory schematic representation of the multiplexing relationship between a first UCI and multiple PUSCHs according to one embodiment of this application. [Figure 8] This diagram provides an explanatory schematic representation of the multiplexing relationship between a first UCI and multiple PUSCHs according to one embodiment of this application. [Figure 9] A schematic diagram of the relationship between the first PUCCH and the target coresetPoolIndex value according to one embodiment of this application is shown. [Figure 10] This document shows a structural block diagram of a processing unit in a first node device according to one embodiment of this application. [Figure 11]This document shows a structural block diagram of a processing unit in a second node device according to one embodiment of this application. [Modes for carrying out the invention]

[0051] The technical solution of this application will be described in more detail below, in conjunction with the drawings. Note that, where there is no contradiction, the embodiments and features of this application can be arbitrarily combined with each other.

[0052] Embodiment 1 Embodiment 1 illustrates a processing flowchart of the first node according to one embodiment of the present application, as shown in Figure 1.

[0053] In Embodiment 1, the first node in this application receives a plurality of signalings in step 101, and transmits a plurality of PUSCHs in step 102.

[0054] In Embodiment 1, multiple PUSCHs are located on the same serving cell, each PUSCH depends on multiple signalings, each PUSCH includes PUSCHs associated with different coresetPoolIndex values, the first PUSCH overlaps with all of the multiple PUSCHs, the first UCI is associated with the first PUSCH, and the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.

[0055] In one embodiment, the multiple signalings are multiple DCI (Downlink Control Information) signals.

[0056] In one embodiment, the multiple signalings are multiple DCI formats.

[0057] In one embodiment, each signaling in a plurality of signalings is a single DCI.

[0058] In one embodiment, each signaling in a group of signalings is in a single DCI format.

[0059] In one embodiment, one of the multiple signalings is an RRC signaling.

[0060] In one embodiment, one of the multiple signalings is a physical layer signaling.

[0061] In one embodiment, one signaling among multiple signalings is one DCI.

[0062] In one embodiment, one of several signalings is in DCI format.

[0063] In one embodiment, one of the multiple signalings is an L1 signaling.

[0064] In one embodiment, one signaling among multiple signalings includes at least one domain within one information element (IE).

[0065] In one embodiment, transmitting multiple physical uplink shared channels (PUSCHs) means transmitting at least one of either a transport block (TB) or a CSI (Channel Status Information) report on each of the multiple PUSCHs.

[0066] In one embodiment, transmitting multiple PUSCHs means transmitting a signal on each of the multiple PUSCHs.

[0067] In one embodiment, transmitting multiple PUSCH means transmitting a transport block on each of the multiple PUSCHs.

[0068] In one embodiment, the meaning of transmitting multiple PUSCHs includes transmitting at least one of either a transport block or a CSI report on each of the multiple PUSCHs.

[0069] In one embodiment, transmitting multiple PUSCHs means transmitting a signal on each of the multiple PUSCHs that includes at least channel coding, scrambling, modulation, layer mapping, precoding, mapping to virtual resource blocks, and mapping from virtual resource blocks to physical resource blocks, with the output of one bit block.

[0070] In one embodiment, transmitting multiple PUSCHs means using each of the multiple PUSCHs to carry the uplink information to be transmitted.

[0071] In one embodiment, one of several signalings is used to set one of several PUSCHs.

[0072] In one embodiment, multiple PUSCHs are two or more PUSCHs.

[0073] In one embodiment, the multiple PUSCHs include only two PUSCHs.

[0074] In one embodiment, the plurality of PUSCHs includes three or more PUSCHs.

[0075] In one embodiment, the multiple PUSCHs include only three PUSCHs.

[0076] In one embodiment, the plurality of PUSCHs includes four or more PUSCHs.

[0077] In one embodiment, the expression "multiple PUSCHs each depend on multiple signalings" means that each of the multiple signalings is used to schedule multiple PUSCHs.

[0078] In one embodiment, the expression "multiple PUSCHs each depend on multiple signalings" means that any PUSCH among the multiple PUSCHs is scheduled by one of the signalings among the multiple signalings.

[0079] In one embodiment, the expression "multiple PUSCHs each depend on multiple signalings" means that any PUSCH among the multiple PUSCHs is scheduled or activated by one of the signalings among the multiple signalings.

[0080] In one embodiment, when scheduling one PUSCH using one signaling, the PUSCH depends on the signaling.

[0081] In one embodiment, when one signaling is used to activate one PUSCH, the PUSCH depends on the signaling.

[0082] In one embodiment, if a single signaling is used to configure resources to be occupied by a single PUSCH, the PUSCH depends on the signaling.

[0083] In one embodiment, the expression "a plurality of PUSCHs include PUSCHs associated with different coresetPoolIndex values" means that at least one PUSCH among the plurality of PUSCHs is associated with one coresetPoolIndex value, at least one PUSCH among the plurality of PUSCHs is associated with another coresetPoolIndex value, and one coresetPoolIndex value is different from another value.

[0084] In one embodiment, the coresetPoolIndex value associated with one of several PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the resources occupied by the physical downlink control channel (PDCCH) used to schedule one of the several PUSCHs.

[0085] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the control resource set (CORESET) to which the resources occupied by the PDCCH used to schedule one of the multiple PUSCHs belong.

[0086] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the control resource set used to receive the DCI used to schedule one of the multiple PUSCHs.

[0087] In one embodiment, the coresetPoolIndex value associated with one of a plurality of PUSCHs is the coresetPoolIndex value of the control resource set used to receive the DCI format used to schedule one of the plurality of PUSCHs.

[0088] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the DCI search used to schedule one of the multiple PUSCHs.

[0089] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value associated with the DCI used to schedule one of the multiple PUSCHs.

[0090] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the core of the control resource set associated with the DCI used to schedule one of the multiple PUSCHs. This is the setPoolIndex value.

[0091] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the resources occupied by the PDCCH used to activate one of the multiple PUSCHs.

[0092] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the control resource set (CORESET) to which the resources occupied by the PDCCH used to activate one of the multiple PUSCHs belong.

[0093] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the DCI search used to activate one of the multiple PUSCHs.

[0094] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value associated with the DCI used to activate one of the multiple PUSCHs.

[0095] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the control resource set associated with the DCI used to activate one of the multiple PUSCHs.

[0096] In one embodiment, the coresetPoolIndex value associated with one of several PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to set up the DCI format search used to schedule one of the several PUSCHs.

[0097] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value associated with the DCI format used to schedule one of the multiple PUSCHs.

[0098] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the control resource set associated with the DCI format used to schedule one of the multiple PUSCHs.

[0099] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the search for the DCI format used to activate one of the multiple PUSCHs.

[0100] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is used to activate one of the multiple PUSCHs. This is the coresetPoolIndex value associated with the DCI format used for conversion.

[0101] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is the coresetPoolIndex value of the control resource set associated with the DCI format used to activate one of the multiple PUSCHs.

[0102] In one embodiment, the coresetPoolIndex value associated with one of a group of PUSCHs is the coresetPoolIndex value associated with the sounding reference signal (SRS) resource set used to transmit one of the group of PUSCHs.

[0103] In one embodiment, the coresetPoolIndex value associated with one PUSCH among multiple PUSCHs is the coresetPoolIndex value associated with the SRS resource set used to send one PUSCH among multiple PUSCHs according to a configured or predefined association rule.

[0104] In one embodiment, the coresetPoolIndex value associated with one of the multiple PUSCHs is configurable.

[0105] In one embodiment, the coresetPoolIndex value associated with one of several PUSCHs is indicated by RRC signaling.

[0106] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the resources occupied by the PDCCH used to schedule any PUSCH among multiple PUSCHs.

[0107] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the control resource set (CORESET) to which the resources occupied by the PDCCH used to schedule any PUSCH among multiple PUSCHs belong.

[0108] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the control resource set used to receive the DCI used to schedule any PUSCH among multiple PUSCHs.

[0109] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value held by the control resource set used to receive the DCI format used to schedule any PUSCH among multiple PUSCHs.

[0110] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the DCI search used to schedule any PUSCH among multiple PUSCHs.

[0111] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value associated with the DCI used to schedule any PUSCH among multiple PUSCHs.

[0112] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the control resource set associated with the DCI used to schedule any PUSCH among multiple PUSCHs.

[0113] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the resources occupied by the PDCCH used to schedule any PUSCH among multiple PUSCHs.

[0114] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the control resource set (CORESET) to which the resources occupied by the PDCCH used to activate any PUSCH among multiple PUSCHs belong.

[0115] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the DCI search used to activate any PUSCH among multiple PUSCHs.

[0116] In one embodiment, the coresetPoolIndex value associated with any PUSCH among the multiple PUSCHs is the coresetPoolIndex value associated with the DCI used to activate any PUSCH among the multiple PUSCHs.

[0117] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the control resource set associated with the DCI used to activate any PUSCH among multiple PUSCHs.

[0118] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to set up the DCI format search used to schedule any PUSCH among multiple PUSCHs.

[0119] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value associated with the DCI format used to schedule any PUSCH among multiple PUSCHs.

[0120] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the control resource set associated with the DCI used to schedule any PUSCH among multiple PUSCHs.

[0121] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the ControlResourceSet used to configure the search for the DCI format used to activate any PUSCH among multiple PUSCHs.

[0122] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value associated with the DCI format used to activate any PUSCH among multiple PUSCHs.

[0123] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value of the control resource set associated with the DCI format used to activate any PUSCH among multiple PUSCHs.

[0124] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value associated with the SRS resource set used to transmit any PUSCH among multiple PUSCHs.

[0125] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs is the coresetPoolIndex value associated with the SRS resource set used to transmit any PUSCH among multiple PUSCHs according to the configured or predefined associated rules.

[0126] In one embodiment, the coresetPoolIndex value associated with any PUSCH among multiple PUSCHs can be set.

[0127] In one embodiment, the coresetPoolIndex value associated with any PUSCH among a plurality of PUSCHs is indicated by RRC signaling.

[0128] In one embodiment, one coresetPoolIndex value is the value of coresetPoolIndex.

[0129] In one embodiment, coresetPoolIndex is a parameter that indicates the index of the control resource set (CORESET) pool.

[0130] In one embodiment, coresetPoolIndex is an RRC layer parameter.

[0131] In one embodiment, one coresetPoolIndex value is an index of the CORESET pool.

[0132] In one embodiment, a coresetPoolIndex value is either 0 or 1.

[0133] In one embodiment, the expression "the first PUCCH overlaps with all of the multiple PUSCHs" means that the first PUCCH overlaps with each of the multiple PUSCHs in the time domain.

[0134] In one embodiment, multiple pushers are located in the same slot.

[0135] In one embodiment, multiple pushers occupy two or more slots.

[0136] In one embodiment, all of the PUSCHs are located on the serving cell having the smallest ServCellIndex.

[0137] In one embodiment, all multiple PUSCHs are located on the primary cell.

[0138] In one embodiment, the timeline conditions for UCI multiplexing are met.

[0139] In one embodiment, the non-periodic CSI is not multiplexed within any of the multiple PUSCHs.

[0140] In one embodiment, intermittent or semi-permanent CSI reports are not multiplexed within any of the multiple PUSCHs.

[0141] In one embodiment, the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH transports the first UCI.

[0142] In one embodiment, the expression "the first UCI is associated with the first PUCCH" means that the first UCI is multiplexed within the first PUCCH.

[0143] In one embodiment, the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH is the PUCCH that was determined to be used to transport the first UCI before resolving the overlap between the PUCCH and the PUSCH.

[0144] In one embodiment, the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH is reserved for the transmission of the first UCI.

[0145] In one embodiment, the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH is commanded for the transmission of the first UCI.

[0146] In one embodiment, the expression "the first UCI is associated with the first PUCCH" means that the PUCCH resources occupied by the first PUCCH are determined for the transmission of the first UCI.

[0147] In one embodiment, the expression "the first UCI is associated with the first PUCCH" means that the PUCCH resources occupied by the first PUCCH are set up for the transmission of the first UCI.

[0148] In one embodiment, the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH is set up for reporting of the first UCI.

[0149] As one embodiment, the first PUCCH is a PUCCH for the first UCI.

[0150] In one embodiment, the first UCI (Uplink Control Information) is Hybrid Automatic Retransmission Request Acknowledgment (HARQ-ACK) information.

[0151] In one embodiment, the first UCI includes HARQ-ACK information.

[0152] In one embodiment, the first UCI includes HARQ-ACK information and CSI.

[0153] In one embodiment, the first UCI does not include HARQ-ACK information.

[0154] In one embodiment, the first UCI includes a CSI.

[0155] In one embodiment, the first UCI is a CSI.

[0156] In one embodiment, the first UCI is a periodic CSI report.

[0157] In one embodiment, the first UCI includes periodic CSI reports.

[0158] In one embodiment, the first UCI is a semi-permanent CSI report.

[0159] In one embodiment, the first UCI includes a semi-permanent CSI report.

[0160] In one embodiment, the distribution of multiple PUSCHs refers to the distribution of multiple PUSCHs in the time domain.

[0161] In one embodiment, the distribution of multiple PUSCHs refers to whether the earliest PUSCH exists among the multiple PUSCHs.

[0162] In one embodiment, the distribution of multiple PUSCHs indicates which of the multiple PUSCHs is the earliest PUSCH associated with the target coresetPoolIndex value.

[0163] In one embodiment, the expression "the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs" means that the multiplexing relationship between the first UCI and the multiple PUSCHs is related to whether the earliest PUSCH is present among the multiple PUSCHs.

[0164] In one embodiment, the expression "the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs" means that the first UCI is multiplexed onto the earliest PUSCH among the multiple PUSCHs associated with the target coresetPoolIndex value, and that the target coresetPoolIndex value is the default.

[0165] In one embodiment, the expression "the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs" means that the first UCI is multiplexed onto the earliest PUSCH among the multiple PUSCHs associated with the target coresetPoolIndex value, and that the target coresetPoolIndex value is configurable.

[0166] In one embodiment, the expression "the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs" means that the first UCI is a target coreset This means that the earliest PUSCH among the multiple PUSCHs associated with the PoolIndex value is used, and that the first PUSCH is associated with the target coresetPoolIndex value.

[0167] In one embodiment, the multiplexing relationship between the first UCI and multiple PUSCHs is related to whether the earliest PUSCH exists among the multiple PUSCHs.

[0168] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, where the target coresetPoolIndex value is the default.

[0169] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0170] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among a plurality of PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0171] In one embodiment, the first PUCCH is not triggered by DCI.

[0172] In one embodiment, the first PUCCH is not triggered by the DCI format.

[0173] In one embodiment, the first PUCCH is set semi-statically.

[0174] In one embodiment, ackNackFeedbackMode is set to separate.

[0175] In one embodiment, ackNackFeedbackMode is set as a joint.

[0176] Embodiment 2 Embodiment 2 illustrates a schematic diagram of the network architecture according to this application, as shown in Figure 2.

[0177] Figure 2 illustrates a diagram of the network architecture 200 for 5G NR, Long-Term Evolution (LTE), and Long-Term Evolution Advanced (LTE-A) systems. The 5G NR or LTE network architecture 200 may be referred to as an Evolutionary Packet System (EPS) 200 or several other preferred terms. The EPS 200 may comprise one or more user equipment (UEs) 201, a Next-Generation Radio Access Network (NG-RAN) 202, an Evolutionary Packet Core (EPC) / 5G Core Network (5G-CN) 210, a Home Subscriber Server (HSS) 220, and Internet services 230. The EPS may be interconnected with other access networks, but for simplicity these entities / interfaces are not shown. As shown in the diagram, the EPS provides packet-switched services, but it will be readily apparent to those skilled in the art that the various concepts presented throughout this application can be extended to networks or other cellular networks that provide circuit-switched services. NG-RAN comprises NR node B (gNB)203 and other gNB204. gNB203 is U It provides termination for user plane and control plane protocols toward E201. gNB203 may be connected to the remaining other gNB204 via an Xn interface (e.g., backhaul). gNB203 may also be referred to as base station, base transceiver station, radio base station, radio transceiver device, transceiver device function, basic service set (BSS), extended service set (ESS), transceiver node (TRP), or other preferred terminology. gNB203 provides an access point to EPC / 5G-CN210 in UE201. Examples of UE201 include mobile phones, smartphones, Session Initiation Protocol (SIP) phones, laptop computers, personal digital assistants (PDAs), satellite radios, non-terrestrial base station communications, satellite mobile communications, global positioning systems, multimedia equipment, video equipment, digital audio players (e.g., MP3 players), cameras, game consoles, drones, aircraft, narrowband IoT devices, mechanical communication devices, land transport vehicles, automobiles, wearable devices, or any other similar functional devices. Those skilled in the art may also refer to UE201 as a mobile station, subscriber station, mobile unit, subscriber unit, radio unit, remote unit, mobile device, radio device, radio communication device, remote device, mobile subscriber station, access terminal, mobile terminal, radio terminal, remote terminal, handset, user agent, mobile client, client, or any other suitable term. gNB203 is connected to EPC / 5G-CN210 via the S1 / NG interface. EPC / 5G-CN210 comprises a Mobility Management Entity (MME) / Authentication Management Field (AMF) / User Plane Function (UPF)211, other MME / AMF / UPF214, a Service Gateway (S-GW)212, and a Packet Data Network Gateway (P-GW)213. MME / AMF / UPF211 is a control node that handles signaling between UE201 and EPC / 5G-CN210. Generally, MME / AMF / UPF211 provides bearer and connection management. All user Internet Protocol (IP) packets are transmitted via S-GW212. S-GW212 is connected to P-GW213.P-GW213 provides UE IP address assignment and other functions. P-GW213 connects to Internet Service 230. Internet Service 230 includes Internet Protocol services corresponding to the operator, which may specifically include the Internet, intranet, IP multimedia subsystem (IMS), and packet-switched streaming services.

[0178] In one embodiment, UE201 corresponds to the first node in this application.

[0179] In one embodiment, UE201 corresponds to the second node in this application.

[0180] In one embodiment, UE201 is a UE.

[0181] In one embodiment, gNB203 corresponds to the first node in this application.

[0182] In one embodiment, gNB203 corresponds to the second node in this application.

[0183] In one embodiment, UE201 corresponds to the first node in this application, and gNB203 corresponds to the second node in this application.

[0184] In one embodiment, the gNB203 is a macrocellular base station.

[0185] In one embodiment, the gNB203 is a microcell base station.

[0186] As one embodiment, gNB203 is a picocell base station.

[0187] In one embodiment, gNB203 is a femitocell base station.

[0188] In one embodiment, the gNB203 is a base station device that supports large delay differences.

[0189] In one embodiment, the gNB203 is a single flight platform device.

[0190] In one embodiment, the gNB203 is a satellite device.

[0191] Embodiment 3 Embodiment 3, as shown in Figure 3, provides a schematic diagram of one embodiment of the wireless protocol architecture for the user plane and control plane according to this application. Figure 3 is a schematic diagram illustrating one embodiment of the wireless protocol architecture for the user plane 350 and control plane 300, and Figure 3 shows the control plane 300 between a first communication node device (UE, gNB, or RSU in V2X) and a second communication node device (gNB, UE, or RSU in V2X), or two UEs using three layers: L1, L2, and L3. L1 (L1 layer) is the lowest layer and implements various physical layer (PHY) signal processing functions. The L1 layer is referred to herein as PHY 301. L2 (L2 layer) 305 is above PHY 301 and is responsible for the links between the first communication node device and the second communication node device, and between the two UEs via PHY 301. The L2 layer 305 includes a Medium Access Control (MAC) sublayer 302, a Radio Link Control (RLC) sublayer 303, and a Packet Data Convergence Protocol (PDCP) sublayer 304, all of which terminate at a second communication node device. The PDCP sublayer 304 provides multiplexing between different radio bearers and logical channels. The PDCP sublayer 304 also provides security by encrypting data packets and supports handover for the mobility of the first communication node device between the second communication node device. The RLC sublayer 303 compensates for out-of-order reception caused by HARQ by providing splitting and reconstruction of upper-layer data packets, retransmission of lost data packets, and reordering of data packets. The MAC sublayer 302 provides multiplexing between logical channels and transmission channels. The MAC sublayer 302 is also responsible for allocating various radio resources (e.g., resource blocks) between first communication node devices within a single cell. The MAC sublayer 302 is also responsible for HARQ operation.The Radio Resource Control (RRC) sublayer 306 in the L3 (L3 layer) of the control plane 300 is responsible for acquiring radio resources (i.e., radio bearers) and configuring the lower layers using RRC signaling between the second and first communication node devices. The radio protocol architecture of the user plane 350 includes L1 (L1 layer) and L2 (L2 layer). The radio protocol architecture for the first and second communication node devices in the user plane 350 is generally the same as the corresponding layers and sublayers in the control plane 300 for the physical layer 351, the PDCP sublayer 354 in the L2 layer 355, the RLC sublayer 353 in the L2 layer 355, and the MAC sublayer 352 in the L2 layer 355, although the PDCP sublayer 354 also provides header compression for upper-layer data packets to reduce radio transmission overhead. The L2 layer 355 within the user plane 350 also includes a Service Data Adaptive Protocol (SDAP) sublayer 356, which is responsible for mapping between QoS streams and data radio bearers (DRBs) to support service diversity. Although not shown in the diagram, the first communication node device may have several higher layers above the L2 layer 355, including a network layer (e.g., IP layer) terminating at the network-side P-GW and an application layer (e.g., remote UE, server, etc.) terminating at the other end of the connection.

[0192] As one embodiment, the wireless protocol architecture shown in Figure 3 is applicable to the first node in this application.

[0193] As one embodiment, the wireless protocol architecture shown in Figure 3 is applicable to the second node in this application.

[0194] In one embodiment, the multiple signalings in this application are generated in PHY301.

[0195] In one embodiment, one of the multiple signalings in this application is generated in PHY301.

[0196] In one embodiment, one of the multiple signalings in this application is generated in the RRC sublayer 306.

[0197] In one embodiment, the multiple PUSCHs in this application are generated in PHY351.

[0198] Embodiment 4 Embodiment 4, as shown in Figure 4, shows schematic diagrams of the first and second communication devices according to this application. Figure 4 is a block diagram of the first communication device 410 and the second communication device 450 communicating with each other within an access network.

[0199] The first communication device 410 comprises a controller / processor 475, memory 476, a receiving processor 470, a transmitting processor 416, a multi-antenna receiving processor 472, a multi-antenna transmitting processor 471, a transmitting / receiving device 418, and an antenna 420.

[0200] The second communication device 450 comprises a controller / processor 459, memory 460, data source 467, transmit processor 468, receive processor 456, multi-antenna transmit processor 457, multi-antenna receive processor 458, transmit / receive device 454, and antenna 452.

[0201] In transmission from the first communication device 410 to the second communication device 450, the first communication device 410 provides upper-layer data packets from the core network to the controller / processor 475. The controller / processor 475 implements L2 layer functions. In transmission from the first communication device 410 to the second communication device 450, the controller / processor 475 provides header compression, encryption, packet splitting and reordering, multiplexing between logical channels and transport channels, and allocation of radio resources to the second communication device 450 based on various priority metrics. The controller / processor 475 is also responsible for retransmitting lost packets and signaling to the second communication device 450. The transmit processor 416 and the multi-antenna transmit processor 471 implement various signal processing functions of the L1 layer (i.e., the physical layer). The transmitting processor 416 implements coding and interleaving to facilitate forward error correction (FEC) in the second communication device 450, as well as mapping of signal clusters based on various modulation schemes (e.g., binary phase-shift keying (BPSK), quadrature phase-shift keying (QPSK), M-phase-shift keying (M-PSK), and M-quadrature amplitude modulation (M-QAM)). The multi-antenna transmitting processor 471 provides codebook-based precoding and non-codebook-based precoding. The system performs digital spatial precoding of encoded and modulated symbols, including ping, and beamforming to generate one or more spatial streams. The transmit processor 416 then maps each spatial stream to subcarriers, multiplexes them with time-domain and / or frequency-domain reference signals (e.g., pilot), and then uses the Fast Fourier Inverse Transform (IFFT) to generate physical channels that carry the time-domain multicarrier symbol streams. The multi-antenna transmit processor 471 then performs transmit analog precoding / beamforming operations on the time-domain multicarrier symbol streams. Each transmit device 418 converts the baseband multicarrier symbol streams provided by the multi-antenna transmit processor 471 into radio frequency streams, which are then provided to different antennas 420.

[0202] In transmission from the first communication device 410 to the second communication device 450, each receiving device 454 in the second communication device 450 receives the signal via its corresponding antenna 452. Each receiving device 454 reconstructs the information modulated on the radio frequency carrier, converts the radio frequency stream into a baseband multicarrier symbol stream, and provides the baseband multicarrier symbol stream to the receiving processor 456. The receiving processor 456 and the multi-antenna receiving processor 458 implement various signal processing functions of the L1 layer. The multi-antenna receiving processor 458 performs a receive analog precoding / beamforming operation on the baseband multicarrier symbol stream from the receiving device 454. The receiving processor 456 uses an FFT to convert the baseband multicarrier symbol stream after the receive analog precoding / beamforming operation from the time domain to the frequency domain. In the frequency domain, the physical layer data signal and reference signal are demultiplexed by the receiving processor 456. The reference signal is used for channel estimation, and after the data signal is subjected to multi-antenna detection by the multi-antenna receiving processor 458, an arbitrary spatial stream destined for the second communication device 450 is reconstructed. Symbols on each spatial stream are demodulated and reconstructed by the receiving processor 456 to generate a soft decision. The receiving processor 456 then decodes and deinterleaves the soft decision to reconstruct the upper layer data and control signals transmitted over the physical channel by the first communication device 410. The upper layer data and control signals are then provided to the controller / processor 459. The controller / processor 459 implements the functions of the L2 layer. The controller / processor 459 may be associated with memory 460, which stores program code and data. Memory 460 may be referred to as computer-readable media.In transmission from the first communication device 410 to the second communication device 450, the controller / processor 459 provides demultiplexing between the transport channel and logical channel, packet reconstruction, decryption, header decompression, and control signal processing to reconstruct the upper-layer data packets from the core network. The upper-layer data packets are then provided to all protocol layers above the L2 layer. Various control signals may also be provided to L3 for L3 processing.

[0203] In transmission from the second communication device 450 to the first communication device 410, the second communication device 450 uses data source 467 to provide upper-layer data packets to the controller / processor 459. Data source 467 represents all protocol layers above the L2 layer. Similar to the transmission function in the first communication device 410 described in the transmission from the first communication device 410 to the second communication device 450, the controller / processor 459 implements header compression, encryption, packet splitting and reordering, as well as multiplexing between logical channels and transport channels, based on the allocation of radio resources, and implements L2 layer functions for the user plane and control plane. The controller / processor 459 also retransmits lost packets and... It is responsible for signaling to communication device 410. Transmit processor 468 performs modulation mapping and channel coding processing, and multi-antenna transmit processor 457 performs digital multi-antenna spatial precoding, including codebook-based and non-codebook-based precoding, as well as beamforming processing. Transmit processor 468 then modulates the generated spatial stream into a multi-carrier / single-carrier symbol stream, which is provided to different antennas 452 via transmit device 454 after analog precoding / beamforming operation in multi-antenna transmit processor 457. Each transmit device 454 first converts the baseband symbol stream provided by multi-antenna transmit processor 457 into a radio frequency symbol stream, and then provides the radio frequency symbol stream to antenna 452.

[0204] In transmission from the second communication device 450 to the first communication device 410, the functions of the first communication device 410 are the same as the receiving functions of the second communication device 450 described in the transmission from the first communication device 410 to the second communication device 450. Each receiving device 418 receives radio frequency signals via its corresponding antenna 420, converts the received radio frequency signals into baseband signals, and provides the baseband signals to the multi-antenna receiving processor 472 and the receiving processor 470. The receiving processor 470 and the multi-antenna receiving processor 472 jointly implement the functions of the L1 layer. The controller / processor 475 implements the functions of the L2 layer. The controller / processor 475 may be associated with memory 476 which stores program code and data. Memory 476 may be referred to as computer-readable media. In transmission from the second communication device 450 to the first communication device 410, the controller / processor 475 provides demultiplexing between the transport channel and logical channel, packet reconstruction, decryption, header decompression, and control signal processing to reconstruct the upper layer data packets from the UE 450. The upper layer data packets from the controller / processor 475 can then be provided to the core network.

[0205] In one embodiment, the first node in this application includes a second communication device 450, and the second node in this application includes a first communication device 410.

[0206] As one sub-embodiment of the above embodiment, the first node is one user device, and the second node is one user device.

[0207] As one sub-embodiment of the above embodiment, the first node is a user device, and the second node is a relay node.

[0208] In one sub-embodiment of the above embodiment, the first node is a relay node, and the second node is user equipment.

[0209] As one sub-embodiment of the above embodiment, the first node is a user device, and the second node is a base station device.

[0210] As one sub-embodiment of the above embodiment, the first node is a relay node, and the second node is a base station device.

[0211] As one sub-embodiment of the above embodiment, the second node is a user device, and the first node is a base station device.

[0212] As one sub-embodiment of the above embodiment, the second node is a relay node, and the first node is a base station device.

[0213] As one sub-embodiment of the above embodiment, the second communication device 450 comprises at least one controller / processor, the at least one controller / processor responsible for HARQ operation.

[0214] As one sub-embodiment of the above embodiment, the first communication device 410 comprises at least one controller / processor, the at least one controller / processor responsible for HARQ operation.

[0215] As one sub-embodiment of the above embodiment, the first communication device 410 comprises at least one controller / processor, the at least one controller / processor responsible for error detection using acknowledgment (ACK) and / or negative acknowledgment (NACK) protocols to support HARQ operation.

[0216] In one embodiment, the second communication device 450 includes at least one processor and at least one memory, the at least one memory containing computer program code, and the at least one memory and the computer program code are configured to be used together with at least one processor. The second communication device 450 is configured to receive at least a plurality of signalings and transmit a plurality of PUSCHs, the plurality of PUSCHs are on the same serving cell, each of the plurality of PUSCHs depends on a plurality of signalings, the plurality of PUSCHs include PUSCHs associated with different coresetPoolIndex values, a first PUSCH overlaps with all of the plurality of PUSCHs, a first UCI is associated with the first PUSCH, and the multiplexing relationship between the first UCI and the plurality of PUSCHs is related to the distribution of the plurality of PUSCHs.

[0217] As one sub-embodiment of the above embodiment, the second communication device 450 corresponds to the first node in this application.

[0218] In one embodiment, the second communication device 450 includes a memory storing a computer-readable instruction program, which is configured to generate an action, when executed by at least one processor, that includes receiving a plurality of signalings and transmitting a plurality of PUSCHs, wherein the plurality of PUSCHs are on the same serving cell, each of the plurality of PUSCHs depends on a plurality of signalings, the plurality of PUSCHs include PUSCHs associated with different coresetPoolIndex values, a first PUSCH overlaps with all of the plurality of PUSCHs, a first UCI is associated with the first PUSCH, and the multiplexing relationship between the first UCI and the plurality of PUSCHs is related to the distribution of the plurality of PUSCHs.

[0219] As one sub-embodiment of the above embodiment, the second communication device 450 corresponds to the first node in this application.

[0220] In one embodiment, the first communication device 410 includes at least one processor and at least one memory, the at least one memory containing computer program code, and the at least one memory and computer program code are configured to be used together with at least one processor. The first communication device 410 is configured to transmit at least a plurality of signalings and receive a plurality of PUSCHs, the plurality of PUSCHs being on the same serving cell and a plurality of PUs Each SCH depends on multiple signalings, multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values, the first PUCCH overlaps with all of the multiple PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.

[0221] As one sub-embodiment of the above embodiment, the first communication device 410 corresponds to the second node in this application.

[0222] In one embodiment, the first communication device 410 includes a memory storing a computer-readable instruction program, which is configured to generate an action, when executed by at least one processor, that includes sending a plurality of signalings and receiving a plurality of PUSCHs, wherein the plurality of PUSCHs are on the same serving cell, each of the plurality of PUSCHs depends on a plurality of signalings, the plurality of PUSCHs include PUSCHs associated with different coresetPoolIndex values, the first PUSCH overlaps with all of the plurality of PUSCHs, the first UCI is associated with the first PUSCH, and the multiplexing relationship between the first UCI and the plurality of PUSCHs is related to the distribution of the plurality of PUSCHs.

[0223] As one sub-embodiment of the above embodiment, the first communication device 410 corresponds to the second node in this application.

[0224] In one embodiment, at least one of {antenna 452, receiving device 454, multi-antenna receiving processor 458, receiving processor 456, controller / processor 459, memory 460, and data source 467} is used in this application to receive multiple signalings.

[0225] In one embodiment, at least one of {antenna 420, transmitting device 418, multi-antenna transmitting processor 471, transmitting processor 416, controller / processor 475, and memory 476} is used to transmit multiple signalings.

[0226] In one embodiment, at least one of {antenna 452, transmitting device 454, multi-antenna transmitting processor 458, transmitting processor 468, controller / processor 459, memory 460, and data source 467} is used to transmit multiple PUSCHs in this application.

[0227] In one embodiment, at least one of {antenna 420, receiving device 418, multi-antenna receiving processor 472, receiving processor 470, controller / processor 475, and memory 476} is used to receive multiple PUSCHs in this application.

[0228] Embodiment 5 Embodiment 5 illustrates a flowchart of signal transmission according to one embodiment of the present application, as shown in Figure 5. In Figure 5, communication between the first node U1 and the second node U2 is carried out via an air interface.

[0229] The first node U1 receives multiple signaling signals in step S511 and transmits multiple PUSCH signals in step S512.

[0230] In step S521, the second node U2 sends multiple signaling signals and In the S522, multiple PUSCH signals are received.

[0231] In Embodiment 5, multiple PUSCHs reside on the same serving cell, each PUSCH depends on multiple signalings, each PUSCH includes PUSCHs associated with different coresetPoolIndex values, a first PUSCH overlaps with all of the multiple PUSCHs, a first UCI is associated with the first PUSCH, and the first UCI is multiplexed to the earliest PUSCH among the multiple PUSCHs associated with the target coresetPoolIndex value.

[0232] As one sub-embodiment of Embodiment 5, the first UCI is CSI, and the target coresetPoolIndex value is default.

[0233] As one sub-embodiment of Embodiment 5, the first UCI includes HARQ-ACK information, and the first PUCCH is associated with a target coresetPoolIndex value.

[0234] In one embodiment, the first node U1 is the first node in this application.

[0235] In one embodiment, the second node U2 is the second node in this application.

[0236] In one embodiment, the first node U1 is a single UE.

[0237] In one embodiment, the first node U1 is a base station.

[0238] In one embodiment, the second node U2 is a base station.

[0239] In one embodiment, the second node U2 is a single UE.

[0240] In one embodiment, the air interface between the second node U2 and the first node U1 is a Uu interface.

[0241] In one embodiment, the air interface between the second node U2 and the first node U1 includes a cellular link.

[0242] In one embodiment, the air interface between the second node U2 and the first node U1 includes a wireless interface between the base station device and the user equipment.

[0243] In one embodiment, the air interface between the second node U2 and the first node U1 includes a wireless interface between the satellite device and the user equipment.

[0244] In one embodiment, the air interface between the second node U2 and the first node U1 includes a wireless interface between user devices.

[0245] As one embodiment, the problem to be solved in this application includes a method for easily and efficiently implementing UCI multiplexing.

[0246] As one embodiment, the problem to be solved in this application includes a method for improving uplink transmission performance.

[0247] As one embodiment, the problem to be solved in this application is to improve the transmission performance of UCI. This includes methods for doing so.

[0248] As one embodiment, the problem to be solved in this application includes a method for achieving UCI multiplexing when transmission is performed simultaneously on multiple panels.

[0249] As one embodiment, the problem to be solved in this application includes how the multiplexing relationship between UCI and multiple PUSCHs is defined when PUCCH overlaps with multiple PUSCHs, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values.

[0250] As one embodiment, the problem to be solved in this application is, when PUCCH overlaps with multiple PUSCHs, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values, on which of the multiple PUSCHs the UCI is multiplexed.

[0251] As one embodiment, the problem to be solved in this application is, when PUCCH overlaps with multiple PUSCHs, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values, which PUSCH(s) among the multiple PUSCHs the UCI is multiplexed onto.

[0252] As one embodiment, the problem to be solved in this application is whether UCI is multiplexed on one of the PUSCHs when PUCCH overlaps with multiple PUSCHs, and the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values.

[0253] As one embodiment, the problem to be solved in this application includes a method for avoiding the degradation of communication performance caused by the unclear definition of UCI multiplexing.

[0254] Embodiment 6 Embodiment 6, as shown in Figure 6, illustrates a schematic diagram showing a multiplexing relationship between a first UCI and multiple PUSCHs according to one embodiment of the present application.

[0255] In Embodiment 6, the multiplexing relationship between the first UCI and the multiple PUSCHs is related to whether the earliest PUSCH is present among the multiple PUSCHs.

[0256] In one embodiment, the multiplexing relationship between the first UCI and the multiple PUSCHs refers to whether the first UCI is multiplexed on one of the multiple PUSCHs.

[0257] In one embodiment, the multiplexing relationship between the first UCI and the multiple PUSCHs refers to whether the first UCI is multiplexed on only one of the multiple PUSCHs.

[0258] In one embodiment, the multiplexing relationship between the first UCI and the multiple PUSCHs refers to which of the multiple PUSCHs the first UCI is multiplexed onto.

[0259] In one embodiment, the multiplexing relationship between the first UCI and multiple PUSCHs refers to which PUSCH(s) among the multiple PUSCHs the first UCI is multiplexed onto.

[0260] In one embodiment, the multiplexing relationship between the first UCI and multiple PUSCHs depends on whether the earliest PUSCH exists among the multiple PUSCHs.

[0261] In one embodiment, the expression "the multiplexing relationship between the first UCI and the multiple PUSCHs relates to whether the earliest PUSCH is present among the multiple PUSCHs" means that the multiplexing relationship between the first UCI and the multiple PUSCHs relates to whether the multiple PUSCHs overlap in the time domain.

[0262] In one embodiment, the temporal relationship between any two PUSCHs among a plurality of PUSCHs is determined according to their start times.

[0263] In one embodiment, the temporal relationship between any two PUSCHs among a plurality of PUSCHs is determined according to their end times.

[0264] In one embodiment, whether the earliest PUSCH exists among multiple PUSCHs is related to whether the multiple PUSCHs overlap.

[0265] In one embodiment, if none of the multiple pushes are the earliest pushes, then the earliest push does not exist among the multiple pushes.

[0266] In one embodiment, if two of the multiple PUSCHs overlap in the time domain, neither of the two PUSCHs is the earliest PUSCH among the multiple PUSCHs.

[0267] In one embodiment, if two of the multiple PUSCHs have the same start time, neither of the two PUSCHs is the earliest PUSCH among the multiple PUSCHs.

[0268] In one embodiment, if two of the multiple PUSCHs have the same end time, neither of the two PUSCHs is the earliest PUSCH among the multiple PUSCHs.

[0269] In one embodiment, if two of the multiple PUSCHs completely overlap in the time domain, neither of the two PUSCHs is the earliest PUSCH among the multiple PUSCHs.

[0270] In one embodiment, a given PUSCH is one PUSCH among a plurality of PUSCHs.

[0271] In one embodiment, if the start time of a given PUSCH is earlier than the start times of each of the other PUSCHs among the group of PUSCHs, then the given PUSCH is the earliest PUSCH among the group of PUSCHs.

[0272] As an embodiment, if the end time of a given PUSCH is earlier than the end time of each PUSCH other than the given PUSCH among a plurality of PUSCHs, the given PUSCH is the earliest PUSCH among the plurality of PUSCHs.

[0273] As an embodiment, if the end time of a given PUSCH is earlier than the start time of each PUSCH other than the given PUSCH among a plurality of PUSCHs, the given PUSCH is the earliest PUSCH among the plurality of PUSCHs.

[0274] As an embodiment, if the end time of a given PUSCH is not later than the start time of each PUSCH other than the given PUSCH among a plurality of PUSCHs, the given PUSCH is the earliest PUSCH among the plurality of PUSCHs.

[0275] As an embodiment, if the start time of a given PUSCH is not earlier than the start time of one PUSCH other than the given PUSCH among a plurality of PUSCHs, the given PUSCH is not the earliest PUSCH among the plurality of PUSCHs.

[0276] As an embodiment, if the end time of a given PUSCH is not earlier than the end time of one PUSCH other than the given PUSCH among a plurality of PUSCHs, the given PUSCH is not the earliest PUSCH among the plurality of PUSCHs.

[0277] As an embodiment, if the start time of a given PUSCH is later than the start time of one PUSCH other than the given PUSCH among a plurality of PUSCHs, the given PUSCH is not the earliest PUSCH among the plurality of PUSCHs.

[0278] As an embodiment, if the end time of a given PUSCH is later than the end time of one PUSCH other than the given PUSCH among a plurality of PUSCHs, the given PUSCH is not the earliest PUSCH among the plurality of PUSCHs.

[0279] In one embodiment, if the end time of a given PUSCH is not earlier than the start time of one other PUSCH among a group of PUSCHs, then the given PUSCH is not the earliest PUSCH among the group of PUSCHs.

[0280] In one embodiment, if the end time of a given PUSCH is later than the start time of one other PUSCH among a group of PUSCHs, then the given PUSCH is not the earliest PUSCH among the group of PUSCHs.

[0281] In one embodiment, if a given PUSCH overlaps with one other PUSCH among multiple PUSCHs in the time domain, the given PUSCH is not the earliest PUSCH among the multiple PUSCHs.

[0282] In one embodiment, if a given PUSCH completely overlaps with one other PUSCH among multiple PUSCHs in the time domain, then the given PUSCH is not the earliest PUSCH among multiple PUSCHs.

[0283] In one embodiment, if any two of the multiple PUSCHs do not overlap in the time domain, the earliest PUSCH exists among the multiple PUSCHs.

[0284] In one embodiment, multiple PUSCHs are two PUSCHs, and "the earliest PUSCH is among the multiple PUSCHs" means that the start times of the multiple PUSCHs are different, while "the earliest PUSCH is not among the multiple PUSCHs" means that the start times of the multiple PUSCHs are the same.

[0285] In one embodiment, multiple PUSCHs are two PUSCHs, and "the earliest PUSCH is among the multiple PUSCHs" means that the end times of the multiple PUSCHs are different, while "the earliest PUSCH is not among the multiple PUSCHs" means that the end times of the multiple PUSCHs are the same.

[0286] In one embodiment, multiple PUSCHs are two PUSCHs, and "the earliest PUSCH exists among multiple PUSCHs" means that the multiple PUSCHs do not overlap in the time domain, and "the earliest PUSCH does not exist among multiple PUSCHs" This means that multiple PUSCH statements overlap in the time domain.

[0287] In one embodiment, when the first UCI is multiplexed on one of several PUSCHs, the first UCI is transmitted on the PUSCH.

[0288] In one embodiment, when the first UCI is multiplexed on one of several PUSCHs, the first UCI and at least one transport block are transmitted together on the PUSCH.

[0289] Embodiment 7 Embodiment 7, as shown in Figure 7, illustrates a schematic diagram showing a multiplexing relationship between a first UCI and multiple PUSCHs according to one embodiment of the present application.

[0290] In Embodiment 7, if the earliest PUSCH exists among multiple PUSCHs, the first UCI is multiplexed on the earliest PUSCH among the multiple PUSCHs.

[0291] In one embodiment, if the earliest PUSCH exists among multiple PUSCHs, the first UCI is multiplexed only on the earliest PUSCH among the multiple PUSCHs.

[0292] As one embodiment, when the earliest PUSCH does not exist among a plurality of PUSCHs, the first UCI is not multiplexed on any of the plurality of PUSCHs.

[0293] As one embodiment, when the earliest PUSCH does not exist among a plurality of PUSCHs, the first UCI is discarded for transmission.

[0294] As one embodiment, when the earliest PUSCH does not exist among a plurality of PUSCHs, the first UCI is multiplexed on two or more of the plurality of PUSCHs.

[0295] As one embodiment, when the earliest PUSCH does not exist among a plurality of PUSCHs, the first UCI is multiplexed on each of the plurality of PUSCHs.

[0296] As one embodiment, when the earliest PUSCH does not exist among a plurality of PUSCHs, the first UCI is multiplexed on one of the plurality of PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default.

[0297] As one sub - embodiment of the above embodiment, the target coresetPoolIndex value is 0.

[0298] As one sub - embodiment of the above embodiment, the target coresetPoolIndex value is 1.

[0299] As one embodiment, the expression "the target coresetPoolIndex value is the default" means that the target coresetPoolIndex value is 0.

[0300] As one embodiment, the expression "the target coresetPoolIndex value is the default" means that the target coresetPoolIndex value is 1.

[0301] In one embodiment, the expression "the target coresetPoolIndex value is the default" means that the target coresetPoolIndex value is fixed at 0.

[0302] In one embodiment, the expression "the target coresetPoolIndex value is the default" means that the target coresetPoolIndex value is fixed at 1.

[0303] In one embodiment, for any PUSCH among multiple PUSCHs associated with a target coresetPoolIndex value, the associated coresetPoolIndex value is the target coresetPoolIndex value.

[0304] In one embodiment, if the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0305] As one sub-embodiment of the above embodiment, the target coresetPoolIndex value is set by RRC signaling.

[0306] As one sub-embodiment of the above embodiment, the target coresetPoolIndex value is set by a MAC control element (CE).

[0307] In one embodiment, if the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0308] In one embodiment, if a plurality of PUSCHs include only one PUSCH associated with the target coresetPoolIndex value, then only one PUSCH among the plurality of PUSCHs associated with the target coresetPoolIndex value is the earliest PUSCH among the plurality of PUSCHs associated with the target coresetPoolIndex value.

[0309] In one embodiment, the earliest PUSCH exists among multiple PUSCHs, and the first UCI is multiplexed on the earliest PUSCH among the multiple PUSCHs.

[0310] In one embodiment, the earliest PUSCH exists among multiple PUSCHs, and the first UCI is multiplexed only on the earliest PUSCH among the multiple PUSCHs.

[0311] In one embodiment, the earliest PUSCH does not exist among multiple PUSCHs, and the first UCI is not multiplexed on any of the multiple PUSCHs.

[0312] In one embodiment, the earliest PUSCH is not present among multiple PUSCHs, and the first UCI is multiplexed on two or more PUSCHs among the multiple PUSCHs.

[0313] In one embodiment, the earliest PUSCH is not present among multiple PUSCHs, and the first UCI is multiplexed on each of the multiple PUSCHs.

[0314] In one embodiment, the earliest PUSCH is not present among multiple PUSCHs, and the first U The CI is multiplexed onto one of several PUSCHs associated with the target coresetPoolIndex value, which is the default value.

[0315] In one embodiment, the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed on one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0316] In one embodiment, the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0317] In one embodiment, the earliest PUSCH is not present among multiple PUSCHs, and the first UCI is abandoned for transmission.

[0318] Embodiment 8 Embodiment 8, as shown in Figure 8, illustrates a schematic diagram showing a multiplexing relationship between a first UCI and multiple PUSCHs according to one embodiment of the present application.

[0319] In Embodiment 8, the first UCI is multiplexed on the earliest PUSCH among a plurality of PUSCHs associated with the target coresetPoolIndex value.

[0320] In one embodiment, if a plurality of PUSCHs include only one PUSCH associated with the target coresetPoolIndex value, then only one PUSCH among the plurality of PUSCHs associated with the target coresetPoolIndex value is the earliest PUSCH among the plurality of PUSCHs associated with the target coresetPoolIndex value.

[0321] In one embodiment, the plurality of PUSCHs include two or more PUSCHs associated with a target coresetPoolIndex value.

[0322] In one embodiment, the plurality of PUSCHs include two or more PUSCHs associated with a target coresetPoolIndex value, and any two of the plurality of PUSCHs associated with the target coresetPoolIndex value do not overlap in the time domain.

[0323] In one embodiment, the target coresetPoolIndex value is the default value.

[0324] In one embodiment, the target coresetPoolindex value is configurable.

[0325] In one embodiment, the target coresetPoolIndex value is 0.

[0326] In one embodiment, the target coresetPoolIndex value is 1.

[0327] In one embodiment, the target coresetPoolIndex value is fixed at 0.

[0328] In one embodiment, the target coresetPoolindex value is fixed at 1.

[0329] In one embodiment, the target coresetPoolIndex value is set by RRC signaling.

[0330] In one embodiment, the target coresetPoolIndex value is set by MAC CE.

[0331] In one embodiment, the first PUCCH is associated with a target coresetPoolIndex value.

[0332] Embodiment 9 Embodiment 9, as shown in Figure 9, illustrates a schematic diagram of the relationship between the first PUCCH and the target coresetPoolIndex value according to one embodiment of the present application.

[0333] In Embodiment 9, the first PUCCH is associated with the target coresetPoolIndex value.

[0334] In one embodiment, the first physical uplink control channel (PUCCH) is triggered by DCI.

[0335] In one embodiment, the first PUCCH is triggered by the DCI format.

[0336] In one embodiment, if one DCI represents a PUCCH resource occupied by a first PUCCH, then this DCI is the DCI that triggers the first PUCCH.

[0337] In one embodiment, if one DCI indicates the transmission of a first PUCCH, this DCI is the DCI that triggers the first PUCCH.

[0338] In one embodiment, the first PUCCH is triggered by the DCI format.

[0339] In one embodiment, if a DCI format represents a PUCCH resource occupied by a first PUCCH, then this DCI is the DCI that triggers the first PUCCH.

[0340] In one embodiment, if a DCI format indicates the transmission of a first PUCCH, then this DCI is the DCI that triggers the first PUCCH.

[0341] In one embodiment, the target coresetPoolIndex value is set for the first PUCCH.

[0342] In one embodiment, the target coresetPoolIndex value is set for the first PUCCH by RRC signaling.

[0343] In one embodiment, the target coresetPoolIndex value is set by MAC CE for the first PUCCH.

[0344] In one embodiment, the DCI that triggers the first PUCCH is the target corese It is associated with the tPoolIndex value.

[0345] In one embodiment, the DCI format that triggers the first PUCCH is associated with a target coresetPoolIndex value.

[0346] In one embodiment, the target coresetPoolIndex value is the coresetPoolIndex value set for the CORESET used to receive the DCI that triggers the first PUCCH.

[0347] In one embodiment, the target coresetPoolIndex value is the coresetPoolIndex value set in the ControlResourceSet used to search for the DCI that triggers the first PUCCH.

[0348] In one embodiment, the target coresetPoolIndex value is the coresetPoolIndex value of the CORESET associated with the DCI that triggers the first PUCCH.

[0349] In one embodiment, the target coresetPoolIndex value is the coresetPoolIndex value set in the ControlResourceSet associated with the PDCCH used to receive the DCI that triggers the first PUCCH.

[0350] In one embodiment, the target coresetPoolIndex value is the coresetPoolIndex value set for the CORESET used to receive the DCI format that triggers the first PUCCH.

[0351] In one embodiment, the target coresetPoolIndex value is the coresetPoolIndex value in a ControlResourceSet information element configured to search for a DCI format that triggers a first PUCCH.

[0352] In one embodiment, the target coresetPoolIndex value is the coresetPoolIndex value of the CORESET associated with the DCI format that triggers the first PUCCH.

[0353] In one embodiment, the target coresetPoolIndex value is the coresetPoolIndex value set in the ControlResourceSet information element associated with the PDCCH used to receive the DCI format that triggers the first PUCCH.

[0354] Embodiment 10 Embodiment 10 illustrates a structural block diagram of a processing unit in a first node device, as shown in Figure 10. In Figure 10, the first node device processing unit A00 comprises a first receiver A01 and a first transmitter A02.

[0355] In one embodiment, the first node device A00 is a base station.

[0356] In one embodiment, the first node device A00 is a user device.

[0357] In one embodiment, the first node device A00 is a relay node.

[0358] In one embodiment, the first node device A00 is a vehicle-mounted communication device.

[0359] In one embodiment, the first node device A00 is a user device comprising a single panel.

[0360] In one embodiment, the first node device A00 is a user device equipped with multiple panels.

[0361] In one embodiment, the first receiver A01 comprises at least one of the antenna 452, receiving device 454, multi-antenna receiving processor 458, receiving processor 456, controller / processor 459, memory 460, and data source 467 shown in Figure 4 of this application.

[0362] In one embodiment, the first receiver A01 comprises at least the first five of the following as shown in Figure 4 of this application: antenna 452, receiving device 454, multi-antenna receiving processor 458, receiving processor 456, controller / processor 459, memory 460, and data source 467.

[0363] In one embodiment, the first receiver A01 comprises at least the first four of the following as shown in Figure 4 of this application: antenna 452, receiving device 454, multi-antenna receiving processor 458, receiving processor 456, controller / processor 459, memory 460, and data source 467.

[0364] In one embodiment, the first receiver A01 comprises at least the first three of the following as shown in Figure 4 of this application: antenna 452, receiving device 454, multi-antenna receiving processor 458, receiving processor 456, controller / processor 459, memory 460, and data source 467.

[0365] In one embodiment, the first receiver A01 comprises at least the first two of the following as shown in Figure 4 of this application: antenna 452, receiving device 454, multi-antenna receiving processor 458, receiving processor 456, controller / processor 459, memory 460, and data source 467.

[0366] In one embodiment, the first transmitter A02 comprises at least one of the following as shown in Figure 4 of this application: antenna 452, transmitting device 454, multi-antenna transmitting processor 457, transmitting processor 468, controller / processor 459, memory 460, and data source 467.

[0367] In one embodiment, the first transmitter A02 comprises at least the first five of the following as shown in Figure 4 of this application: antenna 452, transmitting device 454, multi-antenna transmitting processor 457, transmitting processor 468, controller / processor 459, memory 460, and data source 467.

[0368] In one embodiment, the first transmitter A02 comprises at least the first four of the following as shown in Figure 4 of this application: antenna 452, transmitting device 454, multi-antenna transmitting processor 457, transmitting processor 468, controller / processor 459, memory 460, and data source 467.

[0369] In one embodiment, the first transmitter A02 includes an antenna 452, a transmitting device 454, a multi-antenna transmitting processor 457, a transmitting processor 468, and a co It comprises at least the first three of the following: a controller / processor 459, memory 460, and data source 467.

[0370] In one embodiment, the first transmitter A02 comprises at least the first two of the following as shown in Figure 4 of this application: antenna 452, transmitting device 454, multi-antenna transmitting processor 457, transmitting processor 468, controller / processor 459, memory 460, and data source 467.

[0371] In one embodiment, a first receiver A01 is configured to receive multiple signalings, and a first transmitter A02 is configured to transmit multiple PUSCHs, where the multiple PUSCHs are on the same serving cell, each of the multiple PUSCHs depends on multiple signalings, the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values, the first PUSCH overlaps with all of the multiple PUSCHs, the first UCI is associated with the first PUSCH, and the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.

[0372] In one embodiment, the multiplexing relationship between the first UCI and the multiple PUSCHs depends on whether the earliest PUSCH is present among the multiple PUSCHs. If the earliest PUSCH is present among the multiple PUSCHs, the first UCI is multiplexed onto the earliest PUSCH among the multiple PUSCHs.

[0373] In one embodiment, if the earliest PUSCH is not present among the multiple PUSCHs, the first UCI is not multiplexed on any of the multiple PUSCHs.

[0374] In one embodiment, if the earliest PUSCH is not present among the multiple PUSCHs, the first UCI is multiplexed on each of the multiple PUSCHs.

[0375] In one embodiment, if the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default.

[0376] In one embodiment, if the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0377] In one embodiment, if the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0378] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, where the target coresetPoolIndex value is the default.

[0379] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0380] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among a plurality of PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0381] In one embodiment, a first receiver A01 is configured to receive multiple signalings, each of which is in one DCI format; a first transmitter A02 is configured to transmit multiple PUSCHs, each of which resides on the same serving cell; each of which depends on multiple signalings; each of which includes PUSCHs associated with different coresetPoolIndex values; a first PUSCH overlaps with all of the multiple PUSCHs; a first UCI is associated with the first PUSCH; each of which includes two or more PUSCHs associated with a target coresetPoolIndex value; and the first UCI is multiplexed on the earliest PUSCH among the multiple PUSCHs associated with the target coresetPoolIndex value.

[0382] As one sub-embodiment of the above embodiment, the first UCI is a CSI, and the target coresetPoolIndex value is the default.

[0383] As one sub-embodiment of the above embodiment, the target coresetPoolIndex value is configurable.

[0384] As one sub-embodiment of the above embodiment, the first UCI includes HARQ-ACK information, and the first PUCCH is associated with a target coresetPoolIndex value.

[0385] As one sub-embodiment of the above embodiment, the first UCI includes HARQ-ACK information, and the target coresetPoolIndex value is the default value.

[0386] In one embodiment, a first receiver A01 is configured to receive multiple signalings, each of which is in one DCI format, and a first transmitter A02 is configured to transmit multiple PUSCHs, each of which resides on the same serving cell, each of which depends on multiple signalings, and each of which includes PUSCHs associated with different coresetPoolIndex values, and the first PUSCH overlaps with all of the multiple PUSCHs, and the first The UCI is associated with the first PUCCH, and on which of the multiple PUCCHs the first UCI is multiplexed depends on whether the earliest PUCCH exists among the multiple PUCCHs. If the earliest PUCCH exists among the multiple PUCCHs, the first UCI is multiplexed on the earliest PUCCH among the multiple PUCCHs. If the earliest PUCCH does not exist among the multiple PUCCHs, the first UCI is multiplexed on one of the multiple PUCCHs associated with the target coresetPoolIndex value.

[0387] As one sub-embodiment of the above embodiment, the first UCI is a CSI, and the target coresetPoolIndex value is the default.

[0388] As one sub-embodiment of the above embodiment, the target coresetPoolIndex value is configurable.

[0389] As one sub-embodiment of the above embodiment, the first UCI receives HARQ-ACK information. In addition, the first PUCCH is associated with the target coresetPoolIndex value.

[0390] As one sub-embodiment of the above embodiment, the first UCI includes HARQ-ACK information, and the target coresetPoolIndex value is the default value.

[0391] In one embodiment, a first receiver A01 is configured to receive multiple signalings, each of which is in one DCI format, and a first transmitter A02 is configured to transmit multiple PUSCHs, each of which resides on the same serving cell, each of which depends on multiple signalings, and each of which includes PUSCHs associated with different coresetPoolIndex values, and the first PUSCH is of the multiple PUSCHs This overlaps with all of ours. The first UCI is associated with the first PUCCH, and on which PUCCH(s) the first UCI is multiplexed depends on whether the earliest PUCCH is among the PUCCH. If the earliest PUCCH is among the PUCCH, the first UCI is multiplexed on the earliest PUCCH among the PUCCH. If the earliest PUCCH is not among the PUCCH, the first UCI is multiplexed on each of the PUCCHs among the PUCCH.

[0392] In one embodiment, a first receiver A01 is configured to receive multiple signalings, each of which is in one DCI format, and a first transmitter A02 is configured to transmit multiple PUSCHs, each of which resides on the same serving cell, each of which depends on multiple signalings, and each of which includes PUSCHs associated with different coresetPoolIndex values, and the first PUSCH is one of the multiple PUSCHs. This overlaps with all of the above, and the first UCI is associated with the first PUCCH. Whether the first UCI is multiplexed on one of the PUCCHs depends on whether the earliest PUCCH is among the PUCCHs. If the earliest PUCCH is among the PUCCHs, the first UCI is multiplexed on the earliest PUCCH among the PUCCHs. If the earliest PUCCH is not among the PUCCHs, the first UCI is not multiplexed on any of the PUCCHs.

[0393] Embodiment 11 Embodiment 11 illustrates a structural block diagram of a processing unit in a second node device, as shown in Figure 11. In Figure 11, the second node device processing unit B00 comprises a second transmitter B01 and a second receiver B02.

[0394] In one embodiment, the second node device B00 is a user device.

[0395] In one embodiment, the second node device B00 is a base station.

[0396] In one embodiment, the second node device B00 is a satellite device.

[0397] In one embodiment, the second node device B00 is a relay node.

[0398] In one embodiment, the second node device B00 is a vehicle-mounted communication device.

[0399] In one embodiment, the second node device B00 is one of a test apparatus, a test device, and a test instrument.

[0400] In one embodiment, the second transmitter B01 comprises at least one of the antenna 420, transmitting device 418, multi-antenna transmitting processor 471, transmitting processor 416, controller / processor 475, and memory 476 shown in Figure 4 of this application.

[0401] In one embodiment, the second transmitter B01 comprises at least the first five of the following as shown in Figure 4 of this application: antenna 420, transmitting device 418, multi-antenna transmitting processor 471, transmitting processor 416, controller / processor 475, and memory 476.

[0402] In one embodiment, the second transmitter B01 comprises at least the first four of the following as shown in Figure 4 of this application: antenna 420, transmitting device 418, multi-antenna transmitting processor 471, transmitting processor 416, controller / processor 475, and memory 476.

[0403] In one embodiment, the second transmitter B01 comprises at least the first three of the following as shown in Figure 4 of this application: antenna 420, transmitting device 418, multi-antenna transmitting processor 471, transmitting processor 416, controller / processor 475, and memory 476.

[0404] In one embodiment, the second transmitter B01 comprises at least the first two of the following: antenna 420, transmitting device 418, multi-antenna transmitting processor 471, transmitting processor 416, controller / processor 475, and memory 476, as shown in Figure 4 of this application.

[0405] In one embodiment, the second receiver B02 comprises at least one of the following: an antenna 420, a receiving device 418, a multi-antenna receiving processor 472, a receiving processor 470, a controller / processor 475, and a memory 476, as shown in Figure 4 of this application.

[0406] In one embodiment, the second receiver B02 comprises at least the first five of the following as shown in Figure 4 of this application: antenna 420, receiving device 418, multi-antenna receiving processor 472, receiving processor 470, controller / processor 475, and memory 476.

[0407] In one embodiment, the second receiver B02 comprises at least the first four of the following as shown in Figure 4 of this application: antenna 420, receiving device 418, multi-antenna receiving processor 472, receiving processor 470, controller / processor 475, and memory 476.

[0408] In one embodiment, the second receiver B02 comprises at least the first three of the following as shown in Figure 4 of this application: antenna 420, receiving device 418, multi-antenna receiving processor 472, receiving processor 470, controller / processor 475, and memory 476.

[0409] In one embodiment, the second receiver B02 comprises at least the first two of the following: antenna 420, receiving device 418, multi-antenna receiving processor 472, receiving processor 470, controller / processor 475, and memory 476, as shown in Figure 4 of this application.

[0410] In one embodiment, the second transmitter B01 is configured to transmit multiple signaling signals. The second transmitter B02 is configured to receive multiple PUSCHs, the multiple PUSCHs are on the same serving cell, each of the multiple PUSCHs depends on multiple signalings, the multiple PUSCHs include PUSCHs associated with different coresetPoolIndex values, the first PUSCH overlaps with all of the multiple PUSCHs, the first UCI is associated with the first PUSCH, and the multiplexing relationship between the first UCI and the multiple PUSCHs is related to the distribution of the multiple PUSCHs.

[0411] In one embodiment, the multiplexing relationship between the first UCI and the multiple PUSCHs depends on whether the earliest PUSCH is present among the multiple PUSCHs. If the earliest PUSCH is present among the multiple PUSCHs, the first UCI is multiplexed onto the earliest PUSCH among the multiple PUSCHs.

[0412] In one embodiment, if the earliest PUSCH is not present among the multiple PUSCHs, the first UCI is not multiplexed on any of the multiple PUSCHs.

[0413] In one embodiment, if the earliest PUSCH is not present among the multiple PUSCHs, the first UCI is multiplexed on each of the multiple PUSCHs.

[0414] In one embodiment, if the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default.

[0415] In one embodiment, if the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0416] In one embodiment, if the earliest PUSCH is not present among multiple PUSCHs, the first UCI is multiplexed onto one of the multiple PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0417] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, where the target coresetPoolIndex value is the default.

[0418] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among multiple PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is configurable.

[0419] In one embodiment, the first UCI is multiplexed on the earliest PUSCH among a plurality of PUSCHs associated with the target coresetPoolIndex value, and the first PUSCH is associated with the target coresetPoolIndex value.

[0420] Those skilled in the art will understand that all or some of the steps in the above method can be implemented by instructing the relevant hardware with a program, and that the program can be stored on a computer-readable storage medium such as read-only memory, a hard disk, or an optical disc. Optionally, the steps of the above embodiment All or some of the components may also be implemented using one or more integrated circuits. Correspondingly, each module unit in the above embodiments may be implemented in hardware form or as a software functional module. This application is not limited to any particular form of software and hardware. Examples of first node devices in this application include, but are not limited to, mobile phones, tablet computers, notebook computers, network access cards, low-power devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircraft, airplanes, drones, remotely controlled aircraft, and other wireless communication devices. Examples of second node devices in this application include, but are not limited to, mobile phones, tablet computers, notebook computers, network access cards, low-power devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircraft, airplanes, drones, remotely controlled aircraft, and other wireless communication devices. Examples of user equipment or UE or terminals in this application include, but are not limited to, mobile phones, tablet computers, notebook computers, network access cards, low-power devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircraft, airplanes, drones, remotely controlled aircraft, and other wireless communication devices. Examples of base station devices or base station or network-side devices in this application include, but are not limited to, macrocell base stations, microcell base stations, femtocells, relay base stations, eNBs, gNBs, transmit / receive points (TRPs), GNSS, relay satellites, satellite base stations, aerial base stations, test equipment, test devices, test instruments, and other devices.

[0421] Those skilled in the art will understand that the present invention can be implemented in other specified forms without departing from its core or fundamental features. Therefore, the embodiments described herein should be considered descriptive and not restrictive. The scope of the invention is determined not by the foregoing description but by the appended claims, and all modifications within the art and their equivalent meanings are considered to be included therein.

Claims

1. A first node for wireless communication, A first receiver configured to receive multiple signaling signals, A first transmitter configured to transmit a plurality of PUSCHs, wherein the plurality of PUSCHs are on the same serving cell, each of the plurality of PUSCHs depends on the plurality of signalings, and the plurality of PUSCHs include PUSCHs associated with different coresetPoolIndex values. The first PUCCH overlaps with all of the plurality of PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the plurality of PUSCHs is related to the distribution of the plurality of PUSCHs. The multiplexing relationship between the first UCI and the plurality of PUSCHs is related to whether the earliest PUSCH is present among the plurality of PUSCHs, and if the earliest PUSCH is present among the plurality of PUSCHs, the first UCI is multiplexed on the earliest PUSCH among the plurality of PUSCHs, and if the earliest PUSCH is not present among the plurality of PUSCHs, the first UCI is multiplexed on one of the plurality of PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default for the first node.

2. The first node according to claim 1, wherein the expression "the target coresetPoolIndex value is default" means that the target coresetPoolIndex value is 0.

3. The first node according to claim 1 or 2, wherein the plurality of signalings are a plurality of DCIs, and the expression "each of the plurality of PUSCHs depends on each of the plurality of signalings" means that each of the plurality of signalings is used to schedule the plurality of PUSCHs.

4. The first node according to any one of claims 1 to 3, wherein the plurality of PUSCHs include only two PUSCHs.

5. The first node according to any one of claims 1 to 4, wherein the plurality of PUSCHs includes only two PUSCHs, and if the start times of the two PUSCHs among the plurality of PUSCHs are the same, neither of the two PUSCHs is the earliest PUSCH among the plurality of PUSCHs.

6. The first node according to any one of claims 1 to 5, wherein all of the aforementioned PUSCHs are located on a serving cell having the smallest ServCellIndex.

7. The first node according to any one of claims 1 to 6, wherein the first UCI does not include HARQ-ACK information.

8. The first node according to any one of claims 1 to 7, wherein the multiplexing relationship between the first UCI and the plurality of PUCCHs indicates which of the plurality of PUCCHs the first UCI is multiplexed on, and the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH carries the first UCI.

9. The coresetP associated with one of the PUSCHs among the plurality of PUSCHs The first node according to any one of claims 1 to 8, wherein the oolIndex value is a coresetPoolIndex value of a control resource set used to receive a DCI used to schedule one of the plurality of PUSCHs.

10. The first node according to any one of claims 1 to 9, wherein the non-periodic CSI is not multiplexed within any of the PUSCHs among the plurality of PUSCHs.

11. A second node for wireless communication, A second transmitter configured to transmit multiple signaling signals, A second receiver configured to receive a plurality of PUSCHs, wherein the plurality of PUSCHs are on the same serving cell, each of the plurality of PUSCHs depends on the plurality of signalings, and the plurality of PUSCHs include PUSCHs associated with different coresetPoolIndex values. The first PUCCH overlaps with all of the plurality of PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the plurality of PUSCHs is related to the distribution of the plurality of PUSCHs. The multiplexing relationship between the first UCI and the plurality of PUSCHs is related to whether the earliest PUSCH is present among the plurality of PUSCHs, and if the earliest PUSCH is present among the plurality of PUSCHs, the first UCI is multiplexed on the earliest PUSCH among the plurality of PUSCHs, and if the earliest PUSCH is not present among the plurality of PUSCHs, the first UCI is multiplexed on one of the plurality of PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is the default for the second node.

12. The second node according to claim 11, wherein the expression "the target coresetPoolIndex value is default" means that the target coresetPoolIndex value is 0.

13. The second node according to claim 11 or 12, wherein the plurality of signalings are a plurality of DCIs, and the expression "each of the plurality of PUSCHs depends on each of the plurality of signalings" means that each of the plurality of signalings is used to schedule the plurality of PUSCHs.

14. The second node according to any one of claims 11 to 13, wherein the plurality of PUSCHs include only two PUSCHs.

15. The second node according to any one of claims 11 to 14, wherein the plurality of PUSCHs includes only two PUSCHs, and if the start times of the two PUSCHs among the plurality of PUSCHs are the same, neither of the two PUSCHs is the earliest PUSCH among the plurality of PUSCHs.

16. The second node according to any one of claims 11 to 15, wherein all of the aforementioned PUSCHs are located on a serving cell having the smallest ServCellIndex.

17. The second node according to any one of claims 11 to 16, wherein the first UCI does not include HARQ-ACK information.

18. The multiplexing relationship between the first UCI and the plurality of PUSCH is the first UC The second node according to any one of claims 11 to 17, wherein I refers to which of the plurality of PUCCHs is multiplexed on, and the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH carries the first UCI.

19. The second node according to any one of claims 11 to 18, wherein the coresetPoolIndex value associated with one of the plurality of PUSCHs is the coresetPoolIndex value of a control resource set used to receive DCI used to schedule one of the plurality of PUSCHs.

20. The second node according to any one of claims 11 to 19, wherein the non-periodic CSI is not multiplexed within any of the PUSCHs among the plurality of PUSCHs.

21. A method used for a first node for wireless communication, Receiving multiple signaling signals, The process includes transmitting a plurality of PUSCHs, wherein the plurality of PUSCHs are on the same serving cell, each of the plurality of PUSCHs depends on the plurality of signalings, and the plurality of PUSCHs are associated with different coresetPoolIndex values. The first PUCCH overlaps with all of the plurality of PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the plurality of PUSCHs is related to the distribution of the plurality of PUSCHs. A method by which the multiplexing relationship between the first UCI and the plurality of PUSCHs relates to whether the earliest PUSCH is present among the plurality of PUSCHs, and if the earliest PUSCH is present among the plurality of PUSCHs, the first UCI is multiplexed on the earliest PUSCH among the plurality of PUSCHs, and if the earliest PUSCH is not present among the plurality of PUSCHs, the first UCI is multiplexed on one of the plurality of PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is used for the first node, which is the default.

22. A method used for the first node according to claim 21, wherein the expression "the target coresetPoolIndex value is default" means that the target coresetPoolIndex value is 0.

23. The method used for the first node according to claim 21 or 22, wherein the plurality of signalings are a plurality of DCIs, and the expression "each of the plurality of PUSCHs depends on each of the plurality of signalings" means that each of the plurality of signalings is used to schedule the plurality of PUSCHs.

24. A method used for a first node according to any one of claims 21 to 23, wherein the plurality of PUSCHs include only two PUSCHs.

25. A method used for a first node according to any one of claims 21 to 24, wherein the plurality of PUSCHs include only two PUSCHs, and the start times of the two PUSCHs among the plurality of PUSCHs are the same, and neither of the two PUSCHs is the earliest PUSCH among the plurality of PUSCHs.

26. All of the aforementioned PUSCHs have the smallest ServCellIndex serving A method used for a first node according to any one of claims 21 to 25, which is located on a cell.

27. A method used for the first node according to any one of claims 21 to 26, wherein the first UCI does not include HARQ-ACK information.

28. A method used for a first node according to any one of claims 21 to 27, wherein the multiplexing relationship between the first UCI and the plurality of PUCCHs indicates on which of the plurality of PUCCHs the first UCI is multiplexed, and the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH carries the first UCI.

29. A method used for a first node according to any one of claims 21 to 28, wherein the coresetPoolIndex value associated with one of the plurality of PUSCHs is a coresetPoolIndex value in a control resource set used to receive a DCI used to schedule one of the plurality of PUSCHs.

30. A method for use in a first node according to any one of claims 21 to 29, wherein the non-periodic CSI is not multiplexed within any of the PUSCHs among the plurality of PUSCHs.

31. A method used for a second node for wireless communication, Sending multiple signaling signals, Receiving a plurality of PUSCHs, wherein the plurality of PUSCHs are on the same serving cell, each of the plurality of PUSCHs depends on the plurality of signalings, and the plurality of PUSCHs include PUSCHs associated with different coresetPoolIndex values. The first PUCCH overlaps with all of the plurality of PUSCHs, the first UCI is associated with the first PUCCH, and the multiplexing relationship between the first UCI and the plurality of PUSCHs is related to the distribution of the plurality of PUSCHs. A method by which the multiplexing relationship between the first UCI and the plurality of PUSCHs relates to whether the earliest PUSCH is present among the plurality of PUSCHs, and if the earliest PUSCH is present among the plurality of PUSCHs, the first UCI is multiplexed on the earliest PUSCH among the plurality of PUSCHs, and if the earliest PUSCH is not present among the plurality of PUSCHs, the first UCI is multiplexed on one of the plurality of PUSCHs associated with the target coresetPoolIndex value, and the target coresetPoolIndex value is used for a second node, which is the default.

32. A method used for the second node according to claim 31, wherein the expression "the target coresetPoolIndex value is default" means that the target coresetPoolIndex value is 0.

33. The method used for a second node according to claim 31 or 32, wherein the plurality of signalings are a plurality of DCIs, and the expression "each of the plurality of PUSCHs depends on each of the plurality of signalings" means that each of the plurality of signalings is used to schedule the plurality of PUSCHs.

34. A method used for a second node according to any one of claims 31 to 33, wherein the plurality of PUSCHs include only two PUSCHs.

35. A method for use in a second node according to any one of claims 31 to 34, wherein the plurality of PUSCHs include only two PUSCHs, and the start times of the two PUSCHs among the plurality of PUSCHs are the same, and neither of the two PUSCHs is the earliest PUSCH among the plurality of PUSCHs.

36. A method used for a second node according to any one of claims 31 to 35, wherein all of the aforementioned PUSCHs are located on a serving cell having the smallest ServCellIndex.

37. A method used for a second node according to any one of claims 31 to 36, wherein the first UCI does not include HARQ-ACK information.

38. A method used for a second node according to any one of claims 31 to 37, wherein the multiplexing relationship between the first UCI and the plurality of PUCCHs indicates on which of the plurality of PUCCHs the first UCI is multiplexed, and the expression "the first UCI is associated with the first PUCCH" means that the first PUCCH carries the first UCI.

39. A method used for a second node according to any one of claims 31 to 38, wherein the coresetPoolIndex value associated with one of the plurality of PUSCHs is a coresetPoolIndex value having of a control resource set used to receive a DCI used to schedule one of the plurality of PUSCHs.

40. A method for use in a second node according to any one of claims 31 to 39, wherein the non-periodic CSI is not multiplexed within any of the PUSCHs among the plurality of PUSCHs.