Context-based instrumentation enhancement to improve the performance of computationally guided sampling.
By correlating measurement data with context data to supplement missing information, the method enhances defect prediction accuracy and robustness in wafer inspection, improving wafer yield and throughput in integrated circuit manufacturing.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- ASML NETHERLANDS BV
- Filing Date
- 2024-04-04
- Publication Date
- 2026-06-30
AI Technical Summary
Insufficient and incomplete input data for computational defect probability models in wafer inspection leads to suboptimal accuracy and robustness, impacting wafer yield in high-volume manufacturing of integrated circuits.
A method of correlating measurement data with context data to supplement missing information and train a computational model, enhancing defect prediction accuracy by linking measurement information to contextual information for optimized location selection during inspection.
Improves the accuracy and robustness of defect prediction models, leading to higher wafer yield and throughput by ensuring comprehensive data utilization.
Smart Images

Figure 2026521309000001_ABST
Abstract
Description
Technical Field
[0001] Cross - reference to related applications
[0001] This application claims priority to U.S. Patent Application No. 63 / 464,047, filed on May 4, 2023, which is hereby incorporated by reference in its entirety.
[0002]
[0002] Embodiments provided herein relate to identifying locations on a wafer using a computational model, and more particularly, to correlating measurement data and context data to complement missing measurement data on the wafer to train a computational - guided inspection model and methods for improving model performance.
Background Art
[0003]
[0003] In the manufacturing process of integrated circuits (ICs), incomplete or completed circuit components are inspected to ensure that they are manufactured as designed and free of defects. Inspection systems using charged - particle (e.g., electron) beam microscopes such as scanning electron microscopes (SEM) or optical microscopes can be employed. As the physical size of IC components continues to shrink, accuracy and yield in defect detection become more important. Various measurement tools have been developed and used to confirm whether an IC is manufactured correctly. To improve defect inspection performance, a computational - guided inspection (CGI) machine - learning model can be used to assist the tool by indicating inspection target areas on the wafer.
Summary of the Invention
[0004]
[0004] Embodiments provided herein disclose a method of using a computational model to identify locations on a wafer, and more particularly, a method of correlating wafer data to complement missing measurement data and training a computational model to improve defective die probability modeling.
[0005]
[0005] Some embodiments provide an apparatus for determining locations to scan on a wafer during inspection using a computational defect probability model, which includes a memory for storing a set of instructions and at least one processor configured to execute the set of instructions to cause the apparatus to perform a method for determining locations to scan on a wafer during inspection using a computational defect probability model. The method includes acquiring initial measurement data and initial context data for a plurality of initial wafers; correlating the initial measurement data and initial context data for each of the plurality of initial wafers; correlating subsequent wafers with the plurality of initial wafers based on the context data of subsequent wafers and the initial context data of the plurality of initial wafers; and selecting locations to scan on the subsequent wafers using an inspection tool based on the correlation.
[0006]
[0006] In some embodiments, a non-temporary computer-readable medium is provided which includes a set of instructions executable by one or more processors of a computing device in order to cause the computing device to perform a method for identifying locations to scan on a wafer during inspection. The method includes acquiring initial measurement data and initial context data for a plurality of wafers; correlating the initial measurement data and initial context data for each of the plurality of wafers; using the correlated initial measurement data and initial context data to fill in missing data from the plurality of wafers; and training a computational defect probability model with the filled-in missing data and initial measurement data and initial context data from the plurality of wafers.
[0007]
[0007] Other advantages of the present disclosure should become apparent by reading the following description, which describes specific embodiments of the present disclosure, in conjunction with the accompanying drawings, through the description and examples.
[0008]
[0008] The above and other aspects of this disclosure should become clearer by reading the description of the exemplary embodiments in conjunction with the accompanying drawings. [Brief explanation of the drawing]
[0009] [Figure 1]
[0009] This is a schematic diagram showing an exemplary charged particle beam inspection system consistent with embodiments of the present disclosure. [Figure 2]
[0010] This is a schematic diagram showing an exemplary multi-beam tool that may be part of the exemplary charged particle beam inspection system shown in Figure 1, consistent with embodiments of the present disclosure. [Figure 3]
[0011] This is a schematic block diagram showing the throughput for generating input data, consistent with embodiments of the present disclosure. [Figure 4]
[0012] This is an illustrative block diagram showing the training of a CGI model using the initial training dataset. [Figure 5]
[0013] This is an illustrative diagram showing wafer-lot level downsampling for acquiring input measurement data for a CGI model. [Figure 6]
[0014] This is an exemplary block diagram showing a system for training a computational model, consistent with embodiments of the present disclosure. [Figure 7A]
[0015] This is an illustrative diagram illustrating the complementation of wafer information, consistent with embodiments of the present disclosure. [Figure 7B]
[0015] This is an illustrative diagram of complementing wafer information, consistent with embodiments of the present disclosure. [Figure 8]
[0016] This is an exemplary block diagram showing a system that applies a computational model trained to guide wafer inspection, consistent with embodiments of the present disclosure. [Figure 9]
[0017] This is an exemplary flowchart illustrating a method consistent with embodiments of the present disclosure, for training a CGI model by supplementing missing input data, and for using the CGI model to generate a context-linked model for generating a sampling plan for wafer inspection. [Modes for carrying out the invention]
[0010]
[0018] Herein, exemplary embodiments are described in detail, examples of which are shown in the accompanying drawings. The following description refers to the accompanying drawings, and in the accompanying drawings, unless otherwise noted, the same numbers in different drawings represent the same or similar elements. The implementations described below in the description of exemplary embodiments do not represent all implementations. Rather, they are merely examples of apparatus and methods that correspond to aspects relating to the disclosed embodiments as enumerated in the accompanying claims. For example, some embodiments are described in relation to the use of electron beams, but this disclosure is not so limited. Other types of charged particle beams (including, for example, protons, ions, muons, or any other charge-carrying particles) may be applied as well. Furthermore, other imaging systems such as optical imaging, photon detection, X-ray detection, and ion detection may be used.
[0011]
[0019] Electronic devices consist of circuits formed on a single piece of semiconductor material called a substrate. Semiconductor materials can include, for example, silicon, gallium arsenide, indium phosphide, or silicon germanium. Many circuits can be formed together on the same silicon piece, and these are called integrated circuits or ICs. The size of these circuits has been dramatically reduced so that more circuits can be mounted on the substrate. Improving the computing power of electronic devices while reducing the physical size of the device can be achieved by greatly increasing the mounting density of circuit components such as transistors, capacitors, and diodes on the IC chip. For example, a smartphone IC chip can be about the size of a thumbnail, yet contain more than 2 billion transistors, and the size of each transistor is less than 1 / 1000th the size of a human hair.
[0012]
[0020] ICs can be manufactured using lithography, a manufacturing process that involves creating complex circuit patterns drawn on a mask deposited on a substrate. Lithography can be performed using a lithography apparatus, which is a machine that applies a radiation source (e.g., light or X-rays) onto a target area of the substrate to form a desired pattern. The target area of the substrate may be covered with a pattern device (e.g., a mask) that can be removed or developed after exposure to the radiation source. This process of transferring the desired pattern onto the substrate is called the patterning process. The patterning process may include a patterning step of transferring the pattern from the pattern device (e.g., a mask) onto the substrate. There may also be one or more related pattern processing steps, such as mask development with a developing apparatus, baking of the substrate using a baking tool, etching of the pattern onto the substrate using an etching apparatus, or other chemical and physical processing steps involved in fabricating the pattern onto the substrate. Variations in experimental parameters (e.g., stochastic variations, errors, or noise from inspection or pattern processing tools) can potentially limit lithography implementation or process yield for high-volume production (HVM) of ICs and may result in defects in the IC structure.
[0013]
[0021] In IC manufacturing using lithography equipment, typically many lithographic patterning steps are performed, thereby forming functional features on a continuous layer on a substrate. Therefore, a critical aspect of the lithography equipment's performance is its ability to correctly and accurately position the applied pattern relative to features placed on previous layers. For this purpose, the substrate is provided with one or more sets of alignment marks. Each mark is a structure with a position that can be later measured, for example, using an electron beam inspection tool. Defects can occur if the applied pattern structure or pattern layer is incorrectly positioned relative to the reference marks or if the manufacturing conditions are not optimal. The reference marks or layout define the desired structure, structural dimensions, and distances between IC structures (gates, capacitors, etc.) or wiring. This ensures that IC devices or lines do not interact with each other in undesirable ways. The structural constraints imposed by the reference layout are typically called critical dimensions. The critical dimensions of a circuit can be defined as the minimum width of a line or hole or the minimum distance between two lines or two holes. Therefore, critical dimensions determine the overall size and mounting density of the designed IC. The goal of IC manufacturing is to faithfully reproduce the original IC design on the circuit board. If errors occur during manufacturing, such as the created IC design pattern not conforming to the reference design, this can lead to defects in the IC structure and render the IC inoperable.
[0014]
[0022] Manufacturing these ICs, which have extremely small structures or components, is a complex, time-consuming, and costly process that often involves hundreds of individual steps. Even a single error in one step can dramatically impact the functionality of the final product. A single "killer defect" can cause device failure. The goal of the manufacturing process is to improve the overall yield of the process. For example, to achieve a 75% yield for a 50-step process, the yield of each individual step must be over 99.4%, while if the yield of individual steps is 95%, the overall process yield drops to 7%.
[0015]
[0023] In an IC chip manufacturing facility, a high process yield is desirable, but it is also essential to maintain a high wafer throughput, which is defined as the number of wafers processed per hour. In particular, when operator intervention is required to identify defects, the presence of defects can affect the high process yield and high wafer throughput. Therefore, high-throughput detection and identification of micro- and nano-sized defects are desirable. One factor in improving process yield and wafer throughput can be to monitor the IC manufacturing process to ensure that the desired number of defect-free ICs are produced. One way to monitor the manufacturing process is to inspect the chip circuit structure at various manufacturing stages. To achieve this, inspections using tools such as charged particle beam inspection tools can be used to maintain a high process yield and high wafer throughput. Inspection of a wafer using an electron beam inspection tool can generate an image of the wafer to measure the IC structure dimensions. The measured dimensions can be compared to a defect-free reference structure to determine the presence of defects in the imaged structure. If there are defects in the structure, the manufacturing process can be adjusted to reduce the likelihood of the defects recurring. However, since a wafer can contain billions of IC structures, inspection of the ICs for defect detection is often a time-consuming process and there may be cases where the wafer is not inspected at the correct location to identify the defects. 【001(6)】
[0024] Computationally Inductive Inspection (CGI) processes guide inspection tools to locations on the wafer where defects are most likely to occur. Machine learning-based CGI models receive input from various data sources, such as wafer characteristic data (which may include scanner data, measurement data, and fabrication process data), and train the model using inspection results. Because a CGI machine learning model is built and can be used to output a sampling plan indicating locations on the wafer where defects are most likely to have formed after a wafer processing step, the inspection tool performs inspections more efficiently than navigating to sampling locations and inspecting wafer locations based on experience (e.g., history of previous defects detected during scanning). The CGI process is performed along with wafer fabrication, increasing the efficiency of the inspection tool by improving the accuracy of detecting defects on the wafer with a capture rate higher than baseline values. Inspection results can be used to ensure satisfactory wafer yield is maintained throughout the manufacturing process and to predict the defect rate or die loss per wafer at the end of manufacturing. This predicted defect rate can be compared to the results of wafer probe testing, which determines the defect rate for each die fabricated on the wafer. The final metric for the use case of the CGI model is the R ratio between the estimated die defects and the measured die defects of the wafer. 2 It could be a correlation score.
[0017]
[0025] A CGI model can be applied to characteristic wafer data to estimate the defect probability of each die on the wafer. Then, a sampling plan optimizer or a sampling plan generator aggregates the estimated defective die probabilities for each die on the wafer to generate a defective die probability map or a sampling plan. The sampling plan can be generated according to input information that defines a predetermined wafer area definition and a sampling budget per wafer area. Then, the sampling plan can be used to direct an inspection tool (e.g., a scanning electron microscope, SEM or an optical tool) to an area on the wafer that has a set number of dies to be inspected as the sampling plan has (e.g., the sampling budget). The inspection results obtained through the sampling plan indicate the actual number of defective dies that exist, and the inspection results can then be used to predict the estimated die loss of the wafer. Therefore, the sampling plan generated by the CGI used to direct the inspection can be called a "validated sampling plan". The R for the defective die prediction provided by the CGI model sampling plan 2 The correlation score can be determined by collecting the "ground truth" results of the wafer. The "ground truth" results indicate the actual defective die results of the wafer at the end of production and correspond to the probe test results of the fully completed wafer. Therefore, the probe test results provide an accurate identification of the defects for each die on the wafer. The final metric of the CGI model is the correlation R 2 score between the expected estimated die loss determined by the CGI model and the actual die loss determined by the probe test results.
[0018]
[0026] Generally, wafers selected for acquiring measurement information during HVM are downsampled at the wafer / batch level. In other words, only a few wafers out of a batch of 25 wafers may be measured for acquisition of measurement data after each processing step. Therefore, the measurement data available as input data for the CGI model may be sparse. More importantly, there is no guarantee that the same wafer will be sampled for measurement after different processing steps in HVM. Thus, measurement information for different wafers at all processing steps during wafer fabrication may be missing to varying degrees. As a result, the input dataset available for training the CGI model may be insufficient or incomplete. This can negatively impact the accuracy and robustness of the CGI defect location prediction model and may result in suboptimal wafer yield in HVM.
[0019]
[0027] Embodiments of this disclosure may provide methods for supplementing input data of a CGI model and improving defect prediction accuracy. In some embodiments, this disclosure may provide methods for supplementing missing measurement information. In some embodiments, this disclosure may provide methods for linking measurement information to contextual information for supplementation. In some embodiments, wafers without available measurement data can be correlated with wafers that have available measurement data, and the correlated data can be used to optimize location selection for guiding inspection tools. Therefore, R 2 The correlation score may improve.
[0020]
[0028] The relative dimensions of components in the drawings may be exaggerated for clarity. In the following description of the drawings, the same or similar reference numerals refer to the same or similar components or entities, and only the differences relating to individual embodiments are described. Where used herein, unless otherwise specified, the term “or” encompasses all possible combinations unless impossible. For example, if it is stated that a component may include A or B, then unless otherwise specified or impossible, the component may include A or B or A and B. As a second example, if it is stated that a component may include A, B, or C, then unless otherwise specified or impossible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A, and B, and C.
[0021]
[0029] Figure 1 shows an exemplary electron beam inspection (EBI) system 100 consistent with embodiments of the present disclosure. The EBI system 100 may be used for imaging. As shown in Figure 1, the EBI system 100 includes a main chamber 101, a load / lock chamber 102, a beam tool 104, and an instrument front-end module (EFEM) 106. The beam tool 104 is located within the main chamber 101. The EFEM 106 includes a first loading port 106a and a second loading port 106b. The EFEM 106 may include additional loading ports. The first loading port 106a and the second loading port 106b receive wafer front-opening integrated pods (FOUPs) containing wafers (e.g., semiconductor wafers or wafers made of other materials) or samples to be inspected (wafers and samples may be used interchangeably). A “lot” is a group of wafers that may be loaded for wafer processing as a batch.
[0022]
[0030] One or more robotic arms (not shown) of the EFEM106 may transfer wafers to the load / lock chamber 102. The load / lock chamber 102 is connected to a load / lock vacuum pump system (not shown) that removes gas molecules from within the load / lock chamber 102 to reach a first pressure below atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transfer wafers from the load / lock chamber 102 to the main chamber 101. The main chamber 101 is connected to a main chamber vacuum pump system (not shown) that removes gas molecules from within the main chamber 101 to reach a second pressure below the first pressure. After reaching the second pressure, the wafers are inspected by a beam tool 104. The beam tool 104 may be a single-beam system or a multi-beam system.
[0023]
[0031] The controller 109 is electronically connected to the beam tool 104. The controller 109 may be a computer configured to perform various controls of the EBI system 100. In Figure 1, the controller 109 is shown outside the structure, which includes the main chamber 101, load / lock chamber 102, and EFEM 106, but it should be understood that the controller 109 may be part of the structure.
[0024]
[0032] In some embodiments, the controller 109 may include one or more processors (not shown). A processor may be a general-purpose or dedicated electronic device capable of manipulating or processing information. For example, a processor may include any number of central processing units (or "CPUs"), graphics processing units (or "GPUs"), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), generic array logic (GALs), composite programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), systems-on-a-chip (SoCs), application-specific integrated circuits (ASICs), and any combination of any type of circuitry capable of data processing. A processor may also be a virtual processor, comprising one or more processors distributed across multiple machines or devices connected via a network.
[0025]
[0033] In some embodiments, the controller 109 may further include one or more memories (not shown). The memories may be general-purpose or dedicated electronic devices capable of storing code and data accessible by the processor (e.g., via a bus). For example, the memories may include any number of random-access memories (RAM), read-only memories (ROM), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, memory sticks, compact flash (CF) cards, or any combination of any type of storage device. The code and data may include an operating system (OS) and one or more application programs (or "apps") for a particular task. The memories may also be virtual memories, including one or more memories distributed across multiple machines or devices connected via a network.
[0026]
[0034] Figure 2 shows a schematic diagram of an exemplary multibeam tool 104 (also referred to herein as apparatus 104) and an image processing system 290 that may be configured for use in an EBI system 100 (Figure 1) consistent with embodiments of the present disclosure.
[0027]
[0035] The beam tool 104 includes a charged particle source 202, a gun aperture 204, a focusing lens 206, a primary charged particle beam 210 emitted from the charged particle source 202, a radiation source conversion unit 212, a plurality of beamlets 214, 216, and 218 of the primary charged particle beam 210, a primary projection optical system 220, an electric wafer stage 280, a wafer holder 282, a plurality of secondary charged particle beams 236, 238, and 240, a secondary optical system 242, and a charged particle detection device 244. The primary projection optical system 220 may include a beam separator 222, a deflection scanning unit 226, and an objective lens 228. The charged particle detection device 244 may include detection sub-regions 246, 248, and 250.
[0028]
[0036] The charged particle source 202, gun aperture 204, focusing lens 206, radiation source conversion unit 212, beam separator 222, deflection scanning unit 226, and objective lens 228 can be aligned with the primary optical axis 260 of the device 104. The secondary optical system 242 and charged particle detection device 244 can be aligned with the secondary optical axis 252 of the device 104.
[0029]
[0037] The charged particle source 202 may emit one or more charged particles, such as electrons, protons, ions, muons, or any other charge-carrying particles. In some embodiments, the charged particle source 202 may be an electron emission source. For example, the charged particle source 202 may include a cathode, an extractor, or an anode, and primary electrons may be emitted from the cathode and extracted or accelerated to form a primary charged particle beam 210 (in this case, a primary electron beam) together with a (virtual or real) crossover 208. For the sake of ease of explanation without causing ambiguity, electrons are used as an example in some parts of this description. However, it should be noted that any charged particle, not limited to electrons, may be used in any embodiment of this disclosure. The primary charged particle beam 210 may be visualized when it is being emitted from the crossover 208. The gun aperture 204 can block surrounding charged particles of the primary charged particle beam 210 to reduce the Coulomb effect. The Coulomb effect may cause an increase in the size of the probe spot.
[0030]
[0038] The radiation source conversion unit 212 may include an array of image-forming elements and an array of beam-limiting apertures. The array of image-forming elements may include an array of micro-deflectors or microlenses. The array of image-forming elements can form multiple (virtual or real) parallel images of the crossover 208 together with multiple beamlets 214, 216, and 218 of the primary charged particle beam 210. The array of beam-limiting apertures can limit multiple beamlets 214, 216, and 218. Three beamlets 214, 216, and 218 are shown in Figure 2, but embodiments of the present disclosure are not so limited. For example, in some embodiments, the apparatus 104 may be configured to generate a first number of beamlets. In some embodiments, the first number of beamlets may be in the range of 1 to 1000. In some embodiments, the first number of beamlets may be in the range of 200 to 500. In an exemplary embodiment, the apparatus 104 may generate 400 beamlets.
[0031]
[0039] The focusing lens 206 can focus the primary charged particle beam 210. The currents in the beamlets 214, 216, and 218 downstream of the radiation source conversion unit 212 can be changed by adjusting the focusing force of the focusing lens 206 or by changing the radius size of the corresponding beam limiting aperture in the beam limiting aperture array. The objective lens 228 can focus the beamlets 214, 216, and 218 onto the wafer 230 for imaging, and can form a plurality of probe spots 270, 272, and 274 on the surface of the wafer 230.
[0032]
[0040] The beam separator 222 may be a Wien filter type beam separator that generates electrostatic and magnetic dipole fields. In some embodiments, when these are applied, the force exerted by the electrostatic dipole field on the charged particles (e.g., electrons) of the beamlets 214, 216, and 218 may be substantially equal in magnitude and opposite in direction to the force exerted by the magnetic dipole field on the charged particles. Thus, the beamlets 214, 216, and 218 can pass through the beam separator 222 in a straight line with zero deflection angle. However, the total variance of the beamlets 214, 216, and 218 generated by the beam separator 222 may not be zero. The beam separator 222 can separate the secondary charged particle beams 236, 238, and 240 from the beamlets 214, 216, and 218 and guide the secondary charged particle beams 236, 238, and 240 into the secondary optical system 242.
[0033]
[0041] The deflection scanning unit 226 can deflect beamlets 214, 216, and 218 to scan probe spots 270, 272, and 274 on the surface area of wafer 230. In response to the incidence of beamlets 214, 216, and 218 at probe spots 270, 272, and 274, secondary charged particle beams 236, 238, and 240 can be emitted from wafer 230. The secondary charged particle beams 236, 238, and 240 may contain charged particles (e.g., electrons) having an energy distribution. For example, the secondary charged particle beams 236, 238, and 240 may be secondary electron beams containing secondary electrons (energy ≤ 50 eV) and backscattered electrons (energy between 50 eV and the incident energies of beamlets 214, 216, and 218). The secondary optical system 242 can focus the secondary charged particle beams 236, 238, and 240 onto the detection subregions 246, 248, and 250 of the charged particle detection device 244. The detection subregions 246, 248, and 250 may be configured to detect the corresponding secondary charged particle beams 236, 238, and 240 and generate corresponding signals (e.g., voltage, current, etc.) used to reconstruct an SCPM image of the structure on or beneath the surface area of the wafer 230.
[0034]
[0042] The generated signals may represent the intensities of the secondary charged particle beams 236, 238, and 240 and may be provided to an image processing system 290 that communicates with a charged particle detection device 244, a primary projection optical system 220, and an electric wafer stage 280. The movement speed of the electric wafer stage 280 may be synchronized and adjusted with the beam deflection controlled by a deflection scanning unit 226 so that the movement of the scanning probe spots (e.g., scanning probe spots 270, 272, and 274) covers the area of interest on the wafer 230 in an orderly manner. Such synchronization and adjustment parameters may be adjusted to suit wafers 230 of different materials. For example, wafers 230 of different materials may have different resistive-capacitive characteristics that can result in different signal sensitivities to the movement of the scanning probe spots.
[0035]
[0043] The intensities of the secondary charged particle beams 236, 238, and 240 may vary depending on the external or internal structure of the wafer 230, and thus may indicate whether or not the wafer 230 contains defects. Furthermore, as described above, the beamlets 214, 216, and 218 may be projected onto different locations on the upper surface of the wafer 230 or onto different sides of the local structure of the wafer 230 to generate secondary charged particle beams 236, 238, and 240 which may have different intensities. Therefore, by mapping the intensities of the secondary charged particle beams 236, 238, and 240 to areas of the wafer 230, the image processing system 290 may reconstruct an image that reflects the characteristics of the internal or external structure of the wafer 230.
[0036]
[0044] In some embodiments, the image processing system 290 may include an image acquirer 292, storage 294, and a controller 296. The image acquirer 292 may include one or more processors. For example, the image acquirer 292 may include a computer, server, mainframe host, terminal, personal computer, any kind of mobile computing device, or a combination thereof. The image acquirer 292 may be communicatively coupled to the charged particle detection device 244 of the beam tool 104 via a medium such as a conductor, fiber optic cable, portable storage medium, IR, Bluetooth, the internet, wireless network, radio, or a combination thereof. In some embodiments, the image acquirer 292 may receive signals from the charged particle detection device 244 and construct an image. In this way, the image acquirer 292 may acquire an SCPM image of the wafer 230. The image acquirer 292 may also perform various post-processing functions, such as generating contours and superimposing indicators on the acquired image. The image acquirer 292 may be configured to perform adjustments such as brightness and contrast of the acquired image. In some embodiments, the storage 294 may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), or other types of computer-readable memory. The storage 294 may be coupled to the image acquirer 292 and used to store scanned raw image data as the original image and to store the post-processed image. The image acquirer 292 and the storage 294 may be connected to a controller 296. In some embodiments, the image acquirer 292, the storage 294, and the controller 296 may be integrated as a single control unit.
[0037]
[0045] In some embodiments, the image acquisition device 292 may acquire one or more SCPM images of the wafer based on imaging signals received from the charged particle detection device 244. The imaging signals may correspond to scanning operations for charged particle imaging. The acquired image may be a single image containing multiple imaging areas. This single image may be stored in storage 294. This single image may be a source image that can be divided into multiple regions. Each of those regions may contain one imaging area containing features of the wafer 230. The acquired image may contain multiple images of a single imaging area of the wafer 230 sampled multiple times over time. These multiple images may be stored in storage 294. In some embodiments, the image processing system 290 may be configured to perform image processing steps using multiple images of the same location on the wafer 230.
[0038]
[0046] In some embodiments, the image processing system 290 may include a measurement circuit (e.g., an analog-to-digital converter) for obtaining the distribution of detected secondary charged particles (e.g., secondary electrons). The distribution data of charged particles collected during the detection time window can be used in combination with the corresponding scan path data of beamlets 214, 216, and 218 incident on the wafer surface to reconstruct an image of the wafer structure under inspection. The reconstructed image can be used to reveal various features of the internal or external structure of the wafer 230, thereby revealing any defects that may be present in the wafer.
[0039]
[0047] In some embodiments, the charged particles can be electrons. When electrons from the primary charged particle beam 210 are projected onto the surface of the wafer 230 (e.g., probe spots 270, 272, and 274), the electrons from the primary charged particle beam 210 can interact with the particles of the wafer 230 and penetrate the surface of the wafer 230 to a certain depth. Some electrons from the primary charged particle beam 210 may interact elastically with the material of the wafer 230 (e.g., in the form of elastic scattering or collision) and be reflected or bounced back from the surface of the wafer 230. Elastic interactions conserve the total kinetic energy of the interacting objects (e.g., electrons from the primary charged particle beam 210), and the kinetic energy of the interacting objects is not converted into other forms of energy (e.g., heat, electromagnetic energy, etc.). Reflected electrons resulting from such elastic interactions may be called backscattered electrons (BSEs). Some electrons from the primary charged particle beam 210 may interact inelastically with the material of the wafer 230 (e.g., in the form of inelastic scattering or collision). Inelastic interactions do not conserve the total kinetic energy of the interacting objects; rather, some or all of the kinetic energy of the interacting objects is converted into other forms of energy. For example, inelastic interactions can cause the kinetic energy of some electrons in the primary charged particle beam 210 to cause electronic excitation and transitions of atoms in the material. Such inelastic interactions can also generate electrons that emanate from the surface of the wafer 230, which may be called secondary electrons (SE). The yield or emission rate of BSE and Se depends, among other things, on the material being inspected and the incident energy of the electrons in the primary charged particle beam 210 incident on the surface of the material. The energy of the electrons in the primary charged particle beam 210 may be partially imparted by its accelerating voltage (e.g., the accelerating voltage between the anode and cathode of the charged particle source 202 in Figure 2). The amount of BSE and Se may be greater than or less than (and may even be the same as) the amount of electrons injected by the primary charged particle beam 210.
[0040]
[0048] Images generated by SCPM can be used for defect inspection. For example, a generated image capturing a test device area on a wafer can be compared to a reference image capturing the same test device area. The reference image may be predetermined (e.g., by simulation) and may not contain known defects. If the difference between the generated image and the reference image exceeds an acceptable level, a potential defect may be identified. As another example, SCPM may scan multiple areas of a wafer, each containing a test device area designed similarly, and generate multiple images capturing those test device areas during manufacturing. These multiple images can be compared to each other. If the difference between the multiple images exceeds an acceptable level, a potential defect may be identified.
[0041]
[0049] While this disclosure may refer to ICs, it should be understood that this disclosure may be applicable to other possible applications or designs. For example, this disclosure may be applicable to integrated optical systems, magnetic domain memories, liquid crystal display panels, thin-film magnetic heads, and other nanoscale structures. It should be further understood that the terms “die,” “structure,” and “IC structure” are used interchangeably in this disclosure.
[0042]
[0050] Referring now to Figure 3, which is an exemplary block diagram for generating input data consistent with embodiments of the present disclosure. The input data may be generated using two steps, as shown in Figure 3. A lithography projection apparatus 301 may be used to fabricate a wafer under certain fabrication conditions (e.g., the focus and dose of the radiation source). An inspection tool 302 (e.g., the EBI system 100 in Figure 1 or the multibeam tool 104 in Figure 2) may be used to measure measurement information of structures formed on the wafer produced by the lithography projection apparatus 301. Measurement information may include, but is not limited to, necking, line pullback, thinning, critical dimensions, edge placement, overlap, resist top loss, resist undercut, missing defects, and bridge defects in IC structures on the wafer. A processor 303 having memory (e.g., the controller 109 in Figure 1) may be communicatively connected to the inspection tool 302 to store the measured measurement information.
[0043]
[0051] Images generated by the inspection tool 302 can be used for wafer inspection. For example, a generated image capturing a test device area of a wafer can be compared with a reference image capturing the same test device area. The reference image may be predetermined (e.g., by simulation) and may not contain known defects. If the difference between the generated image and the reference image exceeds an acceptable level, a potential defect may be identified. As another example, the inspection tool 302 may scan multiple areas of a wafer, each containing a test device area designed similarly, and generate multiple images capturing those test device areas during manufacturing. The multiple images can be compared with each other. If the differences between the multiple images exceed an acceptable level, a potential defect may be identified.
[0044]
[0052] In some embodiments, the processor 303 may be a general-purpose or dedicated electronic device capable of manipulating or processing information. For example, the processor 303 may include any number of central processing units (or "CPUs"), graphics processing units (or "GPUs"), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), generic array logic (GALs), composite programmable logic devices (CPLDs), field-programmable gate arrays (FPGAs), systems-on-a-chip (SoCs), application-specific integrated circuits (ASICs), and any combination of any type of circuitry capable of data processing. The processor 303 may also be a virtual processor comprising one or more processors distributed across multiple machines or devices connected via a network.
[0045]
[0053] In some embodiments, the processor 303 may further include one or more memories (not shown). The memories may be general-purpose or dedicated electronic devices capable of storing code and data accessible by the processor (e.g., via a bus). For example, the memories may include any number of random-access memories (RAM), read-only memories (ROM), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, memory sticks, compact flash (CF) cards, or any combination of any type of storage device. The code and data may include an operating system (OS) and one or more application programs (or "apps") for a particular task. The memories may also be virtual memories, including one or more memories distributed across multiple machines or devices connected via a network.
[0046]
[0054] Conventional computationally guided inspection (CGI) processes guide inspection tools to locations on the wafer where defects are most likely to occur. As mentioned above, machine learning-based CGI models receive input from various data sources, including wafer characteristic data (such as scanner data, measurement data, and fabrication process data), and train the model using inspection results. Since a CGI machine learning model can be built and used to output sampling locations on the wafer, the inspection tool can perform inspections more efficiently than by moving to the sampling locations and inspecting the wafer locations based on experience (e.g., history of previous defects detected at a given location during scanning). Therefore, the CGI model can use input data from a reference wafer (e.g., reference patterns from fabrication or wafer processing steps, measurement information, etc.) to guide future inspections of wafers processed during HVM. The CGI model improves the efficiency of the inspection tool by increasing the accuracy of detecting defects on the wafer with a capture rate higher than the baseline value. However, for effective and accurate defect prediction capabilities, the CGI model requires a complete set of wafer input data, which may include measurement information after each processing step of the wafer. As mentioned above, with conventional lot / wafer-level wafer downsampling, the amount of measurement data collected for a wafer may be insufficient to feed into and train a CGI model.
[0047]
[0055] Figure 4 is an exemplary block diagram showing the training of CGI model 401 using an initial training dataset, consistent with various embodiments of the present disclosure. CGI model 401 may need to be trained using an initial training dataset 405 before it can be used to generate predictions about wafers. The initial training dataset 405 may be a labeled dataset containing process-related data 410a-n and inspection results 415a-n for n substrates. For example, for wafer "A", the initial training dataset 405 may include process-related data 410a and inspection results 415a associated with substrate "A". Process-related data 410a may include measurement data as described above or other such data that may contribute to defects. Inspection results 415a may include an image of the inspected location (e.g., SEM image), location information of the inspected location (e.g., (x,y) coordinates), and whether the location was found to be defective or not. Labeled datasets can be obtained from various sources, including the lithography projection apparatus 301 and inspection tool 302 shown in Figure 3.
[0048]
[0056] The CGI model 401 may include a location prediction model 450 and a confidence model 455, both of which may be machine learning models. Training of the CGI model 401 may be an iterative process, in which each iteration may include analyzing process-related data 410 associated with a wafer, determining a cost function, and updating the configuration of the CGI model 401 based on the cost function. The CGI model 401 may be trained in a "batch" manner rather than as an iterative process. For example, a training dataset 405 having process-related data 410a~n and inspection results 415a~n for "n" substrates may be input all at once. After inputting the process-related data 410a and inspection results 415a, the location prediction model 450 generates predictions 425a1~425ax for "x" locations on wafer "A", and the confidence model 455 assigns confidence scores 430a1~430ax to the predictions 425a1~425ax, respectively. Next, the CGI model 401 compares the prediction results with the inspection results 415a to determine a cost function 460 for the CGI model 401 that can show the deviation between the prediction results 425a1-425ax and the actual inspection results 415a. Based on the cost function 460 or other reference feedback information (e.g., user-instructed accuracy, reference labels, or other information), the CGI model 401 can update its configuration (e.g., weights, biases, or other parameters of the location prediction model 450 or confidence model 455) to minimize the cost function 460. The above process is repeated iteratively with process-related data and inspection results associated with different substrates in each iteration until a termination condition is met. The termination condition may include a predetermined number of iterations, the cost function meeting a specified threshold, or other such conditions. After the termination condition is met, the CGI model 401 may be considered "trained" and can be used to identify or predict the location of defects in new wafers (e.g., wafers that have not yet been analyzed using the CGI model 401).
[0049]
[0057] Referring now to Figure 5, which is an exemplary diagram showing lot / wafer-level downsampling for acquiring input measurement data for a CGI model. Figure 5 shows an exemplary batch of wafers processed in HVM according to wafer processing steps 501, 502, and 503. Each wafer processing step may correspond to measurements applied to wafers A, B, C, D, and E, respectively. For example, wafer processing step 501 may be a deposition step, wafer processing step 502 may be a lithography step, and wafer processing step 503 may be an etching step. Solid bold outlines represent wafers selected for measurement after a wafer processing step, and dotted outlines represent wafers not selected for measurement after a wafer processing step. For example, wafer A is selected for measurement after wafer processing steps 501 and 503. Therefore, while measurement information corresponding to wafer processing steps 501 and 503 is available for wafer A, measurement information corresponding to wafer processing step 502 is not available. As a result, the input data for wafer A may not be supplied to the CGI model because the input dataset (e.g., measurement information) for wafer A is incomplete or insufficient. As shown in Figure 5, none of wafers A through E have measurements for all wafer processing steps. Therefore, according to conventional methods, none of wafers A through E in a batch may contain a dataset of measurement information sufficient to train the CGI model and subsequently generate a sampling plan to guide wafer inspection.
[0050]
[0058] Embodiments of this disclosure may provide a method for supplementing missing measurement information for a CGI model and filling gaps in input data. As shown in Figure 5, downsampling at the lot / wafer level may result in missing measurement information available to the CGI model. Embodiments of this disclosure may utilize wafer fabrication context information available for each wafer processed during wafer processing. "Fabrication context information" or "context information" may refer to the fabrication or processing information for each wafer in the HVM. Each piece of equipment or apparatus used during wafer processing (e.g., lithography projection apparatus 301 in Figure 3) has a log of information regarding the parameters and logistics used to process each wafer. For example, wafer A in Figure 5 may be processed in wafer processing step 501 according to a context ID (e.g., tool ID or chamber ID) and process settings (e.g., temperature, pressure, gas mixing ratio, etc.) and may be processed in wafer processing step 502 according to the context ID and process settings. All such context information is available in a fabrication database for each wafer processed in the HVM, and the fabrication database may be provided to the CGI model. The CGI model can communicate with the fabrication database, contextual information can be queried and supplied to the CGI model platform, and then linked with available measurement information about the wafer. The CGI model can be connected to the fabrication database via media such as conductors, fiber optic cables, portable storage media, IR, Bluetooth, the internet, wireless networks, or wireless.
[0051]
[0059] Referring now to Figure 6, which is an exemplary block diagram showing a system 600 having various modules that can generate a context-measured fingerprint database and train a computational model, consistent with embodiments of the present disclosure. The modules in system 600 in Figure 6 may be applied via controller 109 in Figure 1, controller 290 in Figure 2, or processor 303 in Figure 3. The context-measured fingerprint database may store linked context information and measurement information about wafers processed during HVM. The fingerprint database shown in Figure 6 may also be called a fingerprint library. The computational model may be a CGI model.
[0052]
[0060] The CGI model may obtain input measurement information 601 from measurement tools. Input measurement information 601 may be obtained from different types of measurement tools. Exemplary measurement tools may include, but are not limited to, scantometry tools or inspection tools (e.g., beam tool 104 in Figure 1 or inspection tool 302 in Figure 3). Input measurement information 601 may be images collected for wafers or batches of wafers processed according to the wafer processing steps (e.g., wafers A-E after wafer processing step 501 in Figure 5). The images may contain available measurement information for the wafers after the wafer processing steps. The CGI model may also obtain input context information 602 from the manufacturing database. Input context information 602 may correspond to tool ID / routing information and / or manufacturing conditions or parameters applicable to wafers or batches of wafers when processed according to the wafer processing steps. It should be understood that input context information 602 is available in the manufacturing database for all wafers processed according to the wafer processing in HVM. The input measurement information 601 and input context information 602 may be supplied to the context linker 603, in which the CGI model evaluates the input measurement information 601 of the processed wafer or batch of wafers according to the input context information 602.
[0053]
[0061] The context linker 603 may identify the average fingerprint in the input measurement information 601, which is a feature of the input context information 602, through data mapping. For example, the input measurement information 601 may be an image of a batch of wafers after an etching step. Correspondingly, the input context information 602 may be the tool ID or process parameters of the etching chamber on the etching apparatus (where the batch of wafers was processed during the etching step). The context linker 603 may identify the average context variables of the etching chamber, which may directly lead to the results of the input measurement information 601. Thus, the context linker 603 outputs a model that links the input context information 602 to the measurement or inspection results in the input measurement information 601. The context linker 603 may output a context link model 604 for each type of measurement information available for a wafer (e.g., etching, CD, overlay, etc.). For each type of measurement information available for a batch of wafers processed according to the wafer processing, a context link model can be generated to create a library of context link models that link specific measurement results to wafer processing steps in the HVM. If context information of a wafer processed according to the processing steps is known, the context link model previously generated by the context linker 603 can be applied to supplement missing measurement results for the wafer.
[0054]
[0062] To perform the completion, the measurement completion unit 605 reads the input measurement information 601 or input context information 602 and applies the corresponding context link model 604 from the generated context link model library. The measurement completion unit 605 may perform exemplary completion 605_1 to complete missing information (e.g., measurement information) in the wafer dataset. As shown in exemplary completion 605_1, dotted circles represent wafers with missing information (e.g., measurement information), and solid circles represent wafers with available information (e.g., measurement information and context information). The measurement completion unit 605 may perform exemplary completion 605_1 by reading the available information (e.g., input context information 602) for wafers represented by dotted circles and applying the corresponding context link model (e.g., context link model 604) to complete the missing information (e.g., input measurement information 601). The measurement completion unit 605 then supplies the completed wafer dataset to the computation model 606. The complementary dataset supplied by the instrumental complementor 605 can be used to train the computational model 606. Therefore, the complementary dataset can be called the training dataset. The training computational model 606 may be as described above with respect to Figure 4.
[0055]
[0063] The input measurement information 601 may optionally be processed before being provided to the context linker 603 via the fingerprint summary 601_1. The input measurement information 601 may contain excessive high-frequency noise that may not be relevant to the context information 602. The fingerprint summary 601_1 is a technique for reducing noise in the input measurement information 601, filtering out high-frequency noise or random variations (e.g., inter-wafer variations in a batch of wafers) from the input measurement information 601, while preserving systematic context-induced variations in the input measurement information 601. Non-limiting examples of the fingerprint summary 601_1 include principal component analysis (PCA), factor analysis, wafer map modeling using Zernike polynomials, edge model analysis, or other dimensionality reduction methods for reducing high-frequency noise or random variations in the data.
[0056]
[0064] Referring now to Figure 7A, which is an exemplary diagram that complements the measurement information of wafers that were not measured after the wafer processing step, consistent with embodiments of the present disclosure. Circles, squares, and triangles with solid outlines represent wafers that have been processed and measured (e.g., available measurement information) in a particular wafer processing step or processing apparatus (e.g., context information). For example, wafers 701 and 702 may be processed according to an etching step, wafers 703 and 704 may be processed according to a deposition step, wafers 705 and 706 may be processed according to an overlay step, and measurement information may be available for wafers 701-706. A context-averaged fingerprint or context-link model may be calculated for each set of wafers, as described above in Figure 6. Next, a measurement complement (e.g., measurement complement 605 in Figure 6) applies a context-averaged fingerprint 707 to wafer 708, which was processed according to the same processing steps as wafers 701 and 702 but was not measured (e.g., measurement information is unavailable), to complement the measurement information of the “missing” wafer 708. The measurement complement may also complement the measurement information of the “missing” wafers 710 and 712 by applying a context-averaged fingerprint 709 to wafer 710 and a context-averaged fingerprint 711 to wafer 712, respectively. The process shown in Figure 7A may be called “context-based complementation”. The complemented measurement information for the “missing” wafers 708, 710, and 712, as well as the measurement information for wafers 701-706, can then be provided to the CGI model as a training dataset. The CGI model can then apply interpolation to subsequent wafers not measured during HVM to generate a sampling plan for guiding wafer inspection using the constructed context-linked model. Wafers 701-706 may also represent wafers fabricated according to different process settings. For example, wafers 701 and 702 may be fabricated in wafer processing step 701 with different continuous variables such as temperature, pressure, gas mixing ratio, or other parameters.Wafers 703 and 704 may be fabricated in wafer processing step 702 at different temperatures, pressures, gas mixtures, or other continuous variables. The CGI model may apply context-based interpolation, as shown in Figure 7A, to supplement the missing measurement information for wafers 708, 710, and 712, according to the contextual average of such process settings available for wafers 701-706.
[0057]
[0065] Referring now to Figure 7B, which is an exemplary diagram illustrating the use of global completion to complete missing wafer information, consistent with embodiments of the present disclosure. In some embodiments, wafers used to train a CGI model may lack measurement information and may have new contextual information. For example, a “missing” wafer 714 (e.g., no measurement information) may have been processed by a different processing chamber than wafers 701-706. Since the contextual information of wafer 714 was not used to build the contextual measurement fingerprint database, the contextual average fingerprint may not be used to complete the missing measurement information for the “missing” wafer 714. Therefore, a global average fingerprint 713 may be calculated for all wafers 701-706 and used to complete the measurement information for the “missing” wafer 714. In some embodiments, wafer 714 may lack measurement information and contextual information may be missing from the manufacturing database (e.g., the manufacturing database described above). Therefore, the context-average fingerprint may not be used to supplement the missing measurement information of wafer 714, which is "missing." Instead, the global average fingerprint 713 of all wafers 701-706 may be calculated and used to supplement the missing measurement information of wafer 714, which is "missing."
[0058]
[0066] Referring now to Figure 8, which is an exemplary block diagram showing a system 800 that applies a trained computational model consistent with embodiments of the present disclosure to generate a wafer sampling plan and guide wafer inspection. As shown in Figure 8, wafer input information 801 may be supplied to a measurement complement 605.
[0059]
[0067] The wafer input information 801 may include wafer measurement information or context information not used in the training dataset in Figure 6, and the wafer input information 801 may be incomplete (e.g., missing measurement information). The context link model 604 may also be supplied to the measurement complement 605, which may complement the complete wafer input information 802. As described above, the context link model 604 may identify the corresponding context information of the wafer input information 801, and the measurement complement 605 may complement the missing information (e.g., missing measurement information) from the wafer input information 801. The complete wafer input information 802 may then be supplied to the trained computation model 803, which may use the complete wafer input information 802 to determine the dead die probability for each die of the wafer. Next, a sampling plan 804 is generated and supplied to an inspection tool 805 (e.g., the EBI system in Figure 1, the multibeam tool 104 in Figure 2, and the inspection tool 302 in Figure 3) to guide wafer inspection of the wafer.
[0060]
[0068] Referring now to Figure 9, Figure 9 is an exemplary flowchart illustrating a method 900 that generates a context-linked model for generating a sampling plan for wafer inspection using a CGI model, by supplementing missing input data for a CGI model, consistent with embodiments of the present disclosure. The steps of method 900 may be performed by computing devices, e.g., controller 109 in Figure 1, controller 290 in Figure 2, and processor 303 in Figure 3. It should be understood that the illustrated method 900 may be modified by changing the order of the steps and including additional steps.
[0061]
[0069] Steps 901-904 of Method 900 may be considered as training phase 900_1, and steps 905-908 of Method 900 may be considered as application phase 900_2. Training phase 900_1 may be performed by system 600 in Figure 6, and application phase 900_2 may be performed by system 800 in Figure 8. In some embodiments, the same system may perform both training phase 900_1 and application phase 900_2.
[0062]
[0070] In step 901, input data is acquired and supplied to the CGI model (e.g., CGI model 401). The input data may be measurement information available for a batch of wafers measured after the wafer processing step. The measurement information (e.g., input measurement information 601 in Figure 6) may optionally be processed to reduce the dimensionality of the dataset as described above (e.g., fingerprint summaries). Each wafer in the batch of wafers has context information (e.g., input context information 602 in Figure 6). The CGI model may acquire context information from the manufacturing database as described above.
[0063]
[0071] In step 902, a relationship linking the input data is calculated. This relationship may be a context-link model (e.g., context-link model 604 in Figure 6) that links the wafer's context information to a specific fingerprint or residual in the measurement data collected after the wafer processing step. For example, the context-link model may identify a characteristic in the measurement data that exists after the etching step has been applied to the wafer. The characteristic in the measurement data may be, for example, the characteristic space fingerprint of the measurement data. The context-link model may be a context-average fingerprint (e.g., context-average fingerprints 707, 709, or 711 in Figure 7A) or a global-average fingerprint (e.g., global-average fingerprint 713 in Figure 7B). A context-average fingerprint is calculated that links all wafers to the available measurement information processed according to the same wafer processing step (e.g., having the same context information). A global-average fingerprint is calculated that links all wafers to the available measurement information. A library of context-link models is generated that links all available measurement information to the context information.
[0064]
[0072] In step 903, the calculated relationships are used to impute missing data from the input data. Missing data may be wafer measurement information with known contextual information that was not measured after the wafer processing step, and can be imputed using the context-averaged fingerprint. Missing data may be wafer measurement information with unknown contextual information that was not measured after the wafer processing step. Missing measurement information can be imputed using the global-averaged fingerprint.
[0065]
[0073] In step 904, the CGI model is trained using input and complementary data. The training of the CGI model may be as described above with respect to Figure 4.
[0066]
[0074] In step 905, wafer input data is provided to the CGI model. The input data may be wafer input information 801 as shown in Figure 8, and may be incomplete (for example, measurement information may be missing, or both measurement information and context information may be missing). In step 906, the missing data from the wafer input data is filled in using the calculated relationships determined in step 902.
[0067]
[0075] In step 907, the wafer's complementary and input data are fed to a trained CGI model, which determines the dead die probability for each die on the wafer. In step 908, a sampling plan is generated using the dead die probability for each die calculated in step 907. In step 909, the generated sampling is used to guide wafer inspection of the wafer, and die loss is predicted from the inspection results.
[0068]
[0076] Referring to Table 1, Table 1 shows the R values for context-averaged interpolation and global-averaged interpolation applied to a dataset of 12 wafers. 2 Correlation scores and receiver operating characteristic area (AUC) scores are displayed (e.g., Method 900 of the Disclosure). Specifically, the dataset includes a batch of 12 wafers from which sampling plans were generated to guide inspection according to Method 900 of the Disclosure. The sampling plans were generated by a CGI model that generates missing data for the wafers by applying either context-averaged interpolation or global-averaged interpolation. Expected die losses were calculated, and probe test results were obtained from the 12 wafers in the dataset.
[0069] [Table 1]
[0070]
[0078] The advantages provided by embodiments of this disclosure may include improved accuracy in predicting defective dies in wafers fabricated during HVM. In some embodiments, statistical data imputation techniques are used to estimate missing measurement results from wafer fabrication information. In some embodiments, the predicted die loss and R generated by CGI are used. 2 A computational model is provided that can further improve the accuracy of correlation scores. Some embodiments of this disclosure may provide a method for guiding wafer inspection by improving the performance and versatility of the CGI model. Some embodiments of this disclosure may provide a method for improving the accuracy of defect inspection and the yield of defect-free wafers across the entire HVM.
[0071]
[0079] A non-temporary computer-readable medium may be provided that can perform the method 900 in Figure 9 and other executable functions related to identifying locations for inspection in HVM on a wafer, including the method 900 in Figure 9 and other executable functions related to identifying locations for inspection in HVM on a wafer, on a wafer, on a non-temporary computer-readable medium that can perform non-temporary computer-readable medium that can perform the method 900 in Figure 9 and other executable functions related to identifying locations for inspection in HVM on a wafer, on a non-temporary computer-readable medium that can perform the method 900 in Figure 9 and other executable functions related to identifying locations for inspection in HVM on a wafer, on a wafer, on a non-temporary computer-readable medium that can perform the method 900 in Figure 9 and other executable functions related to the method 900 on Figure 9. Common forms of non-temporary media include, for example, floppy disks, flexible disks, hard disks, solid-state drives, magnetic tapes or any other magnetic data storage media, compact disk read-only memory (CD-ROM), any other optical data storage media, any physical media having a pattern of holes, random access memory (RAM), programmable read-only memory (PROM) and erasable programmable read-only memory (EPROM), flash EPROM or any other flash memory, non-volatile random access memory (NVRAM), caches, registers, any other memory chips or cartridges, and network-connected versions thereof.
[0072]
[0080] Embodiments may be further described using the following clauses. 1. A method for identifying locations to scan on a wafer during inspection using a computational defect probability model, To acquire initial measurement data and initial context data for multiple initial wafers, For each of the multiple initial wafers, the initial measurement data and initial context data are correlated, Based on the context data of the subsequent wafer and the initial context data of multiple initial wafers, the subsequent wafer is correlated with multiple initial wafers, Based on the correlation, select the location to scan on the subsequent wafer using the inspection tool. A method that includes this. 2. Correlating initial measurement data with initial context data for multiple wafers determines the link between the initial measurement data and the initial context data, as described in Clause 1. 3. Initial measurement data is the measurement result or inspection result as described in Clause 1 or 2. 4. The method according to Clause 1 or 2, wherein the initial context data is wafer manufacturing data related to the wafer processing step. 5. The measurement data is supplemented for subsequent wafers based on correlation with multiple initial wafers, as described in any one of the provisions of Clauses 1 to 4. 6. The inspection tool is a scanning charged particle microscope or an optical tool, as described in any one of the items 1 to 5. 7. The computational defect probability model is a computational guided test model, as described in any one of the provisions 1 to 6. 8. A method for identifying a location to scan on a wafer during inspection, To acquire initial measurement data and initial context data for multiple wafers, For each of the multiple wafers, the initial measurement data and initial context data are correlated, Using correlated initial measurement data and initial context data, we can supplement missing data from multiple wafers. Training a computational defect probability model with complementary missing data from multiple wafers, as well as initial measurement data and initial context data. A method that includes this. 9. Correlating initial measurement data with initial context data for multiple wafers, as described in Clause 8, to determine the link between the initial measurement data and the initial context data. 10. Initial measurement data is the measurement result or inspection result as described in Clause 8 or 9. 11. The method according to Clause 8 or 9, wherein the initial context data is wafer manufacturing data related to the wafer processing step. 12. Complementary missing data from multiple wafers is measured data, as described in any one of the provisions of Clauses 8 to 11. 13. Providing wafer input data to a trained computational defect probability model, Using correlated initial measurement data and initial context data from multiple wafers, the missing data on the wafers is supplemented. Using a trained computational defect probability model, the probability of a defective die for each die on a wafer is determined from the wafer's complemented missing data and input data. To generate a wafer sampling plan, Using a sampling plan, guide the inspection tools for wafer inspection of the wafers. The method described in Clause 8, further including the following: 14. The missing data of the wafer is measured data, as described in Clause 13. 15. Measurement data is the measurement result or inspection result, as described in Clause 14. 16. The wafer input data is measurement data or context data, as described in any one of the provisions of Clauses 13 to 15. 17. The inspection tool is a scanning charged particle microscope or an optical tool, as described in any one of the provisions of Clauses 13 to 16. 18. A computational defect probability model is a computational guided test model, as described in any one of the provisions 8 to 17. 19. An apparatus for identifying locations to scan on a wafer during inspection using a computational defect probability model, Memory that stores a set of instructions, At least one processor, which executes a set of instructions to the device, To acquire initial measurement data and initial context data for multiple initial wafers, For each of the multiple initial wafers, the initial measurement data and initial context data are correlated, Based on the context data of the subsequent wafer and the initial context data of multiple initial wafers, the subsequent wafer is correlated with multiple initial wafers, Based on the correlation, select the location to scan on the subsequent wafer using the inspection tool. At least one processor configured to perform operations including A device that includes this. 20. The apparatus described in Clause 19, which correlates initial measurement data with initial context data for multiple wafers to determine the link between the initial measurement data and the initial context data. 21. The initial measurement data is the measurement result or inspection result of the apparatus as described in Clause 19 or 20. 22. The apparatus described in Clause 19 or 20, wherein the initial context data is wafer manufacturing data related to the wafer processing step. 23. The apparatus described in any one of clauses 19 to 22, wherein the measurement data is supplemented for subsequent wafers based on correlation with multiple initial wafers. 24. The inspection tool is a scanning charged particle microscope or an optical tool, as described in any one of the clauses 19 to 23. 25. The computational defect probability model is a computationally inductive inspection model, as described in any one of clauses 19 to 24. 26. An apparatus for identifying locations to scan on a wafer during inspection using a computational defect probability model, Memory that stores a set of instructions, At least one processor, which executes a set of instructions to the device, To acquire initial measurement data and initial context data for multiple wafers, For each of the multiple wafers, the initial measurement data and initial context data are correlated, Using correlated initial measurement data and initial context data, we can supplement missing data from multiple wafers. Training a computational defect probability model with complementary missing data from multiple wafers, as well as initial measurement data and initial context data. At least one processor configured to perform operations including A device that includes this. 27. The apparatus described in Clause 26, which correlates initial measurement data with initial context data for multiple wafers to determine the link between the initial measurement data and the initial context data. 28. The initial measurement data is the measurement result or inspection result of the apparatus as described in Clause 26 or 27. 29. The apparatus as described in Clause 26 or 27, wherein the initial context data is wafer manufacturing data related to the wafer processing step. 30. The apparatus described in any one of the clauses 26-29, wherein the missing data of multiple wafers is measured data. 31. The operation is, The wafer input data is provided to a trained computational defect probability model, Using correlated initial measurement data and initial context data from multiple wafers, the missing data on the wafers is supplemented. Using a trained computational defect probability model, the probability of a defective die for each die on a wafer is determined from the wafer's complemented missing data and input data. To generate a wafer sampling plan, Using a sampling plan, guide the inspection tools for wafer inspection of the wafers. The apparatus described in Clause 26, further including the following: 32. The apparatus described in Clause 31 provides for the supplemented missing data of the wafer, which is the measured data. 33. The apparatus described in Clause 32, where the measurement data is the measurement result or inspection result. 34. The apparatus described in any one of clauses 31 to 33, wherein the wafer input data is measurement data or context data. 35. The inspection tool is a scanning charged particle microscope or an optical tool, as described in any one of the clauses 31 to 34. 36. The computational defect probability model is a computationally inductive inspection model, as described in any one of clauses 26 to 35. 37. A non-temporary computer-readable medium containing a set of instructions executable by one or more processors of a computing device for causing the computing device to perform an action to identify a location to scan on a wafer during inspection using a computational defect probability model, wherein the action is: To acquire initial measurement data and initial context data for multiple initial wafers, For each of the multiple initial wafers, the initial measurement data and initial context data are correlated, Based on the context data of the subsequent wafer and the initial context data of multiple initial wafers, the subsequent wafer is correlated with multiple initial wafers, Based on the correlation, select the location to scan on the subsequent wafer using the inspection tool. Non-temporary computer-readable media, including [specific examples of such media]. 38. Correlation of initial measurement data and initial context data for multiple wafers determines the link between the initial measurement data and the initial context data, as described in Clause 37, in a non-temporary computer-readable medium. 39. Initial measurement data is a non-temporary computer-readable medium as described in Clause 37 or 38, which is a measurement result or inspection result. 40. The initial context data is wafer manufacturing data related to the wafer processing step, in a non-temporary computer-readable medium as described in Clause 37 or 38. 41. Measurement data is supplemented for subsequent wafers based on correlation with multiple initial wafers, in a non-temporary computer-readable medium as described in any one of clauses 37-40. 42. The inspection tool is a scanning charged particle microscope or an optical tool, on a non-temporary computer-readable medium as described in any one of clauses 37 to 41. 43. The computational defect probability model is a computationally inductive inspection model, provided for non-temporary computer-readable media as described in any one of clauses 37-42. 44. A non-temporary computer-readable medium containing a set of instructions executable by one or more processors of a computing device for causing the computing device to perform an action to identify a location to scan on a wafer during inspection, wherein the action is: To acquire initial measurement data and initial context data for multiple wafers, For each of the multiple wafers, the initial measurement data and initial context data are correlated, Using correlated initial measurement data and initial context data, we can supplement missing data from multiple wafers. Training a computational defect probability model with complementary missing data from multiple wafers, as well as initial measurement data and initial context data. Non-temporary computer-readable media, including [specific examples of such media]. 45. Correlation of initial measurement data and initial context data for multiple wafers determines the link between the initial measurement data and the initial context data, as described in Clause 44, for non-temporary computer-readable media. 46. Initial measurement data is a non-temporary computer-readable medium as described in Clause 44 or 45, which is a measurement result or inspection result. 47. The initial context data is wafer manufacturing data related to the wafer processing step, in a non-temporary computer-readable medium as described in Clause 44 or 45. 48. Complementary missing data from multiple wafers is measured data in a non-temporary computer-readable medium as described in any one of the clauses 44-47. 49. The operation is, The wafer input data is provided to a trained computational defect probability model, Using correlated initial measurement data and initial context data from multiple wafers, the missing data on the wafers is supplemented. Using a trained computational defect probability model, the probability of a defective die for each die on a wafer is determined from the wafer's complemented missing data and input data. To generate a wafer sampling plan, Using a sampling plan, guide the inspection tools for wafer inspection of the wafers. Non-temporary computer-readable media as defined in Clause 44, further including the above. 50. The missing data of the wafer is measurement data, in a non-temporary computer-readable medium as described in Clause 49. 51. Measurement data is a non-temporary computer-readable medium as described in Clause 50, which is a measurement result or inspection result. 52. The input data for the wafer is measurement data or context data in a non-temporary computer-readable medium as described in any one of the clauses 49 to 51. 53. The inspection tool is a scanning charged particle microscope or an optical tool, on a non-temporary computer-readable medium as described in any one of clauses 49 to 52. 54. The computational defect probability model is a computationally inductive inspection model, provided for non-temporary computer-readable media as described in any one of clauses 44-53. 55. An inspection system that uses a computational model to identify locations to scan on a wafer during inspection, One or more processors that execute instructions to a test system, To acquire initial measurement data and initial context data for multiple initial wafers, For each of the multiple initial wafers, the initial measurement data and initial context data are correlated, Based on the context data of the subsequent wafer and the initial context data of multiple initial wafers, the subsequent wafer is correlated with multiple initial wafers, Based on the correlation, select the location to scan on the subsequent wafer using the inspection tool. One or more processors configured to perform this task A testing system that includes this.
[0073]
[0081] The block diagrams in the figures may illustrate the architecture, functions, and operation of possible implementations of systems, methods, and computer hardware or software products according to various exemplary embodiments of the present disclosure. In this regard, each block in the schematic diagram may represent a specific arithmetic or logical operation that can be implemented using hardware such as electronic circuits. A block may also represent a module, segment, or part of code containing one or more executable instructions for performing a specified logical function. It should be understood that in some alternative implementations, the functions shown in a block may be performed in an order different from that shown in the drawings. For example, two consecutively shown blocks may be executed or performed substantially simultaneously, or two blocks may be executed in reverse order depending on the functions they relate to. Some blocks may be omitted. It should be understood that each block and combination of blocks in the block diagram may also be performed by a dedicated hardware-based system or a combination of dedicated hardware and computer instructions that performs a specified function or operation.
[0074]
[0082] It will be understood that the embodiments of this disclosure are not limited to the structures described above and shown in the accompanying drawings, and that various modifications and alterations may be made without departing from the scope of this disclosure. Although this disclosure has been described in relation to various embodiments, other embodiments should become apparent to those skilled in the art from examining the specifications and practices of the technology disclosed herein. This specification and examples are to be considered merely illustrative, and the true scope and spirit of this disclosure are intended to be shown by the following claims.
Claims
1. A device for identifying locations to scan on a wafer during inspection, using a computational defect probability model, Memory that stores a set of instructions, At least one processor, which executes the set of instructions to the device, To acquire initial measurement data and initial context data for multiple initial wafers, For each of the plurality of initial wafers, the initial measurement data and the initial context data are correlated. Correlating the subsequent wafer with the plurality of initial wafers based on the context data of the subsequent wafer and the initial context data of the plurality of initial wafers, Based on the aforementioned correlation, select the location on the subsequent wafer to scan using the inspection tool. At least one processor that performs an operation including A device that includes this.
2. The apparatus according to claim 1, wherein correlating the initial measurement data with the initial context data for the plurality of wafers determines the link between the initial measurement data and the initial context data.
3. The apparatus according to claim 1, wherein the initial measurement data is a measurement result or an inspection result.
4. The apparatus according to claim 1, wherein the initial context data is wafer manufacturing data related to the wafer processing step.
5. The apparatus according to claim 1, wherein the measurement data is supplemented for subsequent wafers based on the correlation with the plurality of initial wafers.
6. The apparatus according to claim 1, wherein the inspection tool is a scanning charged particle microscope or an optical tool.
7. The apparatus according to claim 1, wherein the computational defect probability model is a computationally guided inspection model.
8. A non-temporary computer-readable medium containing a set of instructions executable by one or more processors of a computing device for causing the computing device to perform an action to identify a location to scan on a wafer during inspection, wherein the action is: To acquire initial measurement data and initial context data for multiple wafers, For each of the plurality of wafers, the initial measurement data and the initial context data are correlated. Using the correlated initial measurement data and initial context data, the missing data from the multiple wafers is supplemented, Training a computational defect probability model with the complemented missing data, initial measurement data, and initial context data of the plurality of wafers. Non-temporary computer-readable media, including [specific examples of such media].
9. Correlating the initial measurement data with the initial context data for the plurality of wafers determines the link between the initial measurement data and the initial context data, according to claim 8, for the non-temporary computer-readable medium.
10. The non-temporary computer-readable medium according to claim 8, wherein the initial measurement data is a measurement result or an inspection result.
11. The non-temporary computer-readable medium according to claim 8, wherein the initial context data is wafer manufacturing data related to a wafer processing step.
12. The non-temporary computer-readable medium according to claim 8, wherein the complemented missing data of the plurality of wafers is measurement data.
13. The aforementioned operation is, The wafer input data is provided to the trained computational defect probability model, Using the correlated initial measurement data and initial context data of the plurality of wafers, the missing data of the wafers is supplemented. Using the trained computational defect probability model, the defective die probability of each die on the wafer is determined from the complemented missing data and input data of the wafer. To generate a sampling plan for the aforementioned wafer, Using the sampling plan, guide the inspection tool for wafer inspection of the wafer. A non-temporary computer-readable medium according to claim 8, further comprising:
14. The non-temporary computer-readable medium according to claim 13, wherein the supplemented missing data of the wafer is measurement data.
15. The non-temporary computer-readable medium according to claim 14, wherein the measurement data is a measurement result or an inspection result.