Light-emitting substrate and display device

The light-emitting substrate optimizes the layout of signal lines and light-emitting elements through specific arrangements and connectivity features, addressing inefficiencies in display technologies and reducing resistance and manufacturing costs.

JP2026521858APending Publication Date: 2026-07-02BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
BOE TECHNOLOGY GROUP CO LTD
Filing Date
2024-05-14
Publication Date
2026-07-02

AI Technical Summary

Technical Problem

Existing display technologies using Mini-LED and Micro-LED backlight sources face challenges in optimizing the layout and connectivity of signal lines and light-emitting elements, leading to inefficiencies in space utilization and increased resistance, which affect the performance and manufacturing costs of display devices.

Method used

A light-emitting substrate design with specific arrangements of signal line groups, element groups, and control chips, including bridge portions and connecting patterns, to enhance connectivity and reduce resistance, while optimizing space utilization and manufacturing efficiency.

Benefits of technology

The proposed substrate design improves space utilization, reduces resistance, and lowers manufacturing costs by optimizing the layout of signal lines and light-emitting elements, enhancing the performance and efficiency of display devices.

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Abstract

The present invention relates to a light-emitting substrate (110) and a display device (1000). The light-emitting substrate (110) comprises a substrate (10), a plurality of signal line groups (30), a plurality of rows of element groups (40), and a plurality of rows of control chips (50). The plurality of signal line groups (30) are arranged on the substrate (10) and are aligned along a first direction (X). Each signal line group (30) includes a plurality of signal lines aligned along the first direction (X). The plurality of row of element groups (40) are aligned along the first direction (X), and each row of element group (40) includes a plurality of element groups (40) that are spaced apart along a second direction (Y), and one row of element group (40) is electrically connected to some of the signal lines of one signal line group (30), and each element group (40) includes a plurality of light-emitting elements (41) that are spaced apart along the first direction (X) and sequentially electrically connected. Multiple rows of control chips (50) are arranged along a first direction (X), and each row of control chips (50) includes multiple control chips (50) spaced apart along a second direction (Y). A single row of control chips (50) is positioned on the side of a row of elements (40) along the first direction (X), and is electrically connected to the row of elements (40) and some of the signal lines of a group of signal lines (30).
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