Backplane Structure and Operation

Abstract

This disclosure describes various aspects of backplanes, including unit cells, architectures, and operations. In one aspect, a backplane unit cell is described that includes a first switch, a second switch, a storage element, a comparator, and a power source (e.g., a current source or a voltage source), where the power source generates a drive signal for controlling the emission of a selected light-emitting element in a display, the drive signal being based on a power signal selected by the second switch. In another aspect, an apparatus is described that includes a backplane configured in an active matrix topology with multiple data columns and multiple row selects, and a set of electrical contacts associated with the active matrix topology and configured to electrically connect the backplane to a display, the display having multiple light-emitting elements configured in a passive matrix topology. Methods of operating the backplane are also described.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This patent application claims priority to U.S. Non-Provisional Patent Application No. 16 / 739,740, entitled “BACKPLANE STRUCTURE AND OPERATION,” filed January 10, 2020, and U.S. Provisional Patent Application No. 62 / 796,394, entitled “BACKPLANE STRUCTURE AND OPERATION,” filed January 24, 2019, the contents of which are incorporated by reference in their entireties herein. [Background technology]

[0002] Aspects of the present disclosure relate generally to backplanes used in various types of displays, and more specifically to various backplane unit cells, architectures, and backplane operation that enable high pixel density displays, including light field displays.

[0003] One overlooked aspect of many displays is the backplane technology used to drive the pixels (such as an array of pixels or individual optical elements) of the main display panel. The backplane is the design, assembly, or arrangement of the various electronic circuits and / or transistors that switch on and off the individual pixels in the display panel, and therefore plays a significant role in the overall resolution, refresh rate, and power consumption of the display.

[0004] The pixel count of future displays is expected to increase significantly compared to current displays, which creates challenges in power consumption and overall bandwidth in backplane technology that could limit the implementation of displays with very high resolution and pixel count.

[0005] Therefore, there is a need for techniques and devices that provide low power consumption, high operating bandwidth backplane technology to support high resolution displays. Summary of the Invention

[0006] The following presents a simplified summary of one or more embodiments in order to provide a basic understanding of such embodiments. This summary is not an extensive overview of all possible embodiments, nor does it identify key or critical elements of all embodiments, nor does it delineate the scope of some or all embodiments. Its purpose is to present some concepts of one or more embodiments in a simplified form as a prelude to the more detailed description that is presented later.

[0007] In one aspect of the disclosure, a backplane unit cell for driving light emitting elements in a display is described, the backplane unit cell comprising: a first switch configured to select a data signal based on a selection signal; a storage element coupled to the first switch and configured to store a value of the data signal in response to the data signal selected by the first switch; a comparator coupled to the first switch and configured to generate an output based on a comparison of the value stored in the storage element with a value of a reference signal; a second switch coupled to the comparator and configured to receive the output of the comparator and select a power signal; and a power source configured to generate a drive signal for controlling emission of a selected one of the light emitting elements in the display, the second switch configured to provide the power signal as an input to the power source in response to the power signal selected by the second switch, the drive signal being based on the power signal, and the power source may be a current source or a voltage source.

[0008] In another aspect of the disclosure, an apparatus for driving light emitting elements in a display is described, the apparatus comprising a backplane configured in an active matrix topology including a plurality of data columns and a plurality of row selects, and a set of electrical contacts associated with the active matrix topology and configured to electrically connect the backplane to the display, the display having a plurality of light emitting elements configured in a passive matrix topology.

[0009] In another aspect of the disclosure, a method of operating a backplane to drive light emitting elements in a display is described, the method comprising sequentially selecting different rows in the backplane and, for each of a plurality of backplane unit cells associated with the different rows in the backplane, storing a value provided in a corresponding data column at the time the corresponding row in the backplane is selected, and after all the different rows in the backplane have been selected and the values ​​stored, simultaneously enabling application of drive signals to a first row of light emitting elements associated with each of the different rows in the backplane, the drive signals being based on the stored values.

[0010] In yet another aspect of the disclosure, a method of operating a backplane to drive light emitting elements in a display is described, the method including sequentially selecting different rows in the backplane and, for each of a plurality of backplane unit cells associated with the different rows in the backplane, storing a value provided in a corresponding data column at the time the corresponding row in the backplane is selected, and sequentially enabling application of a drive signal to a first row of light emitting elements associated with the corresponding row in the backplane after one of the different rows in the backplane is selected and after the corresponding value has been stored, the drive signal being based on the stored value. [Brief description of the drawings]

[0011] The accompanying drawings illustrate only some embodiments and are therefore not to be considered limiting of the scope.

[0012] [Figure 1A] FIG. 1A illustrates an example display and a source of the display's content, according to an embodiment of the disclosure.

[0013] [Figure 1B] FIG. 1B illustrates an example of a display processor within a display, according to an embodiment of the disclosure.

[0014] [Figure 2A] FIG. 2A illustrates an example of a display having a plurality of pixels, according to an embodiment of the present disclosure.

[0015] [Figure 2B] FIG. 2B illustrates an example of a light field display having a plurality of pixels, according to an embodiment of the present disclosure. [Figure 2C] FIG. 2C illustrates an example of a light field display having a plurality of pixels, according to an embodiment of the present disclosure.

[0016] [Figure 2D] FIG. 2D illustrates an example cross-sectional view of a portion of a light field display according to an embodiment of the disclosure.

[0017] [Diagram 3] FIG. 3 illustrates an example of a backplane incorporating an array of light emitting elements according to an embodiment of the present disclosure.

[0018] [Figure 4A] FIG. 4A illustrates an example of an arrangement of light emitting elements within a pixel, according to an embodiment of the present disclosure.

[0019] [Figure 4B] FIG. 4B illustrates an example of a pixel with sub-pixels according to an embodiment of the present disclosure.

[0020] [Diagram 5] FIG. 5 illustrates an example of a backplane driver according to an embodiment of the disclosure.

[0021] [Figure 6A] FIG. 6A illustrates an example of a backplane unit cell operating in an analog modulation scheme, according to an embodiment of the disclosure. [Figure 6B] FIG. 6B illustrates an example of a backplane unit cell operating in an analog modulation scheme, according to an embodiment of the disclosure.

[0022] [Figure 7A] FIG. 7A illustrates an example of a backplane unit cell operating in a binary coded pulse width modulation (B-PWM) manner, according to an embodiment of the disclosure. [Figure 7B] FIG. 7B illustrates an example of a backplane unit cell operating in a binary coded pulse width modulation (B-PWM) manner, according to an embodiment of the disclosure.

[0023] [Figure 8A] FIG. 8A illustrates an example of a backplane unit cell operating in a single pulse width modulation (S-PWM) manner, according to an embodiment of the disclosure. [Figure 8B] FIG. 8B illustrates an example of a backplane unit cell operating in a single pulse width modulation (S-PWM) manner, according to an embodiment of the disclosure.

[0024] [Figure 9A] FIG. 9A illustrates an example of a backplane unit cell operating in a high dynamic range (HDR) pulse width modulation (HDR-PWM or H-PWM) manner, according to an embodiment of the disclosure. [Figure 9B] FIG. 9B illustrates an example of a backplane unit cell operating in a high dynamic range (HDR) pulse width modulation (HDR-PWM or H-PWM) manner, according to an embodiment of the disclosure. [Figure 9C] FIG. 9C illustrates an example of a backplane unit cell operating in a high dynamic range (HDR) pulse width modulation (HDR-PWM or H-PWM) manner in accordance with an embodiment of the present disclosure.

[0025] [Figure 10A] FIG. 10A illustrates an example of backplane addressing according to an aspect of the disclosure. [Figure 10B] FIG. 10B illustrates an example of backplane addressing according to an aspect of the disclosure. [Figure 10C] FIG. 10C illustrates an example of backplane addressing according to an aspect of the disclosure.

[0026] [Figure 11] FIG. 11 illustrates an example of a backplane configured in a hybrid matrix topology, according to an embodiment of the present disclosure.

[0027] [Figure 12A] FIG. 12A illustrates an example of a driving operation of a backplane configured in a hybrid topology according to an embodiment of the present disclosure. [Figure 12B] FIG. 12B illustrates an example of a driving operation of a backplane configured in a hybrid topology according to an embodiment of the present disclosure.

[0028] [Figure 13A] FIG. 13A is a flow chart illustrating a method for driving a backplane in a hybrid topology according to an embodiment of the disclosure. [Figure 13B] FIG. 13B is a flow chart illustrating a method for driving a backplane in a hybrid topology according to an embodiment of the disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] The detailed description set forth below in conjunction with the accompanying drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without the specific details. In some instances, well-known components are shown in block diagram form to avoid obscuring such concepts.

[0030] As mentioned above, future displays are expected to have much more pixels than current displays, potentially by orders of magnitude. Such displays pose challenges to the type of backplane ultimately used, particularly in terms of power consumption and overall bandwidth, as these backplane factors may limit the implementation of displays with very high resolution and very high pixel counts. Some considerations when determining the appropriate backplane include the various backplane technology options and the various backplane integration options. Backplane technology options to consider include semiconductor technology options, modulation options, and addressing options.

[0031] With respect to backplane technology options, various semiconductor technologies may be considered in connection with the present disclosure, including amorphous silicon (a-Si), metal oxide, low temperature polysilicon (LTPS), and complementary metal oxide semiconductor (CMOS) substrates. Of these semiconductor technologies, a-Si has the lowest maximum mobility (e.g., 1 cm 2 / V s), bandwidth (e.g., 0.1 MHz), common design rules (e.g., 3 μm), and panel size (e.g., 3 m). Next comes metal oxide (e.g., 10 cm 2 / V s, 1MHz, 3μm, 3m), LTPS (e.g. 100cm 2 / V s, 10 MHz, 1 μm, 2 m), and CMOS wafers (e.g., 1400 cm 2 / V·s, 1000 MHz, 0.18 μm, 0.3 m). Additionally, a-Si is used with current drive for liquid crystal displays (LCDs), while metal oxide, LTPS, and CMOS wafers are used with current drive for light emitting diodes (LEDs). Furthermore, a-Si uses NMOS transistors, is relatively low cost, has limited foundry support, and is typically used for active matrix LCD (AMLCD) display applications. Similarly, metal oxide uses NMOS transistors, is relatively low cost, has limited foundry support, and is typically used for large active matrix organic LED (AMOLED) display applications. In contrast, LTPS uses CMOS, is relatively medium cost, has limited foundry support, and is typically used for mobile AMOLED display applications. Finally, CMOS wafers use CMOS, is relatively high cost, has foundry support available, and is typically used for microdisplays.

[0032] Of these semiconductor technologies, LTPS and CMOS wafers may offer more flexible options depending on the bandwidth and density requirements of the backplane. For example, CMOS wafers can accommodate bandwidths ranging from 1 MHz to 1,000 MHz and driver cell pitches ranging from 1 μm to 30 μm. On the other hand, LTPS can accommodate bandwidths ranging from 1 MHz to 15 MHz and driver cell pitches ranging from 10 μm to 10,000 μm.

[0033] There are also various modulation options available in association with the backplane unit cells of the backplane. For example, one modulation option, analog modulation (AM), has simple circuitry, low bandwidth requirements, variable current to drive the LEDs, smooth grayscale gradations, and no flickering. Other possible modulations include digital modulations such as binary coded pulse width modulation (B-PWM), which also has simple circuitry, high bandwidth requirements, fixed current to drive the LEDs, and may cause streaks in the grayscale gradations and may cause flickering. Yet another possible digital modulation option is single pulse width modulation (S-PWM), which has complex circuitry, high bandwidth requirements, fixed current to drive the LEDs, smooth grayscale gradations, and may cause flickering. Additionally, the present disclosure provides yet another possible modulation option described as high dynamic range (HDR) pulse width modulation (HDR-PWM or H-PWM). This modulation option has a much more complex circuit, but requires a lower bandwidth than B-PWM or S-PWM, requires less current to drive the LEDs at low illumination, produces smoother grayscale gradations, and may cause flicker in some cases. This type of modulation in a backplane unit cell can be useful for displays that require high bandwidth and low power consumption. Additional details about these modulation options are described below in conjunction with Figures 6A-9C.

[0034] Additionally, there are various backplane addressing options to consider. For example, passive matrix addressing scans the pixels row by row, while active matrix drives all pixels simultaneously. This disclosure provides a hybrid approach that combines these two approaches, active and passive. Additional details about these addressing options are described below in conjunction with Figures 10A-12B.

[0035] In general, this disclosure describes various techniques and devices for backplanes that operate at low power and high bandwidth to support high resolution displays (e.g., light field displays). These techniques and devices can take into account various characteristics of the display application (tablets, phones, watches, televisions, laptops, monitors, sign displays, etc.), semiconductor technology, modulation options, addressing options, etc.

[0036] 1A-4B below provide a general overview of the types of displays to which the various backplane aspects described in this disclosure can be applied.

[0037] FIG. 1A is a schematic diagram 100a illustrating an example of a display 110 receiving content / data 125 (e.g., image content, video content, or both) from a source 120. The display 110 may include one or more panels (see, e.g., FIG. 1B), with each panel in the display 110 being an emissive or reflective panel. The panel may include light-emitting elements or light-reflecting elements arranged in a predetermined arrangement or array, as well as a backplane for driving the light-emitting elements or light-reflecting elements. When an emissive panel is used, the emissive panel may include a plurality of light-emitting elements (see, e.g., light-emitting element 220 in FIG. 2A). These light-emitting elements may be light-emitting diodes (LEDs) constructed from one or more semiconductor materials. The LEDs may be inorganic LEDs. The LEDs may be, for example, micro-LEDs (also referred to as micro-LEDs, mLEDs, or μLEDs). Other display technologies for constructing light-emitting elements include liquid crystal display (LCD) technology or organic LED (OLED) technology. The terms "light-emitting element", "light emitter", or simply "emitter" may be used interchangeably in this disclosure.

[0038] The display 110 may have ultra-high resolution capabilities (e.g., corresponding to a resolution of 8K or more), high dynamic range (contrast) capabilities, or light field capabilities, or a combination of these capabilities. If the display 110 has light field capabilities and is operable as a light field display, the display 110 may include a plurality of pixels (e.g., superlaceels), each pixel having a respective light directing optical element and an array of light emitting elements (e.g., sublaceels). The array of light emitting elements (e.g., sublaceels) is integrally constructed on the same semiconductor substrate, with the light emitting elements in the array being arranged in separate groups (e.g., sublaceels) to provide the multiple views supported by the light field display (see, e.g., FIGS. 2A-3).

[0039] FIG. 1B shows a schematic diagram 100b for illustrating additional details of the display 110 of FIG. 1A. In this example, the source 120 provides content / data 125 to a display processor 130 integrated within the display 110. The terms "display processor" and "processor" may be used interchangeably in this disclosure. In addition to the functions described above for the display source, the source 120 may be configured to stream red, green, blue, and depth (RGBD) data from video or a special camera, or may be configured to render RGBD data from computer-generated content. The source 120 may provide the content / data 125 via HDMI / DisplayPort, for example, the content / data 125 may be 10-bit high dynamic range (HDR) data or RGBD data.

[0040] The display processor 130 is configured to modify image or video content in the content / data 125 for display on the display 110. Also shown is a display memory 135 for storing information used by the display processor 130 to process the image or video content. The display memory 135, or a portion thereof, may be integrally incorporated into the display processor 130. The set of tasks executable by the display processor 130 may include tasks related to color management, data conversion, and / or multi-view processing operations. The display processor 130 may provide the processed content / data to a timing controller (TCON) 140, which in turn provides appropriate display information to the panel 150. As mentioned above, the panel 150 (also referred to as a display panel) may include a backplane for driving light emitting or light reflecting elements in the panel 150. As shown in the schematic diagram 100b, the panel 150 may have multiple low voltage differential signaling (LVDS) and / or MIPI interfaces used to transfer the processed content / data from the display processor 130 to the TCON 140. Similarly, the transmission of information or signals from the TCON 140 to the panel 150 may be parallelized.

[0041] 2A shows a display 210 having a plurality of light emitting elements 220, typically referred to as pixels or display pixels. The light emitting elements 220 are typically formed in an array and adjacent to one another to provide a high resolution display 210. The display 210 may be an example of the display 110 of the schematics 100a and 100b.

[0042] In the example shown in Figure 2A, light emitting elements 220 may be configured or arranged in a Q x P array, where Q is the number of rows of pixels in the array and Q is the number of columns of pixels in the array. An enlarged portion of such an array is shown to the right of display 210. For small displays, example array sizes include Q > 10 and P > 10, Q > 100 and P > 100. For large displays, example array sizes include Q > 500 and P > 500, Q > 1,000 and P > 1,000, Q > 5,000 and P > 5,000, Q > 10,000 and P > 10,000, with even larger array sizes being possible.

[0043] Although not shown, display 210 may include a backplane for driving the array of light emitting elements 220, as well as a backplane for driving the array. The backplane used in display 210 may be based on features described herein for achieving a backplane capable of operating at low power consumption and high bandwidth.

[0044] The schematic diagram 200b of FIG. 2B illustrates a light field display 210a having a plurality of pixels or superlaces 225. In this disclosure, the terms "pixel" and "superlaces" may be used interchangeably to describe similar structural units within a light field display. The light field display 210a may be an example of the display 110 of schematic diagrams 100a and 100b having light field capabilities. The light field display 210a may be used for different types of applications, and its size may vary depending on the application. For example, the light field display 210a may have different sizes when used as a display for watches, nearsighted applications, phones, tablets, laptops, monitors, televisions, and signs, to name a few. Thus, depending on the application, the pixels 225 in the light field display 210a may be arranged in an array, grid, or other type of ordered, different sized arrangement. The pixels 225 of the light field display 210a may be distributed across one or more display panels.

[0045] As shown in the example of FIG. 2B, the pixels 225 may be arranged or configured in an N×M array, where N is the number of rows of pixels in the array and M is the number of columns of pixels in the array. A close-up portion of such an array is shown to the right of the light field display 210a. For small displays, example array sizes include N≧10 and M≧10, N≧100 and M≧100, with each pixel 225 in the array having its own array or grid of light emitting elements 220 or sublux cells (as shown further to the right). For large displays, example array sizes include N≧500 and M≧500, N≧1,000 and M≧1,000, N≧5,000 and M≧5,000, N≧10,000 and M≧10,000, with each pixel 225 in the array having its own array or grid of light emitting elements 220.

[0046] When a pixel or superlux cell 225 includes different LEDs on the same semiconductor substrate as light emitting elements 220 that generate red (R), green (G), and blue (B) light, the light field display 210a can be said to be made up of monolithically constructed RGB LED superlux cells.

[0047] Each pixel 225 in the light field display 210a, including a corresponding light directing optical element 215 (e.g., an integrated imaging lens as shown in schematic diagram 200c of FIG. 2C), may represent a minimum pixel size limited by the resolution of the display. In this regard, the array or grid of light emitting elements 220 of a pixel 225 may be smaller than the light directing optical element 215 corresponding to that pixel. In practice, however, the size of the array or grid of light emitting elements 220 of a pixel 225 may be similar to the size of the corresponding light directing optical element 215 (e.g., the diameter of a microlens or lenslet), which may be similar to or the same as the pitch 230 between the pixels 225.

[0048] As mentioned above, a close-up view of the array of light emitting elements 220 of pixel 225 is shown on the right side of schematic diagram 200b. The array of light emitting elements 220 can be an X by Y array, where X is the number of rows of light emitting elements 220 in the array and Y is the number of columns of light emitting elements 220 in the array. Example array sizes include X≧5 and Y≧5, X≧8 and Y≧8, X≧9 and Y≧9, X≧10 and Y≧10, X≧12 and Y≧12, X≧20 and Y≧20, and X≧25 and Y≧25. In one example, the X×Y array is a 9×9 array containing 81 light emitting elements or sub-lux cells 220.

[0049] At each pixel 225, the light emitting elements 220 in the array may include separate and distinct groups of light emitting elements 220 (see, for example, the group of light emitting elements 260 in FIG. 2D). These light emitting elements 220 are assigned or grouped (e.g., logically grouped) based on spatial and angular proximity and configured to generate different light outputs (e.g., directional light outputs) that contribute to the generation of the light field view provided to the viewer by the light field display 210a. The sub-laxels or grouping of light emitting elements into laxels need not be unique. For example, during assembly or manufacturing, there may be a mapping of sub-laxels to specific laxels that optimizes the viewing experience. Similar remapping may be performed by the display once deployed, for example, to account for aging of various parts or elements of the display, including aging of different color light emitting elements and / or aging of light directing optical elements. In this disclosure, the terms "group of light emitting elements" and "laxel" may be used interchangeably to describe similar structural units within a light field display. The light field view produced by the contributions of various groups of light emitting elements or lasers may be perceived by a viewer as a continuous or non-continuous view.

[0050] Each group of light emitting elements 220 in the array of light emitting elements 220 includes a number of light emitting elements that generate at least three different colors of light (e.g., red light, green light, blue light, or alternatively, white light). In one example, each of these groups or cells includes at least one light emitting element 220 that generates red light, one light emitting element 220 that generates green light, and one light emitting element 220 that generates blue light. Alternatively, at least one light emitting element 220 that generates white light may be included.

[0051] 2C, schematic diagram 200c illustrates another example of a light field display 210a showing a close-up of a portion of an array of pixels 225 with corresponding light directing optical elements 215 as described above. Pitch 230 may represent the spacing or distance between pixels 225 and may be the size of the light directing optical elements 215 (e.g., the size of a microlens or lenslet). Although pixels 225 are shown separated from one another for purposes of easier illustration, pixels 225 are typically configured adjacent to one another.

[0052] Schematic diagram 200d of FIG. 2D shows a cross-sectional view of a portion of a light field display (e.g., light field display 210a) to illustrate some of the structural units described in this disclosure, as configured in FIG. 1A as a light field display. For example, schematic diagram 200d shows three adjacent pixels or superlux cells 225a, each having a corresponding light directing optical element 215. In this example, light directing optical element 215 can be considered separate from pixel 220a, while in other examples light directing optical element 215 can be considered part of the pixel.

[0053] 2D, each pixel 225a includes multiple light emitting elements 220 (e.g., multiple sub-laceels), and several light emitting elements 220 of different types (e.g., several sub-laceels) may be grouped into groups 260 (e.g., within a lace). The groups or laceels may generate various components that contribute to a particular light beam element 255, as shown by the right-most group or lace in the center pixel 225a. It will be appreciated that light beam elements 255 generated by different groups or laceels in different pixels may contribute to a view perceived by a viewer at a distance from the light field display.

[0054] An additional structural unit depicted in FIG. 2D is the concept of a subpixel 270, which represents a grouping of light emitting elements 220 of the same type (eg, producing the same color light) as pixel 225a.

[0055] As with other examples discussed above, some of the elements shown separated from one another in schematic diagram 200d of FIG. 2D are shown for purposes of easier understanding and would normally be configured adjacent to one another.

[0056] Schematic diagram 300 in FIG. 3 shows an example of a backplane with an array of light-emitting elements integrated therein. Diagram 300 shows a cross-sectional view similar to schematic diagram 200d in FIG. 2D. Diagram 300 shows light-emitting elements (sub-lux cells) 220, groups of light-emitting elements (lux cells) 260, pixels (superlux cells) 225a, and light-directing optical elements 215. It also shows how various light rays 255 from different pixels can contribute to generate different views, such as view A and view B. Furthermore, the light-emitting elements 220 of pixels 225a form a larger array 330, which is connected to a backplane 310. Thus, the backplane 310 is configured to drive each of the light-emitting elements 220.

[0057] 4A shows a schematic diagram 400a illustrating various details of one embodiment of a pixel 225. For example, the pixel 225 (e.g., a superlux cell) includes an array or grid 410 of multiple light emitting elements 220 (e.g., sublux cells) having respective light directing optical elements 215 (shown in dashed lines) integrally fabricated on the same semiconductor substrate. The light directing optical elements 215 may be the same or similar size as the array 410, or may be slightly larger than the array 410 as shown. It should be understood that some of the sizes shown in the figures of this disclosure have been exaggerated for illustrative purposes and need not be considered to be an accurate representation of actual or relative sizes.

[0058] The multiple light-emitting elements 220 in the array 410 are arranged in separate groups 260 (e.g., separate racks) that include multiple light-emitting elements of different types for producing light of different colors and provide different contributions to the multiple views produced by the light field display.

[0059] As shown in Figure 4A, array 410 has a geometry that allows for adjacent or proximate placement of two or more pixels. The geometry can be either hexagonal (as shown in Figure 4A), square, or rectangular.

[0060] Although not shown, the pixel 225 of FIG. 4A may have corresponding electronic means (e.g., in a backplane) including multiple drive circuits configured to drive multiple light emitting elements 220 in the pixel 225.

[0061] FIG. 4B shows a schematic diagram 400b illustrating various details of another embodiment of a pixel 225. For example, the pixel 225 (e.g., a superlux cell) of FIG. 4B includes multiple subpixels 270 that are integrally configured on the same semiconductor substrate. Each subpixel 270 includes an array or grid 410a of multiple light emitting elements 220 (e.g., multiple sublux cells) having a respective light directing optical element 215 (shown in dashed lines) that generate light of the same color. The light directing optical element 215 may be the same or similar size as the array 410a, or may be slightly larger than the array 410a as shown. In the pixel 225, the light directing optical element 215 of one of the subpixels 270 is configured to optimize the chromatic dispersion of the color of light generated by the multiple light emitting elements 220 in that subpixel 720. Additionally, the light directing optical element 215 may be aligned and coupled to the array 410a of the respective subpixel 270.

[0062] The light emitting elements 220 of a subpixel 720 are arranged in separate groups 260 (e.g., groups). As shown in FIG. 4B, in one example, each group 260 may include multiple light emitting elements 220 arranged together (e.g., at the same location within each subpixel) from each of the subpixels 270. However, as discussed above, the mapping of various light emitting elements 220 to different groups 260 may be changed during manufacturing and / or operation.

[0063] As shown in Figure 4B, array 410a has a geometry that allows for adjacent placement of two or more sub-pixels. The geometry can be either hexagonal (as shown in Figure 4B), square, or rectangular.

[0064] 4B may have corresponding electronic means (e.g., in a backplane) including multiple drive circuits configured to drive multiple light emitting elements 220 in the pixel 225. In some examples, one or more common drive circuits may be used to drive each of the sub-pixels 270.

[0065] 5 illustrates an example schematic diagram of a backplane driver, such as display driver 510, that may be used in a display to drive a backplane. Display driver 510 may be configured to generate signals that provide appropriate information for the backplane and an array of pixels in a display panel (e.g., panel 150) to operate together to reproduce images and / or video content.

[0066] The display driver 510 may generate a row select signal ("row select") that is provided to a row driver 520 to control selection of a row in the array of pixels 540. The display driver may also generate column data ("column data"). The column data is provided to a column driver 530, which controls how the data is provided to the array of pixels 540 to be reproduced. In some embodiments, the row driver 520 and the column driver 530 may be considered to be part of a backplane architecture, while in other embodiments, the row driver 520 and the column driver 530 may be considered to be separate from the backplane architecture. The array of pixels 540 may include a light emitting element associated with each pixel as well as corresponding backplane transistors and / or circuitry.

[0067] 6A and 6B show diagrams 600a and 600b illustrating an example of a backplane unit cell operating in an analog modulation (AM) mode. The structure of this backplane unit cell includes a first switch 610, a memory element 620, and a power source 630, as shown in diagram 600a. A light emitting element 640 is also shown electrically connected to the power source 630, but the light emitting element 640 does not form part of the backplane architecture as the backplane unit cell does. In one embodiment, the first switch 610 and the memory element 620 may each be composed of two transistors (2T) and a capacitor (C), also referred to as a 2T1C circuit. Although the power source 630 is shown as a current source, the power source 630 may be a current source or a voltage source depending on the light emitting element 640 used. For example, if the light emitting element 640 is a pixel of a liquid crystal display (LCD), the power source 630 may be a voltage source. Alternatively, if the light emitting element 640 is an LED, the power source 630 may be a current source.

[0068] In such a backplane unit cell configuration, a row select signal ("row") selects a column data value ("column") and the selected value is stored in storage element 620. The row select signal may correspond to "row select" of diagram 500 of FIG. 5 and / or the output of row driver 520, and the column data may correspond to "column data" of diagram 500 of FIG. 5 and / or the output of column driver 530. The value stored in storage element 620 is then provided to power supply 630 to drive light emitting element 640. The intensity of light generated by light emitting element 640 can be based on the drive signal provided by power supply 630, which can be based on the value stored in storage element 620.

[0069] The operation of the backplane unit cell of diagram 600a above is explained in more detail using timing diagram 600b. Signal 670 represents a video frame and signal 671 represents a row selection of column data to be stored in storage element 620. Signal 672 corresponds to column data that may change over time and signal 673 (dashed line) is a value corresponding to the value of the column data stored in storage element 620 at the time of row selection and remains the same until the next row selection is made.

[0070] In such a backplane unit cell configuration, if the light emitting element 640 is an LED, its bandwidth is determined by the refresh rate f refresh and the bandwidth of both the rows and columns is f refresh .times.rows, where rows is the number of rows. Thus, the AM backplane unit cell has a simple circuit, requires low bandwidth, and provides variable current to the LEDs as light emitting elements 640.

[0071] 7A and 7B show diagrams 700a and 700b illustrating an example of a backplane unit cell operated in a binary coded pulse width modulation (B-PWM) manner. The structure of this backplane unit cell includes a first switch 610, a storage element 620, and a power supply 630, as shown in diagram 700a, which is similar to the structure of the backplane unit cell described above in connection with diagrams 600a and 60b of FIGS. 6A and 6b. Also shown is a light-emitting element 640 electrically connected to the power supply 630. However, in this example, a row select signal ("row") that selects a column data value ("column") stored in the storage element 620 is a digital signal that performs binary coded pulse width modulation of the value stored in the storage element 620 and is provided to the power supply 630 to drive the light-emitting element 640.

[0072] The operation of the backplane unit cell of diagram 700a above is explained in more detail with the aid of timing diagram 700b. Signal 770 represents a video frame and signal 771 represents a row selection of column data to be stored in storage element 620. Here, signal 771 is a binary coded signal for generating a binary coded pulse width modulation. In this example, the binary coded signal is a binary code of 1001. Signal 772 corresponds to the column data that may change over time and signal 773 (dashed line) is the value stored in storage element 620 at the time of row selection and remains the same until the next row selection is made.

[0073] In such a backplane unit cell configuration, if the light emitting element 640 is an LED, its bandwidth and the bandwidth of the rows and columns are given by f refresh rows 2 n where n is the number of bits in the binary coding. Thus, the B-PWM backplane unit cell has a simple circuit, has high bandwidth requirements, and provides a fixed current to an LED as a light emitting element 640.

[0074] 8A and 8B show diagrams 800a and 800b illustrating an example of a backplane unit cell operating in a single pulse width modulation (S-PWM) manner. The structure of this backplane unit cell includes a first switch 610, a memory element 620, a power supply 630, and a comparator 810, as shown in diagram 800a. Also shown is a light-emitting element 640 electrically connected to the power supply 630.

[0075] In such a backplane unit cell configuration, a row select signal ("row") selects a column data value ("column"), and the selected value is stored in storage element 620. The value stored in storage element 620 is then provided to comparator 810 and compared to a reference signal ("reference"), and the output of comparator 810 is provided to power supply 630 to drive light emitting element 640. The reference signal, also called a reference ramp, is a non-linear signal that can be used to incorporate gamma correction into this backplane unit cell configuration.

[0076] The operation of the backplane unit cell of diagram 800a above is explained in more detail using timing diagram 800b. Signal 870 represents a video frame, and signal 871 represents a row selection of column data to be stored in storage element 620. Signal 872 corresponds to column data that may change over time, and signal 873 (short dashed line) is the value stored in storage element 620 at the time of row selection and remains the same until the next row selection is made.

[0077] Signal 874 corresponds to a reference signal ("reference") provided to comparator 810, and signal 875 (long dashed line) corresponds to the output of comparator 810. Signal 874 goes low after signal 872 has completed providing all column data for the current video frame, and then goes up again. In some embodiments, signal 874 may be low and go up after signal 872 has completed providing all column data for the current video frame. Comparator 810 compares signals 873 and 874, and when the value of signal 873 (column data value) is greater than the value of signal 874 (reference signal value), signal 875 has a high value and power supply 630 drives light emitting element 640. On the other hand, when the value of signal 873 is less than the value of signal 874, signal 875 has a low value and power supply 630 does not drive light emitting element 640.

[0078] In such a backplane unit cell configuration, if the light emitting element 640 is an LED, its bandwidth is f refresh 2 n , and the bandwidth of both the rows and columns is f refresh 100 s, corresponding to 100 s rows. Therefore, the S-PWM backplane unit cell requires more complex circuitry, higher bandwidth requirements, fixed current for LEDs as light emitting elements 640, and smooth gray scale (e.g., gamma correction provided by a reference signal).

[0079] 9A-9C show diagrams 900a, 900b, and 900c illustrating an example of a backplane unit cell operating in a high dynamic range (HDR) pulse width modulation (H-PWM) mode. The structure of this backplane unit cell includes a first switch 610, a storage element 620, a power supply 630, a comparator 810, and a second switch 910, as shown in diagram 900a. A light emitting element 640 is also shown.

[0080] In such a backplane unit cell configuration, a row select signal ("row") selects a column data value ("column"), and the selected value is stored in the storage element 620. The value stored in the storage element 620 is then provided to a comparator 810 and compared to a reference signal ("reference"), and the output of the comparator 810 is provided to a second switch 910. The second switch 910 is used to select a power signal ("power") provided to the power supply 630 to drive the light emitting elements 640. The reference signal, also called a reference ramp, is a nonlinear signal that can be used to incorporate gamma correction in this backplane unit cell configuration. The power signal, also called a power ramp, is a nonlinear signal that can be used to achieve a high dynamic range in the same bandwidth. The reference signal can be a sublinear signal, and the power signal can be a superlinear signal.

[0081] The operation of the backplane unit cell of diagram 900a above is explained in more detail using timing diagram 900b. Signal 970 represents a video frame, and signal 971 represents a row selection of column data to be stored in storage element 620. Signal 972 corresponds to column data that may change over time, and signal 973 (short dashed line) is the value stored in storage element 620 at the time of row selection and remains the same until the next row selection is made.

[0082] Signal 974 corresponds to a reference signal ("Reference") provided to comparator 810, signal 975 (dash-dotted line) corresponds to a power signal ("Power"), and signal 976 (long dashed line) corresponds to the output of comparator 810. Comparator 810 compares signals 973 and 974, and when the value of signal 973 (column data value) is greater than the value of signal 974 (reference signal value), the output of comparator 810 is high and the power signal (signal 975) is selected as the input to power supply 630 for driving light-emitting element 640. As shown in FIG. 900b, when the output of comparator 810 is high, signal 976 follows signal 975. On the other hand, when the value of signal 973 is less than the value of signal 974, the output of comparator 810 is low and power supply 630 does not drive light-emitting element 640. As shown in FIG. 900b, when the output of comparator 810 is low, signal 976 is also low.

[0083] Diagram 900c shows an expanded view of signals 973, 974, 975, and 976 of diagram 900b of FIG. 9B to more clearly explain the operation. When signal 973 (e.g., the value stored in storage element 620) is less than signal 974 (e.g., a reference signal), the output of comparator 810 is high. In this case, signal 976 used by power supply 630 to drive light-emitting element 640 follows signal 975 (e.g., a power signal) selected by second switch 910. When the value of signal 974 is greater than the value of signal 973, the output of comparator 810 is low, so signal 976 is also low and signal 976 no longer follows signal 975.

[0084] In such a backplane unit cell configuration, if the light emitting element 640 is an LED, its bandwidth is f refresh 2 n , and the bandwidth of both the rows and columns is f refresh 1000 s x ...

[0085] 6A-9C above show various modulation options that can be used in conjunction with the backplane unit cells in the backplane. As mentioned above, one possible modulation option, analog modulation (AM), has simple circuitry, low bandwidth requirements, variable current to drive the LEDs, smooth grayscale gradations, and no flickering (see, e.g., Figs. 6A and 6B). Another possible modulation, digital modulation such as B-PWM, has simple circuitry, high bandwidth requirements, fixed current to drive the LEDs, and may cause streaking in the grayscale gradations and may cause flickering (see, e.g., Figs. 7A and 7B). Yet another possible digital modulation option, S-PWM, has complex circuitry, high bandwidth requirements, fixed current to drive the LEDs, smooth grayscale gradations, and may cause flickering (see, e.g., Figs. 8A and 8B). This disclosure presents yet another possible modulation option, described as HDR-PWM or H-PWM. This newly presented modulation option has the most complex circuitry and requires a lower bandwidth than B-PWM or S-PWM, reducing the current to drive LEDs at low light levels and providing smooth grayscale gradations that can sometimes cause flicker, making it suitable for displays that require high bandwidth and low power consumption.

[0086] Diagrams 1000a, 1000b, and 1000c of Figures 10A-10C show various examples of backplane addressing. Diagram 1000a shows a passive matrix structure that scans pixels row by row. In this example, pixels can refer to sub-cells or individual light emitting elements, as described above. The passive matrix structure is shown with dotted lines to indicate that it is implemented entirely on the array of pixels of the display panel, rather than the backplane of the display panel. This example shows multiple row selections 1010a, 1010b, multiple columns 1020a, 1020b, and multiple light emitting elements 1030 (e.g., LEDs) at the intersections of each row selection and each column.

[0087] In a passive matrix design, when LEDs are used as light emitting elements 1030, there are no driver cells or contacts for each LED, the contact arrangement is rows and columns, which can cause flicker in large displays, the LED peak currents can be large, and there is no matrix density on the backplane. In addition, the maximum LED duty cycle is 1 / (Row view Row pixel ).

[0088] In FIG. 1000b, an active matrix structure is shown in which all pixels (e.g., sub-lace cells) are driven at all times. The active matrix structure shows that the light emitting elements 1030 are fully implemented on the array of pixels of the display panel by arranging the light emitting elements 1030 as shown by the dotted lines, while the elements shown by the solid lines are implemented on the backplane of the display panel. This example shows multiple row selects 1040a, 1040b, multiple columns 1050a, 1050b, and multiple light emitting elements 1030 (e.g., LEDs). Furthermore, a backplane unit cell is used for each light emitting element 1030. In this example, it is a simple AM ​​backplane unit cell structure with a 2T1C circuit as described with reference to FIG. 6A and FIG. 6B. In this case, the transistor 1060 corresponds to the first switch 610, the capacitor 1064 corresponds to the storage element 620, and the transistor 1062 corresponds to the power supply 630. Other backplane unit cells as described above can also be used.

[0089] In an active matrix configuration, when LEDs are used as light emitting elements 1030, there is a driver cell or contact for each LED, and the contact arrangement is point and surface, resulting in no flicker, low peak LED current, and highest matrix density on the backplane. In addition, the maximum LED duty cycle is 1.

[0090] Finally, in FIG. 1000c, a hybrid matrix structure is shown. This structure can be used in any type of display. In the case of a light field display, the pixels or super-lux cells can use an active matrix approach, and the light emitting elements or sub-lux cells within those pixels can use a passive matrix approach. The hybrid matrix structure shows light emitting elements 1030, columns 1020a, 1020b, and row selects 1010a, 1010b. The light emitting elements 1030, columns 1020a, 1020b, and row selects 1010a, 1010b shown in dotted lines indicate that they are fully implemented on the array of pixels of the display panel, while the elements shown in solid lines, such as row selects 1040a and columns 1050a, 1050b, indicate that they are implemented on the backplane of the display panel. Each column of light emitting elements 1030 (e.g., LEDs) is in this example a backplane unit cell consisting of a simple AM ​​backplane unit cell with a transistor 1060, a capacitor, and a transistor 1062. Other backplane unit cells as described above may also be used.

[0091] In a hybrid matrix structure, when LEDs are used as light emitting elements 1030, 1 / Row per LED is used. view driver cells or contacts, the contacts are arranged in rows and columns, slight flicker may occur, the LED peak current is moderate, and the backplane matrix density is also moderate. In addition, the maximum LED duty cycle is 1 / Row view It is.

[0092] FIG. 11 shows a diagram 1100 illustrating an example of a backplane configured with a hybrid matrix topology of the structure shown in FIG. 10C diagram 1000c. As in FIG. 1000c, the dotted lines indicate elements or components that are implemented entirely on the array of pixels of the display panel, and the solid lines indicate elements or components that are implemented on the backplane of the display panel. In this example, multiple columns 1110 are shown for addressing light emitting elements 1130 (e.g., LEDs). The active matrix operation of the hybrid matrix topology implemented on the backplane includes AM row selection 1120, such as AM1 and AM2. The passive matrix operation of the hybrid matrix topology implemented on the array of light emitting elements 1130 includes PM row selection 1140, such as PM1.1, PM1.2, PM1.3, PM1.4 associated with AM1, and PM2.1, PM2.2, PM2.3, PM2.4 associated with AM2. The number of columns 1110, AM row select 1120, and PM row select 1140 are presented for purposes of illustration and not limitation.

[0093] Also shown in diagram 1100 is a backplane unit cell 11150, which may be any one of the backplane unit cells described above. For ease of illustration and ease of understanding of the hybrid matrix topology, a simple 2T1C backplane unit cell is shown.

[0094] A group 1160 of light emitting elements corresponding to a group of columns 1110 and one of the AM row selects 1120, along with a corresponding PM row select 1140, may correspond to the light emitting elements of a pixel (superlux cell). In this case, group 1160 can be said to correspond to one pixel. Similarly, group 1150 may correspond to a portion less than one pixel, e.g., half the light emitting elements of a pixel or a quarter of the light emitting elements of a pixel, or may correspond to a portion greater than one pixel, e.g., 1.25 pixels, 1.5 pixels, or 2 pixels.

[0095] In the example of FIG. 1100, each data column and each row select is directly accessible via one or more edges of the backplane.

[0096] 12A and 12B show diagrams 1200a and 1200b illustrating different examples of the driving operation of a backplane configured in the hybrid topology described with reference to diagram 1100 of FIG.

[0097] FIG. 1200a is a timing diagram showing an example of the timing of the active and passive matrix operations of a backplane hybrid topology. In this case, AM row selections (e.g., AM1, AM2, AM3) are offset from each other by one time unit, and PM row selections (e.g., PM1.1, PM2.1, PM3.1) are simultaneous. For example, AM1 is selected at time units 1, 5, 9, 13 (shown cross-hatched), AM2 is selected at time units 2, 6, 10, 14 (shown cross-hatched), and AM3 is selected at time units 3, 7, 11, 15 (shown cross-hatched).

[0098] After AM1, AM2, and AM3 are selected in time units 1, 2, and 3, respectively, PM1.1, PM2.1, and PM3.1 are selected in time unit 4 (shown with diagonal hatching). After AM1, AM2, and AM3 are selected in time units 5, 6, and 7, respectively, PM1.2, PM2.2, and PM3.2 are selected in time unit 8 (shown with diagonal hatching). After AM1, AM2, and AM3 are selected in time units 9, 10, and 11, respectively, PM1.3, PM2.3, and PM3.3 are selected in time unit 12 (shown with diagonal hatching). Finally, after AM1, AM2, and AM3 are selected in time units 13, 14, and 15, respectively, PM1.4, PM2.4, and PM3.4 are selected in time unit 16 (shown with diagonal hatching). A similar method to that described in this timing diagram can be followed for more than three AM row selects, and for more than four PM row selects per AM row select.

[0099] FIG. 1200b is a timing diagram illustrating another example of the timing of the active and passive matrix operations of a backplane hybrid topology. In this case, the AM row selections (e.g., AM1, AM2, AM3) are offset from each other by one time unit, as are the PM row selections (e.g., PM1.1, PM2.1, PM3.1). For example, AM1 is selected at time units 1, 4, 7, 10, 13 (shown cross-hatched), AM2 is selected at time units 2, 5, 8, 11, 14 (shown cross-hatched), and AM3 is selected at time units 3, 6, 9, 12 (shown cross-hatched).

[0100] After AM1, AM2, and AM3 are selected at time units 1, 2, and 3, respectively, PM1.1 is selected at time units 2 and 3 (shown with diagonal hatching), PM2.1 is selected at time units 3 and 4 (shown with diagonal hatching), and PM3.1 is selected at time units 4 and 5 (shown with diagonal hatching). The same goes for other selections of AM1, AM2, and AM3. In this way, PM row selection does not have to wait until all AM row selections have been made. If there are more than three AM row selections, and more than four PM row selections for one AM row selection, a method similar to that described in this timing diagram can also be followed.

[0101] 13A and 13B are flow charts illustrating methods 1300a and 1300b, respectively, of driving a backplane configured in a hybrid topology using the driving operations described with reference to timing diagrams 1200a and 1200b.

[0102] Method 1300a is a method of operating a backplane to drive light emitting elements in a display in which the backplane is configured in a hybrid topology, and is based at least in part on timing diagram 1200a of FIG.

[0103] At 1310, the method 1300a includes sequentially selecting different rows (e.g., AM1, AM2, AM3) in the backplane and, for each of a plurality of backplane unit cells associated with the different rows in the backplane, storing a value provided in a corresponding data column at the time the corresponding row in the backplane is selected.

[0104] At 1315, method 1300a includes simultaneously enabling application of drive signals to first rows of light-emitting elements associated with each of the different rows in the backplane (e.g., the rows selected in PM1.1, PM2.1, PM3.1) after all the different rows in the backplane have been selected and the values ​​stored, where the drive signals are based on the stored values.

[0105] In one embodiment, at 1320, the method 1300a may include simultaneously disabling application of drive signals to a first row of light emitting elements for each of the different rows in the backplane. At 1325, the method 1300a may also include sequentially selecting the different rows in the backplane again and storing, for each of a plurality of backplane unit cells associated with the different rows in the backplane, a value provided in a corresponding data column at the time the corresponding row in the backplane is again selected. At 1330, the method 1300a may further include simultaneously enabling application of drive signals to a second row of light emitting elements associated with each of the different rows in the backplane after all the different rows in the backplane have been again selected and the values ​​stored, the drive signals being based on the stored values. The first row of light emitting elements and the second row of light emitting elements may be part of a subset of rows of light emitting elements in the display. The first row of light emitting elements and the second row of light emitting elements in the subset are correspondingly distinct from the first physical row of light emitting elements and the second physical row of light emitting elements in the display.

[0106] The method 1300a may further include performing, for each remaining row of light-emitting elements after the first row of light-emitting elements in the set of rows of light-emitting elements associated with each of the different rows in the backplane, simultaneously disabling the application of drive signals to a previous row of light-emitting elements, sequentially selecting the different rows in the backplane again and, for each of a plurality of backplane unit cells associated with the different rows in the backplane, storing a value provided in a corresponding data column when the corresponding row in the backplane is again selected, and simultaneously enabling application of drive signals to a current row of light-emitting elements associated with each of the different rows in the backplane after all the different rows in the backplane have been selected again and the values ​​stored. The drive signals applied to the current row of light-emitting elements are based on the stored values.

[0107] In another aspect, the period during which application of the drive signal is enabled is longer than the period during which each row in the backplane is selected.

[0108] Method 1300b is another method of operating a backplane to drive light emitting elements in a display in which the backplane is configured in a hybrid topology, and is based at least in part on timing diagram 1200b of FIG.

[0109] At 1350, method 1300b includes sequentially selecting different rows (e.g., AM1, AM2, AM3) in the backplane and, for each of a plurality of backplane unit cells associated with the different rows in the backplane, storing a value provided in a corresponding data column at the time the corresponding row in the backplane is selected.

[0110] At 1355, method 1300b includes, for each different row in the backplane, after a corresponding value has been selected and stored, sequentially enabling application of drive signals to a first row of light-emitting elements associated with the corresponding row of the backplane (e.g., the row selected in PM1.1, PM2.1, PM3.1), the drive signals being based on the stored values.

[0111] In one embodiment, at 1360, the method 1300b includes maintaining application of the drive signals to the first row of enabled light-emitting elements until the corresponding row in the backplane is again selected.

[0112] In another aspect, at 1365, the method 1300b may include sequentially disabling application of drive signals to a first row of light emitting elements in different rows in the backplane. At 1370, the method 1300b may also include sequentially selecting different rows in the backplane again and, for each of a plurality of backplane unit cells associated with the different rows in the backplane, storing a value provided in a corresponding data column at the time the corresponding row in the backplane is again selected. At 1375, the method 1300b may further include, for each of the different rows in the backplane, after being selected and the corresponding value stored, enabling application of drive signals to a second row of light emitting elements associated with the corresponding row in the backplane. The drive signals applied to the second row of light emitting elements are based on the stored values. Additionally, at 1380, the method 1300b may also include maintaining application of drive signals to the enabled second row of light emitting elements until the corresponding row in the backplane is again selected. The first row of light emitting elements and the second row of light emitting elements may be part of a subset of rows of light emitting elements in the display. The first row of light emitting elements and the second row of light emitting elements in the subset are correspondingly different from the first physical row of light emitting elements and the second physical row of light emitting elements in the display.

[0113] The method 1300b may further include performing, for each of the remaining rows of light-emitting elements after a first row of light-emitting elements in the set of rows of light-emitting elements associated with each of the different rows in the backplane, sequentially disabling application of drive signals to a previous row of light-emitting elements in the different rows in the backplane, sequentially selecting the different rows in the backplane again and for each of a plurality of backplane unit cells associated with the different rows in the backplane, storing a value provided in a corresponding data column when the corresponding row in the backplane is again selected, and for each of the different rows in the backplane after being again selected and the corresponding value stored, enabling application of drive signals to a current row of light-emitting elements associated with the corresponding row in the backplane, wherein the drive signals applied to the current row of light-emitting elements are based on the stored values.

[0114] This disclosure describes various techniques and devices for implementing backplanes that enable low power consumption and high operating bandwidth for use with high resolution displays, such as light field displays.

[0115] Thus, although the present disclosure has been provided in accordance with the illustrated embodiments, those skilled in the art will readily recognize that there may be variations in the embodiments and that these variations are within the scope of the present disclosure. Accordingly, many modifications may be made by those skilled in the art without departing from the scope of the appended claims.

Claims

1. 1. A backplane unit cell included in a backplane for driving light emitting elements in a display, comprising: a first switch configured to select a data signal based on a selection signal; a storage element coupled to the first switch and configured to store a value of the data signal in response to the data signal selected by the first switch; a comparator coupled to the first switch and configured to generate an output based on a comparison of the value stored in the storage element with a value of a reference signal; a second switch coupled to the comparator and configured to receive the output of the comparator and select a power signal according to the output of the comparator, the second switch configured to provide the power signal as a control input signal to a power source in response to the power signal selected by the second switch; The backplane unit cell further comprises: the power supply configured to generate a drive signal based on the power signal to control emission of a selected one of the light emitting elements in the display; The power source is a current source or a voltage source; A backplane unit cell, wherein the reference signal is a nonlinear signal or a sublinear signal, and the power signal is a nonlinear signal or a superlinear signal.

2. The backplane unit cell of claim 1 , wherein the reference signal is a global reference signal provided to a plurality of backplane unit cells in the backplane, including the backplane unit cell.

3. The backplane unit cell of claim 1 or 2, wherein the power signal is a global power signal provided to a plurality of backplane unit cells in the backplane, including the backplane unit cell.

4. The backplane unit cell of any one of claims 1 to 3, wherein the memory element comprises at least one capacitor.

5. The backplane unit cell of any one of claims 1 to 4, wherein the storage element is configured to store the value of the data signal until a next value is stored in response to a next select signal that selects a next data signal at the switch.

6. the data signal is a backplane column select signal; The backplane unit cell according to any one of claims 1 to 5, wherein the select signal is a backplane row select signal.

7. the light emitting element is a light emitting diode (LED), The backplane unit cell of any one of claims 1 to 6, wherein the power supply is configured to drive the LED.

8. The backplane unit cell of claim 7 , wherein the LED is an inorganic LED.

9. 1. A method of operating a backplane unit cell included in a backplane to drive a light emitting element in a display, comprising: storing a value of a data signal in a storage element in the backplane unit cell in response to a select signal; comparing, by the backplane unit cell, the value stored in the storage element with a value of a reference signal to generate an output of the comparison; selecting, by the backplane unit cell, a power signal based on an output of the comparison to provide as a control input signal to a power supply; generating, by the power source of the backplane unit cell, a drive signal for a selected one of the light emitting elements in the display; the drive signal is generated based on the power signal and configured to adjust one or more operational characteristics of the selected light-emitting element; The method, wherein the reference signal is a nonlinear signal or a sublinear signal, and the power signal is a nonlinear signal or a superlinear signal.

10. The method of claim 9 , wherein the selection signal is coupled to a frame operation of the display.

11. receiving a next selection signal; storing, in the backplane unit cell, a next value of a data signal in the storage element in response to the received next select signal; The method of claim 10 , wherein the select signal and the next select signal are coordinated with a frame operation of the display.

12. the data signal is a backplane column select signal; The method of any one of claims 9 to 11, wherein the select signal is a backplane row select signal.

13. The method of any one of claims 9 to 12, wherein the reference signal is a global reference signal provided to a plurality of backplane unit cells in the backplane, including the backplane unit cell.

14. The one or more operational characteristics of the selected light-emitting element are: Bandwidth, current, Gamma correction, and dynamic range.

15. 15. The method of claim 9, wherein generating the drive signal comprises generating a pulse signal having a variable width for adjusting the one or more operating characteristics of the light-emitting element.

16. The method according to any one of claims 9 to 15, wherein the reference signal and the power signal are applied simultaneously during a frame operation of the display and after the data signals for the frame operation are provided to corresponding backplane unit cells including the backplane unit cell.

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