Method for storing calibration data of a device interface in a test system, device interface, test system and computer program product - Patents.com

Abstract

A test system for testing one or more devices under test is described, the test system including one or more channel modules and a device interface, wherein information for at least a first portion of calibration data is stored in a non-volatile memory associated with the one or more channel modules and information for at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface. Corresponding methods and computer programs are also described.

Description

[Technical field]

[0001] SUMMARY OF THE DISCLOSURE Embodiments according to the present invention relate to a method for storing calibration data for device interfaces in a test system, which may also be referred to as automatic test equipment.

[0002] A further embodiment of the present invention relates to a test system including one or more channel modules and a device interface.

[0003] A further embodiment of the present invention relates to a device interface for a test system.

[0004] Further embodiments according to the invention relate to respective computer programs.

[0005] SUMMARY OF THE PRESENT EMBODIMENTS Embodiments according to the present invention relate to storing calibration data for use with a test system on different parts. [Background technology]

[0006] Some conventional solutions are introduced below.

[0007] Automatic Test Equipment (ATE) is a system that automates the testing of devices called devices under test (DUTs) by quickly measuring and evaluating the test results. ATE can be a simple computer-controlled digital multimeter or a complex system with dozens of sophisticated test fixtures (real or simulated electronic test equipment) that can automatically test and diagnose defects in advanced electronic packaged components or wafer testing (including systems-on-chips and integrated circuits). The DUT is connected to the ATE through a DUT interface, or simply a device interface.

[0008] Structural testing allows systematic testing of individual structures (so-called cells) that implement the complex functions of digital blocks within a system on a chip (SOC). Structural testing includes various test techniques, including but not limited to memory built-in self-test, BIST, logic BIST (on-chip generated patterns), and scan testing (externally provided patterns). Individual tests are combined to test blocks. For example, scan testing is applied to blocks in a hierarchical manner (series or parallel).

[0009] Advanced structural test techniques apply a combination of externally provided test data (stimuli from Automated Test Equipment (ATE)) and an on-chip device for test (DFT) that deploys externally provided test data, so-called seeds, into the scan chains. The test results are compressed and reduced to the amount of test data provided to the IO, the main input / output interface of the SOC. This data, called received data, is compared to the data expected by the ATE. The received data may also be masked by the ATE.

[0010] DFT, also known as Design for Testing or Design for testability, typically consists of integrated circuit design techniques that add testability features to a hardware product design or device, or DUT. The added features make it easier to develop and apply tests to the DUT.

[0011] In the following, the above-mentioned structural test will be generally referred to as a scan test.

[0012] In order to obtain valid results from the device under test on the device interface, the device interface needs to be calibrated so that the individual transmission paths from the signal generator SG located on the device interface to the device under test do not introduce additional unwanted changes to the test results of the device under test, i.e., the signal transmission paths need to be compensated to improve the test results.

[0013] 1 shows prior art details of a test system, particularly the transmission path, in which a channel module 100 includes a signal generator, SG, 110, which transmits a signal via a transmission path, e.g., a cable 120, to a device under test on a DUT interface 130.

[0014] FIG. 1 shows a test system in which a channel module generates a signal that is transmitted to a device under test; similarly, although not shown, the transmission path from the device under test to the signal receiver on the channel module can be compensated for in the test system in which the channel module receives data from the device under test.

[0015] 2 shows a device interface 210, a test head 220, and a tester mainframe 230, which in one exemplary arrangement can comprise an entire test system. In the prior art, complete calibration data is stored in, for example, the tester mainframe.

[0016] However, with the increasing complexity of SOCs enabled by new manufacturing processes, there are challenges to scaling scan test cost-effectively.

[0017] First, the amount of test data that needs to be stored in the ATE is huge. Second, the test time required to supply the test data to the SOC IO is also increasing. Second, as on-chip complexity increases, it becomes difficult to distribute the test data to the blocks under test and generate the necessary clock signals.

[0018] Additionally, quality and reliability expectations for complex SOCs necessitate structural testing when the SOCs are deployed in end applications such as automotive and communications infrastructure systems.

[0019] Conventionally, calibration data only included propagation delay information for each transmission path. However, in recent high-speed interfaces, the frequency of the transmission path can exceed 5 GHz, and in order to compensate for losses in the transmission path, it is necessary to include frequency characteristic information of the transmission path in the calibration information.

[0020] In this situation, a concept is needed that improves the compromise between data storage, processing speed, and test quality and reliability when testing devices using automatic test equipment. Summary of the Invention

[0021] The present invention provides improved calibration data retention, reduced calibration time, and improved testing of high speed digital interfaces.

[0022] One embodiment of the present invention is a method for storing calibration data for a device interface in a test system, such a system comprising one or more channel modules and a device interface.

[0023] The method includes storing information of at least a first portion of the calibration data in a non-volatile memory associated with one or more channel modules, and storing information of at least a second portion of the calibration data in a non-volatile memory associated with the device interface.

[0024] It has been found to be beneficial in the case where the calibration data is split into two parts, and each part, the channel module and the device interface, which are separable from each other, is calibrated separately, so that each part has its own calibration data, which can be stored separately, so that when e.g. the device interface is replaced, it is not necessary to calibrate the entire system with which it is combined, but the calibration data of both parts can be combined, since the calibration data of each part is known in advance due to a factory calibration.

[0025] In a preferred embodiment, the method may further include storing at least information of a third portion of the calibration data on a non-volatile memory associated with the attachment located between the one or more channel modules and the device interface.

[0026] In test systems in which an attachment is placed between a channel module and a device interface, the attachment connecting the device interface to the remainder of the test system, it has been found to be beneficial to calibrate the attachment separately, so that replacement of the attachment does not require recalibration of the test system.

[0027] In a preferred embodiment of the method, the information in each of the first, second and / or third portions of the calibration data may be a memory address and an identification code of an associated one or more channel modules, devices and attachments, respectively, and the method further includes storing the calibration data in a storage device at the memory addresses.

[0028] It has been found to be advantageous for the non-volatile memory to store only the memory address of the calibration data, with the actual calibration data being stored in the storage device at this memory address, thereby allowing the size of the non-volatile memory of each component to be reduced.

[0029] A further embodiment of the present invention is a test system comprising one or more channel modules and a device interface, wherein information of at least a first portion of the calibration data is stored in non-volatile memory associated with the one or more channel modules and information of at least a second portion of the calibration data is stored in non-volatile memory associated with the device interface.

[0030] A further embodiment of the present invention is a device interface for a test system, the test system further comprising one or more channel modules, wherein information of at least a first portion of the calibration data is stored in non-volatile memory associated with the one or more channel modules, and information of at least a second portion of the calibration data is stored in non-volatile memory associated with the device interface.

[0031] In a preferred embodiment, the test system in both of the above device embodiments may further include an attachment located between the one or more channel modules and the device interface, and information of at least a third portion of the calibration data corresponding to the attachment is stored in a non-volatile memory associated with the attachment.

[0032] In a preferred embodiment, in a test system of both of the above device embodiments, the information of each of the first, second and / or third portions of calibration data may be a memory address and identification code of one or more associated channel modules, devices and attachments, respectively, and the calibration data may be stored in a storage device at that memory address.

[0033] For both apparatus embodiments, similar considerations apply as for the method embodiments.

[0034] The following features apply to all the above embodiments.

[0035] In a preferred embodiment, a first portion of the calibration data may be data corresponding to one or more channel modules, a second portion of the calibration data may be data corresponding to a device interface, and a third portion of the calibration data may be data corresponding to an attachment.

[0036] It has been found to be beneficial if each channel module and / or device interface and / or attachment is individually calibrated so that recalibration is not required when replaced.

[0037] In a preferred embodiment, the device interface may be a high speed digital interface.

[0038] As mentioned above, the present invention has been found to be particularly useful for high speed interfaces where the transmission line frequency can be well above 5 GHz.

[0039] In a preferred embodiment, the calibration data may include information of frequency characteristics of components for transmitting signals from one or more channel modules to a device.

[0040] It has been found that by including frequency characteristics in the calibration data, losses can be compensated for.

[0041] In a preferred embodiment, the calibration data includes at least two filters, which may describe frequency characteristics.

[0042] It has been found to be beneficial for frequency characteristics to be included in the calibration data in the form of filters.

[0043] In a preferred embodiment, the first portion of the calibration data may be a first filter, the second portion of the calibration data may be a second filter, and the third portion of the calibration data may be a third filter.

[0044] It has also been found that by making each filter different, the frequency characteristics can be stored more efficiently.

[0045] In a preferred embodiment, the filter may be a compensation filter.

[0046] Such compensation filters have been found to be useful as they facilitate incorporation of frequency characteristics into the calibration data.

[0047] In a preferred embodiment, the calibration data describes the frequency characteristics Transmission It may contain functions.

[0048] Frequency characteristics Transmission Being described as a function has been found to be advantageous for the efficiency of storing calibration data.

[0049] In a preferred embodiment, the calibration data may include one or more of digital filter tap coefficients, a Fourier series, and / or a two-port network model.

[0050] It has been found to be beneficial to store the calibration data where the calibration data includes digital filter tap coefficients, Fourier series, and / or two-port network models.

[0051] In a preferred embodiment, the calibration data can be unified by convolution for the time domain, multiplication for the frequency domain, and / or cascaded two-port networks for a two-port network.

[0052] It has been found that unifying the calibration data by, for example, convolution for the time domain, multiplication for the frequency domain, and / or cascaded two-port networks for two-port networks, is beneficial to the efficiency of storage of the calibration data.

[0053] In a preferred embodiment, non-volatile memory associated with one or more channel modules may be on the respective channel module, non-volatile memory associated with a device interface may be on the device interface, and / or non-volatile memory associated with an attachment may be on the attachment.

[0054] It has been found to be advantageous that the non-volatile memory storing the calibration data of a component, ie a channel module, a device interface and / or an attachment, is located on the respective component.

[0055] In a preferred embodiment, any information may be stored in encrypted form.

[0056] It has proven to be beneficial for the stored information to be stored in encrypted form, which can make it more secure.

[0057] In a preferred embodiment, one or more of the channel modules may include a signal generator or a signal receiver.

[0058] It has proven to be advantageous if the signal generators and / or receivers used for testing by the test system are located on the channel module, which allows further optimization of the tests.

[0059] In a preferred embodiment, the device may be a calibration module for calibrating a test system.

[0060] It has been found to be advantageous to use a special calibration module (or calibration device) at the device interface. Such an arrangement allows for easy calibration of the channel module and the device interface.

[0061] All embodiments are based on similar considerations as the calibration data storage method described above. However, it should be noted that all embodiments may be complemented by any of the features, functionalities and details described herein, in particular the features described above. Moreover, all embodiments may be complemented by the features, functionalities and details described herein, both individually and taken in combination.

[0062] A further embodiment according to the invention is a computer program for performing the methods described herein, which, when the computer program runs on a computer, is for performing the methods described herein. [Brief description of the drawings]

[0063] Next, an embodiment of the present invention will be described with reference to the accompanying drawings. [Figure 1] FIG. 1 is a schematic diagram of an automatic test equipment according to the prior art. [Diagram 2] FIG. 2 is a schematic diagram of an automatic test equipment according to the prior art. [Diagram 3] FIG. 3 is a block diagram of an information structure according to one embodiment of the present invention. [Figure 4] FIG. 4 is a block schematic diagram of an automatic test device according to an embodiment of the present invention. [Diagram 5] FIG. 5 is a block diagram of an information structure according to another embodiment of the present invention. [Figure 6] FIG. 6 is a block schematic diagram of an automatic test device according to another embodiment of the present invention. [Figure 7] FIG. 7 is a block diagram of an information structure according to another embodiment of the present invention. [Figure 8] FIG. 8 is a block schematic diagram of an automatic test equipment according to another embodiment of the present invention; [Figure 9] FIG. 9 is a flow chart of a method according to one embodiment of the present invention.

[0064] In the figures, like reference numbers indicate like elements and functions. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0065] In general, an automatic test equipment or test system 400 , 600 , 800 according to one embodiment of the present invention is for testing one or more devices under test (DUTs) that are connected to the test system via device interfaces 420 .

[0066] A DUT is tested, for example, by providing test data and receiving test results from the DUT in various ways. Testing a device under test requires data transmission in both directions between the test system and the DUT. Some of these transmissions are transmitted through the device interface.

[0067] The data may provide the DUT with test data, test signals, or test programs, and the data may be data received by the test system or processed therefrom, i.e. the data provided to the DUT is based on that data. Alternatively, the data may represent expected signals or results from the device under test that the DUT returns to the test system after testing. This data may be expected data, or require processing in the test system, such that the expected data is based on data received by the test system.

[0068] The data provided to one or more DUTs may be a combination of the options detailed above, so any combination of the above is possible.

[0069] Figure 3 is a block schematic diagram of an information structure 300 according to an embodiment of the present invention, which represents information of calibration data, which in Figure 3 is made up of two parts: a first part 310 and a second part 320.

[0070] 4 is a block schematic diagram of an automatic test equipment or test system 400 according to one embodiment of the present invention. The test system 400 comprises one or more channel modules 410 and a device interface 420. The device interface 420 serves to connect to a device, which is a device under test, that is to be tested by the test system 400. Alternatively, the device interface can be used to connect a calibration module (not shown) for calibration purposes.

[0071] Although only one is shown in the figure, a test system may have multiple channel modules 410. Those skilled in the art can readily adapt the present invention to other channel modules.

[0072] The first portion 310 of the calibration data 300 is stored in a non-volatile memory 430. As will be described later, the non-volatile memory can be located in different components. In FIG. 4, it is located in the device interface. It could very well be located in one or more of the channel modules 410 and in the attachment 470, introduced later, if present. The non-volatile memory 430 is associated with one or more of the channel modules 410. Furthermore, the second portion 320 of the calibration data 300 is stored in a non-volatile memory 430 associated with the device under test interface 420.

[0073] The first portion of the calibration data 310 may be data corresponding to one or more channel modules 410, i.e., the first portion describes calibration information associated with a respective channel module. The second portion of the calibration data 320 may be data corresponding to a device interface under test 420, i.e., the second portion describes calibration information associated with the device interface.

[0074] The device under test interface 420 may be a high-speed digital interface for devices under test that have high-speed capabilities.

[0075] The calibration data may further include information of frequency characteristics of components for transmitting signals from one or more channel modules 410 to the device under test. Obviously, the invention is equally applicable for the other direction, i.e., signals transmitted from the device under test to the channel module 410. In the first case, the channel module may have a signal generator 460, as seen in Fig. 4 and Fig. 6, and in the second case, the channel module 410 may have a signal receiver 465, as seen in Fig. 8. Although each figure shows a different arrangement of an embodiment of the invention, the channel module 410 may have either the signal generator 460 and / or the signal receiver 465 in any combination of features, i.e., in any embodiment.

[0076] The calibration data may have at least two filters that are filters describing frequency characteristics, for example, the first portion of the calibration data 310 is a first filter and the second portion of the calibration data 320 is a second filter, although the first and second portions can optionally be the same filter.

[0077] As an example, the first filter contains only information about the channel module, and the second filter contains only information about the device interface. The necessary information, i.e., calibration data, can be measured at the factory that manufactures the channel module, the device interface, i.e., the test system, before shipping to the customer.

[0078] Each component can be measured with equipment such as a network analyzer and an oscilloscope, and the obtained frequency characteristics can be transferred to appropriate parameters and stored in the corresponding non-volatile memory, i.e. the calibration data is originally individual data belonging to each component.

[0079] The filters may be, as one possibility, so-called compensation filters. The calibration data describes the frequency characteristics of the individual components of the test system 400. TransmissionAs further examples, the calibration data may include digital filter tap coefficients, Fourier series, and / or two-port network models, all of which may be used to describe the calibration information of respective portions of the test system 400.

[0080] It is also possible to unify the calibration data, or parts thereof, for example based on convolution for the time domain, multiplication for the frequency domain, and / or cascaded two-port networks for two-port networks.

[0081] In summary, as shown in Figure 3, the calibration data 300 is divided into two parts. The first part of the calibration data 310 can be, for example, a compensation filter corresponding to the channel module 410 and can include cables as shown in Figures 4, 6 and 8. The second part of the calibration data 320 can be, for example, a compensation filter corresponding to the device interface 420.

[0082] Typically, part of the calibration data, i.e., filters, for example, describe the frequency characteristics of components that make up the signal path from the signal generator 460 to the device under test or the path from the device under test to the signal receiver 465, as will be described below.

[0083] Frequency characteristics are mathematically equivalent information but interchangeable, so instead of a compensation filter Transmission It may be stored in the form of a function.

[0084] This information may be in the form of digital filter tap coefficients, Fourier series, and / or two-port network models.

[0085] Each data part, e.g. a filter, can be unified by a convolution if described in the time domain, by a multiplication if described in the frequency domain, or by a cascaded two-port network if described as a two-port network.

[0086] As shown in FIG. 4, information of, for example, the second portion 320 of the calibration data, ie, for example, filter information, is stored in non-volatile memory 430 on the device interface.

[0087] FIG. 6 is a block schematic diagram of an automatic test equipment according to another embodiment of the present invention. As pointed out above, more non-volatile memories 430, 440, 450 can be seen in FIG. 6. What has been described for the test system 400 also generally applies to the test system 600. FIG. 6 shows that each part of the test system 600, i.e., the channel module 410, the device interface 420 and the attachment 470, can configure its own non-volatile memory 430, 440, 450, respectively. Each calibration data can thereby be stored in the actual part of the test system to which it belongs.

[0088] Corresponding FIG. 5 is a block schematic diagram showing an information structure according to another embodiment of the present invention.

[0089] 5, the calibration data may be divided into two or more parts, for example into three parts corresponding to the device interface 420, the attachment 470, and the channel module 410.

[0090] In this embodiment, the non-volatile memory 440 associated with one or more channel modules 410 is shown to be located on the respective channel module. The non-volatile memory 430 associated with the device under test interface 420 can be located on the device interface.

[0091] The test system 600 may further include an attachment 470 that may be located between one or more of the channel modules 410 and the device interface 420. The calibration data may then include a third portion 330 of the calibration data that corresponds to the attachment. This third portion 330 may then be stored in a non-volatile memory 430, 440, 450 associated with the attachment. Again, this non-volatile memory may be located on the attachment 470 itself, but could also be located in one or more of the channel modules 410 or device interfaces 420.

[0092] FIG. 7 is a block schematic diagram of an information structure according to another embodiment of the present invention, and FIG. 8 is a block schematic diagram of an automatic test equipment according to another embodiment of the present invention.

[0093] In this embodiment, it is shown that in the test system 800, one or more channel modules 410 may have not only a signal generator 460 but also a signal receiver 465, as shown in Figures 4 and 6. As mentioned above, combinations of these, i.e., combinations of generators 460 and receivers 465, are possible in each embodiment of the present invention.

[0094] Thus, the present invention is also applicable to a receive signal path in which one or more of the channel modules 410 constitute a signal receiver 465 .

[0095] Furthermore, although not shown, it may also be a calibration module for calibrating the test systems 400, 600, and 800. In this manner, the present invention is also applicable to the case where the device under test is replaced with a calibration module that calibrates the test system itself.

[0096] Additionally, for all embodiments, it should be noted that the information in each of the first portion 310, second portion 320 and / or third portion 330 of the calibration data may also refer solely to a memory address and identification code of an associated device, which again may be one or more of a channel module 410, a device interface 420, or an attachment 470.

[0097] The calibration data can then be stored in a memory address storage device, which can be located within the tester mainframe, or in any other accessible memory location, which can be accessed via a wired or wireless connection by one of the known techniques.

[0098] The memory addresses describe the actual location of the calibration data, thus allowing for a small storage size since only the addresses are stored in the respective non-volatile memory (one of 430, 440, 450).

[0099] The memory whose address is stored in the non-volatile memory (one of 430, 440, 450) can be part of a test system, or connected to a test system, or to a tester mainframe. If connected to a test system or tester mainframe, this connection can be realized by any wired or wireless data connection.

[0100] That is, only the identification information (ID) may be provided in the non-volatile memory (one of 430, 440, 450), and the information portion (for example, filter information) may be stored in another storage area such as an external server via a network.

[0101] An embodiment may directly and solely reference the device interface 420, which is an individual part of the test system, as described above, and thereby include its own calibration data. However, it should be noted that the device interface 420 may also be modified in accordance with important points and aspects described herein, which may also be implemented individually or in combination in the device interface 420 described herein.

[0102] FIG. 9 is a flow chart of a method according to one embodiment of the present invention.

[0103] Method 900 is a method for storing calibration data of a device interface in the test systems 400, 600, 800 described above. The method includes storing 910 information of at least a first portion of the calibration data in non-volatile memory associated with one or more channel modules, and storing 920 information of at least a second portion of the calibration data in non-volatile memory associated with the device interface.

[0104] Further optional steps of method 900 are indicated by dotted lines in FIG.

[0105] If the test system 400, 600, 800 includes an attachment 470, the method 900 may further include storing 930 information of at least a third portion of the calibration data corresponding to the attachment in a non-volatile memory associated with the attachment.

[0106] Also, as with all possible embodiments, the stored information may be encrypted.

[0107] Also, the method 900 may further include storing 940 the calibration data in a storage device at the memory address, with the information in each of the first, second and / or third portions of the calibration data being a memory address and an identification code of an associated one or more channel modules, device interfaces and attachments, respectively.

[0108] The method is based on similar considerations as the test device described above. However, it should be noted that the method may be supplemented by any of the features, functionality and details described herein with respect to the test system as well. Furthermore, the method may be supplemented by features, functionality and details of the test system, both taken individually and in combination.

[0109] An embodiment according to the present invention creates a computer program for carrying out the methods described herein when the computer program runs on a computer.

[0110] In the present invention, the calibration data, i.e., the filter information, can be included in the component itself. This feature increases the portability of the calibration data. Furthermore, all the data, i.e., the filter data, can be generated with relatively little computational cost. Also, if the component is changed, there is no need to recalibrate either the test equipment or the component.

[0111] (Conclusion) In conclusion, the embodiments described herein may be optionally supplemented by any of the features or aspects described herein. However, it is pointed out that the features and aspects described herein may be used individually or in combination, and may be introduced individually and in combination into any of the embodiments described herein.

[0112] (Implementation Choice) Although some aspects have been described in the context of an apparatus, it will be apparent that these aspects also represent a description of the corresponding method, where a block or apparatus corresponds to a method step or feature of a method step. Similarly, aspects described in the context of a method step also represent a description of a corresponding block or item or feature of the corresponding apparatus. Some or all of the method steps may be performed by (or using) a hardware apparatus, such as, for example, a microprocessor, a programmable computer, or an electronic circuit. In some embodiments, one or more of the most important method steps may be performed by such an apparatus.

[0113] Depending on certain implementation requirements, embodiments of the present invention can be implemented in hardware or in software. Implementation can be done using a digital storage medium, such as a floppy disk, DVD, Blu-Ray, CD, ROM, PROM, EPROM, EEPROM or FLASH memory having electronically readable control signals stored thereon and cooperating (or capable of cooperating) with a programmable computer system to execute the respective method. The digital storage medium may therefore be computer readable.

[0114] Some embodiments of the present invention comprise a data carrier having an electronically readable control signal, the data carrier being capable of cooperating with a programmable computer system such that one of the methods described herein is performed.

[0115] Generally, embodiments of the present invention can be implemented as a computer program product having program code operable to perform one of the methods when the computer program product is run on a computer. The program code may, for example, be stored on a machine-readable carrier.

[0116] Other embodiments comprise the computer program for performing one of the methods described herein, stored on a machine readable carrier.

[0117] One embodiment of the inventive method is, therefore, a computer program having a program code for performing one of the methods described herein, when the computer program runs on a computer.

[0118] A further embodiment of the inventive method is therefore a data carrier (or digital storage medium, or computer readable medium) having recorded thereon a computer program for performing one of the methods described herein. The data carrier, digital storage medium, or recording medium is typically tangible and / or non-transitory.

[0119] A further embodiment of the inventive method is therefore a data stream or a sequence of signals representing the computer program for performing one of the methods described herein, The data stream or the sequence of signals may for example be arranged to be transferred via a data communication connection, for example the Internet.

[0120] A further embodiment comprises a processing means, for example a computer, or a programmable logic device, configured to or adapted to perform one of the methods described herein.

[0121] A further embodiment comprises a computer having installed thereon the computer program for performing one of the methods described herein.

[0122] A further embodiment according to the invention is an apparatus or a system configured to transfer (e.g. electronically or optically) a computer program for performing one of the methods described herein to a receiver. The receiver may be, for example, a computer, a mobile device, a memory device, etc. The apparatus or system may, for example, include a file server for transferring the computer program to the receiver.

[0123] In some embodiments, a programmable logic device (e.g., a field programmable gate array) may be used to perform some or all of the functionality of the methods described herein. In some embodiments, a field programmable gate array may cooperate with a microprocessor to perform one of the methods described herein. In general, the methods are preferably performed by any hardware apparatus.

[0124] The apparatus described herein may be implemented using a hardware apparatus, a computer, or a combination of a hardware apparatus and a computer.

[0125] The apparatus described herein, or any components of the apparatus described herein, may be implemented at least in part in hardware and / or software.

[0126] The methods described herein can be performed using a hardware apparatus, or using a computer, or using a combination of a hardware apparatus and a computer.

[0127] Any of the methods described herein, or any of the components of the apparatus described herein, may be implemented at least in part by hardware and / or software.

[0128] The above-described embodiments merely illustrate the principles of the present invention. It is understood that modifications and variations of the arrangements and details described herein will be apparent to those skilled in the art. It is therefore intended to be limited only by the scope of the claims and not by the specific details presented in the description and explanation of the embodiments herein.

Claims

1. 1. A method for storing calibration data for a device interface in a test system, comprising: the test system includes one or more channel modules and a device interface; The method comprises: storing information of at least a first portion of the calibration data in a non-volatile memory associated with the one or more channel modules; storing information of at least a second portion of the calibration data in a non-volatile memory associated with the device interface; The calibration data includes at least two filters; The filter describes a frequency characteristic. method.

2. 1. A method for storing calibration data for a device interface in a test system, comprising: the test system includes one or more channel modules and a device interface; The method comprises: storing information of at least a first portion of the calibration data in a non-volatile memory associated with the one or more channel modules; storing information of at least a second portion of the calibration data in a non-volatile memory associated with the device interface; The calibration data includes one or more of: tap coefficients of a digital filter, a Fourier series, and / or a two-port network model; method.

3. 1. A method for storing calibration data for a device interface in a test system, comprising: the test system includes one or more channel modules and a device interface; The method comprises: storing information of at least a first portion of the calibration data in a non-volatile memory associated with the one or more channel modules; storing information of at least a second portion of the calibration data in a non-volatile memory associated with the device interface; and storing information of at least a third portion of the calibration data corresponding to an attachment in a non-volatile memory associated with the attachment located between the one or more channel modules and the device interface. method.

4. 1. A method for storing calibration data for a device interface in a test system, comprising: the test system includes one or more channel modules and a device interface; The method comprises: storing information of at least a first portion of the calibration data in a non-volatile memory associated with the one or more channel modules; storing information of at least a second portion of the calibration data in a non-volatile memory associated with the device interface; each of the first, second and / or third portions of information of the calibration data being a memory address and an identification code of the associated one or more channel modules, device interfaces and attachments, respectively; The method further includes storing calibration data in a storage device at the memory address. method.

5. the first portion of the calibration data is data corresponding to the one or more channel modules; 5. The method according to any one of claims 1 to 4.

6. the second portion of the calibration data is data corresponding to the device interface; 6. The method according to any one of claims 1 to 5.

7. The device interface is a high-speed digital interface.

7. The method according to any one of claims 1 to 6.

8. the calibration data includes information of frequency characteristics of components for transmitting signals from the one or more channel modules to a device connected to the device interface; 8. The method according to any one of claims 1 to 7.

9. the first portion of the calibration data is a first filter; the second portion of the calibration data is a second filter; 9. The method according to claim 1 or any one of claims 5 to 8 which depend on claim 1.

10. the filter is a compensation filter; 10. The method according to claim 1, 9 or any one of claims 5 to 8 which depend on claim 1.

11. The calibration data includes a transfer function; The transfer function describes the frequency characteristics.

11. The method according to any one of claims 1 to 10.

12. Each calibration data is unified with a convolution for the time domain, a multiplication for the frequency domain, and / or a cascaded two-port network for a two-port network; 12. The method according to any one of claims 1 to 11.

13. the non-volatile memory associated with the one or more channel modules is located on each channel module; 13. The method according to any one of claims 1 to 12.

14. the non-volatile memory associated with the device interface is located on the device interface; 14. The method according to any one of claims 1 to 13.

15. the non-volatile memory associated with the attachment is on the attachment; 15. The method according to claim 3 or any one of claims 5 to 8, 11 to 14 which depend on claim 3.

16. Storing any information means storing encrypted information; 16. The method according to any one of claims 1 to 15.

17. the one or more channel modules include a signal generator or a signal receiver; 17. The method according to any one of claims 1 to 16.

18. a device connected to the device interface is a calibration module for calibrating the test system; 18. The method according to any one of claims 1 to 17.

19. A computer program for a processing device, comprising: The computer program comprises software code portions for carrying out the steps of any one of claims 1 to 18 when the computer program is run on a processing device. Computer program.

20. a computer readable medium having the software code portion stored thereon; The computer program is directly loadable into the internal memory of the processing device.

20. A computer program product as claimed in claim 19.

21. A test system including one or more channel modules and a device interface, At least a first portion of the calibration data is stored in a non-volatile memory associated with the one or more channel modules; and at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface; The calibration data includes at least two filters; The filter describes a frequency characteristic. Test system.

22. A test system including one or more channel modules and a device interface, At least a first portion of the calibration data is stored in a non-volatile memory associated with the one or more channel modules; and at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface; The calibration data includes one or more of: tap coefficients of a digital filter, a Fourier series, and / or a two-port network model; Test system.

23. A test system including one or more channel modules and a device interface, At least a first portion of the calibration data is stored in a non-volatile memory associated with the one or more channel modules; and at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface; storing information of at least a third portion of the calibration data corresponding to an attachment in a non-volatile memory associated with the attachment located between the one or more channel modules and the device interface; Test system.

24. A test system including one or more channel modules and a device interface, At least a first portion of the calibration data is stored in a non-volatile memory associated with the one or more channel modules; and at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface; each of the first, second and / or third portions of information of the calibration data being a memory address and an identification code of the associated one or more channel modules, device interfaces and attachments, respectively; storing calibration data in a storage device at said memory addresses; Test system.

25. 1. A device interface for a test system, comprising: The test system further includes one or more channel modules; at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface; The calibration data includes at least two filters; The filter describes a frequency characteristic. Device interface.

26. 1. A device interface for a test system, comprising: The test system further includes one or more channel modules; at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface; The calibration data includes one or more of: tap coefficients of a digital filter, a Fourier series, and / or a two-port network model; Device interface.

27. 1. A device interface for a test system, comprising: The test system further includes one or more channel modules; at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface; storing information of at least a third portion of the calibration data corresponding to an attachment in a non-volatile memory associated with the attachment located between the one or more channel modules and the device interface; Device interface.

28. 1. A device interface for a test system, comprising: The test system further includes one or more channel modules; at least a second portion of the calibration data is stored in a non-volatile memory associated with the device interface; each of the first, second and / or third portions of information of the calibration data being a memory address and an identification code of the associated one or more channel modules, device interfaces and attachments, respectively; storing calibration data in a storage device at said memory addresses; Device interface.

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