Input Voltage Protection

Abstract

In some examples, the voltage protector includes circuitry that compares the processor's input voltage to a threshold voltage and provides a throttle signal to the processor if the processor's input voltage droops below the threshold voltage. The processor's input voltage can then be set to a lower voltage so that processor power can be reduced.

Description

[Technical field]

[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims benefit of the filing date of U.S. patent application Ser. No. 16 / 369,529, filed March 29, 2019 by Uan-Zo-Li et al. and entitled “Input Voltage Protection.”

[0002] [Technical field] The present disclosure relates to using throttling to a processor to conserve input voltages, for example, to allow a processor (e.g., a central processing unit or CPU) to operate at a lower voltage level and / or to prevent the processor from black-screening. [Background technology]

[0003] It is becoming increasingly difficult to improve processor performance, central processing unit (CPU) performance, and / or system-on-chip (SoC) performance through new silicon processes. This may result in increased peak power of the SoC (and / or processor). Furthermore, leakage may become higher, e.g., a higher percentage of total processor or SoC power consumption. From a dynamic current perspective, Power Virus (PV) current may continue to increase.

[0004] It may be important to limit the processor core voltage or VID (Voltage Identification, Core Voltage, and / or Functional Voltage) and ensure that the core voltage does not fall below a minimum value, such as a minimum voltage defined by the CPU process and frequency. Thus, in some Power Delivery (PD) implementations, the required voltage setting may be calculated using the PV current value. However, increasing the current ratio, such as I(PV) / I(App) (ratio of power supply current to application current), may significantly increase the functional voltage, such as VID, which may result in power and performance penalties. [Brief description of the drawings]

[0005] [Figure 1] 1 illustrates a system according to some embodiments. [Diagram 2] 1 illustrates a system according to some embodiments. [Diagram 3] 1 illustrates a system according to some embodiments. [Figure 4] 4 illustrates a timing diagram according to some embodiments. [Diagram 5] 1 illustrates a system according to some embodiments. [Figure 6] 4 illustrates a timing diagram according to some embodiments. [Figure 7] 1 illustrates a system according to some embodiments. [Figure 8] 1 illustrates a system according to some embodiments. [Figure 9] 1 illustrates a system according to some embodiments. [Figure 10] 1 illustrates a system according to some embodiments. [Figure 11] 1 illustrates a system according to some embodiments. [Figure 12] 1 illustrates a system according to some embodiments. [Figure 13] 1 illustrates a system according to some embodiments. [Figure 14] 1 illustrates a system according to some embodiments. [Figure 15] 1 illustrates a computer system according to some embodiments. [Figure 16] 1 represents one or more processors and one or more media in accordance with some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0006] The following detailed description can be better understood with reference to the accompanying drawings, which include illustrative examples of numerous features of the disclosed subject matter.

[0007] In some cases, the same numbers are used throughout this disclosure and figures to reference the same components and features. In some cases, 100 series numbers refer to features first seen in Figure 1, 200 series numbers refer to features first seen in Figure 2, and so on.

[0008] Some embodiments relate to power surge protection. Some embodiments relate to surge protectors that can improve performance and lower power consumption (e.g., surge protectors that can improve performance and lower power consumption of one or more processors and / or one or more processor cores). Some embodiments relate to allowing a processor (e.g., a central processing unit or CPU) to operate at a lower voltage (e.g., by preventing the processor from black-screening). Some embodiments relate to allowing a processor input voltage to be set to a level below that required by a maximum processor current and a minimum processor voltage without risk of violating the minimum processor voltage.

[0009] Some embodiments relate to using a throttle to a processor (and / or a throttle to a processor core) to keep the input voltage from drooping below a minimum value (e.g., to keep the processor input voltage from drooping below a minimum value). In some embodiments, if the processor input voltage droops, the input voltage is maintained for as long as possible while throttling the processor. For example, in some embodiments, when the input voltage approaches a threshold voltage level (or a minimum voltage level), for example, a comparator monitoring the input voltage may send a throttle signal to the processor to throttle the processor. Moreover, in some embodiments, sufficient N Power may be supplied to create sufficient time for the throttling mechanism to operate, supplementing the power coming from the processor's main power supply.

[0010] According to some embodiments, throttling a processor may include, for example, adjusting the clock speed of the processor. This may also be referred to as, for example, dynamic frequency scaling. Processor throttling (e.g., central processing unit throttling) may be used to automatically slow down a processor, for example, to lower energy utilization and conserve battery life. Processor throttling may include adjusting the frequency of the processor, which may help, for example, to conserve power and reduce the amount of heat generated by the processor. Throttling a processor may also include stopping the execution of certain instructions (e.g., stopping the execution of less valuable instructions). Furthermore, throttling a processor may include reducing the dynamic capacitance (Cdyn) of the processor. Throttling a processor may include: Ma It may also include adding instructions in the pipeline, which is known to require little energy.

[0011] In some embodiments, voltage threshold protection is implemented so that the VID (processor voltage identification, core voltage, and / or functional voltage) can be set to a lower voltage than it would otherwise be set to. The power consumed by a processor grows as the square of the voltage (v 2 ), less processor power consumption is possible when setting the VID to a lower level. This can allow for higher processor frequency settings.

[0012] As mentioned above, it may be important to limit the processor core voltage or VID. This can be implemented, for example, by ensuring that the VID (voltage identification, core voltage, and / or functional voltage) does not fall below a minimum value. Therefore, in some power supply (PD) implementations, the required voltage setting may be calculated using the PV current value. However, increasing the current ratio, such as I(PV) / I(App) (ratio of power virus current to application current), may significantly increase the functional voltage, such as VID, which may result in power and performance penalties.

[0013] A processor core voltage, such as a central processing unit (CPU) core voltage, can be set based on core and motherboard (MD) parameters that increase the minimum core voltage. These parameters include: Maximum core current (Imax), Motherboard (MBA) load lines (LL), which can include AC load lines and DC load lines; Inaccuracies of the motherboard voltage regulator (MB VR) in its output voltage due to load line inaccuracies such as voltage tolerance band (TOB), DC offset, and ripple; Additional guardbands during manufacturing including reliability, load lines such as LL2 and LL1, wear-outs, etc. (product guardbands to ensure quality and reliability) may include one or more of:

[0014] Parameters such as those mentioned above may increase the input voltage to the processor core. Note that in many cases, the practical core peak current (peak Icore) will be much lower than the maximum current virus (Imax virus) since the application of dynamic capacitance (Cdyn) is much lower than the worst case dynamic capacitance (worst case Cdyn). Furthermore, the majority of motherboard voltage regulators (MB VRs) may not exhibit a worst case scenario that can be used to calculate the voltage tolerance band (TOB). Furthermore, product guard bands can be estimated for virus conditions and may take into account load line voltage droop (e.g., LL2 voltage droop). Dynamic power is a function of the square of the voltage (v 2 ), and the leakage power is proportional to at least the cube of the voltage (at least v 3 ), higher voltages can have a significant impact on processor power consumption.

[0015] The SoC power supply implementation uses one or more fully integrated voltage regulators (FIVR), which can allow for near-zero load lines (e.g., virtually zero LL3 and LL2). A non-linear controller (NLC) (e.g., NLC2) can be used to mitigate the effects of initial droop. For example, to reduce the current provided by a motherboard voltage regulator (MV VR), such as the MBVR, connected to the input rail of the FIVR, the processor may implement throttling of the SoC if the current exceeds a given value.

[0016] Power associated with high frequency bands may be detected and throttled in some implementations. A nonlinear controller (NLC) may be used as a safeguard against loops such as short-term high speeds of the processor core voltage. However, the efficiency of the NLC may decrease due to the ever-increasing processor core output voltage and the FIVR input net dropping. To handle the high speed transients, a low impedance connection between the FIVR input voltage and the processor core output plane may be enabled.

[0017] In some embodiments, advantageous benefits are possible without requiring an underlying framework of a fully integrated voltage regulator (FIVR). Mid-frequency behavior (e.g., from DC to tens of MHz) can be monitored and managed according to some embodiments. Some embodiments use an alternative power supply connected to the processor (e.g., to the CPU, SoC, processor core, etc.) with a switchable and controllable path. On-die dedicated circuitry can be used to monitor the voltage of the package decoupling capacitor. When the voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold, a signal can be sent to request processor throttling (e.g., CPU, SoC, and / or core throttling), and the path connecting the processor to the alternative power supply can be switched to a low impedance, allowing additional current flow to the processor (e.g., to the CPU, SoC, and / or core, etc.). In this way, the demand for extra current (e.g., current above a threshold) can be supported until it decays after a throttling event.

[0018] In some embodiments, the additional power source may be used to extend the "grace period" during throttling. In some embodiments, however, the processor throttling (e.g., CPU throttling) may be faster than the frequency of the impedance peaks. In this case, in some embodiments, protection may be implemented without the additional power source to extend the "grace period" during throttling.

[0019] In some embodiments, the actual application consumption may be taken into account for VID calculation using machine code (e.g., pcode). PV -I App )×R LL This results in a voltage gain savings of I PV is the power current, and I App is the application current and R LL is the load line resistance. This may correspond to a voltage savings ranging from, for example, about 50 mV to about 150 mV, depending on the specific product and motherboard voltage regulator (VR) characteristics. It may also reduce or eliminate the need for guard bands. This may help reduce power consumption.

[0020] In some embodiments, to prevent processor overload (e.g., overload of the CPU, SoC, and / or processor cores), the on-die voltage monitor may include both minimum and maximum voltage thresholds. In addition to clamping to the high voltage alternate power supply, Vss clamping may also be enabled. As a result, the voltage on the package decoupling capacitance can remain within predefined boundaries.

[0021] In some embodiments, the gap from maximum voltage (Vmax) to minimum voltage (Vmin) can be reduced. This can allow a lower core voltage (VID) to be set for a given frequency, enabling higher performance. Furthermore, in some embodiments, by keeping the effective on-die voltage within predefined limits, reliability guard bands can be reduced, power consumption can be reduced, and performance can be improved.

[0022] 1 illustrates a block diagram of an example system 100 according to some embodiments. System 100 includes a processor 102, a voltage regulator (VR) 104, and a surge protector 110. In some embodiments, processor 102 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 104 can be, for example, a motherboard voltage regulator (MBVR).

[0023] The surge protector 110 can assert a throttle signal to the processor 102 when the core voltage or the input voltage (e.g., the voltage Vin) falls below a set threshold level (e.g., the voltage Vth). The throttle signal to the processor 102 can be used to ensure that the core voltage (or the input voltage) Vin does not fall below the threshold voltage Vth.

[0024] In some embodiments, the surge protector 110 includes on-die dedicated circuitry that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 102 to throttle the processor 102 to protect the input voltage Vin, and the path connecting the processor 102 to the alternative power source may be switched to a low impedance to allow additional current flow to the processor 102.

[0025] 2 illustrates a block diagram of an example system 200 according to some embodiments. System 200 includes a processor 202, a voltage regulator (VR) 204, a capacitor 206 (e.g., package decoupling capacitance), a capacitor 208 (e.g., package decoupling capacitance), and a surge protector 210. In some embodiments, processor 202 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 204 can be, for example, a motherboard voltage regulator (MBVR).

[0026] The surge protector 210 includes a comparator 212. The comparator 212 can assert a throttle signal to the processor 202 when the core voltage or the input voltage (e.g., the voltage Vin) falls below a set threshold level (e.g., the voltage Vth). The throttle signal to the processor 202 can be used to ensure that the core voltage (or the input voltage) Vin does not fall below the threshold voltage Vth.

[0027] In some embodiments, the surge protector 210 includes on-die dedicated circuitry that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 202 to throttle the processor 202 to protect the input voltage Vin, and the path connecting the processor 202 to the alternative power source may be switched to a low impedance to allow additional current flow to the processor 102.

[0028] 3 illustrates a block diagram of an example system 300 according to some embodiments. System 300 includes a processor 302, a voltage regulator (VR) 204, a capacitor 306 (e.g., package decoupling capacitance), a capacitor 308 (e.g., package decoupling capacitance), and a surge protector 310. In some embodiments, processor 302 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 304 can be, for example, a motherboard voltage regulator (MBVR).

[0029] The surge protector 310 includes a comparator 312. The comparator 312 can assert a throttle signal to the processor 302 when the core voltage or input voltage (e.g., voltage Vin) falls below a set threshold level (e.g., voltage Vth). The throttle signal to the processor 302 can be used to ensure that the core voltage (or input voltage) Vin does not fall below the threshold voltage Vth. In some embodiments, the input voltage (Vin) is maintained relative to the threshold voltage (Vth). For example, in some embodiments, the input voltage (Vin) is maintained at a level that is at the threshold voltage (Vth), just above the threshold voltage (Vth), or between the processor minimum voltage Vmin and the threshold voltage Vth. In some embodiments, the input voltage (Vin) may also (or instead) be maintained at a minimum process level, for example, or between the threshold voltage and the minimum processor voltage.

[0030] The surge protector 310 includes a comparator 312, some control circuitry, and, in some embodiments, at least one transistor 314 (e.g., a field effect transistor and / or a switch S1) connected to a higher input voltage Vcc (e.g., a supply voltage of 1.8V, 3.3V, etc.). The surge protector 310 may also include a second transistor 316 (e.g., a field effect transistor and / or a switch S2) connected, for example, to a ground voltage. When the core voltage Vin falls below a set threshold level (e.g., a voltage Vth), the comparator 312 asserts a throttle signal to the processor 302 and begins to operate the transistor 314 (or the switch S1) to regulate the voltage Vin above a minimum processor voltage (e.g., Vmin). In some embodiments, the transistors 314 and 316 (e.g., switches S1 and S2) may operate to control the voltage Vin in a hysteretic operating mode. Transistor 316 (eg, switch S2) may be used in some embodiments to protect against overshoot of Vin. In some embodiments, only transistor 314 (eg, switch S1) is switched.

[0031] The transistors 314 and 316 (switches S1 and S2) are provided in the system for implementation to provide power in situations where throttling is not fast enough to maintain the voltage Vin above the threshold voltage Vth (and / or above Vmin and / or above VID). In this way, the transistors 314 and 316 can provide power to supplement the main power supply when throttling is not provided instantaneously. However, in some embodiments, when throttling is provided very quickly, the transistors 314 and 316 (switches S1 and S2) may not be necessary. For example, in such situations, the system 200 may be used.

[0032] In some embodiments, the surge protector 310 includes an on-die dedicated circuit that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 302 to throttle the processor 302 to protect the input voltage Vin, and the path connecting the processor 302 to the alternative power source (e.g., the path including transistors 314 and / or 316) may be switched to a low impedance to allow additional current flow to the processor 302.

[0033] Some embodiments allow for lowering of the VID voltage (e.g., voltage discrimination and / or core voltage) so that the processor can be protected against under-voltage droop (e.g., in the case of a virus current, a motherboard voltage regulator failure such as found in a situation where all controller inaccuracies occur simultaneously on the motherboard, and the processor draws current at a precise peak impedance such as the load line or LL2, etc.). In some embodiments, a voltage threshold protection is implemented so that VID can be set to a lower value than it would otherwise be set to. The power consumed by a processor scales as the square of the voltage (V 2 ), lower power consumption is possible when setting the VID to a lower level. This can allow for higher frequency settings.

[0034] 4 illustrates waveforms 400 according to some embodiments. Waveforms 400 may include, for example, a dynamic capacitance times frequency (Cdyn×F) waveform 402, an input voltage (Vin) waveform 404, and a throttle signal waveform 406. Waveforms 400 may be used to illustrate how processor throttling may be used according to some embodiments to ensure that the input voltage Vin does not fall below a threshold voltage Vth or a processor minimum voltage Vmin.

[0035] Waveform 402 includes an example waveform (Cdyn×F) 422 without threshold voltage protection and an example waveform (Cdyn×F) 424 with threshold voltage protection. For example, waveform 424 can illustrate an implementation according to some embodiments as implemented by system 300 of FIG. 3. Note that the power consumed by the processor can increase and decrease in the same manner as waveform 402, since the total power consumed by the processor can be proportional to Cdyn×F.

[0036] Waveforms 404 include an example waveform (Vin) 442 that does not use threshold voltage protection and an example waveform (Vin) 444 that does use threshold voltage protection. For example, waveform 444 can illustrate an implementation according to some embodiments such as implemented by system 300 of FIG.

[0037] Waveforms 406 include a waveform (Throttle) 464 (eg, for an embodiment using threshold voltage protection such as a throttle signal represented by system 300 of FIG. 3).

[0038] Waveforms 422 and 442 represent waveforms for a system that does not use threshold voltage protection to protect the input voltage Vin. The VID (e.g., motherboard VID) can be set high enough that even the worst processor perturbation will cause the processor voltage to exceed a minimum level. Waveforms 422 and 442 represent that when processor activity increases and the processor starts to consume more power, the processor input voltage droops until it reaches a certain value. Then, when the processor reduces its activity, the power drops and the voltage Vin recovers.

[0039] Waveforms 424 and 444 represent waveforms for a system using threshold voltage protection to protect the input voltage Vin according to some embodiments. For example, waveforms 424 and 444 can illustrate waveforms for the system 300 of FIG. 3 using surge protector 310. In some embodiments, the VID (e.g., motherboard VID) can be set lower, and with the lower voltage, the processor power consumption will be lower and the actual processor frequency will be higher. When the processor utilization spikes due to a higher application rate, the processor will start to consume more power and the processor input voltage (Vin) will start to droop. However, according to some embodiments, the droop of the input voltage (Vin) below a threshold level (Vth) can be detected (e.g., using a surge protector such as surge protector 310). When the input voltage (Vin) is detected to be drooping below a threshold level (Vth), a throttle signal (Throttle) may be sent to instruct the processor to throttle, and power may be supplied to maintain the processor input voltage (Vin) slightly above the threshold (Vth), as represented, for example, by waveforms 424, 444, and 464. Although not necessarily depicted in FIG. 4, in some embodiments, the input voltage (Vin) may also (or instead) be maintained, for example, at a minimum processor level or between a threshold voltage and a minimum processor voltage.

[0040] In some embodiments, as represented by the waveforms of FIG. 4, for example, frequency F may be increased and performance may be improved since there is less concern about voltage droop below the threshold voltage when processor throttling is implemented. This is represented in FIG. 4, for example, by the portion of waveform 424 that is higher than the corresponding portion of waveform 422 of FIG. 4. Thus, in some embodiments, since voltage threshold protection is implemented, VID may be set to a lower value than it would otherwise be set to. The power consumed by a processor scales as the square of the voltage (v 2 ), lower power consumption is possible when setting the VID to a lower level. This can allow for higher frequency settings.

[0041] A wide variety of embodiments may be implemented to control the input voltage (Vin) to this level (e.g., just above the threshold voltage Vth, at the minimum process level, and / or between the level of the threshold voltage and the minimum processor voltage). According to some embodiments, for example, one or more of the following may be implemented. Among others: Hysteretic control of a switch, such as switch S1, and possibly also switch S2 to eliminate overshoot; an array of switches with high resistance (instead of S1 or other than S1) and a controller that turns some or all of the switches on and / or off to maintain the voltage at a level just above a threshold voltage (in some embodiments the voltage may also or instead be maintained at a minimum process level or between the threshold voltage and a minimum processor voltage, for example); Use a linear regulator (instead of or in addition to S1), whose resistance is directly controlled by the controller to maintain the Vccin voltage; and / or One solution is to use a switching voltage regulator (instead of or in addition to S1) with a known and / or predefined parasitic inductance in series (e.g., an analogue of a traditional buck converter).

[0042] In some embodiments, throttling may be set for a particular duration and / or throttling may be deasserted after a given delay. In some embodiments, the voltage regulator may be turned off after the delay time has elapsed and / or because the voltage has exceeded an upper limit. In some embodiments, the duration of the delay may be based on the latency of the throttling function (e.g., based on the time it takes to throttle a processor, CPU, SoC, and / or cores, etc.).

[0043] 5 illustrates a block diagram of an example system 500, according to some embodiments. In some embodiments, system 500 can be similar to or the same as system 300, except that transistor 316 (switch S2) is removed from the system. System 500 includes a processor 502, a voltage regulator (VR) 504, a capacitor 506 (e.g., package decoupling capacitance), a capacitor 508 (e.g., package decoupling capacitance), and a surge protector 510. In some embodiments, processor 502 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 504 can be, for example, a motherboard voltage regulator (MBVR).

[0044] The surge protector 510 includes a comparator 512. The comparator 512 can assert a throttle signal to the processor 502 when the core voltage or input voltage (e.g., voltage Vin) falls below a set threshold level (e.g., voltage Vth). The throttle signal to the processor 502 can be used to ensure that the core voltage (or input voltage) Vin does not fall below the threshold voltage Vth. In some embodiments, the input voltage (Vin) is maintained relative to the threshold voltage (Vth). For example, in some embodiments, the input voltage (Vin) is maintained at a level that is at the threshold voltage (Vth), just above the threshold voltage (Vth), or between the processor minimum voltage Vmin and the threshold voltage Vth. In some embodiments, the input voltage (Vin) may also (or instead) be maintained at a minimum process level, for example, or between a threshold voltage and a minimum processor voltage.

[0045] The surge protector 510 includes a comparator 512, some control circuitry, and a transistor 514 (e.g., a field effect transistor and / or switch S1) connected to a higher input voltage Vcc (e.g., a supply voltage of 1.8V, 3.3V, etc.). When the core voltage Vin falls below a set threshold level (e.g., voltage Vth), the comparator 512 asserts a throttle signal to the processor 502 and begins to operate the transistor 514 (or switch S1) to regulate the voltage Vin above a minimum processor voltage (e.g., Vmin).

[0046] In some embodiments, the surge protector 510 includes an on-die dedicated circuit that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 502 to throttle the processor 502 to protect the input voltage Vin, and the path connecting the processor 502 to the alternative power source (e.g., the path including the transistor 514) may be switched to a low impedance to allow additional current flow to the processor 502.

[0047] 6 illustrates waveforms 600 according to some embodiments. Waveforms 600 may include, for example, a dynamic capacitance times frequency (Cdyn×F) waveform 602, an input voltage (Vin) waveform 604, and a throttle signal waveform 606. Waveforms 600 may be used to illustrate how processor throttling may be used according to some embodiments to ensure that the input voltage Vin does not fall below a threshold voltage Vth.

[0048] Waveform 602 includes an example waveform (Cdyn×F) 622 without threshold voltage protection and an example waveform (Cdyn×F) 624 with threshold voltage protection. For example, waveform 624 can illustrate an implementation according to some embodiments as implemented by system 500 of FIG. 5. Note that because the total power consumed by a processor can be proportional to Cdyn×F, the power consumed by the processor can increase and decrease in the same manner as waveform 602.

[0049] Waveforms 604 include an example waveform (Vin) 642 that does not use threshold voltage protection and an example waveform (Vin) 644 that does use threshold voltage protection. For example, waveform 644 can illustrate an implementation according to some embodiments as implemented by system 500 of FIG.

[0050] Waveforms 606 include a waveform (Throttle) 664 (eg, for an embodiment using threshold voltage protection such as a throttle signal represented by system 500 of FIG. 5).

[0051] Waveforms 622 and 642 represent waveforms for a system that does not use threshold voltage protection to protect the input voltage Vin. The VID (e.g., motherboard VID) can be set high enough that even the worst processor perturbation will cause the processor voltage to exceed a minimum level. Waveforms 622 and 642 represent that when processor activity increases and the processor starts to consume more power, the processor input voltage droops until it reaches a certain value. Then, when the processor reduces its activity, the power drops and the voltage Vin recovers.

[0052] Waveforms 624 and 644 represent waveforms for a system using threshold voltage protection to protect the input voltage Vin according to some embodiments. For example, waveforms 624 and 644 may illustrate waveforms for the system 500 of FIG. 5 using surge protector 510. In some embodiments, the VID (e.g., motherboard VID) can be set lower, and with the lower voltage, the processor power consumption will be lower and the actual processor frequency will be higher. When the processor utilization spikes due to a higher application rate, the processor will start to consume more power and the processor input voltage (Vin) will start to droop. However, according to some embodiments, the droop of the input voltage (Vin) below a threshold level (Vth) can be detected (e.g., using a surge protector such as surge protector 510). When the input voltage (Vin) is detected to be drooping below a threshold level (Vth), a throttle signal (Throttle) may be sent to instruct the processor to throttle, and power may be supplied to maintain the processor input voltage (Vin) slightly above the threshold (Vth), as represented, for example, by waveforms 624, 644, and 664. Although not necessarily depicted in FIG. 6, in some embodiments, the input voltage (Vin) may also (or instead) be maintained, for example, at a minimum processor level or between a threshold voltage and a minimum processor voltage.

[0053] In some embodiments, as represented by the waveforms of FIG. 6, for example, frequency F may be increased and performance may be improved since there is less concern about voltage droop below the threshold voltage when processor throttling is implemented. This is represented in FIG. 6, for example, by the portion of waveform 624 that is higher than the corresponding portion of waveform 622 of FIG. 6. Thus, in some embodiments, since voltage threshold protection is implemented, VID may be set to a lower value than it would otherwise be set to. The power consumed by a processor scales as the square of the voltage (v 2), lower power consumption is possible when setting the VID to a lower level. This can allow for higher frequency settings.

[0054] FIG. 7 illustrates a timing diagram 700 according to some embodiments. In some embodiments, the timing diagram 700 includes a waveform 704 that represents an input voltage Vin over time. For example, in some embodiments, the waveform 704 relates to a system such as the system 500 of FIG. 5 in which threshold voltage protection may be implemented (e.g., by throttling a processor to protect and / or maintain an input voltage, such as Vin, against a threshold voltage, such as Vth). As illustrated in FIG. 7, when the switch S1 (e.g., transistor 514) is turned on, the input voltage Vin increases from a minimum voltage Vmin to a maximum voltage Vmax. Similarly, as illustrated in FIG. 7, when the switch S1 (e.g., transistor 514) is turned off, the input voltage Vin decreases from a maximum voltage Vmax to a minimum voltage Vmin.

[0055] 8 illustrates a block diagram of an example system 800 according to some embodiments. System 800 includes a processor 802, a voltage regulator (VR) 804, a capacitor 806 (e.g., package decoupling capacitance), a capacitor 808 (e.g., package decoupling capacitance), and a surge protector 810. In some embodiments, processor 802 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 804 can be, for example, a motherboard voltage regulator (MBVR).

[0056] The surge protector 810 includes a comparator 812. The comparator 812 can assert a throttle signal to the processor 802 when the core voltage or the input voltage (e.g., the voltage Vin) falls below a set threshold level (e.g., the voltage Vth). The throttle signal to the processor 802 can be used to ensure that the core voltage (or the input voltage) Vin does not fall below the threshold voltage Vth.

[0057] The surge protector 810 includes a comparator 812, some control circuitry, and an array of switches 820 (e.g., an array of transistors and / or an array of field effect transistors). In some embodiments, the system 800 is similar to or the same as the system 300 of FIG. 3, except that the switch 820 replaces (or is in addition to) the transistor 314 (switch S1). In some embodiments, the array of switches 820 is an array of high resistance switches. In some embodiments, the input voltage (Vin) is maintained relative to a threshold voltage (Vth). For example, in some embodiments, the input voltage (Vin) is maintained at a level that is at the threshold voltage (Vth), just above the threshold voltage (Vth), or between the processor minimum voltage Vmin and the threshold voltage Vth. In some embodiments, the input voltage (Vin) may also (or instead) be maintained at a minimum process level, for example, or between the threshold voltage and the minimum processor voltage. In some embodiments, the controller can turn on and / or off some of the switches in the array 820 to maintain the input voltage Vin relative to a threshold voltage Vth (e.g., at the threshold voltage Vth, just above the threshold voltage Vth, between the processor minimum voltage Vmin and the threshold voltage Vth, or at some other voltage level).

[0058] The second transistor 816 (e.g., a field effect transistor and / or a switch S2) is connected, for example, to a ground voltage. When the core voltage Vin falls below a set threshold level (e.g., voltage Vth), the comparator 812 asserts a throttle signal to the processor 802 and begins operating the array of switches 820 to regulate the voltage Vin to or above a minimum processor voltage (e.g., Vmin). In some embodiments, the transistor 816 and the array of switches 820 may operate to control the voltage Vin in a hysteretic operating mode. The transistor 816 may be used in some embodiments to protect against overshoot of Vin. In some embodiments, only the switches in the array of switches 820 are switched and the transistor 816 is not switched.

[0059] In some embodiments, the surge protector 810 includes on-die dedicated circuitry that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 802 to throttle the processor 802 to protect the input voltage Vin, and a path connecting the processor 802 to an alternative power source (e.g., a path including the array of switches 820 and / or transistor 816) may be switched to a low impedance to allow additional current flow to the processor 802.

[0060] 9 illustrates a block diagram of an example system 900 according to some embodiments. System 900 includes a processor 902, a voltage regulator (VR) 904, a capacitor 906 (e.g., package decoupling capacitance), a capacitor 908 (e.g., package decoupling capacitance), and a surge protector 910. In some embodiments, processor 902 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 904 can be, for example, a motherboard voltage regulator (MBVR).

[0061] The surge protector 910 includes comparators 922, 924, 926, and 928. The comparator 928 can assert a throttle signal to the processor 902 when the core voltage or the input voltage (e.g., the voltage Vin) falls below a set threshold level (e.g., the voltage Vth4). The throttle signal to the processor 902 can be used to ensure that the core voltage (or the input voltage) Vin does not fall below the threshold voltage Vth4.

[0062] Surge protector 910 includes comparators 922, 924, 926, and 928, some control circuitry, and an array of transistors 932, 934, and 936 (e.g., an array of field effect transistors 932, 934, 936 and / or an array of switches 932, 934, 936). Any number of transistors 932, 934, and 936 and any number of comparators 922, 924, and 926 may be used according to some embodiments. Transistors 932, 934, and 936 are connected to a higher voltage Vcc (e.g., a supply voltage of 1.8V, 3.3V, etc.). Surge protector 910 may include an array of comparators and an array of switches (e.g., an array of transistors and / or an array of field effect transistors). In some embodiments, the system 900 is similar to or the same as the system 300 of FIG. 3, the system 500 of FIG. 5, and / or the system 800 of FIG. 8. In some embodiments, the array of switches 932, 934, 936 is an array of switches having high resistance. In some embodiments, the input voltage (Vin) is maintained relative to a threshold voltage (Vth1, Vth2, Vth3, and / or Vth4). For example, in some embodiments, the input voltage (Vin) is maintained at a level just above the threshold voltage (Vth1, Vth2, Vth3, and / or Vth4). In some embodiments, the input voltage (Vin) may also (or instead) be maintained at, for example, a minimum process level or between the level of the threshold voltage and a minimum processor voltage. In some embodiments, the controller can turn on and / or off some of the switches 932, 934, 936 in the array to maintain the input voltage Vin relative to one or more threshold voltages Vth (e.g., just above one or more threshold voltages Vth or at some other voltage level).

[0063] When the core voltage Vin falls below a set threshold level (e.g., voltages Vth1, Vth2, Vth3, and / or Vth4, and / or a combination of those voltages), the comparator 928 asserts a throttle signal to the processor 902 and begins operating the array of switches 932, 934, 936 and / or the comparators 922, 924, 926 to regulate the voltage Vin to or above a minimum processor voltage (e.g., Vmin). In some embodiments, the array of switches may operate to control the voltage Vin in a hysteretic mode of operation. One or more of the transistors may be used in some embodiments to protect against overshoot of Vin. In some embodiments, only some switches in the array of switches are switched and others are not switched.

[0064] In some embodiments, the surge protector 910 includes on-die dedicated circuitry that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses threshold voltages Vth1, Vth2, Vth3, Vth4, and / or any combination thereof), a throttle signal is sent to request throttling of the processor 902 to throttle the processor 902 to protect the input voltage Vin, and a path connecting the processor 902 to an alternative power source (e.g., a path including one or more switches in an array of switches) may be switched to a low impedance to allow additional current flow to the processor 902.

[0065] 10 illustrates a block diagram of an example system 1000 according to some embodiments. System 1000 includes a processor 1002, a voltage regulator (VR) 1004, a capacitor 1006 (e.g., package decoupling capacitance), a capacitor 1008 (e.g., package decoupling capacitance), and a surge protector 1010. In some embodiments, processor 1002 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 1004 can be, for example, a motherboard voltage regulator (MBVR).

[0066] The surge protector 1010 includes a comparator 1012. The comparator 1012 can assert a throttle signal to the processor 1002 when the core voltage or the input voltage (e.g., the voltage Vin) falls below a set threshold level (e.g., the voltage Vth). The throttle signal to the processor 1002 can be used to ensure that the core voltage (or the input voltage) Vin does not fall below the threshold voltage Vth.

[0067] The surge protector 1010 includes a comparator 1012 and some control circuitry. The surge protector 1010 may also include a linear regulator 1020 and / or at least one transistor (e.g., a field effect transistor and / or a switch) connected to a higher input voltage Vcc (e.g., a supply voltage of 1.8V, 3.3V, etc.). The surge protector 1010 may include a comparator 1012, a transistor 1016, and a linear regulator 1020. In some embodiments, the system 1000 is similar to or the same as the system 300 of FIG. 3, except that the linear regulator 1020 replaces (or is added in addition to) the transistor 314 (switch S1). In some embodiments, the linear regulator 1020 has its resistance directly controlled by a controller to maintain the Vccin voltage. In some embodiments, the input voltage (Vin) is maintained against a threshold voltage (Vth). For example, in some embodiments, the input voltage (Vin) is maintained at a level that is at the threshold voltage (Vth), slightly above the threshold voltage (Vth), or between the processor minimum voltage Vmin and the threshold voltage Vth. In some embodiments, the input voltage (Vin) may also (or instead) be maintained, for example, at a minimum process level, or between the threshold voltage and the minimum processor voltage. In some embodiments, the controller can control the linear regulator 1020 to maintain the input voltage Vin relative to the threshold voltage Vth (e.g., at the threshold voltage Vth, slightly above the threshold voltage Vth, between the processor minimum voltage Vmin and the threshold voltage Vth, or at some other voltage level).

[0068] The second transistor 1016 (e.g., a field effect transistor and / or a switch S2) is connected, for example, to a ground voltage. When the core voltage Vin falls below a set threshold level (e.g., voltage Vth), the comparator 1012 asserts a throttle signal to the processor 1002 and starts operating the linear regulator 1020 to regulate the voltage Vin above a minimum processor voltage (e.g., Vmin). In some embodiments, the transistor 1016 and the linear regulator 1020 may operate to control the voltage Vin in a hysteretic mode of operation. The transistor 1016 may be used in some embodiments to protect against overshoot of Vin. In some embodiments, the transistor 1016 is not switched.

[0069] In some embodiments, the surge protector 1010 includes an on-die dedicated circuit that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 1002 to throttle the processor 1002 to protect the input voltage Vin, and the path connecting the processor 1002 to the alternative power source (e.g., the path including the linear regulator 1020 and / or the transistor 1016) may be switched to a low impedance to allow additional current flow to the processor 1002.

[0070] 11 illustrates a block diagram of an example system 1100 according to some embodiments. System 1100 includes a processor 1102, a voltage regulator (VR) 1104, a capacitor 1106 (e.g., package decoupling capacitance), a capacitor 1108 (e.g., package decoupling capacitance), and a surge protector 1110. In some embodiments, processor 1102 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 1104 can be, for example, a motherboard voltage regulator (MBVR).

[0071] The surge protector 1110 includes a comparator 1112. The comparator 1112 can assert a throttle signal to the processor 1102 when the core voltage or the input voltage (e.g., the voltage Vin) falls below a set threshold level (e.g., the voltage Vth). The throttle signal to the processor 1102 can be used to ensure that the core voltage (or the input voltage) Vin does not fall below the threshold voltage Vth.

[0072] The surge protector 1110 includes a comparator 1112 and some control circuitry. The surge protector 1110 includes impedances 1132 (Z1) and 1134 (Z2). The surge protector 1110 may also include a linear regulator and / or at least one transistor 1114 (e.g., a field effect transistor and / or a switch) connected to a higher input voltage Vcc (e.g., a supply voltage of 1.8V, 3.3V, etc.). The surge protector 1110 may include a comparator 1112, a transistor 1114, and a linear regulator. In some embodiments, the transistor 1114 (switch S1) may be used as a linear regulator. In some embodiments, the system 1100 is similar or the same as the system 300 of FIG. 3, except that a linear regulator replaces (or is added in addition to) the transistor 314 (switch S1). In some embodiments, the linear regulator has its resistance directly controlled by the controller to maintain the Vccin voltage. In some embodiments, the input voltage (Vin) is maintained relative to a threshold voltage (Vth). For example, in some embodiments, the input voltage (Vin) is maintained at a level that is at the threshold voltage (Vth), slightly above the threshold voltage (Vth), or between the processor minimum voltage Vmin and the threshold voltage Vth. In some embodiments, the input voltage (Vin) may also (or instead) be maintained at, for example, a minimum process level, or between the level of the threshold voltage and the minimum processor voltage. In some embodiments, the controller can control the linear regulator to maintain the input voltage Vin relative to the threshold voltage Vth (e.g., at the threshold voltage Vth, slightly above the threshold voltage Vth, between the processor minimum voltage Vmin and the threshold voltage Vth, or at some other voltage level).

[0073] The second transistor 1114 (e.g., a field effect transistor and / or a switch S1) is connected, for example, to a ground voltage. When the core voltage Vin falls below a set threshold level (e.g., a voltage Vth), the comparator 1112 asserts a throttle signal to the processor 1102 and begins operating the linear regulator to regulate the voltage Vin above a minimum processor voltage (e.g., Vmin). In some embodiments, the transistor 1114 and the linear regulator may operate to control the voltage Vin. The transistor 1114 may be used in some embodiments to protect against overshoot of Vin. In some embodiments, the transistor 1114 is not switched.

[0074] In some embodiments, the surge protector 1110 includes on-die dedicated circuitry that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 1102 to throttle the processor 1102 to protect the input voltage Vin, and a path connecting the processor 1102 to an alternative power source (e.g., a path including a linear regulator and / or transistor 1114) may be switched to a low impedance to allow additional current flow to the processor 1102.

[0075] 12 illustrates a block diagram of an example system 1200 according to some embodiments. System 1200 includes a processor 1202, a voltage regulator (VR) 1204, a capacitor 1206 (e.g., package decoupling capacitance), a capacitor 1208 (e.g., package decoupling capacitance), and a surge protector 1210. In some embodiments, processor 1202 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 1204 can be, for example, a motherboard voltage regulator (MBVR).

[0076] The surge protector 1210 includes a comparator 1212. The comparator 1212 can assert a throttle signal to the processor 1202 when the core voltage or the input voltage (e.g., the voltage Vin) falls below a set threshold level (e.g., the voltage Vth). The throttle signal to the processor 1202 can be used to ensure that the core voltage (or the input voltage) Vin does not fall below the threshold voltage Vth.

[0077] The surge protector 1210 includes a comparator 1212 and some control circuitry. The surge protector 1210 may also include a switching voltage regulator 1220 and / or at least one transistor (e.g., a field effect transistor and / or a switch) connected to a higher input voltage Vcc (e.g., a supply voltage of 1.8V, 3.3V, etc.). The surge protector 1210 may include a comparator 1212, a transistor 1216, and a switching voltage regulator 1220. In some embodiments, the system 1200 is similar or the same as the system 300 of FIG. 3, except that the switching voltage regulator 1220 replaces (or is added in addition to) the transistor 314 (switch S1). In some embodiments, the switching voltage regulator 1220 may be a switching voltage regulator with a known and / or predefined parasitic inductance in series (e.g., analogous to a conventional buck converter). In some embodiments, the input voltage (Vin) is maintained against a threshold voltage (Vth). For example, in some embodiments, the input voltage (Vin) is maintained at a level that is at the threshold voltage (Vth), slightly above the threshold voltage (Vth), or between the processor minimum voltage Vmin and the threshold voltage Vth. In some embodiments, the input voltage (Vin) may also (or instead) be maintained, for example, at a minimum process level, or between the level of the threshold voltage and the minimum processor voltage. In some embodiments, the controller can control the switching voltage regulator 1220 to maintain the input voltage Vin relative to the threshold voltage Vth (e.g., at the threshold voltage Vth, slightly above the threshold voltage Vth, between the processor minimum voltage Vmin and the threshold voltage Vth, or at some other voltage level).

[0078] The second transistor 1216 (e.g., a field effect transistor and / or a switch S2) is connected, for example, to a ground voltage. When the core voltage Vin falls below a set threshold level (e.g., voltage Vth), the comparator 1212 asserts a throttle signal to the processor 1202 and begins operating the switching voltage regulator 1220 to regulate the voltage Vin above a minimum processor voltage (e.g., Vmin). In some embodiments, the transistor 1216 and the switching voltage regulator 1220 may operate to control the voltage Vin in a hysteretic mode of operation. The transistor 1216 may be used in some embodiments to protect against overshoot of Vin. In some embodiments, the transistor 1216 is not switched.

[0079] In some embodiments, the surge protector 1210 includes on-die dedicated circuitry that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 1202 to throttle the processor 1202 to protect the input voltage Vin, and the path connecting the processor 1202 to the alternative power source (e.g., the path including the switching voltage regulator 1220 and / or the transistor 11216) may be switched to a low impedance to allow additional current flow to the processor 1202.

[0080] 13 illustrates a block diagram of an example system 1300 according to some embodiments. System 1300 includes a processor 1302, a voltage regulator (VR) 1304, a capacitor 1306 (e.g., package decoupling capacitance), a capacitor 1308 (e.g., package decoupling capacitance), and a surge protector 1310. In some embodiments, processor 1302 can be, for example, a central processing unit (CPU), a system on a chip (SoC), and / or a processor core. In some embodiments, voltage regulator 1304 can be, for example, a motherboard voltage regulator (MBVR).

[0081] The surge protector 1310 includes a comparator 1312. The comparator 1312 can assert a throttle signal to the processor 1302 when the core voltage or the input voltage (e.g., the voltage Vin) falls below a set threshold level (e.g., the voltage Vth). The throttle signal to the processor 1302 can be used to ensure that the core voltage (or the input voltage) Vin does not fall below the threshold voltage Vth.

[0082] Surge protector 1310 includes a comparator 1312 and some control circuitry. Surge protector 1310 may also include a buck converter (e.g., a buck converter replacing switch S1 of FIG. 3). The buck converter may include a switch 1314, a switch 1316, and an inductor 1344. In some embodiments, surge protector 1310 may include a driver 1342 that drives the buck converter. In some embodiments, the buck converter may be a switching voltage regulator. In some embodiments, the buck converter may be a switching voltage regulator with a known and / or predefined parasitic inductance in series.

[0083] In some embodiments, the switch 1314 (S1) may be connected to a higher input voltage Vcc (e.g., a supply voltage of 1.8V, 3.3V, etc.). The surge protector 1310 may include a comparator 1312, transistors 1314 and 1316, a switching voltage regulator, and / or a buck converter. In some embodiments, the system 1300 is similar or the same as the system 300 of FIG. 3, except that a buck converter and / or a switching voltage regulator replaces (or is added to) the transistor 314 (switch S1). In some embodiments, the buck converter and / or the switching voltage regulator may be a switching voltage regulator with a known and / or predefined parasitic inductance in series (e.g., analogous to a conventional buck converter). In some embodiments, the input voltage (Vin) is maintained against a threshold voltage (Vth). For example, in some embodiments, the input voltage (Vin) is maintained at a level that is at the threshold voltage (Vth), slightly above the threshold voltage (Vth), or between the processor minimum voltage Vmin and the threshold voltage Vth. In some embodiments, the input voltage (Vin) may also (or instead) be maintained, for example, at a minimum process level, or between the level of the threshold voltage and the minimum processor voltage. In some embodiments, the controller can control a buck converter and / or a switching voltage regulator to maintain the input voltage Vin relative to the threshold voltage Vth (e.g., at the threshold voltage Vth, slightly above the threshold voltage Vth, between the processor minimum voltage Vmin and the threshold voltage Vth, or at some other voltage level).

[0084] The second transistor 1316 (e.g., a field effect transistor and / or a switch S2) is connected, for example, to a ground voltage. When the core voltage Vin falls below a set threshold level (e.g., a voltage Vth), the comparator 1312 asserts a throttle signal to the processor 1302 and begins operating a switching voltage regulator and / or a buck converter to regulate the voltage Vin above a minimum processor voltage (e.g., Vmin). In some embodiments, the transistors 1314 and 1316, the switching voltage regulator, the buck converter, and / or the inductor may operate to control the voltage Vin.

[0085] In some embodiments, the surge protector 1310 includes on-die dedicated circuitry that monitors the voltage Vin (e.g., monitors the voltage of a package decoupling capacitance). According to some embodiments, if this voltage (or its time derivative, or its time integral, or a combination of two or more of the voltage, its time derivative, and its time integral) crosses a predefined threshold (e.g., crosses a threshold voltage Vth), a throttle signal is sent to request throttling of the processor 1302 to throttle the processor 1302 to protect the input voltage Vin, and paths connecting the processor 1302 to an alternative power source (e.g., paths including a switching voltage regulator and / or a buck converter) may be switched to a low impedance to allow additional current flow to the processor 1302.

[0086] The processor VID (e.g., CPU VID) is usually VID=Vmin+TOB+Imax×LL3+CMV where VID is a voltage identification, core voltage, and / or functional voltage m, etc.; Vmin is a minimum voltage, such as a minimum core voltage; TOB is a voltage tolerance band, e.g., related to motherboard voltage regulator (VR) tolerance due to ripple, DC voltage offset, and load line error; Imax×LL3 is, e.g., from Intel Mobile Voltage Positioning (IMVP) tolerance band, related to a technique where the processor voltage is dynamically adjusted by the motherboard voltage regulator (VR) based on processor activity to reduce processor power; Imax is a peak current, such as the peak core current; LL3 is the motherboard load line; CMV is a circuit marginality variation (e.g., manufacturing guard bands including a guard band for the second droop LL2 and / or potential differences in package / die voltages between cores).

[0087] In some embodiments, for example, some of the guard bands are ignored and the VID setting attempts to eliminate many of the guard bands and get closer to Vmin, which can help reduce power consumption.

[0088] 14 illustrates a block diagram of a proportional-integral-derivative (PID) controller system 1400 according to some embodiments. The PID system 1400 includes a summation 1402, a summation 1404, a PID1 result 1406, a PID2 result 1408, a summation 1410, and a PID3 result 1412. The summation 1402 adds a throttle number and subtracts a throttle reference to obtain a corresponding PID1 result 1406. The PID1 result 1406 may also correspond to a VID (e.g., voltage identification, core voltage, and / or functional voltage, etc.). The summation 1404 adds a temperature reference and subtracts a core temperature to obtain a corresponding PID2 result 1408. The summation 1410 subtracts the PID1 result 1406 from the PID2 result 1408 to obtain a corresponding PID3 result 1412. The PID3 result 1412 may correspond to a frequency F.

[0089] System 1400 may be implemented according to some embodiments to provide a feedback mechanism. For example, if the VID is being aggressively lowered and an application is being executed by a processor that consumes a lot of power, a lot of throttling may occur according to some embodiments. System 1400 may be used in such a situation to monitor how many times throttling is occurring. If system 1400 identifies (e.g., with summation 1402) that a lot of throttling is occurring, system 1400 may also then determine that the VID may need to be increased. Increasing the VID may cost power, but it may be beneficial in certain circumstances. For example, if the VID is increased, the processor frequency may be increased by system 1400. However, in some embodiments, it may be beneficial to reduce the frequency (at least for a period of time) if the VID is increased. Furthermore, in some embodiments, system 1400 may maintain the frequency at the same level if the VID is increased. Furthermore, in some embodiments, summation 1402 and PID1 result 1406 may be in a separate loop from the rest of system 1400. That is, in some embodiments, temperature sensing and frequency adjustment can be in one loop, and throttle number and VID determination can be in another loop.

[0090] In some embodiments, system 1400 may determine (e.g., using summation 1404) that the processor temperature (and / or core temperature) is getting high. In such a situation, according to some embodiments, system 1400 may reduce the processor frequency if the processor (and / or processor core) is getting too hot. Similarly, in some embodiments, the processor frequency may be increased if the processor (and / or processor core) is cool (e.g., below a certain temperature).

[0091] In some embodiments, system 1400 may be enabled with artificial intelligence (AI) and / or learning algorithms, although system 1400 may be enabled with simple PID. System 1400 represents a basic implementation and other implementations are possible according to some embodiments.

[0092] In some embodiments, if Cdyn (dynamic capacitance) is higher in some applications and there are a significant number of throttling events, the processor may learn to mitigate over time, for example, by temporarily increasing the motherboard VID, allowing the processor to dissipate more power for a period of time, and / or by lowering the processor frequency (e.g., processor frequency F) if there is no benefit after a period of operation. In either case, the processor has options to further optimize performance, according to some embodiments. In some embodiments, closed loop operation may rely on increasing the VID if there are too many throttling events and decreasing the VID if there are too few throttling events. In some embodiments, the core temperature and VID may also affect the core frequency. In some embodiments, the processor's code (e.g., pcode) may directly change the VID if it is expected that the code will require a high enough load that there will be a large number of throttling events.

[0093] In some embodiments, power rails for processors (e.g., for small cores) can be merged more easily because the VID voltage required for the heaviest consumers can be reduced. In some embodiments, the voltage can be reduced even further, at the expense of throttling for some applications, while still supporting the required performance margin. In some embodiments, power rail merging can dramatically reduce platform power supply (PD) area and cost. In some embodiments, power rail merging can be implemented without a high power penalty using the techniques described herein.

[0094] In some embodiments, the surge protection (and / or surge protector) illustrated and described herein may be implemented at various locations within a system. For example, in some embodiments, the surge protection and / or surge protector illustrated and described herein may be implemented in one or more of, for example, a processor, a CPU, a processor core, a CPU core, a SoC, a package, a chipset, a platform controller hub (PCH), a controller, a power controller, and / or a motherboard. In some embodiments, the surge protection and / or surge protector may be designed to handle high frequency (e.g., in some embodiments, in the MHz range) voltage droop. In some embodiments, the surge protection and / or surge protector may be implemented with low power operation (e.g., allowing for lower power consumption, such as processor power consumption, rather than increasing performance). In some embodiments, throttling of the processor is implemented with a fast throttling scheme (faster than 1 μs).

[0095] FIG. 15 illustrates a computer system 1500 according to some embodiments. FIG. 15 illustrates a block diagram of an example computer device 1500 according to some embodiments. In some embodiments, computer device 1500 may be a computer device that includes one or more elements of any of the systems described and / or illustrated herein. In some embodiments, computer device 1500 may implement any of the techniques described herein. For example, computer device 1500 may implement processor throttling to protect input voltage, threshold voltage protection, surge protection, and / or include a surge protector illustrated and / or described herein. In some embodiments, one or more elements of computer device 1500 may be the same as or similar to, or may include portions of, systems 100, 200, 300, 500, 800, 900, 1000, 1100, 1200, 1300, and / or 1500, for example.

[0096] In some embodiments, any portion of the flows, circuits, or systems illustrated in any one or more of the figures and any of the embodiments described herein may be included in or implemented by computing device 1500. Computing device 1500 may be, for example, a computing device, a controller, a control unit, an application specific controller, and / or an embedded controller, among others.

[0097] The computing device 1500 may include a processor 1502 configured to execute stored instructions (e.g., instructions 1503) and a memory device 1504 (or storage 1504) that stores instructions 1505 executable by the processor 1502. The processor 1502 may be a single core processor, a multi-core processor, a computer cluster, or any number of other configurations. For example, the processor 1502 may be an Intel processor, such as an Intel Celeron, Pentium, Core, Core i3, Core i5, or Core i7 processor. In some embodiments, the processor 1502 may be an Intel x86-based processor. In some embodiments, the processor 1502 may be an ARM-based processor. The memory device 1504 may be a memory or storage device and may include volatile storage, non-volatile storage, random access memory, read-only memory, flash memory, or any other suitable memory or storage system. The instructions executed by the processor 1502 may also be used to implement any of the techniques described herein and / or illustrated in the figures. In some embodiments, the processor 1502 may include the same or similar features or functionality as various controllers or agents in this disclosure, for example.

[0098] The processor 1502 may also be linked through a system interconnect 1506 (e.g., PCI, PCI-Express, NuBus, etc.) to a display interface 1508 configured to connect the computing device 1500 to a display device 1510. The display device 1510 may include a display controller 1530. The display device 1510 may also include a display screen that is an integrated part of the computing device 1500. The display device 1510 may also include a computer monitor, television, or projector, among others, that is externally connected to the computing device 1500. In some embodiments, the computing device 1500 does not include a display interface or display device.

[0099] In some embodiments, display interface 1508 may include any suitable graphics processing unit, transmitter, port, physical interconnect, etc. In some examples, display interface 1508 may implement any suitable protocol for transmitting data to display device 1510. For example, display interface 1508 may transmit data using the High-Definition Multimedia Interface (HDMI) protocol, the DisplayPort protocol, or other protocols or communications links, etc.

[0100] Additionally, a network interface controller (also referred to herein as a NIC) 1512 may be configured to connect the computing device 1500 to a network (not shown) through a system interconnect 1506. The network (not shown) may be a cellular network, a radio network, a wide area network (WAN), a local area network (LAN), or the Internet, among others.

[0101] The processor 1502 may be connected through a system interconnect 1506 to an input / output (I / O) device interface 1514 configured to connect the computer host device 1500 to one or more I / O devices 1516. The I / O devices 1516 may include, for example, a keyboard or pointing device, which may include a touchpad or touch screen, among others. The I / O devices 1516 may be an internal part of the computing device 1500 or may be devices externally connected to the computing device 1500.

[0102] In some embodiments, the processor 1502 may also be linked through the system interconnect 1506 to a storage device 1518, which may include any other type of storage including a hard drive, a solid state drive (SSD), a magnetic drive, an optical drive, a USB flash drive, an array of drives, or a combination thereof. In some embodiments, the storage device 1518 may include any suitable application that may be used by the processor 1502 to implement any of the techniques described herein. In some embodiments, the storage device 1518 stores instructions 1509 that are executable by the processor 1502. In some embodiments, the storage device 1518 may include a basic input / output system (BIOS).

[0103] In some embodiments, a power device 1522 is provided. For example, in some embodiments, the power device 1522 can implement processor throttling to protect input voltage, threshold voltage protection, surge protection, and / or can include a surge protector as illustrated and / or described herein. In some embodiments, the power device 1522 can include one or more power supplies, such as one or more power supply units (PSUs). In some embodiments, the power device 1522 can be part of the system 1500, and in some embodiments, the power device 1522 can be external to the rest of the system 1500. In some embodiments, the power device 1522 can provide any of the techniques described herein. For example, in some embodiments, the power device 1522 can provide any of the techniques described with reference to and / or depicted in any of the drawings of the present application.

[0104] 15 also depicts system components 1524. In some embodiments, system components 1524 may include any of a display, camera, audio, storage, modem, or memory components, or any additional system components. In some embodiments, system components 1524 may include any system components that may be implemented in accordance with some embodiments described herein, such as power, voltage, power management, etc.

[0105] It should be understood that the block diagram of FIG. 15 is not intended to indicate that computing device 1500 should include all components shown in FIG. 15 in all embodiments. Rather, computing device 1500 may include fewer components or additional components not shown in FIG. 15 (e.g., additional memory components, embedded controllers, additional modules, additional network interfaces, etc.). Furthermore, any of the functionality of power device 1522 may be implemented, in part or in whole, in hardware or in a processor, such as processor 1502. For example, functionality may be implemented in, among other things, an application specific integrated circuit (ASIC), logic implemented in an embedded controller, or logic implemented in processor 1502. In some embodiments, functionality of power device 1522 may be implemented in logic, where logic as referred to herein may include any suitable hardware (e.g., a processor, among other things), software (e.g., an application, among other things), firmware, or any suitable combination of hardware, software, or firmware. In some embodiments, power device 1522 may be implemented in an integrated circuit.

[0106] 16 is a block diagram of an example of one or more processors 1602 and one or more tangible non-transitory computer readable media 1600 for throttling the processor to protect input voltage, threshold voltage protection, surge protection, etc., as illustrated and / or described herein. The one or more tangible non-transitory computer readable media 1600 may be accessed by the processor 1602 via a computer interconnect 1604. Additionally, the one or more tangible non-transitory computer readable media 1600 may include instructions (or code) 1606 for directing the processor 1602 to perform operations described herein. In some embodiments, the processor 1602 is one or more processors. In some embodiments, the processor 1602 can use the instructions (code) 1606 included in the medium 1600 to perform some or all of the same or similar functions that may be performed by other elements described herein (e.g., some or all of the functions or techniques described with reference to or depicted in any of FIGS. 1-15 ) that are described with reference to or depicted in any of the figures. In some embodiments, one or more of the processors 1602 may include the same or similar features or functionality as, for example, various controllers, units, or agents described in this disclosure. In some embodiments, one or more of the processors 1602, the interconnects 1604, and / or the medium 1600 may be included in the computing device 1500.

[0107] Various components discussed herein may be implemented using software components that may be stored on one or more tangible, non-transitory computer-readable media 1600 illustrated in Figure 16. For example, instructions 1606 may be adapted to instruct processor 1602 to perform any one or more of the operations described herein and / or with reference to the drawings.

[0108] It should be understood that any suitable number of software components may be included on one or more tangible, non-transitory computer-readable media 1600. Additionally, any number of additional software components, whether shown in FIG. 16 or not, may be included on one or more tangible, non-transitory computer-readable media 1600, depending on the particular application.

[0109] Various techniques and / or operations described herein (e.g., with reference to any one or more of FIGS. 1-16) may be performed by a control unit that may consist of one or more processors, monitoring logic, control logic, software, firmware, agents, controllers, logical software agents, system agents, and / or other modules. For example, in some embodiments, some or all of the techniques and / or operations described herein may be implemented by a system agent. Due to the various modules that may be used to perform these functions and their configurations and their distribution throughout and / or in different systems, they are not all specifically represented in their possible locations in the figures.

[0110] Reference in the specification to "one embodiment" or "embodiments" or "some embodiments" of the disclosed subject matter means that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the disclosed subject matter. Thus, although the phrases "in one embodiment" or "in some embodiments" may appear in various places throughout this specification, the phrases are not necessarily all referring to the same embodiment(s).

[0111] Example 1 In some examples, the voltage protector includes circuitry that compares the input voltage of the processor to a threshold voltage and provides a throttle signal to the processor when the input voltage of the processor droops below the threshold voltage.

[0112] Example 2 includes the subject matter of example 1. A circuit provides power to maintain an input voltage of a processor at or just above a threshold voltage.

[0113] Example 3 includes the subject matter of any of examples 1 to 2. The circuit sets the input voltage of the processor to a level below that required by the maximum processor current and the minimum processor voltage without risk of violating the minimum processor voltage.

[0114] Example 4 includes the subject matter of any of examples 1 to 3. The circuit deasserts the throttle signal after a time delay.

[0115] Example 5 includes the subject matter of any of examples 1 to 4. A circuit provides an alternate voltage to an input voltage of the processor in response to a throttle signal.

[0116] Example 6 includes the subject matter of any of examples 1 to 5. The circuit overcomes an overshoot condition.

[0117] Example 7 includes the subject matter of any of Examples 1 to 6. The circuit includes a first switch responsive to a throttle signal to provide an alternative voltage to an input voltage of the processor, and a second switch to overcome an overshoot condition.

[0118] Example 8 includes the subject matter of any of examples 1 to 7. The first switch and the second switch control an input voltage of the processor in a hysteretic operating mode.

[0119] Example 9 includes the subject matter of any of Examples 1 to 8. The circuit includes an array of switches having high resistance and a controller that turns at least some of the switches on and off to maintain an input voltage of the processor at a voltage relative to a threshold voltage.

[0120] Example 10 includes the subject matter of any of examples 1 to 9. The circuit includes a linear regulator and a controller that controls a resistance of the linear regulator to maintain an input voltage of the processor.

[0121] Example 11 includes the subject matter of any of examples 1 to 10. A circuit includes a switching voltage regulator that maintains an input voltage of a processor.

[0122] Example 12 includes the subject matter of any of examples 1 to 11. The circuit includes a buck converter that maintains an input voltage of the processor.

[0123] Example 13 includes the subject matter of any of examples 1 to 12. The circuit adjusts the threshold voltage in response to a number of processor throttles.

[0124] Example 14 includes the subject matter of any of examples 1 to 13. A circuit adjusts a frequency of a processor in response to a number of processor throttles.

[0125] Example 15 includes the subject matter of any of examples 1 to 14. A circuit adjusts a frequency of a processor in response to a temperature of the processor.

[0126] Example 16 includes the subject matter of any of Examples 1 to 15. The circuitry is included in or on one or more of a processor, a CPU, a processor core, a CPU core, a SoC, a package, a chipset, a platform controller hub (PCH), a controller, a power controller, and a motherboard.

[0127] Example 17 In some examples, a method can provide voltage protection. The method can include comparing an input voltage of the processor to a threshold voltage and can include providing a throttle signal to the processor when the input voltage of the processor droops below the threshold voltage.

[0128] Example 18 includes the subject matter of example 17. The method includes providing power to maintain an input voltage of a processor at or just above a threshold voltage.

[0129] Example 19 includes the subject matter of any of examples 17-18. The method includes setting an input voltage of a processor to a level below a level required by a maximum processor current and a minimum processor voltage without risk of violating the minimum processor voltage.

[0130] Example 20 includes the subject matter of any of examples 17 to 19. The method includes deasserting the throttle signal after a time delay.

[0131] Example 21 includes the subject matter of any of examples 17 to 20. The method includes providing an alternate voltage to an input voltage of the processor in response to a throttle signal.

[0132] Example 22 includes the subject matter of any of Examples 17 to 21. The method includes overcoming the overshoot condition.

[0133] Example 23 includes the subject matter of any of examples 17 to 22. The method includes switching to provide an alternative voltage to an input voltage of a processor in response to a throttle signal, and switching to overcome an overshoot condition.

[0134] Example 24 includes the subject matter of any of examples 17 to 23. The method includes controlling an input voltage of a processor in a hysteretic mode of operation.

[0135] Example 25 includes the subject matter of any of examples 17 to 24. The method includes turning on and off at least some switches in an array of switches to maintain an input voltage of a processor at a voltage relative to a threshold voltage.

[0136] Example 26 includes the subject matter of any of examples 17 to 25. The method includes linearly regulating and controlling a resistance to maintain an input voltage of the processor.

[0137] Example 27 includes the subject matter of any of examples 17 to 26. A method includes regulating a switching voltage to maintain an input voltage of a processor.

[0138] Example 28 includes the subject matter of any of examples 17 to 27. The method includes back-converting to maintain an input voltage of a processor.

[0139] Example 29 includes the subject matter of any of examples 17 to 28. The method includes adjusting a threshold voltage in response to a number of throttles of a processor.

[0140] Example 30 includes the subject matter of any of examples 17 to 29. The method includes adjusting a frequency of a processor in response to a number of throttles of the processor.

[0141] Example 31 includes the subject matter of any of examples 17 to 30. The method includes adjusting a frequency of a processor in response to a temperature of the processor.

[0142] Example 32 In some examples, a voltage protection system includes a processor and circuitry that compares an input voltage of the processor to a threshold voltage and provides a throttle signal to the processor if the input voltage of the processor droops below the threshold voltage.

[0143] Example 33 includes the subject matter of example 32. The circuit provides power to maintain an input voltage of a processor at or just above a threshold voltage.

[0144] Example 34 includes the subject matter of any of examples 32-33. The circuit sets the input voltage of the processor to a level below that required by the maximum processor current and the minimum processor voltage without risk of violating the minimum processor voltage.

[0145] Example 35 includes the subject matter of any of Examples 32 to 34. The circuit deasserts the throttle signal after a time delay.

[0146] Example 36 includes the subject matter of any of examples 32 to 35. A circuit provides an alternate voltage to an input voltage of a processor in response to a throttle signal.

[0147] Example 37 includes the subject matter of any of Examples 32 to 36. The circuit overcomes an overshoot condition.

[0148] Example 38 includes the subject matter of any of Examples 32 to 37. The circuit includes a first switch responsive to a throttle signal to provide an alternative voltage to an input voltage of the processor, and a second switch to overcome an overshoot condition.

[0149] Example 39 includes the subject matter of any of Examples 32 to 38. The first switch and the second switch control an input voltage of the processor in a hysteretic operating mode.

[0150] Example 40 includes the subject matter of any of Examples 32 to 39. The circuit includes an array of switches having high resistance and a controller that turns on and off at least some of the switches to maintain an input voltage of the processor at a voltage relative to a threshold voltage.

[0151] Example 41 includes the subject matter of any of examples 32 to 40. The circuit includes a linear regulator and a controller that controls a resistance of the linear regulator to maintain an input voltage of the processor.

[0152] Example 42 includes the subject matter of any of examples 32 to 41. A circuit includes a switching voltage regulator that maintains an input voltage of a processor.

[0153] Example 43 includes the subject matter of any of examples 32 to 42. The circuit includes a buck converter that maintains an input voltage of a processor.

[0154] Example 44 includes the subject matter of any of Examples 32 to 43. The circuit adjusts the threshold voltage in response to a number of processor throttles.

[0155] Example 45 includes the subject matter of any of examples 32 to 44. A circuit adjusts a frequency of a processor in response to a number of processor throttles.

[0156] Example 46 includes the subject matter of any of examples 32 to 45. A circuit adjusts a frequency of a processor in response to a temperature of the processor.

[0157] Example 47 includes the subject matter of any of Examples 32 to 46. The circuitry is included in or on one or more of a processor, a CPU, a processor core, a CPU core, a SoC, a package, a chipset, a platform controller hub (PCH), a controller, a power controller, and a motherboard.

[0158] Example 48 In some examples, the voltage protector includes means for comparing an input voltage of the processor to a threshold voltage, and means for providing a throttle signal to the processor when the input voltage of the processor droops below the threshold voltage.

[0159] Example 49 includes the subject matter of example 48. The voltage protector includes means for providing power to maintain an input voltage of the processor at or just above a threshold voltage.

[0160] Example 50 includes the subject matter of any of examples 48-49. The voltage protector includes means for setting the input voltage of the processor to a level below that required by the maximum processor current and the minimum processor voltage without risk of violating the minimum processor voltage.

[0161] Example 51 includes the subject matter of any of examples 48 to 50. The voltage protector includes means for deasserting the throttle signal after a time delay.

[0162] Example 52 includes the subject matter of any of examples 48 to 51. The voltage protection device includes means for providing an alternate voltage to an input voltage of the processor in response to a throttle signal.

[0163] Example 53 includes the subject matter of any of examples 48 to 52. The voltage protection device includes means for overcoming an overshoot condition.

[0164] Example 54 includes the subject matter of any of examples 48 to 53. The voltage protection device includes means for providing an alternative voltage to an input voltage of the processor in response to a throttle signal and means for overcoming an overshoot condition.

[0165] Example 55 includes the subject matter of any of examples 48 to 54. The voltage protection device includes means for providing an alternative voltage to an input voltage of the processor in response to a throttle signal, means for overcoming an overshoot condition, and means for controlling the input voltage of the processor in a hysteretic mode of operation.

[0166] Example 56 includes the subject matter of any of examples 48 to 55. A voltage protection device includes an array switching means having a high resistance and means for turning on and off at least a portion of the array switching means to maintain an input voltage of the processor at a voltage relative to a threshold voltage.

[0167] Example 57 includes the subject matter of any of examples 48 to 56. A voltage protector includes a linear regulator means and a means for controlling a resistance of the linear regulator to maintain an input voltage of the processor.

[0168] Example 58 includes the subject matter of any of examples 48 to 57. A voltage protection device includes a switching voltage regulator means for maintaining an input voltage of a processor.

[0169] Example 59 includes the subject matter of any of examples 48 to 58. The voltage protection device includes a buck converter means for maintaining an input voltage of the processor.

[0170] Example 60 includes the subject matter of any of examples 48 to 59. The voltage protector includes means for adjusting the threshold voltage in response to a number of processor throttles.

[0171] Example 61 includes the subject matter of any of examples 48 to 60. The voltage protector includes means for adjusting a frequency of the processor in response to a number of processor throttles.

[0172] Example 62 includes the subject matter of any of examples 48 to 61. The voltage protection device includes means for adjusting a frequency of the processor in response to a temperature of the processor.

[0173] Example 63 includes the subject matter of any of Examples 48 to 62. The voltage protector is in or on one or more of a processor, a CPU, a processor core, a CPU core, a SoC, a package, a chipset, a platform controller hub (PCH), a controller, a power controller, and a motherboard.

[0174] Example 64 In some examples, one or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed by at least one processor, cause the at least one processor to compare an input voltage of a processor (e.g., either the same processor or another processor) to a threshold voltage, and to provide a throttle signal to the processor (to the same or another processor) if the input voltage of the processor (the input voltage of the same processor or the input voltage of the other processor) droops below the threshold voltage.

[0175] Example 65 includes the means of example 64. One or more tangible, non-transitory computer readable media include a plurality of instructions that, in response to being executed by at least one processor, cause the at least one processor to provide power to maintain an input voltage of the processor at or just above a threshold voltage.

[0176] Example 66 includes the subject matter of any of Examples 64-65. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, when executed by at least one processor, cause the at least one processor to set the input voltage of the processor to a level below a level required by a maximum processor current and a minimum processor voltage without risk of violating the minimum processor voltage.

[0177] Example 67 includes the subject matter of any of Examples 64-66. The one or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed by at least one processor, cause the at least one processor to deassert a throttle signal after a time delay.

[0178] Example 68 includes the subject matter of any of Examples 64-67. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, when executed on at least one processor, cause the at least one processor to supply an alternate voltage to an input voltage of the processor in response to a throttle signal.

[0179] Example 69 includes the subject matter of any of Examples 64 to 68. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed by at least one processor, cause the at least one processor to overcome an overshoot condition.

[0180] Example 70 includes the subject matter of any of Examples 64-69. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, when executed by at least one processor, cause the at least one processor to provide an alternative voltage to an input voltage of the processor in response to a throttle signal to overcome an overshoot condition.

[0181] Example 71 includes the subject matter of any of Examples 64 to 70. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed on at least one processor, cause the at least one processor to control an input voltage of the processor in a hysteretic operating mode.

[0182] Example 72 includes the subject matter of any of Examples 64-71. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed by at least one processor, cause at least some switches in an array of switches to be turned on and off to maintain an input voltage of the high processor at a voltage relative to a threshold voltage.

[0183] Example 73 includes the subject matter of any of Examples 64 to 72. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed by at least one processor, cause the at least one processor to linearly regulate and control a resistance of the linear regulator to maintain an input voltage of the processor.

[0184] Example 74 includes the subject matter of any of Examples 64 to 73. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed by at least one processor, cause the at least one processor to regulate a switching voltage to maintain an input voltage of the processor.

[0185] Example 75 includes the subject matter of any of Examples 64 to 74. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed by at least one processor, cause the at least one processor to back-convert to maintain an input voltage of the processor.

[0186] Example 76 includes the subject matter of any of Examples 64-75. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed by at least one processor, cause the at least one processor to adjust a threshold voltage in response to a number of processor throttles.

[0187] Example 77 includes the subject matter of any of Examples 64-76. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed on at least one processor, cause the at least one processor to adjust a frequency of the processor in response to a number of processor throttles.

[0188] Example 78 includes the subject matter of any of Examples 64-77. One or more tangible, non-transitory computer-readable media include a plurality of instructions that, in response to being executed on at least one processor, cause the at least one processor to adjust a frequency of the processor in response to a temperature of the processor.

[0189] Example 79 In some examples, the apparatus includes means for carrying out the methods found in any other example.

[0190] Example 80 In some examples, the system includes means for performing the methods found in any of the other examples.

[0191] Example 81 In some examples, the machine-readable storage includes machine-readable instructions that, when executed, implement a method or realize an apparatus found in any other example.

[0192] Example 82 In some examples, one or more machine-readable media contain code that, when executed, causes a machine to perform the method of any of the other examples.

[0193] Although example embodiments and examples of the disclosed subject matter have been described with reference to schematic, flow diagrams, block diagrams, and the like in the drawings, it will be readily apparent to one skilled in the art that many other ways of implementing the disclosed subject matter may alternatively be used. For example, the arrangement of elements in the diagrams or the order of execution of blocks in the diagrams may be changed, or some of the circuit elements in the circuit diagrams and blocks in the described blocks / flows may be changed, deleted, or combined. Any elements illustrated or described may be changed, deleted, or combined.

[0194] In the above description, various aspects of the disclosed subject matter have been described. For purposes of explanation, specific numbers, systems and configurations have been set forth to provide a thorough understanding of the subject matter. However, as will be apparent to one of ordinary skill in the art, the subject matter may be practiced without the specific details. In other instances, well-known features, components, or modules have been omitted, simplified, combined, or separated so as not to obscure the disclosed subject matter.

[0195] Various embodiments of the disclosed subject matter may be implemented in hardware, firmware, software, or combinations thereof, and may be described with reference to or in conjunction with program code, such as instructions, functions, procedures, data structures, logic, application programs, design representations or formats for simulation, emulation, and production of designs, that, when accessed by a machine, cause the machine to perform a task, define an abstract data type or low-level hardware context, or generate a result.

[0196] The program code may represent the hardware using a hardware description language or other functional description language that essentially provides a model of how the designed hardware is expected to perform. The program code may be an assembly or programming language or a hardware definition language, or data that may be compiled or interpreted. Moreover, it is common in the art to speak of software as taking an action or causing a result in some way. Such expressions are merely a shorthand way of stating the execution of the program code by a processing system, which causes the processor to perform an action or produce a result.

[0197] The program code may be stored in one or more volatile or non-volatile memory devices, such as storage devices or related machine readable machine accessible media, including, for example, solid state memory, hard drives, floppy disks, optical storage, tape, flash memory, memory sticks, digital video disks, digital versatile disks (DVDs), and the like, as well as more exotic media, such as machine accessible bio-state preservation storage. A machine readable medium may include any tangible mechanism for storing, transmitting, or receiving information in a form readable by a machine, such as an antenna, optical fiber, a communications interface, and the like. The program code may be transmitted in the form of packets, serial data, parallel data, and the like, and may be used in a compressed or encrypted format.

[0198] The program code may be implemented in a program executed by a programmable machine such as a mobile or fixed computer, a personal digital assistant, a set-top box, a mobile phone and a pager, and other electronic devices. Each machine includes a processor, a volatile or non-volatile memory readable by the processor, at least one input device, or one or more output devices. The program code may be applied to data entered using the input device to execute the described embodiments and generate output information. The output information may be applied to one or more output devices. As will be apparent to one skilled in the art, embodiments of the disclosed subject matter may be implemented in a variety of computer system configurations, including multi-processor or multi-core processor systems, minicomputers, mainframe computers, and pervasive or small computers or processors that may be incorporated in virtually any device. Embodiments of the disclosed subject matter may also be implemented in distributed computing environments where tasks may be performed by remote processing devices that are linked through a communications network.

[0199] Although operations may be described as sequential processes, some of the operations may actually be performed in parallel, simultaneously, or in a distributed environment, and with program code stored locally or remotely for access by single or multi-processor machines. Further, in some embodiments, the order of operations may be rearranged without departing from the spirit of the disclosed subject matter. The program code may be used by or in conjunction with an embedded controller.

[0200] Although the disclosed subject matter has been described with reference to illustrative embodiments, this specification is not intended to be construed in a limiting sense. Various modifications of the illustrative embodiments, as well as other embodiments of the subject matter, will be apparent to those of ordinary skill in the art to which the disclosed subject matter pertains and are deemed to be within the scope of the disclosed subject matter. For example, in each illustrated and described embodiment, it should be understood that the figure diagrams and description in the specification are not intended to indicate that the illustrated or described device includes all of the components shown in or described with reference to a particular figure. Furthermore, each element may be implemented with logic, and logic as referred to herein may include, for example, any suitable hardware (e.g., a processor, among others), software (e.g., an application, among others), firmware, or any suitable combination of hardware, software, or firmware.

Claims

1. a circuit having a comparator configured to compare an input voltage of a processor to a threshold voltage and provide a throttle signal to the processor when the input voltage of the processor droops below the threshold voltage; the circuit further comprises a first switch inserted in a path between an alternative voltage and the input voltage, the first switch being configured to operate in response to the throttle signal output by the comparator and to supply the alternative voltage to the input voltage of the processor such that the input voltage is maintained relative to the threshold voltage. Voltage protection device.

2. the first switch of the circuit provides the alternative voltage to maintain the input voltage of the processor at or just above the threshold voltage.

2. The voltage protection device of claim 1.

3. the circuit deasserts the throttle signal after a time delay.

3. A voltage protection device according to claim 1 or 2.

4. The circuit overcomes an overshoot condition. A voltage protection device according to any one of claims 1 to 3.

5. the circuit including a second switch interposed in a path between the input voltage and ground to overcome the overshoot condition.

5. The voltage protection device of claim 4.

6. the first switch and the second switch control the input voltage of the processor in a hysteresis operation mode; 6. The voltage protection device of claim 5.

7. the first switch comprises an array of switches having a high resistance, the circuit further comprising a controller for turning on and off at least a portion of the switches in the array to maintain the input voltage of the processor at a voltage relative to the threshold voltage.

7. A voltage protection device according to any preceding claim.

8. the circuit further includes a linear regulator and a controller that controls a resistance of the linear regulator to maintain the input voltage of the processor at a voltage relative to the threshold voltage.

7. A voltage protection device according to any preceding claim.

9. the circuit includes a switching voltage regulator that maintains the input voltage of the processor at a voltage relative to the threshold voltage; 7. A voltage protection device according to any preceding claim.

10. the circuit adjusts the threshold voltage in response to a number of throttles of the processor.

10. A voltage protection device according to any preceding claim.

11. the circuitry adjusts the frequency of the processor in response to a number of throttles of the processor.

11. A voltage protection device according to any preceding claim.

12. the circuitry adjusts the frequency of the processor in response to a temperature of the processor; 12. A voltage protection device according to any preceding claim.

13. the circuitry is included in or on one or more of a processor, a CPU, a processor core, a CPU core, a SoC, a package, a chipset, a platform controller hub (PCH), a controller, a power controller, and a motherboard; 13. A voltage protection device according to any preceding claim.

14. 1. A method for operating a voltage protection device, comprising: comparing an input voltage of the processor to a threshold voltage; providing a throttle signal to the processor when the input voltage of the processor droops below the threshold voltage; providing the alternate voltage to the input voltage of the processor in response to the throttle signal with a first switch interposed in a path between the input voltage and an alternate voltage in the voltage protection device; having the first switch is configured to be operable in response to the throttle signal to supply the alternative voltage to the input voltage of the processor such that the input voltage is maintained relative to the threshold voltage. method.

15. providing the alternative voltage to maintain the input voltage of the processor at or slightly above the threshold voltage. The method of claim 14.

16. A processor; a comparator configured to compare an input voltage of the processor to a threshold voltage and provide a throttle signal to the processor when the input voltage of the processor droops below the threshold voltage; having the circuit further comprises a first switch inserted in a path between an alternative voltage and the input voltage, the first switch being configured to operate in response to the throttle signal output by the comparator and to supply the alternative voltage to the input voltage of the processor such that the input voltage is maintained relative to the threshold voltage. Voltage protection system.

17. the first switch of the circuit provides the alternative voltage to maintain the input voltage of the processor at or just above the threshold voltage.

17. The voltage protection system of claim 16.

18. In response to being executed by at least one processor, the at least one processor is comparing the input voltage of the processor with a threshold voltage; causing a throttle signal to be provided to the processor when the input voltage of the processor droops below the threshold voltage; controlling a first switch interposed in a path between the input voltage and the alternative voltage to supply the alternative voltage to the input voltage of the processor in response to the throttle signal; A plurality of instructions; the first switch is configured to be operable in response to the throttle signal to supply the alternative voltage to the input voltage of the processor such that the input voltage is maintained relative to the threshold voltage. Computer program.

19. In response to being executed on the at least one processor, the at least one processor is controlling the first switch such that the alternative voltage is provided to maintain the input voltage of the processor at or slightly above the threshold voltage.

20. A computer program product as claimed in claim 18, comprising a plurality of instructions.

20. 20. One or more tangible, non-transitory, machine-readable media storing a computer program according to claim 18 or 19.

Images