On-chip test architecture for display systems

Abstract

Embodiments disclosed herein provide systems and methods for testing and repairing various aspects of an electronic display. The electronic display includes a reference array and an active array. The electronic display also includes test circuitry that is used to test individual or any combination of pixels of the electronic display. Switches may be positioned between the pixels and the test circuitry to repair various components of the electronic display.

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS) This application claims priority to and the benefit of U.S. Provisional Patent Application No. 63 / 076,846, entitled "ON-CHIP TESTING ARCHITECTURE FOR DISPLAY SYSTEM," filed September 10, 2020, which is incorporated by reference in its entirety for all purposes.

[0002] This disclosure relates generally to electronic displays, and more particularly to testing and correcting voltage degradation in electronic displays having voltage-driven and / or current-driven pixels. [Background technology]

[0003] Flat panel displays, such as light emitting diode (LED) displays or organic LED (OLED) displays, are commonly used in a wide variety of electronic devices, including consumer electronics such as televisions, computers, and handheld devices (e.g., mobile phones, audio and video players, gaming systems, etc.). Such display panels typically provide a flat display in a relatively thin package suitable for use in a variety of electronic products. In addition, such devices may use less power than comparable display technologies, making them suitable for use in battery-powered devices or other situations where minimizing power usage is desired. Summary of the Invention

[0004] An LED display typically includes picture elements (e.g., pixels) arranged in a matrix to display an image viewable by a user. Individual pixels of an LED display can generate light when a current is applied to each pixel. A current can be applied to each pixel by programming a voltage to the pixel that is converted to a current by the pixel's circuitry. The pixel's circuitry that converts the voltage to a current can include, for example, a thin film transistor (TFT). However, certain operating conditions, such as aging or temperature, can affect the amount of current passed through a pixel when a particular voltage is applied.

[0005] Similarly, components that supply current to pixels, such as source drivers, may fail for a variety of reasons, thereby failing to supply current to the corresponding pixel. Conventionally, test electrodes coupled to each source driver are connected to external test circuitry to identify the failed component. This approach requires a significant amount of time to connect and test each component. Furthermore, the additional test electrodes and corresponding data lines use a significant amount of space on the display's integrated circuit, reducing the amount of remaining space for additional pixels that can be used to increase the resolution of the display.

[0006] Display panel sensing allows operational characteristics of pixels of an electronic display to be identified in order to improve the performance of the electronic display. For example, temperature changes (among other things) across an electronic display and pixel aging can cause pixels at different locations on the display to behave differently. In fact, the same image data programmed onto different pixels of a display can appear different due to temperature changes and pixel aging. For example, a pixel emits a certain amount of light, gamma, or grayscale based at least in part on the amount of current supplied to the pixel's diode (e.g., LED). For a voltage-driven pixel, a target voltage (e.g., as represented by a current-voltage relationship or curve) may be applied to the pixel to drive a target current through the diode to emit a target gamma value. Variations can affect the pixel, for example, by changing the resulting current that flows through the diode upon application of the target voltage. Without proper compensation, these variations can produce undesirable visual artifacts.

[0007] Thus, the techniques and systems described below may be used to test and compensate for the functionality of various components of a display. Test circuitry is coupled to each pixel of the display. The test circuitry may compensate for one or more malfunctioning (e.g., broken) components of the display. The test circuitry may determine the current through the circuitry of each pixel of the display to verify the operation of each pixel and corresponding component.

[0008] Various refinements of the above-mentioned features may exist in relation to the various aspects of the present disclosure. Further features may also be incorporated in these various aspects as well. These refinements and additional features may exist individually or in any combination. For example, various features discussed below in relation to one or more of the illustrated embodiments may be incorporated alone or in any combination in any of the above-mentioned aspects of the present disclosure. The summary presented above is intended only to familiarize the reader with certain aspects and contexts of the embodiments of the present disclosure without limiting the claimed subject matter. The various aspects of the disclosure may be better understood upon reading the following detailed description and by reference to the drawings described below. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a block diagram of an electronic device according to an embodiment of the present disclosure. [Diagram 2] FIG. 2 is a perspective view of a notebook computer that represents one embodiment of the electronic device of FIG. 1. [Diagram 3] 2 is a front view of a handheld device representing another embodiment of the electronic device of FIG. 1. [Figure 4] 2 is a front view of another handheld device representing another embodiment of the electronic device of FIG. 1. [Diagram 5] 2 is a front view of a desktop computer representing another embodiment of the electronic device of FIG. 1. [Figure 6] FIG. 2 is a perspective view of a wearable electronic device representing another embodiment of the electronic device of FIG. [Figure 7] FIG. 1 is a block diagram of a system for display sensing and testing according to one embodiment of the present disclosure. [Figure 8] FIG. 2 is a block diagram of an exemplary architecture for screening source drivers of a display, according to one embodiment of the disclosure. [Figure 9] FIG. 2 is a block diagram of an exemplary architecture for repairing a source driver, according to one embodiment of the present disclosure. [Figure 10] FIG. 10 is a block diagram of an example architecture for repairing the source driver of FIG. 9, according to one embodiment of the disclosure. [Figure 11] FIG. 11 is a block diagram of an example repair of a source driver using the architecture of FIGS. 9 and 10, according to one embodiment of the disclosure. [Figure 12] FIG. 2 is a block diagram of an example architecture for repairing data lines using a repair bus, in accordance with one embodiment of the present disclosure. [Figure 13]FIG. 2 is a block diagram of an example repair of a data line using a repair bus, according to one embodiment of the present disclosure. [Figure 14] FIG. 2 is a block diagram of an example architecture for repairing a data line, in accordance with one embodiment of the present disclosure. [Figure 15] FIG. 2 is a block diagram of an example repair of a data line using replication, according to one embodiment of the present disclosure. [Figure 16] FIG. 2 is a block diagram of an exemplary architecture for fast detection of defective pixels, in accordance with one embodiment of the present disclosure. [Figure 17] FIG. 1 is a block diagram of an exemplary architecture of an on-chip IV sensing system, in accordance with one embodiment of the present disclosure. [Figure 18] FIG. 18 is a block diagram of an example architecture for the test bus described with respect to FIG. 17, in accordance with one embodiment of the disclosure. [Figure 19] FIG. 2 is a block diagram of an example architecture for repairing gate drivers and / or gate driver lines, data lines, according to one embodiment of the disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] One or more specific embodiments are described below. In order to provide a concise description of these embodiments, not all features of an actual implementation are described herein. It should be understood that in the development of such an actual implementation, as in an engineering or design project, numerous implementation-specific decisions must be made to achieve the developer's specific goals, such as compliance with system-related and business-related constraints that may vary from implementation to implementation. It should also be understood that such a development effort may be complex and time-consuming, but is a routine undertaking of design, fabrication, and manufacture for those skilled in the art having the benefit of this disclosure.

[0011] When introducing elements of various embodiments of the disclosure, the articles "a," "an," and "the" are intended to mean that there are one or more elements. The terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements. Furthermore, it is to be understood that references to "one embodiment" or "embodiments" of the disclosure are not intended to be interpreted as excluding the existence of additional embodiments that incorporate the recited features. Furthermore, the phrase A "based on" B is intended to mean that A is based at least in part on B. Additionally, the term "or" is intended to be inclusive (e.g., logical OR) and not exclusive (e.g., logical XOR). In other words, the phrase A "or" B is intended to mean A, B, or both A and B.

[0012] Electronic displays are prevalent in modern electronic devices. As electronic displays gain higher resolution and dynamic range capabilities, image quality is becoming increasingly valuable. Generally, an electronic display contains a large number of picture elements, or "pixels," that are programmed with image data. Each pixel emits a particular amount of light based at least in part on the image data. By programming different pixels with different image data, image content can be displayed, including images, videos, and text.

[0013] Display panel sensing allows operational characteristics of pixels of an electronic display to be identified in order to improve the performance of the electronic display. For example, temperature changes (among other things) across an electronic display and pixel aging can cause pixels at different locations on the display to behave differently. In fact, the same image data programmed onto different pixels of a display can appear different due to temperature changes and pixel aging. For example, a pixel emits a certain amount of light, gamma, or grayscale based at least in part on the amount of current supplied to the pixel's diode (e.g., LED). For a voltage-driven pixel, a target voltage (e.g., as represented by a current-voltage relationship or curve) may be applied to the pixel to drive a target current through the diode to emit a target gamma value. Variations can affect the pixel, for example, by changing the resulting current that flows through the diode upon application of the target voltage. Without proper compensation, these variations can produce undesirable visual artifacts.

[0014] Thus, the techniques and systems described below may be used to test and compensate for the functionality of various components of a display. Test circuitry is coupled to each pixel of the display. The test circuitry may compensate for one or more malfunctioning (e.g., broken) components of the display. The test circuitry may determine the current through the circuitry of each pixel of the display to verify the operation of each pixel and corresponding component.

[0015] With this in mind, an exemplary block diagram of an electronic device 10 is shown in Figure 1. As described in more detail below, electronic device 10 may represent any suitable electronic device, such as a computer, a mobile phone, a portable media device, a tablet, a television, a virtual reality headset, a vehicle dashboard, etc. Electronic device 10 may represent, for example, a notebook computer 10A shown in Figure 2, a handheld device 10B shown in Figure 3, a handheld device 10C shown in Figure 4, a desktop computer 10D shown in Figure 5, a wearable electronic device 10E shown in Figure 6, or a similar device.

[0016] The electronic device 10 shown in FIG. 1 may include, for example, a processor core complex 12, a local memory 14, a main memory storage device 16, an electronic display 18, an input structure 22, an input / output (I / O) interface 24, a network interface 26, and a power supply 29. The various functional blocks shown in FIG. 1 may include hardware elements (including circuitry), software elements (including machine-executable instructions stored on a tangible, non-transitory medium, such as the local memory 14 or the main memory storage device 16), or a combination of both hardware and software elements. It should be noted that FIG. 1 is merely one example of a particular implementation and is intended to illustrate the types of components that may be present in the electronic device 10. In fact, the various illustrated components may be combined into fewer components or separated into additional components. For example, the local memory 14 and the main memory storage device 16 may be included in a single component.

[0017] Processor core complex 12 may perform various operations of electronic device 10, such as causing electronic display 18 to perform display panel sensing and using feedback to repair detected defects in the circuitry of electronic display 18 and / or adjust image data displayed on electronic display 18. Processor core complex 12 may include any suitable data processing circuitry for performing these operations, such as one or more microprocessors, one or more application specific processors (ASICs), or one or more programmable logic devices (PLDs). In some cases, processor core complex 12 may execute programs or instructions (such as an operating system or application programs) stored on a suitable article of manufacture, such as local memory 14 and / or main memory storage device 16. In addition to instructions for processor core complex 12, local memory 14 and / or main memory storage device 16 may store data processed by processor core complex 12. For example, local memory 14 may include random access memory (RAM), and main memory storage device 16 may include read-only memory (ROM), rewritable non-volatile memory such as flash memory, a hard drive, an optical disk, or the like.

[0018] The electronic display 18 may display a plurality of image frames, such as a graphical user interface (GUI) for an operating system or application interface, still images, or video content. The processor core complex 12 may provide at least a portion of the plurality of image frames. The electronic display 18 may be a self-emissive display, such as an organic light-emitting diode (OLED) display, a micro-LED display, a micro-OLED-type display, or a backlit liquid crystal display (LCD). In some embodiments, the electronic display 18 may have a touch screen that allows a user to interact with the user interface of the electronic device 10. The electronic display 18 may use display panel sensing to identify variations in the operation of the electronic display 18. This may enable the processor core complex 12 to adjust image data sent to the electronic display 18 to compensate for these variations, thereby improving the quality of the image frames that appear on the electronic display 18.

[0019] The input structure 22 of the electronic device 10 may allow a user to interact with the electronic device 10 (e.g., increasing or decreasing a volume level by pressing a button). The I / O interface 24 may allow the electronic device 10 to interface with various other electronic devices, as may the network interface 26. The network interface 26 may include interfaces for, for example, a personal area network (PAN) such as a Bluetooth® network, a wireless local area network (WLAN) such as a local area network (LAN) or an 802.11x Wi-Fi network, and / or a wide area network (WAN) such as a cellular network. Network interface 26 may also include interfaces for, for example, broadband fixed wireless access networks (WiMAX), mobile broadband wireless networks (mobile WiMAX), asynchronous digital subscriber lines (e.g., ADSL, VDSL), digital video broadcasting-terrestrial (DVB-T) and its extensions DVB Handheld (DVB-H), ultra wideband (UWB), alternating current (AC) power lines, etc. Power source 29 may include any suitable power source, such as a rechargeable lithium polymer (Li-poly) battery and / or an alternating current (AC) power converter.

[0020] In certain embodiments, the electronic device 10 may take the form of a computer, a portable electronic device, a wearable electronic device, or other types of electronic devices. Such computers include computers that are typically portable (e.g., laptops, notebooks, and tablet computers) as well as computers that are typically used in one location (such as traditional desktop computers, workstations, and / or servers). In some embodiments, the electronic device 10 in the form of a computer may be a MacBook®, MacBook® Pro, MacBook Air®, iMac®, Mac® mini, or Mac Pro® model available from Apple Inc. of Cupertino, California, USA. By way of example, an electronic device 10 in the form of a notebook computer 10A is illustrated in FIG. 2 according to one embodiment of the present disclosure. The illustrated computer 10A may have a housing or enclosure 36, an electronic display 18, an input structure 22, and an I / O interface 24 port. In one embodiment, input structure 22 (such as a keyboard and / or touchpad) may be used to interact with computer 10A, such as to launch, control, or operate a GUI or applications running on computer 10A. For example, the keyboard and / or touchpad may enable a user to navigate a user interface or application interface displayed on electronic display 18.

[0021] FIG. 3 shows a front view of handheld device 10B representing one embodiment of electronic device 10. Handheld device 10B may represent, for example, a mobile phone, a media player, a personal data organizer, a handheld gaming platform, or any combination of such devices. By way of example, handheld device 10B may be an iPod® or iPhone® model available from Apple Inc. Handheld device 10B may include an enclosure 36 to protect internal components from physical damage and to shield them from electromagnetic interference. Enclosure 36 may enclose electronic display 18. I / O interface 24 may be open through enclosure 36 and may include an I / O port intended for hardwired connection for charging and / or content manipulation using, for example, a standard connector and protocol such as a Lightning® connector provided by Apple Inc., Universal Service Bus (USB), or other similar connector and protocol.

[0022] The user input structure 22, in combination with the electronic display 18, may allow a user to control the handheld device 10B. For example, the input structure 22 may start or stop the handheld device 10B, navigate the user interface to a home screen, a user-configurable application screen, and / or activate a voice recognition function of the handheld device 10B. Another input structure 22 may adjust the volume or switch between vibrate and ring modes. The input structure 22 may also include a microphone capable of capturing the user's voice for various voice-related functions, as well as a speaker to enable voice playback and / or some telephony functions. The input structure 22 may also include a headphone input to enable connection to an external speaker and / or headphones.

[0023] 4 shows a front view of another handheld device 10C that represents another embodiment of electronic device 10. Handheld device 10C may represent, for example, a tablet computer or a portable computing device. By way of example, handheld device 10C may be a tablet-sized embodiment of electronic device 10, which may be, for example, a model of the iPad available from Apple Inc.

[0024] Turning to FIG. 5, computer 10D may represent another embodiment of electronic device 10 of FIG. 1. Computer 10D may be any computer, such as a desktop computer, a server, or a notebook computer, but may also be a standalone media player or video gaming machine. By way of example, computer 10D may be an iMac®, MacBook®, or other similar device from Apple Inc. It should be noted that computer 10D may also represent a personal computer (PC) from another manufacturer. A similar enclosure 36 may be provided to protect and house the internal components of computer 10D, such as electronic display 18. In certain embodiments, a user of computer 10D may interact with computer 10D using various external input devices, such as input structures 22A or 22B (e.g., keyboard or mouse) connectable to computer 10D.

[0025] Similarly, FIG. 6 illustrates a wearable electronic device 10E representing another embodiment of the electronic device 10 of FIG. 1 that may be operated using the techniques described herein. By way of example, the wearable electronic device 10E, which may include a wristband 43, may include an Apple Watch® from Apple, Inc. However, in other embodiments, the wearable electronic device 10E may include any wearable electronic device, such as, for example, a wearable motion monitoring device (e.g., a pedometer, an accelerometer, a heart rate monitor), or other device from another manufacturer. The electronic display 18 of the wearable electronic device 10E may include a touchscreen display 18 (e.g., an LCD, an OLED display, an active matrix organic light emitting diode (AMOLED) display, etc.), as well as an input structure 22 that allows a user to interact with the user interface of the wearable electronic device 10E.

[0026] FIG. 7 is a block diagram of a system 50 for display sensing and testing according to one embodiment of the disclosure. The system 50 may be included in the display 18 of the electronic device 10 described with respect to FIG. 1. The system 50 includes an active array 52 and a reference array 54. The reference array 54 includes a plurality of reference pixels 55. The reference array 54 may be used to test and track the operation of the reference pixels 55, each of which may correspond to one or more pixels 67 of the active array 52. ​​As shown, the pixels 67 of the active array 52 may include a pixel circuit 64 and a light emitting diode, such as a micro LED, a micro OLED, or an organic light emitting diode (OLED) 66. Based on the operation of the reference pixel 55, one or more parameters (e.g., current, output brightness, etc.) of the corresponding pixel 67 of the active array 52 may be adjusted. The pixel circuit 64 of the pixel 67 may be tested with or without an OLED 66 installed in the active array 52. ​​This may allow the circuitry of the active array 52 to be tested to ensure proper operation before the OLED 66 is installed.

[0027] The active array 52 includes a plurality of pixels 67 arranged in a matrix. The processor core complex 12 described with respect to FIG. 1 can provide image data to the pixels 67 via driver circuits, such as one or more source drivers 58A, 58B and one or more gate drivers 84. The one or more source drivers 58A, 58B and one or more gate drivers 84 can be coupled to individual pixels 67 via pixel circuits 64 to activate or illuminate the OLED 66 based on the image data. In some embodiments, the one or more gate drivers 84 can also provide reset, on-bias stress, and / or pixel activation signals to the pixels 67 to prepare the pixels 67 to receive data via the source drivers 58A, 58B. The source latches 56A, 56B are coupled to each of the source drivers 58A, 58B. The source latches 56A, 56B can provide image data to each of the source drivers 58A, 58B to activate / illuminate each pixel 67.

[0028] Each source driver 58A, 58B can be coupled to the test bus 60, 62 via a respective test switch 92A, 92B to provide signals to the test circuit 68, 76. The test circuit 68, 76 may include an analog front end (AFE) and / or an analog-to-digital converter (ADC). That is, an analog signal can be received by the test circuit 68, 76 via the test bus and converted by the ADC for testing. During normal operation of the system 50, the state of the test switches 92A, 92B is open so that the source drivers 58A, 58B are decoupled from the test bus 60, 62. During testing of the source drivers 58A, 58B, the state of the test switches 92A, 92B can be changed to closed so that the source drivers 58A, 58B are coupled to the test bus 60, 62. The test switches 92A, 92B allow one, all, or some combination of the source drivers 58A, 58B to be tested simultaneously.

[0029] Thus, the test switches 92A, 92B allow for isolation of one or more source drivers 58A, 58B to be tested. In some embodiments, the data switches 90A, 90B may be disposed between the source drivers 58A, 58B and the pixel circuit 64, and may be coupled to the source drivers 58A, 58B and the pixel circuit 64. During normal operation, the data switches 90A, 90B may be in a closed state such that the source drivers 58A, 58B are coupled to the pixel circuit 64 of the pixel 67. During a test operation, the data switches 90A, 90B may be in an open state.

[0030] The test buses 60, 62 are coupled to test circuits 68, 76. The signals provided by the source drivers 58A, 58B to the test circuits 68, 76 may be voltages or currents that would otherwise be provided to the individual pixel circuits 64. The test circuits 68, 76 may include various components, such as multiplexers and / or switches, to receive one or more signals from the source drivers 58A, 58B, the gate drivers 84, the pixel circuits 64, the data lines 70 between the source drivers 58A, 58B and the pixel circuits 64, etc. For each pixel 67, the test circuits 68, 76 may determine whether a defect exists in the individual source drivers 58A, 58B, the individual gate drivers 84, the individual pixel circuits 64, the data lines between the individual source drivers 58A, 58B and the individual pixel circuits 64, etc. based at least in part on the one or more signals. The various components of the test circuits 68, 76 are described in more detail with respect to Figures 8-19 below.

[0031] 8 is a block diagram of an example architecture 100 for screening source drivers of a display, according to one embodiment of the disclosure. The architecture 100 includes a number of source drivers 106A, 106B coupled to a number of multiplexers 104A, 104B, 108A, 108B. In some embodiments, the source drivers 106A, 106B may correspond to the source drivers 58A, 58B, respectively, described with respect to FIG.

[0032] An input signal (e.g., gamma) is provided to the source drivers 106A, 106B via multiplexers 104A, 104B. Based on the respective code lines 102A, 102B, the multiplexer 104A provides the input signal to the first source driver 106A, and the multiplexer 104B provides the input signal to the second source driver 106B. In some embodiments, the first multiplexer 108A and the second multiplexer 108B are switches that route at least some outputs of the multiple source drivers 106A, 106B to the corresponding opposite source driver 106B or 106A.

[0033] To test a plurality of first source drivers 106A and corresponding data lines 112, a corresponding number of second source drivers 106B may function as voltage comparators. Each first multiplexer 108A is switched so that an output from each second source driver 106B is provided to the controller 122. For example, the second source driver 106B may be coupled to receive an input signal and coupled to each data line 112 of the first source driver 106A. In that case, the first multiplexer 108A may provide feedback from the data line 112 to the first source driver 106A. The second source driver 106B may receive and compare an input signal from the multiplexer 104B and a signal from the first source driver 106A via the data line 112. The second source driver 106B provides a comparison result to the controller 122. The comparison by the second multiplexer 108B may be performed for each first source driver 106A, regardless of whether an input signal is received or not, i.e., the comparison may be performed to ensure that an input signal is provided to the data line 112 and / or to ensure that the data line 112 is not shorted.

[0034] A similar configuration can be used to test the second source driver 106B and the corresponding data line 110. In that case, the second multiplexer 108B can provide feedback to the second source driver 106B. The first multiplexer 108A can receive and compare an input signal from the multiplexer 104A and a signal from the second source driver 106B via the data line 110. The first source driver 106A provides the comparison result to the controller 122.

[0035] Although not shown, the data lines 110, 112 may be coupled to one or more pixels of the display 18, such as the pixel 67 described with respect to FIG. 7. That is, the architecture 100 can be used to test the source drivers 106A, 106B whether or not the pixel is installed in a display. In this manner, the architecture 100 can be tested during manufacturing, which reduces downtime to correct problems with the source drivers 106A, 106B and the data lines 110, 112. Testing before the pixel is installed in the display 18 can also reduce voltage degradation of the pixel 67 during testing.

[0036] Testing through source drivers on the opposite side of the source driver being tested reduces the time to test the source drivers (and their respective data lines) by testing the source drivers simultaneously. Furthermore, the multiple first and second multiplexers 108A, 108B enable testing of the source drivers with minimal components added to the display architecture 100. That is, some existing circuitry of, for example, a display panel is utilized for testing without significantly increasing the size of the existing architecture.

[0037] 9 is a block diagram of an example architecture 130 for repairing a source driver 132, according to one embodiment of the disclosure. The architecture 130 includes a source driver 132 coupled to an active array 52. ​​In some embodiments, the source driver 132 corresponds to the first source driver 106A or the second source driver 106B described with respect to FIG. 8. In some embodiments, each source driver 132 corresponds to a column of pixels 67 in the active array 52. ​​That is, the number (X) of source drivers 132 corresponds to the number of columns of pixels 67 in the active array 52.

[0038] Each source driver 132 may include a gamma multiplexer 136 and an amplifier 138. The gamma multiplexer 136 may convert a digital data signal into a voltage to drive an individual column of pixels 67 of the active array 52. ​​A source latch 134 is coupled to each source driver 132 and provides an input signal to each source driver 132. A switch 140 is disposed between each source driver 132 and the active array 52. ​​In some embodiments, each switch 140 is a multiplexer. The switches 140 are coupled to adjacent alternating source drivers 132. That is, a first switch 140 may couple a first source driver 132(1) to a second source driver 132(2) adjacent to the first source driver 132(1). A second switch 140 can couple the third source driver 132(3) to a fourth source driver 132(4) adjacent to the third source driver 132(3), which is also adjacent to the second source driver 132(2).

[0039] In some embodiments, architecture 130 includes one or more spare source drivers 144 such that the number of source drivers 132 is greater than the number of columns of pixels 67 in active array 52. ​​As described below, one or more spare source drivers 144 can be used if a defective source driver 132 is identified. The source drivers 132 can be tested using a test architecture such as architecture 100 described with respect to FIG.

[0040] When a defective source driver 132 is detected (e.g., through testing or calibration during manufacturing, or once during operation), a spare source latch 146 may be coupled to the spare source driver 144. One or more repair registers 142 may also change the state of the switch 140 depending on the location of the defective source driver 132. Although a single spare source driver 144 is shown to the right of the source driver 132, it should be understood that there may be two or more spare source drivers 144 and / or they may be located between and / or to the right of the source driver 132. Furthermore, although a spare source driver 144 is shown, it should be understood that one or more spare gate drivers may be included in the gate driver 84 described with respect to FIG. 7. The one or more spare gate drivers may function similarly to the spare source driver 144, as described below.

[0041] 10 is a block diagram of another architecture 141 for repairing a source driver according to an embodiment of the present disclosure. As used herein, repairing a defective source driver may include using a spare source driver to compensate for the defective source driver. The example architecture 141 of FIG. 10 shows a source driver 132 coupled to a source latch 134 via one or more switches 152. The one or more switches 152 are disposed between the source latch 150 and the source driver 132. In some embodiments, the one or more switches 152 may be a multiplexer similar to the switch 140 between the source driver 132 and the active array 52.

[0042] 10, the output of each repair register 142 is high (e.g., 1) such that the switches 140 pass the output of the source driver 132 to the corresponding pixel 67 in the active array 52. ​​When a defective source driver 132 is detected, the state of one or more of the repair registers 142 may be changed along with the corresponding switch 140, as described with respect to FIG.

[0043] FIG. 11 is a block diagram of an exemplary state of repair of source drivers 132 using the architecture 141 of FIG. 10 according to one embodiment of the disclosure. As shown, a defect is detected in the fourth source driver 154 (i.e., source driver number 4 shown in FIG. 10). Upon detecting the defect, the state of the repair registers 142 corresponding to the first four source drivers 132 may be changed from high to low (e.g., from 1 to 0), which causes the state of the corresponding switches 140 to change. The switches 140 may change the connection of one or more of the source drivers 132 such that one or more source drivers 132 are coupled to adjacent columns (or rows) of pixels 67 in the active array 52. ​​For example, if a defect is detected in the fourth source driver 154, the state of one or more switches 156 to the left of the fourth source driver 154 may be changed. The state of the respective switches 152 coupled to the source latch 134 may also be changed.

[0044] By changing the state of the switches 140, 152, the spare source driver 144 can be coupled to a first column (or row) of pixels 67 in the active array 52. ​​Thus, the spare source driver 144 can be the first source driver shown in FIG. 10. Similarly, the first source driver can be a second source driver and can be coupled to a second column (or row) of pixels 67 in the active array 52. ​​The second source driver can be a third source driver and can be coupled to a third column (or row) of pixels 67 in the active array 52. ​​The third source driver can be a fourth source driver and can be coupled to a fourth column (or row) of pixels 67 in the active array 52.

[0045] Although the connection of the source driver 154 to the left of the defective source driver 132 is shown as being coupled to an adjacent column (or row) of pixels 67, it should be understood that a similar change can occur to the source driver to the right of the defective source driver 154. Once a defective source driver is detected, the defective source driver 154 is replaced with an adjacent source driver 132, slightly increasing the routing distance between the source latches and the active array 52. ​​Thus, the performance impact on the source driver 132 and the spare source driver 144 can be mitigated.

[0046] In some cases, more than one defective driver may be identified during testing. In that case, the first defective source driver may be replaced as described above using the first spare source driver. The second defective source driver may be replaced similarly to the adjacent source driver if a second spare source driver (not shown) is present in the architecture 130. If the second spare source driver is not present, the source driver adjacent to the second defective source driver may be coupled to the column (or row) of pixels 67 corresponding to the second defective source driver. That is, the source driver adjacent to the second defective source driver may be used to drive two columns (or rows) of pixels 67, namely (1) the pixels corresponding to the adjacent source driver after the first defective source driver is replaced, and (2) the pixels corresponding to the second defective source driver.

[0047] Thus, the embodiments described with respect to Figures 9-11 reduce the time to detect and replace a defective source driver while mitigating the impact on the performance of the remaining source drivers and mitigating the impact on multiple components added to the display architecture to perform the testing.

[0048] 12 is a block diagram of an exemplary architecture 160 for repairing data lines using a repair bus, according to an embodiment of the present disclosure. The architecture 160 can be used with the test architecture 100 described with respect to FIG. 8 to test a plurality of source drivers 132A, 132B. In some embodiments, the plurality of source drivers 132A, 132B may correspond to the source drivers 58A, 58B described with respect to FIG. 7, respectively. Each of the plurality of source drivers 132A, 132B includes a spare source driver 144A, 144B, respectively. The architecture 160 includes one or more first switches 172A and one or more second switches 172B opposite the one or more first switches 172A. The architecture 160 also includes test multiplexers 107A, 170B coupled to the first switch 172A and the second switch 172B, respectively. The test multiplexers 107A, 107B are coupled to the test circuits 68, 76.

[0049] The first switch 172A is disposed between the source driver 132A and the first repair bus 188A. The second switch 172B is disposed between the source driver 132B and the second repair bus 188B. The first switch 172A controls whether the source driver 132A is coupled to the respective data line 178 and / or the test multiplexer 170A and the test circuitry 68. Similarly, the second switch 172B controls whether the source driver 132B is coupled to the respective data line 176 and / or the test multiplexer 170B and the test circuitry 76.

[0050] The test circuits 68, 76 can be used to identify a defective data line 176, 178 coupled to the respective source driver 132A, 132B. For example, if a defect in the architecture 160 is identified via the test circuits, but each of the source drivers 132A, 132B is operating properly, then it is likely that a defect exists in the data line 176, 178 (or the switch 172A, 172B). In that case, the state of the switch 172A, 172B is changed such that the spare source driver 144A, 144B is coupled to a first portion of the defective data line 176, 178. Similarly, the state of the switch is changed such that the source driver coupled to the defective data line 176, 178 from the source driver 132A, 132B originally coupled to the defective data line 176, 178 is duplicated and provided to the spare source driver 144A, 144B currently connected to the defective data line 176, 178.

[0051] 13 is a block diagram of an example repair of a data line using the architecture 160 described with respect to FIG. 12, according to one embodiment of the disclosure. Upon detecting a defect in a fourth data line 186 coupled to the source driver 132A, the state of the individual switch 184 is changed to couple a first portion of the defective data line 186 to the repair bus 188A. Similarly, the state of the individual switch 182 is changed to couple a second portion of the defective data line 186 to the repair bus 188B. The first portion of the defective data line 186 is driven via the spare source driver 144A, and the second source driver is driven via the separate source driver 180. Depending on the location of the pixel 67 coupled to the defective data line 186, the first portion of the defective data line 186 may be driven via the separate source driver 164, and the second portion of the defective data line may be driven via the spare source driver 144B. The test circuits 68, 76 may be used to identify which source drivers 132A, 132B, 144A, 144B are used to drive a particular portion of the data lines 186 that are defective.

[0052] In some embodiments, the architecture 160 can be used to repair a defective source driver 132A, 132B. For example, if the fourth source driver 164 is identified as defective, the spare source driver 144A can be coupled to a separate data line 186 via a separate switch 184. In this way, the remaining source drivers 132A, 132B remain coupled to their respective data lines 176, 178, and only the defective source driver 164 is replaced via the spare source driver 144A.

[0053] By using the repair buses 188A, 188B to repair defective data lines 176, 178 and / or defective source drivers 132A, 132B, the time period between detection and correction is reduced. Additionally, the repair buses 188A, 188B and switches 172A, 172B have a relatively small impact on power consumption to perform the repair and a relatively small impact on the size of the architecture 160 in the system 50.

[0054] 14 is a block diagram of an exemplary architecture 190 for repairing a data line, according to one embodiment of the disclosure. The architecture 190 includes a plurality of switches 196A, 196B disposed between and coupled to the outputs of adjacent source drivers 132A. That is, the switches 196 are coupled to at least one data line 200 and can be coupled to the adjacent data line 200 when in a closed state. In some embodiments, the switches 196 can be implemented using a plurality of multiplexers disposed between and coupled to the outputs of adjacent source drivers 132A. Although the switches 196 are shown as being disposed between the source driver 132A and the active array 52, it should be understood that additional switches (not shown) may be disposed between the active array 52 and the source driver 132B described with respect to FIGS. 12 and 13.

[0055] During normal operation, as shown in Figure 14, the switch 196 is in an open state such that the output of the adjacent source driver 132A is not connected. When a defective data line 200 is detected, the state of the switches 196A, 196B between the defective data line 200 and the adjacent data line 200 can be changed such that the defective data line 200 and the adjacent data line 200 are coupled to each other, as described with respect to Figures 10 and 11.

[0056] FIG. 15 is a block diagram of an example repair of a data line using the architecture 190 described with respect to FIG. 14, according to one embodiment of the disclosure. As shown, a defective data line 212 can be detected using test circuits 68, 76 as described with respect to FIGS. 7-12. Once a defective data line 212 is detected, the state of the respective switches 214A and 214B can be changed such that the defective data line 212 is coupled to an adjacent data line 216. As shown, each end of the defective data line 212 is coupled to an adjacent data line 216 such that the location of a corresponding pixel 67 of the active array 52 on the defective data line 212 does not affect its operation.

[0057] The architecture 190 can also be used to repair a defective source driver 132A. For example, if a defective source driver 132A is identified via the test circuits 68, 76, the defective source driver 132A is replaced by the adjacent source driver 132A by coupling the data line 200 corresponding to the defective source driver 132A to the adjacent source driver 132A via the switches 196A, 196B.

[0058] Testing and repairing a defective data line (and / or a defective source driver) in this manner duplicates the signal or data on an adjacent data line. Thus, switches 196A, 196B reduce the time to test the architecture of display 18 and reduce the impact on the performance of source driver 132A and system 50, while adding relatively few components to the architecture of display 18.

[0059] 16 is a block diagram of an exemplary architecture 300 for fast detection of defective pixel drivers, according to one embodiment of the disclosure. The architecture 300 includes a plurality of comparators 306. The comparators 306 are coupled to one or more pixel circuits of the active array 52, such as the pixel circuit 64 described with respect to FIG. 7. The comparators 306 receive and compare a voltage supplied to a corresponding one or more pixel circuits 64 (or pixels 67) via a source driver, such as source drivers 58A, 58B, 106A, 106B, 132A, 132B described above, with one or more reference voltages 302, 304. The voltage supplied to the pixel circuit 64 (or pixel 67) can be determined by sensing and converting a current through the pixel circuit 64 (or pixel 67).

[0060] The reference voltages 302, 304 are programmable and can be set to threshold voltages to identify defective pixel circuits 64 (or pixels 67) by determining whether the voltage from the pixel circuits 64 meets the reference voltages 302, 304. The reference voltages 302, 304 are used by a comparator to determine whether the current of a source driver, such as source drivers 58A, 58B, 106A, 106B, 132A, 132B described above, is relatively small or large compared to the reference voltages 302, 304. The current from the source driver can be converted to a voltage by integrating the current onto a parasitic capacitance, and the voltage is compared to the reference voltages 302, 304. If the voltage of a particular source driver is greater than the threshold voltage, the source driver can be understood to be a defective bright source driver. Similarly, if the voltage of a particular source driver is less than the threshold voltage, the source driver can be understood to be a defective dark source driver. The reference voltages 302, 304 can be programmed differently to detect defective bright source drivers and defective dark source drivers. For example, to detect a defective bright source driver, the threshold voltage may be programmed to be relatively small. To detect a defective dark source driver, the threshold voltage may be programmed to be relatively high. Once a defective source driver has been identified, any suitable search (e.g., a binary search) of the corresponding column of pixels may be used to identify the row of active array 52 in which the defective pixel resides.

[0061] In some embodiments, the comparators 306 are coupled to two or more columns of pixels 67 and corresponding pixel circuits 64 of the active array 52. ​​By coupling more than one column to the comparators 306, the number of comparators 306 for testing all columns of the active array 52 is reduced, and the time to test each column of pixels 67 in the active array 52 is significantly reduced. For example, each comparator 306 may be coupled to six columns of pixels 67. In that case, one-sixth (1 / 6) of the columns in the active array 52 may be tested simultaneously. Thus, the comparators 306 coupled to multiple columns of the active array 52 significantly reduce the time and cost to test each column of the active array 52.

[0062] 17 is a block diagram of an example architecture 350 of an on-chip IV sensing system, according to one embodiment of the disclosure. Pixel degradation of each pixel circuit 64 or OLED 66 can occur as each pixel circuit 64 or OLED 66 in the active array 52 ages. On-chip IV sensing via a current sensor 358 allows for near real-time sensing and performance tracking of each pixel circuit 64 or OLED 66. The current sensor 358 can be coupled to the output of each OLED 66 via a test bus 362.

[0063] In some embodiments, the current sensor 358 may be used to test the total current of all of the OLEDs 66 in the active array 52. ​​Additionally or alternatively, the current sensor 358 may be used to sense the current through any combination of each individual OLED 66 and / or pixel 67 in the active array. To do so, the anode of each pixel 67 is coupled to a test bus 362. The voltage at the cathode of each OLED 66 is provided to the active array 52 as an input voltage 354. The difference between the voltage at the cathode of each OLED 66 and the voltage at the anode of each OLED 66 may be used to generate a current-voltage (IV) curve for each OLED 66 or any combination of pixels 67 in the active array 52. ​​The IV curve for each OLED 66 may be used to determine and correct voltage and / or current degradation of each OLED 66.

[0064] Current sensor 358 allows for high speed current and / or voltage sensing of each pixel 67 individually as well as any combination of pixels 67. Additionally, current sensor 358 allows for testing of all pixels 67 in active array 52. ​​Using the IV curves generated based on sensing by current sensor 358 allows for compensation for pixel degradation which improves the quality of active array 52 and extends the life of active array 52.

[0065] Figure 18 is a block diagram of an example architecture 400 for the test bus 362 described with respect to Figure 17, according to one embodiment of the disclosure. The test bus 362 shown in Figure 18 can correspond to the test bus described with respect to Figure 17. As shown, the test bus 362 is coupled to a multiplexer 404 for each column 356 of the active array 52. ​​The input 352 is also coupled to the multiplexer 404. In some embodiments, an input voltage, such as the input voltage 354 described with respect to Figure 17, can be coupled to the cathode of each OLED 66.

[0066] In some embodiments, the multiplexer 404 may be implemented as a switch. The multiplexer 404 is coupled to each pixel 67 via a data line 402. In the architecture 400, the data line 402 may serve a dual purpose. For example, during a test operation, the data line 402 may be used to test the voltage and / or current of each pixel 67. In that case, the data line 402 may be coupled to the test bus 362 via the multiplexer 404. During normal operation, the data line 402 may supply a voltage, such as VRST, to the pixel 67 via the input 352. In that case, the data line 402 may be coupled to the input 352 via the multiplexer 404.

[0067] The dual use of data lines 402 eliminates the addition of a separate test line from test bus 362 to each pixel 67. That is, the dual use of data lines 402 in combination with multiplexer 404 and test bus 362 allows testing of each pixel 67 without using a large amount of display area. Thus, more area is available in architecture 400 for additional pixels that can be used to increase the higher resolution of active array 52.

[0068] 19 is a block diagram of an example architecture 420 for repairing gate drivers 422, 434, 436 and / or gate driver data lines 432, according to one embodiment of the disclosure. The architecture 420 can be used in addition to or instead of the architectures 100, 130, 160, 190, 300, 350, and 400 described with respect to FIGS. 8-18. The architecture 420 includes one or more switches 430A, 430B between adjacent data lines 432. The data lines 432 are coupled to the gate drivers 422 and a shift register 424. The shift register 424 can be coupled to a test circuit 426. The shift register 424 can collect data in parallel and serially shift data from the shift register 424 to the shift register 424 into the test circuit 426.

[0069] The architecture 420 may also include a switch 428 between the gate drivers 422 and the active array 52. ​​During normal operation, switches 430A, 430B are in an open state and switch 428 is in a closed state. Thus, signals from each gate driver 422 are provided along separate data lines 432 to respective rows of pixels 67 of the active array 52 and to separate shift registers 424.

[0070] The test circuitry 426 receives a signal from each shift register 424 and can identify one or more defective gate drivers 422 and / or data lines 432 based on the received signal. For example, a particular gate driver 422 and / or corresponding data line 432 can be identified as defective if no signal is received from the particular gate driver 422 and / or corresponding data line 432. Regardless of whether a particular gate driver 422 or corresponding data line 432 is actually defective, the state of the switch 428 coupling that gate driver 422 to the active array is changed to open. Thus, the gate driver 422 identified as defective or coupled to a defective data line 432 is disconnected from the active array 52. ​​The state of the switches 430A, 430B is also changed such that the data line 432 corresponding to the disconnected gate driver 422 is coupled to an adjacent gate driver 422 and corresponding data line 432. Thus, the data line 432 corresponding to the defective gate driver 422 (or the defective data line 432 ) is coupled to an adjacent gate driver 422 and corresponding data line 432 .

[0071] As an example, the test circuitry 426 may determine that the data line 450 is defective. If so, the state of a switch 456 disposed between the gate driver 436 corresponding to the defective data line 450 and the active array 52 is changed to open, thus disconnecting the gate driver 436 from the active array 52. ​​The states of switches 454 and 456 are changed to closed, such that the defective data line 450 is coupled to the adjacent data line 452. The same procedure can be used if the gate driver 436 is defective.

[0072] The architecture 420 enables repair of gate drivers and / or data lines using adjacent gate drivers and data lines. Thus, the data signals provided to the adjacent data lines are duplicates on the defective data line. This approach enables relatively fast repair of defective gate drivers and / or data lines while reducing the impact of the size of the architecture 420. That is, relatively few components are added to the architecture to enable adjacent line duplication. For example, only four switches need to be added for every two data lines to enable adjacent line duplication.

[0073] Although some of the embodiments described above relate to testing, detecting, and repairing source drivers and corresponding data lines, it should be understood that the same circuits and techniques can be used to test, detect, and repair gate drivers and corresponding data lines. That is, the embodiments described herein can be used to test, detect, and repair vertical and / or horizontal drivers and data lines of an electronic display. Furthermore, it should be noted that the testing, detecting, and repairing of drivers and corresponding data lines described herein can be performed with or without light emitting diodes (e.g., LEDs and / or OLEDs 66) located within the active array 52.

[0074] The techniques presented and claimed herein refer to and are applied to material objects and practical examples of a practical nature that demonstrably improve the art, and thus are not abstract, intangible, or purely theoretical. Moreover, when any claim appended at the end of this specification includes one or more elements designated as "means for [performing] . . . a function" or "steps for [performing] . . . a function," it is intended that such elements be construed in accordance with 35 U.S.C. 112(f). However, for claims that include elements recited in other ways, it is intended that such elements not be construed under 35 U.S.C. 112(f).

Claims

1. an active array including a plurality of pixel circuits; a first plurality of source drivers configured to be coupled to a first subset of the plurality of pixel circuits via first data lines; a test bus configured to be coupled to the first plurality of source drivers via a plurality of switches; a test circuit coupled to the test bus and configured to identify a defective source driver, a defective pixel circuit, or a defective first data line; An electronic display comprising:

2. The electronic display of claim 1 , wherein the test circuitry is configured to sense voltages from the first plurality of source drivers to the plurality of pixel circuits.

3. a plurality of gate drivers coupled to the plurality of pixel circuits via third data lines, the test circuit being configured to detect a defective gate driver or a defective third data line.

10. The electronic display of claim 1.

4. 10. The electronic display of claim 1, further comprising a second plurality of source drivers configured to be coupled to a second subset of the plurality of pixel circuits via second data lines, the test bus being coupled to the second plurality of source drivers.

5. The test circuit comprises: a plurality of first switches configured to be coupled to outputs of the first plurality of source drivers via the first data lines; a plurality of second switches configured in a feedback loop to the first plurality of source drivers; input lines coupled to the first plurality of source drivers and the second plurality of source drivers, the second plurality of source drivers configured to compare an input signal via the input lines with the output of the first plurality of source drivers; a controller configured to be coupled to outputs of the second plurality of source drivers; 5. The electronic display of claim 4, comprising:

6. 5. The electronic display of claim 4, wherein the active array, the first plurality of source drivers, the second plurality of source drivers, the test bus, and the test circuitry are disposed within a single integrated circuit.

7. The electronic display of claim 1 , wherein the active array does not include light emitting diodes (LEDs) during a testing procedure.

8. A display, an active array including a plurality of pixel circuits; a plurality of source drivers coupled to the plurality of pixel circuits via data lines; a test bus configured to be coupled to the plurality of source drivers via a first plurality of switches; a test circuit coupled to the test bus and configured to identify a defective source driver, a defective pixel circuit, or a defective data line; Including, display An electronic device comprising:

9. The electronic device of claim 8 , wherein the active array does not include light emitting diodes (LEDs) during a test procedure.

10. a plurality of gate drivers coupled to the plurality of pixel circuits, the test circuit being configured to detect a defective gate driver or a defective source driver; 9. The electronic device of claim 8.

11. The electronic device of claim 8 , wherein the test circuitry is configured to sense voltages from the plurality of source drivers to the plurality of pixel circuits.

12. The electronic device of claim 8 , wherein the active array, the plurality of source drivers, the test bus, and the test circuitry are disposed within a single integrated circuit.

13. a second plurality of switches configured to couple the plurality of source drivers to data lines, the data lines being coupled to the pixel circuits; 9. The electronic device of claim 8.

14. The electronic device of claim 13 , wherein the second plurality of switches are closed during a test operation of the plurality of source drivers.

15. an active array including a plurality of pixel circuits; a first plurality of source drivers configured to be coupled to a first subset of the plurality of pixel circuits; a second plurality of source drivers configured to be coupled to a second subset of the plurality of pixel circuits; a test bus configured to be coupled to the first plurality of source drivers and the second plurality of source drivers via a plurality of switches; a first plurality of switches configured to couple the first plurality of source drivers to the test bus; a second plurality of switches configured to couple the first plurality of source drivers to the pixel circuits via first data lines; a third plurality of switches configured to couple the second plurality of source drivers to the test bus; a fourth plurality of switches configured to couple the second plurality of source drivers to the pixel circuits via second data lines; a test circuit coupled to the test bus and configured to identify a defective source driver, a defective pixel circuit, a defective first data line, or a defective second data line; An electronic display comprising:

16. 16. The electronic display of claim 15, wherein during a test operation for testing the first plurality of source drivers, the first plurality of switches are open and the third plurality of switches are closed.

17. The electronic display of claim 16, wherein the second plurality of switches are closed and the fourth plurality of switches are open.

18. The electronic display of claim 17 , wherein the second plurality of source drivers are configured to function as voltage comparators.

19. The test circuit comprises: input lines coupled to the first plurality of source drivers and the second plurality of source drivers, the second plurality of source drivers configured to compare an input signal via the input lines with an output of the first plurality of source drivers; a controller configured to be coupled to outputs of the second plurality of source drivers; Including, the active array, the first plurality of source drivers, the second plurality of source drivers, the test bus, the first plurality of switches, the second plurality of switches, the third plurality of switches, the fourth plurality of switches, and the test circuitry are disposed within a single integrated circuit.

16. The electronic display of claim 15.

20. an active array including a plurality of pixel circuits; means for coupling a first plurality of source drivers to a first subset of the plurality of pixel circuits; means for coupling a second plurality of source drivers to a second subset of the plurality of pixel circuits; means for coupling a test circuit to the first plurality of source drivers and the second plurality of source drivers to identify defective source drivers, defective pixel circuits, defective first data lines, or defective second data lines; An integrated circuit system comprising:

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