Light emitting device and image forming device

Abstract

To prevent a difference of light quantities between light emitting parts while suppressing complication of a structure as compared with a case of adjusting a light quantity for each light emitting part when a light emitting device includes the light emitting part of which the light quantity is affected by wiring and the light emitting part of which the light quantity is not affected.SOLUTION: A light emitting device (LPH) includes first wiring (301) which is electrically connected to each first light emitting part (L2n-1), and second wiring (302) electrically connected to each second light emitting part (L2n), the second wiring (302) being arranged on a light emitting surface side of the first light emitting part with respect to a third direction intersecting a first direction and a second direction. A current fed to the first light emitting part (L2n-1) and the second light emitting part (L2n) is adjusted according to a light quantity difference between the first light emitting part (L2n-1) and the second light emitting prat (L2n).SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present invention relates to a light emitting device and an image forming apparatus. [Background technology]

[0002] 2. Description of the Related Art In an image forming apparatus, the technology described in Patent Document 1 below is conventionally known with respect to a light emitting device such as a latent image forming device for forming a latent image and a static eliminator.

[0003] Patent Document 1 describes a configuration in which a first light-emitting element row and a second light-emitting element row are arranged in a staggered manner in a light-emitting element head, and a light-emitting signal is supplied to odd-numbered light-emitting thyristors from a φI terminal, and a light-emitting signal is supplied to even-numbered light-emitting thyristors from a φIe terminal. As shown in Fig. 6 of Patent Document 1, wiring leading to odd-numbered light-emitting thyristors is arranged to pass between even-numbered light-emitting thyristors. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2013-201395 A ("0018"-"0021", Figures 4-6) Summary of the Invention [Problem to be solved by the invention]

[0005] The technical objective of the present invention is to suppress the difference in light intensity between light-emitting units while minimizing the complexity of the configuration when there are light-emitting units whose light intensity is affected by wiring and light-emitting units whose light intensity is not affected by wiring, compared to adjusting the light intensity of each light-emitting unit individually. [Means for solving the problem]

[0006] In order to solve the above technical problem, the light emitting device of the invention described in claim 1 is: A plurality of first light emitting units arranged at intervals along a predetermined first direction; a plurality of second light emitting units arranged at intervals along the first direction, the second light emitting units being arranged at positions offset from the first light emitting units in a second direction intersecting the first direction and offset from each of the first light emitting units along the first direction; a first wiring electrically connected to each of the first light-emitting portions; a second wiring electrically connected to each of the second light-emitting sections, the second wiring being disposed on a light-emitting surface side of the first light-emitting section in a third direction intersecting the first direction and the second direction; Equipped with To reduce the difference in light amount between the first light-emitting unit and the second light-emitting unit, By covering a part of the second light-emitting unit with a light-shielding material according to a difference in light amount between the first light-emitting unit and the second light-emitting unit, Adjusting the light extraction efficiency of the first light emitting section and the second light emitting section It is characterized by:

[0007] In order to solve the above technical problem, the light emitting device of the invention described in claim 2 comprises: A substrate; A plurality of first light emitting units disposed on the substrate; A plurality of second light emitting units are disposed on the substrate and positioned at positions offset from the first light emitting units; Wiring arranged on the light-emitting side of the substrate at a position that affects the optical path of the first light-emitting unit; Equipped with To reduce the difference in light amount between the first light emitting unit and the second light emitting unit. By covering a part of the second light emitting unit with a light blocking material according to a difference in light amount between the first light emitting unit and the second light emitting unit, Adjusting the light extraction efficiency of the first light emitting section and the second light emitting section It is characterized by:

[0008] The invention described in claim 3 is the light emitting device described in claim 2, The wiring is a wiring for supplying a current to each of the second light-emitting units. It is characterized by:

[0009] The invention as set forth in claim 4 is the light emitting device as set forth in any one of claims 1 to 3, a first wiring that supplies a current to the first light-emitting unit within the stack; The present invention is characterized by comprising:

[0011] Claim 5 The invention described in Any of claims 1 to 4 In the light emitting device according to the present invention, A first electrode disposed on the light-emitting side of the first light-emitting portion; the second light-emitting portion is disposed on the light-emitting side of the first electrode , the direction in which the first light emitting units are arranged at intervals. A second electrode having a large width along the first direction; The present invention is characterized by comprising:

[0012] Claim 6 The invention described in Claim 5 In the light emitting device according to the present invention, The second light emitting unit is disposed at a position that affects the optical path of the second light emitting unit, Electrically connected to each of the second light emitting units a third interconnect of the same material as the second interconnect; The present invention is characterized by comprising:

[0013] Claim 7 The invention described in Claim 6 In the light emitting device according to the present invention, The second wiring is laminated on the same layer as the second wiring. The above The third wire, The present invention is characterized by comprising:

[0014] Claim 8 The invention described in claims 1 to 7 In the light emitting device according to any one of the preceding claims, a first connection line to which all of the first light-emitting units are connected; a second connection line to which all of the second light-emitting units are connected; a first current limiting resistor connected to the first connection line and limiting a current supplied through the first connection line; a second current limiting resistor connected to the second connection line and limiting a current supplied through the second connection line, the second current limiting resistor having a resistance value relative to the first current limiting resistor set according to a light amount difference between the first light-emitting unit and the second light-emitting unit; The present invention is characterized by comprising:

[0015] Claim 9 The invention described in Claim 8 In the light emitting device according to the present invention, adjusting a voltage applied to the first connecting line and the second connecting line in accordance with an average light amount of the first light-emitting unit and the second light-emitting unit; It is characterized by:

[0016] In order to solve the above technical problem, Claim 10 The image forming apparatus of the present invention is An image holding means; a charging means for charging a surface of the image holding means; 1 to 7, wherein a latent image is formed on a charged image bearing means. 9 A latent image forming device including the light emitting device according to any one of claims 1 to 5, The present invention is characterized by comprising: Effect of the Invention

[0017] Claims 1 and 2, 10 According to the invention described above, when there are light-emitting sections whose light intensity is affected by wiring and light-emitting sections whose light intensity is not affected by wiring, it is possible to suppress the difference in light intensity between the light-emitting sections while minimizing the complexity of the configuration compared to a case in which the light intensity of each light-emitting section is adjusted individually. According to the invention as set forth in claims 1, 2 and 10, the difference in the amount of light between the light-emitting sections can be suppressed by using a light-shielding material that covers a part of the second light-emitting section. According to the invention as recited in claim 3, even if the light amount is affected by the wiring that supplies a current to the second light-emitting portion, the difference in the light amount can be suppressed. According to the invention as recited in claim 4, the first wiring can supply a current to the first light-emitting portion within the laminate.

[0018] Claim 5According to the invention described in the above, the width of the second electrode can be made larger than the width of the first electrode, thereby suppressing the difference in the amount of light between the light-emitting portions. Claim 6 According to the invention described in the above, the difference in the amount of light between the light-emitting portions can be suppressed by blocking light with the third wiring made of the same material as the second wiring. Claim 7 According to the invention described in the above, when the third wiring is formed in the same layer as the second wiring, the third wiring can be manufactured more easily than when a process of laminating the third wiring separately is performed. Claim 8 According to the invention described in the above, the difference in the amount of light emitted by the light-emitting parts can be suppressed by setting the values ​​of the two current limiting resistors. Claim 9 According to the invention described in the above, the difference in light intensity between the first light-emitting section and the second light-emitting section can be suppressed by adjusting the voltage applied to the first connecting line and the second connecting line. [Brief description of the drawings]

[0019] [Figure 1] FIG. 1 is an overall explanatory diagram of an image forming apparatus according to a first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view of the latent image forming device of the first embodiment. [Diagram 3] FIG. 3 is a top view of the light emitting portion of the first embodiment. [Figure 4] FIG. 4 is an explanatory diagram of the configuration of the light-emitting chip of the first embodiment. [Diagram 5] FIG. 5 is an explanatory diagram of the configuration of the signal generating circuit and the configuration of the wiring (lines) on the circuit board according to the first embodiment. [Figure 6] FIG. 6 is an example of an equivalent circuit diagram illustrating the configuration of the light-emitting chip of the first embodiment. [Figure 7] 7A is a plan view, FIG. 7B is a cross-sectional view taken along line VIIB-VIIB in FIG. 7A, FIG. 7C is a cross-sectional view taken along line VIIC-VIIC in FIG. 7A, and FIG. 7D is a cross-sectional view taken along line VIID-VIID in FIG. 7A. [Figure 8]FIG. 8 is an explanatory diagram of a conventional configuration, in which FIG. 8A is an explanatory diagram when the light-emitting thyristors are arranged in a straight line, FIG. 8B is an explanatory diagram when the light-emitting thyristors are arranged in a staggered arrangement and the area of ​​the light-emitting thyristors is reduced to avoid wiring, and FIG. 8C is an explanatory diagram when wiring is laminated on the surface of the light-emitting thyristors. [Figure 9] FIG. 9 is a diagram illustrating the experimental results of the light amount distribution in the case of the conventional configuration shown in FIG. 8C. [Figure 10] FIG. 10 is an explanatory diagram of an experimental result in the configuration of Example 1, in which FIG. 10A is an explanatory diagram of the relationship between the increment in electrode width and the amount of light, and FIG. 10B is an explanatory diagram of an experimental result when the electrode width of the second light-emitting thyristor is increased by 0.8 μm. [Figure 11] FIG. 11 shows the experimental results of the relationship between the supply current and the optical output. [Figure 12] FIG. 12 shows the experimental results of the relationship between the power supply voltage and the light amount ratio when the first current limiting resistor is set to 200 Ω and the second current limiting resistor is set to 220 Ω. [Figure 13] FIG. 13 is an explanatory diagram of another example of the arrangement of light-emitting parts in the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Next, examples of the present invention will be described with reference to the drawings. However, the present invention is not limited to the following examples. In order to make the following explanation easier to understand, in the drawings, the front-to-back direction (width direction of the medium) is defined as the X-axis direction, the left-to-right direction (direction of medium transport) is defined as the Y-axis direction, and the up-down direction is defined as the Z-axis direction, and the directions or sides indicated by arrows X, -X, Y, -Y, Z, -Z are defined as the front, rear, right, left, upper, and lower, or the front side, rear side, right side, left side, upper side, and lower side, respectively. In addition, in the figures, a "·" inside a "○" means an arrow going from the back to the front of the page, and an "×" inside a "○" means an arrow going from the front to the back of the page. In the following description using the drawings, illustrations of components other than those necessary for the description are omitted as appropriate to facilitate understanding. EXAMPLES

[0021] (Explanation of Overall Configuration of Printer U in First Embodiment) FIG. 1 is an overall explanatory diagram of an image forming apparatus according to a first embodiment. In FIG. 1, a printer U as an example of an image forming apparatus according to a first embodiment of the present invention has a printer main body U1, a feeder unit U2 as an example of a supply device that supplies media to the printer main body U1, an operation unit UI operated by a user, and a finisher U3 as an example of a post-processing device that performs post-processing of media discharged from the printer main body U1.

[0022] (Description of Marking Configuration in Example 1) 1, the main body U1 of the printer includes a control unit (an example of a control means) C that controls the printer U, a communication unit (not shown) that receives image information transmitted from a print image server COM (an example of an information transmitting device) connected to the outside of the printer U via a dedicated cable (not shown), and a marking unit U1a (an example of a recording means) that records an image on a medium. A personal computer PC (an example of an image transmitting device) is connected to the print image server COM via a line such as a cable or a LAN (Local Area Network) and transmits information of an image to be printed by the printer U. The marking unit U1a has photoconductors Py, Pm, Pc, and Pk for each color, Y: yellow, M: magenta, C: cyan, and K: black, as an example of an image holding means, and a photoconductor Po for making an image glossy when printing a photographic image, etc. The photoconductors Py to Po have surfaces made of a photosensitive dielectric material.

[0023] In FIG. 1, around the black photoconductor Pk, arranged in the direction of rotation of the photoconductor Pk are a charger CCk as an example of a charging means, an exposure device LPHk as an example of a latent image forming means, a developer Gk as an example of a developing means, a primary transfer roll T1k as an example of a primary transfer means, and a photoconductor cleaner CLk as an example of a cleaning means for an image holding means. Similarly, around the other photoconductors Py, Pm, Pc, Po, there are arranged chargers CCy, CCm, CCc, CCo, exposure devices LPHy, LPHm, LPHc, LPHo, developers Gy, Gm, Gc, Go, primary transfer rolls T1y, T1m, T1c, T1o, and photoconductor cleaners CLy, CLm, CLc, CLo. Toner cartridges Ky, Km, Kc, Kk, and Ko, which are an example of a developer storage means, are detachably supported on the upper portion of the marking portion U1a. The toner cartridges Ky to Ko store developers to be replenished to the developing units Gy to Go.

[0024] An intermediate transfer belt B, which is an example of intermediate transfer means and an example of image holding means, is disposed below each of the photoconductors Py-Po. The intermediate transfer belt B is sandwiched between the photoconductors Py-Po and the primary transfer rolls T1y-T1o. The back surface of the intermediate transfer belt B is supported by a drive roll Rd, which is an example of drive means, a tension roll Rt, which is an example of tension applying means, a walking roll Rw, which is an example of meandering prevention means, a plurality of idler rolls Rf, which are an example of driven means, a backup roll T2a, which is an example of opposing means for secondary transfer, a plurality of retract rolls R1, which are an example of movable means, and the primary transfer rolls T1y-T1o. On the surface of the intermediate transfer belt B, a belt cleaner CLB as an example of a cleaning means for the intermediate transfer means is disposed near the drive roll Rd.

[0025] A secondary transfer roll T2b, which is an example of a secondary transfer member, is disposed opposite the backup roll T2a with the intermediate transfer belt B sandwiched therebetween. A contact roll T2c, which is an example of a contact means, is in contact with the backup roll T2a in order to apply a voltage of a polarity opposite to the charging polarity of the developer to the backup roll T2a. The backup roll T2a, the secondary transfer roll T2b, and the contact roll T2c constitute a secondary transfer device T2 as an example of a secondary transfer means of Example 1, and the primary transfer rolls T1y to T1o, the intermediate transfer belt B, the secondary transfer device T2, etc. constitute transfer devices T1, B, and T2 as an example of a transfer means of Example 1.

[0026] Below the secondary transfer device T2, a paper feed tray TR1 as an example of a storage means is provided. Recording sheets S as an example of a medium are stored in the paper feed tray TR1. A pickup roll Rp as an example of a take-out means and a handling roll Rs as an example of a handling means are arranged diagonally above the right of the paper feed tray TR1. A transport path SH along which the recording sheets S are transported extends from the handling roll Rs. A plurality of transport rolls Ra as an example of a transport means for transporting the recording sheets S downstream are arranged along the transport path SH. A deburring device Bt, which is an example of a means for removing unnecessary parts, is disposed downstream of the separation roll Rs. The deburring device Bt pinches the recording sheet S with a preset pressure and conveys it downstream to remove unnecessary parts from the edge of the recording sheet S, that is, to remove burrs.

[0027] A double feed detector Jk is disposed downstream of the deburring device Bt. The double feed detector Jk measures the thickness of the recording sheets S passing through and detects a state in which multiple recording sheets S are stacked on top of each other, i.e., a double feed. A correction roll Rc, which is an example of a position correction means, is disposed downstream of the double feed detection device Jk. The correction roll Rc corrects the inclination of the recording sheet S with respect to the transport direction, that is, the skew. A registration roll Rr is disposed downstream of the correction roll Rc as an example of an adjustment unit that adjusts the timing of conveying the recording sheet S to the secondary transfer device T2. Also, a sheet guide SG1 is disposed downstream of the registration roll Rr as an example of a medium guiding unit. The feeder unit U2 also has paper feed trays TR2 and TR3 configured similarly to the paper feed tray TR1, pickup roll Rp, handling roll Rs, and transport roll Ra, and the transport path SH from the paper feed trays TR2 and TR3 merges with the transport path SH of the printer main body U1 upstream of the double feed detection device Jk.

[0028] A plurality of conveyor belts HB, which are an example of a medium conveying means, are disposed downstream of the secondary transfer roll T2b in the conveying direction of the recording sheet S. A fixing device F, which is an example of a fixing means, is disposed downstream of the conveyor belt HB in the conveying direction of the recording sheet S. A de-curler Hd as an example of a curvature correcting means is disposed in the finisher U3 downstream of the fixing device F. The de-curler Hd applies pressure to the recording sheet S to correct the curvature, or so-called curl, of the recording sheet S. A transport path SH extends downstream of the decurler Hd toward a discharge tray TRh (an example of a loading means). Discharge rollers Rh (an example of a discharging means) are disposed at the downstream end of the transport path SH.

[0029] A reversing path SH2, which is an example of a transport path branching off from the transport path SH, is formed downstream of the decurler Hd. A first gate GT1, which is an example of a transport direction switching means, is disposed at the branch point between the transport path SH and the reversing path SH2. A plurality of switchback rolls Rb, which are an example of a forward and reverse rotatable conveying means, are arranged on the reverse path SH2. A connection path SH3, which is an example of a conveying path, is formed on the upstream side of the switchback rolls Rb, branching off from the upstream part of the reverse path SH2 and joining the conveying path SH downstream of the branching point with the reverse path SH2. A second gate GT2, which is an example of a conveying direction switching means, is arranged at the branching point between the reverse path SH2 and the connection path SH3.

[0030] A turn-back path SH4 for reversing, or switching back, the conveying direction of the recording sheet S is disposed downstream of the reversing path SH2 and below the fixing device F. A switch-back roll Rb, which is an example of a conveying means capable of rotating forward and backward, is disposed on the turn-back path SH4. A third gate GT3, which is an example of a conveying direction switching means, is disposed at the entrance of the turn-back path SH4. The transport path SH downstream of the return path SH4 merges with the transport path SH for the paper feed tray TR1.

[0031] (Marking action) When the printer U receives image information transmitted from the personal computer PC via the print image server COM, a job, which is an image forming operation, is started. When the job is started, the photoconductors Py-Po, the intermediate transfer belt B, etc. rotate. The photoconductors Py to Po are rotated by a driving source (not shown). A preset voltage is applied to the chargers CCy to CCo, which charge the surfaces of the photoconductors Py to Po. The exposure devices LPHy to LPHo, which are an example of a latent image forming device and an example of a light emitting device, output light Ly, Lm, Lc, Lk, and Lo that writes a latent image in response to a control signal from the control unit C, and write an electrostatic latent image on the charged surfaces of the photosensitive members Py to Po. The developing units Gy to Go develop the electrostatic latent images on the surfaces of the photoconductors Py to Po. The toner cartridges Ky-Ko replenish the developer consumed in the development in the developing units Gy-Go.

[0032] A primary transfer voltage having a polarity opposite to the charge polarity of the developer is applied to the primary transfer rolls T1y to T1o, and the primary transfer rolls transfer the visible images on the surfaces of the photoconductors Py to Po onto the surface of the intermediate transfer belt B. The photoconductor cleaners CLy to CLo remove and clean the developer remaining on the surfaces of the photoconductors Py to Po after the primary transfer. When passing through the primary transfer area facing the photoconductors Py to Po, the intermediate transfer belt B has images transferred and stacked in the order of O, Y, M, C, and K, and passes through the secondary transfer area Q4 facing the secondary transfer device T2. In the case of a monochrome image, an image of only one color is transferred and sent to the secondary transfer area Q4.

[0033] The pickup roller Rp feeds out the recording sheet S from the paper feed trays TR1 to TR3 from which the recording sheet S is supplied, according to the size of the received image information, the designation of the recording sheet S, and the size and type of the stored recording sheet S. The separation roll Rs separates and separates the recording sheets S sent out from the pickup roll Rp one by one. The deburring device Bt applies a preset pressure to the recording sheet S passing therethrough to remove burrs. The double feed detection device Jk detects double feeding of the recording sheets S by detecting the thickness of the recording sheets S passing through. The correction roll Rc corrects the skew of the passing recording sheet S by bringing it into contact with a wall surface (not shown).

[0034] The registration roll Rr feeds the recording sheet S in time with the image on the surface of the intermediate transfer belt B being sent to the secondary transfer area Q4. The sheet guide SG1 guides the recording sheet S sent out by the registration roll Rr to the secondary transfer area Q4. In the secondary transfer device T2, a secondary transfer voltage having the same polarity as the charge polarity of the developer set in advance is applied to the backup roll T2a via the contact roll T2c, and the image on the intermediate transfer belt B is transferred to the recording sheet S. The belt cleaner CLB removes and cleans the developer remaining on the surface of the intermediate transfer belt B after the image has been transferred in the secondary transfer area Q4. The conveyor belt HB conveys the recording sheet S, onto which an image has been transferred by the secondary transfer device T2, downstream while holding the recording sheet S on its surface.

[0035] The fixing device F has a heating roll Fh as an example of a heating member and a pressure roll Fp as an example of a pressure member. A heater h as an example of a heat source is housed inside the heating roll Fh. The fixing device F heats and presses the recording sheet S passing through a fixing area Q5 where the heating roll Fh and the pressure roll Fp come into contact with each other, thereby fixing an unfixed image on the surface of the recording sheet S. The heating roll Fh and the pressure roll Fp constitute the fixing members Fp, Fh of the first embodiment. The decurler Hd applies pressure to the recording sheet S that has passed through the fixing device F to remove the curvature, or so-called curl, of the recording sheet S.

[0036] When double-sided printing is to be performed on the recording sheet S that has passed through the decurler Hd, the first gate GT1 is activated and the sheet is transported to the reversing path SH2, switched back at the return path SH4, and sent again through the transport path SH to the registration roll Rr, where printing is performed on the second side. When the recording sheet S is discharged onto the discharge tray TRh with the side on which the image is recorded facing up, that is, when the recording sheet S is discharged face-up, the recording sheet S is transported along the transport path SH and discharged onto the discharge tray TRh by the discharge roll Rh.

[0037] On the other hand, when the recording sheet S is discharged with the side on which the image is recorded facing down, that is, in the case of face-down discharge, the recording sheet S is once conveyed from the transport path SH to the reversing path SH2. Then, after the trailing end of the recording sheet S in the transport direction passes through the second gate GT2, the forward rotation of the switchback roll Rb is stopped. Then, the second gate GT2 switches, the switchback roll Rb rotates in the reverse direction, and the recording sheet S is transported along the connecting path SH3 to the discharge tray TRh. The discharged recording sheets S are stacked on the discharge tray TRh.

[0038] (Explanation of Latent Image Forming Device) In the first embodiment, in response to a demand for miniaturization of the device, a recording device using an LED print head (LPH: LED Print Head) in which a plurality of light emitting diodes (LEDs: Light Emitting Diodes) are arranged in the main scanning direction to form a light emitting element array is adopted as the exposure devices (print heads) LPHy to LPHo. Furthermore, in a light-emitting chip equipped with a self-scanning light-emitting element array (SLED) in which a number of light-emitting elements are arranged in a row on a substrate and sequential lighting is controlled, a light-emitting thyristor connected in series to a light-emitting diode is used. A thyristor has an anode, a cathode, and at least one gate, and is turned on when a voltage is applied between the anode and cathode while a voltage equal to or higher than a certain level is applied to the gate, and maintains the on state while a current equal to or higher than the holding current flows between the anode and cathode.

[0039] FIG. 2 is a cross-sectional view of the latent image forming device of the first embodiment. FIG. 3 is a top view of the light emitting portion of the first embodiment. 2 is a cross-sectional view showing the configuration of print heads LPHy-LPHo as an example of a light-emitting device. The print heads LPHy-LPHo include a housing 61 as an example of a frame, a light-emitting device 65 as an example of a light-emitting means main body, and a rod lens array 64 as an example of an optical means. The light-emitting device 65 includes a light source unit 63 having a plurality of light-emitting elements. The rod lens array 64 forms an image of the light emitted from the light source unit 63 on the surfaces of the photoconductors Py-Po to expose the photoconductors Py-Po. The light emitting device 65 includes a circuit board 62 on which a light source unit 63, a signal generating circuit 110 (see FIG. 3) for driving the light source unit 63, and the like are mounted.

[0040] The housing 61 is formed of, for example, metal, supports the circuit board 62 and the rod lens array 64, and is set so that a light emitting surface, which is a surface that emits light from the light emitting elements of the light source section 63, becomes a focal plane of the rod lens array 64. The rod lens array 64 is also arranged along the axial direction (main scanning direction) of the photoconductors Py to Po.

[0041] (Light output device 65) 3, the light source unit 63 includes, for example, 20 light emitting chips C1 to C20 on a circuit board 62. The light emitting chips C1 to C20 are configured to be arranged in a staggered manner in two rows in the X direction, which is the main scanning direction. In the first embodiment, the number of the light emitting chips Ck (C1 to C20) is 20 in total, but is not limited to this and can be changed appropriately according to the design and specifications.

[0042] The light emitting device 65 includes a signal generating circuit 110 that drives the light source unit 63. The signal generating circuit 110 is configured with, for example, an integrated circuit (IC). The light emitting device 65 does not necessarily have to include the signal generating circuit 110. In this case, the signal generating circuit 110 is provided outside the light emitting device 65, and supplies control signals for controlling the light emitting chips C1 to C20 via a cable or the like. Here, the light emitting device 65 will be described as including the signal generating circuit 110.

[0043] FIG. 4 is an explanatory diagram of the configuration of the light-emitting chip of the first embodiment. FIG. 5 is an explanatory diagram of the configuration of the signal generating circuit and the configuration of the wiring (lines) on the circuit board according to the first embodiment. 4, the light emitting chip Ck is, for example, configured with a semiconductor laminate provided on a semiconductor substrate 80 having a rectangular surface shape. On the surface of the substrate 80, a plurality of light emitting elements (in the first embodiment, light emitting thyristors L1, L2, L3, ...) are arranged in a staggered pattern along one long side of the substrate 80.

[0044] In the first embodiment, the light-emitting thyristors L1 to L20 include a plurality of first light-emitting units (first light-emitting thyristors) L1, L3, L5, ..., L19 arranged at intervals along a main scanning direction which is a predetermined first direction, and a plurality of second light-emitting units (second light-emitting thyristors) L2, L4, L6, ..., L20 arranged at intervals along the main scanning direction, and the second light-emitting thyristors L2, L4, ..., L20 are arranged at positions shifted from the first light-emitting thyristors L1, L3, ..., L19 in a sub-scanning direction (an example of a second direction) which intersects the main scanning direction, and are also arranged at positions shifted from each of the first light-emitting thyristors L1, L3, ..., L19 along the main scanning direction. In the following, the first light-emitting thyristors L1, L3, ..., L19 may be referred to as "first light-emitting thyristor L2n-1," and the second light-emitting thyristors L2, L4, ..., L20 may be referred to as "second light-emitting thyristor L2n," where n is a natural number. In the first embodiment, the light-emitting thyristors L1 to L20 are arranged in two rows, but three or more rows are also possible. The number of light-emitting thyristors is not limited to 20, and can be changed as desired depending on the design, specifications, and the like.

[0045] 4 and 5, the light-emitting chip Ck is provided with terminals (φ1 terminal, φ2 terminal, Vg terminal, VI terminal, φWa terminal, φWb terminal, and φR terminal) which are bonding pads for receiving various control signals, etc., at both ends in the long side direction of the front surface of the substrate 80. These terminals are provided in the order of the φWa terminal, φ1 terminal, VI terminal, and Vg terminal from one end of the substrate 80, and the order of the φR terminal, φWb terminal, and φ2 terminal from the other end of the substrate 80. The light-emitting unit 102 is provided between the Vg terminal and the φ2 terminal. Furthermore, a back electrode (not shown) is provided on the back surface of the substrate 80 as a Vsub terminal. Note that various control signals and terminals are well known in the art, as described in, for example, JP 2020-049720 A, and therefore detailed explanations will be omitted.

[0046] (Light emitting chip Ck) FIG. 6 is an example of an equivalent circuit diagram illustrating the configuration of the light-emitting chip of the first embodiment. In Fig. 6, each element described below is represented by a widely used circuit symbol. The positions of each terminal (φ1 terminal, φ2 terminal, φWa terminal, φR terminal, VI terminal, Vg terminal) are different from those in Fig. 4, but are shown on the left side in the figure for convenience of explanation. The Vsub terminal is provided on the back surface of the substrate 80 as a back surface electrode. Here, the light-emitting chip Ck will be described taking the light-emitting chip C1 as an example in relation to the signal generating circuit 110, and description of the other light-emitting chips C2 to C20 will be omitted.

[0047] The light-emitting chip Ck includes light-emitting thyristors L1, L2, L3, . . . , transfer thyristors T1, T2, T3, . When there is no need to distinguish between the light-emitting thyristors L1, L2, L3, ..., they are referred to as light-emitting thyristors L. The same applies to the others. The transfer thyristor T, the coupling transistor Qt, the set thyristor W, and the setting transistor Qw are arranged along the arrangement of the light-emitting thyristors L (FIG. 4). The transfer thyristor T is an example of a transfer element, and the set thyristor W is an example of a setting element. In the first embodiment, the light-emitting device is configured by the light-emitting thyristor L, the resistors RI1 and RI2, and the resistor Rn.

[0048] The light-emitting chip Ck includes light-off thyristors RT1 and RT2. When the light-off thyristors RT1 and RT2 are not distinguished from each other, they are referred to as light-off thyristors RT. Furthermore, the light-emitting chip Ck includes a plurality of resistors. Note that the resistors are not numbered to distinguish the light-emitting thyristors L1, L2, L3, . . .

[0049] The light-emitting thyristor L, the transfer thyristor T, the set thyristor W, and the light-off thyristor RT are thyristors having a pnpn structure. As shown in the transfer thyristor T1, the transfer thyristor T is a four-terminal element having an anode, a first gate Gtf, a second gate Gts, and a cathode. In FIG. 6, the first gate Gtf is represented as (Gtf). The same applies to the others. Moreover, no reference numerals are attached to other equivalent elements. The same applies to the others. The set thyristor W is a four-terminal element having an anode, a first gate Gwf, a second gate Gws, and a cathode, as shown in the set thyristor W1. Meanwhile, the light-emitting thyristor L is a three-terminal element having an anode, a gate Gl, and a cathode, as shown in the light-emitting thyristor L1. Similarly, the light-off thyristor RT is a three-terminal element having an anode, a gate Gr, and a cathode, as shown in the light-off thyristor RT1.

[0050] The coupling transistor Qt and the setting transistor Qw are pnp bipolar transistors. The odd-numbered coupling transistors Qt are four-terminal elements having an emitter E, a base B, a first collector Cf, and a second collector Cs, as shown in coupling transistor Qt1. The even-numbered coupling transistors Qt are three-terminal elements having an emitter E, a base B, and a collector C, as shown in coupling transistor Qt2. In other words, the odd-numbered coupling transistors Qt are multi-collector, and the even-numbered coupling transistors Qt are single-collector. Moreover, as shown by the setting transistor Qw1, the setting transistor Qw is a three-terminal element having an emitter E, a base B, and a collector C. Therefore, the setting transistor Qw is also a single collector.

[0051] The light emitting chip Ck includes a plurality of wirings that connect the above elements. The light emitting chip Ck includes a power supply line 71 connected to a Vg terminal. The power supply line 71 is supplied with a power supply voltage Vg from the power supply voltage supply unit 170 via the Vg terminal connected by a power supply line 200b. The light-emitting chip Ck includes transfer signal lines 72a and 72b connected to the φ1 terminal and the φ2 terminal via resistors R1 and R2, respectively. Transfer signals φ1 and φ2 are transmitted from the transfer signal generating unit 120 to the φ1 terminal and the φ2 terminal via transfer signal lines 201 and 202, respectively. The light-emitting chip Ck also includes setting signal lines 73a and 73b connected to the φWa terminal and the φWb terminal via resistors R3 and R4, respectively. Setting signals φWa1 and φWb1 are transmitted from the setting signal generating unit 130 to the φWa terminal and the φWb terminal via setting signal lines 203a-1 and 203b-1. Resistors R1, R2, R3, and R4 are current limiting resistors provided to maintain voltage.

[0052] The light-emitting chip Ck includes light-up signal lines 75a and 75b connected to a VI terminal via resistors RI1 and RI2, respectively. A light-up voltage VI is supplied to the VI terminal from a light-up voltage supply unit 150. The light-up signal lines 75a and 75b are examples of light-up voltage lines, and the light-up voltage VI is an example of a light-up voltage. Furthermore, the light-emitting chip Ck includes light-off signal lines 76a and 76b connected to the φR terminal via resistors Rr1 and Rr2, respectively. A light-off signal φR is transmitted from the light-off signal generating unit 140 through a light-off signal line 204 to the φR terminal.

[0053] The light emitting chip Ck includes a Vsub terminal on the back surface electrode of the substrate 80. A reference voltage Vsub is supplied to the Vsub terminal from the reference voltage supply unit 160 through a power supply line 200a. The Vsub terminal is an example of a reference voltage line.

[0054] 7A is a plan view, FIG. 7B is a cross-sectional view taken along line VIIB-VIIB in FIG. 7A, FIG. 7C is a cross-sectional view taken along line VIIC-VIIC in FIG. 7A, and FIG. 7D is a cross-sectional view taken along line VIID-VIID in FIG. 7A. 7, in the light-emitting chip Ck of Example 1, the first light-emitting thyristors L1, L3, ..., L19 are connected to first wirings 301 extending from the collectors (C) of the setting transistors Qw1, Qw3, .... The second light-emitting thyristors L2, L4, ..., L20 are connected to second wirings 302 extending from the collectors (C) of the setting transistors Qw2, Qw4, ....

[0055] 7B, first wiring 301 is formed by lamination on substrate 80. Note that insulating layer 303 is further laminated on the front surface side of first wiring 301. That is, first wiring 301 is configured to supply current inside the laminate. 7C, the second wiring 302 is made of a metal material laminated on the surface of an insulating layer 303 laminated on a substrate 80, and supplies a current to the second light-emitting thyristor L2n. The second wiring 302 in Example 1 is disposed on the front surface side so as to pass between the first light-emitting thyristors L2n-1 and cover part of the outer edge of the first light-emitting thyristor L2n-1, and is disposed on the front surface side with the insulating layer 303 sandwiched therebetween so as not to be electrically connected to the electrode portion 304 on the outer edge of the first light-emitting thyristor L2n-1.

[0056] In FIG. 7A, the light-emitting chip Ck adjusts the light extraction efficiency of the first light-emitting thyristor L2n-1 and the second light-emitting thyristor L2n so as to reduce the difference in light intensity between the first light-emitting thyristor L2n-1 and the second light-emitting thyristor L2n. The light extraction efficiency is the efficiency of how much light out of the supplied energy is extracted as light for the target object. The light extraction efficiency varies depending on how the supplied energy is transmitted, the conversion rate at which the energy is converted into light as a light-emitting unit, how much light is directed toward the target object, and the like. In the first embodiment, the width L2 of the second electrode 305 on the outer edge of the second light-emitting thyristor L2n is set to be larger than the width L1 of the first electrode 304 of the first light-emitting thyristor L2n-1 by a difference Δ. That is, in response to the reduction in the amount of light emitted when the outer periphery of the first light-emitting thyristor L2n-1 is covered with the second wiring 302, the width of the second electrode 305 of the second light-emitting thyristor L2n is increased to provide shielding, thereby adjusting the difference in the amount of light to be smaller. In this embodiment, the light extraction efficiency is adjusted by shielding. Therefore, in Example 1, the portion of the second electrode 305 that has increased due to the difference Δ also functions as a light shielding material that blocks the light of the second light-emitting thyristor L2n.

[0057] (Function of Example 1) In the light-emitting chip Ck of Example 1 having the above configuration, the second wiring 302 for the second light-emitting thyristor L2n is disposed so as to cover a part of the outer edge of the first light-emitting thyristor L2n-1, and affects the amount of light emitted by the first light-emitting thyristor L2n-1. That is, the higher the resolution is, the closer the position of the second wiring 302 is to the first light-emitting thyristor L2n-1, and the more the amount of light from the first light-emitting thyristor L2n-1 that enters the rod lens array 64 changes. In other words, the second wiring 302 affects the optical path of the outer edge that is outside the optical axis (the center of the light-emitting thyristor L), and functions like a wall, so to speak. In the first embodiment, the width of the second electrode 305 is formed to be wide in response to a decrease in the light amount of the first light-emitting thyristor L2n-1 in the second wiring 302. Therefore, in a case where there is a first light-emitting thyristor L2n-1 whose light amount is affected by the second wiring 302 and a second light-emitting thyristor L2n whose light amount is not affected, it is possible to suppress the difference in light amount between the light-emitting thyristors L while suppressing the complexity of the configuration compared to a case where the light amount of each light-emitting thyristor L is adjusted individually. Furthermore, even in a usage scenario that assumes a variable power supply voltage, such as adjusting the average light amount of the LPH by the supply voltage, the difference in light amount is adjusted regardless of the supply voltage.

[0058] FIG. 8 is an explanatory diagram of a conventional configuration, in which FIG. 8A is an explanatory diagram when the light-emitting thyristors are arranged in a straight line, FIG. 8B is an explanatory diagram when the light-emitting thyristors are arranged in a staggered arrangement and the area of ​​the light-emitting thyristors is reduced to avoid wiring, and FIG. 8C is an explanatory diagram when wiring is laminated on the surface of the light-emitting thyristors. 8A, in order to improve the image resolution when the light-emitting thyristors 01 are arranged in a straight line rather than in a staggered arrangement, it is necessary to reduce the area of ​​the light-emitting thyristors 01. However, there is a limit to how much the light-emitting thyristors 01 can be miniaturized, and miniaturization also poses the problem of increased costs.

[0059] As shown in Fig. 8B, by arranging the light-emitting thyristors in a staggered manner, such as the first light-emitting thyristor 02 on the front side and the second light-emitting thyristor 03 on the back side, it is possible to shorten the distance between the centers of the light-emitting thyristors 02 and 03 in the main scanning direction, that is, to improve the resolution. However, as shown in Fig. 8B, in order to pass the wiring 04 to the second light-emitting thyristor 03 between the first light-emitting thyristor 02 while avoiding it, the width of the first light-emitting thyristor 02 becomes small, which causes a problem that the current density changes between the first light-emitting thyristor 02 and the second light-emitting thyristor 03 on the front side, resulting in variation in the amount of light emitted.

[0060] FIG. 9 is a diagram illustrating the experimental results of the light amount distribution in the case of the conventional configuration shown in FIG. 8C. As shown in Fig. 8C, when the first light-emitting thyristor 06 and the second light-emitting thyristor 07 are configured to have the same structure and the second wiring 08 passes through the surface side of the outer edge of the first light-emitting thyristor 06, it is possible to suppress the variation in the amount of light emission compared to the case shown in Fig. 8B, but it is difficult to completely eliminate the variation. It is not impossible to perform adjustment by providing a memory or a current adjustment circuit that adjusts the amount of adjustment of the amount of light for each of the first light-emitting thyristors 06, but this would result in a problem of a complicated structure. In FIG. 9, an experiment was performed on a light-emitting chip having 512 light-emitting thyristors. When the average light intensity of the second light-emitting thyristor 07 is set to 1, the standard deviation of the light intensity of the second light-emitting thyristor caused by individual differences was 0.028. The average light intensity of the first light-emitting thyristor 06 was 0.89, and the standard deviation was 0.030. Therefore, the difference in the average light intensity between the first light-emitting thyristor 06 and the second light-emitting thyristor 07 was 11% (=1-0.89).

[0061] FIG. 10 is an explanatory diagram of an experimental result in the configuration of Example 1, in which FIG. 10A is an explanatory diagram of the relationship between the increment in electrode width and the amount of light, and FIG. 10B is an explanatory diagram of an experimental result when the electrode width of the second light-emitting thyristor is increased by 0.8 μm. 10A, from the experimental results of the increment (difference Δ) of the width L2 of the second electrode 305 of the second light-emitting thyristor L2n and the amount of light output, it can be seen that the difference Δ should be set to 0.8 μm to reduce the output by 11%. In accordance with this, a light-emitting chip Ck with a difference Δ of 0.8 μm was created and an experiment was carried out, and the results are shown in FIG. 10B. As shown in FIG. 10B, the average light amount of the second light-emitting thyristor L2n was 0.90, which is a difference of 1% from the average light amount of the first light-emitting thyristor L2n-1 of 0.89, confirming an improvement.

[0062] In the first embodiment, the width L2 of the second electrode 305 is increased in the main scanning direction, but the present invention is not limited to this. It is also possible to increase the width in the sub-scanning direction, or to change both the widths in the main scanning direction and the sub-scanning direction. In addition, in Example 1, the width of the second electrode 305 is increased, that is, the portion of the difference Δ (an example of the third wiring) is made of the same material as the portion of the second electrode 305 corresponding to the width L1, but this is not limited to the above, and it is also possible to make the third wiring out of a different material. EXAMPLES

[0063] Next, a second embodiment of the present invention will be described. In the description of the second embodiment, components corresponding to those in the first embodiment are given the same reference numerals, and detailed description thereof will be omitted. This embodiment 2 differs from the above-mentioned embodiment 1 in the following points, but is otherwise configured similarly to the above-mentioned embodiment 1.

[0064] In the light-emitting chip Ck of the second embodiment, a first current limiting resistor RI2 is connected to the first light-on signal line 75b (first connection line) to which all of the first light-emitting thyristors L2n-1 are connected. A second current limiting resistor RI1 is connected to the second light-on signal line 75a (second connection line) to which all of the second light-emitting thyristors L2n are connected. In the second embodiment, the resistance values ​​of the two resistors RI1 and RI2 are set so as to reduce the difference in light amount between the first light-emitting thyristor L2n-1 and the second light-emitting thyristor L2n, thereby adjusting the light extraction efficiency of the first light-emitting thyristor L2n-1 and the second light-emitting thyristor L2n. Therefore, the voltage and current supplied to the first light-emitting thyristor L2n-1 and the voltage and current supplied to the second light-emitting thyristor L2n are adjusted according to the amount of light emitted.

[0065] (Function of Example 2) FIG. 11 shows the experimental results of the relationship between the supply current and the optical output. FIG. 12 shows the experimental results of the relationship between the power supply voltage and the light amount ratio when the first current limiting resistor is set to 200 Ω and the second current limiting resistor is set to 220 Ω. In the light-emitting chip Ck of Example 2 having the above configuration, the difference in light intensity between the light-emitting thyristors L is suppressed by adjusting the current-limiting resistors RI1 and RI2. As shown in Fig. 11, when the current supplied to the light-emitting thyristors L is changed, the light output fluctuates. Also, in Fig. 12, in the configuration of Example 2, when the first current-limiting resistor RI2 is set to 200 Ω and the second current-limiting resistor RI1 is set to 220 Ω, it is confirmed that the light intensity ratio between the first light-emitting thyristor L2n-1 and the second light-emitting thyristor L2n fluctuates when the power supply voltage VI is changed.

[0066] In the second embodiment, the difference in the light intensity is suppressed by setting the power supply voltage to 3.3 V, which is the power supply voltage at which the light intensity ratio becomes 1 in FIG. 12, that is, the light intensity ratio between the first light-emitting thyristor L2n-1 and the second light-emitting thyristor L2n is almost zero. That is, when the power supply voltage is fixed to a predetermined value, it is possible to suppress the light intensity difference by adjusting the value of one or both of the two current limiting resistors RI1 and RI2. This method is more preferably applied to a configuration in which the supply voltage does not change or the power supply voltage is constant. The reason for this is that in a usage scenario that assumes a variable power supply voltage such that the average light intensity of the LPH is adjusted by the supply voltage, the light intensity difference adjusted by the supply voltage also changes. Further, it is possible to carry out either the adjustment in the first embodiment or the adjustment in the second embodiment, but it is also possible to carry out both.

[0067] (Example of change) Although the embodiments of the present invention have been described above in detail, the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the gist of the present invention described in the claims. Modifications (H01) to (H010) of the present invention are illustrated below. (H01) In the above embodiment, the printer U is shown as an example of an image forming apparatus, but the present invention is not limited to this and may be configured as, for example, a copier, a fax, or a multifunction machine having multiple or all of these functions. Also, the present invention is not limited to an electrophotographic image forming apparatus and may be applied to any image forming apparatus such as an inkjet type or a thermal transfer type.

[0068] (H02) In the above embodiment, the printer U is configured to use five colors of developer, but this is not limited to this and can also be applied to, for example, a monochrome image forming device or a multi-color image forming device having four or less colors or six or more colors. (H03) In the above embodiment, an endless intermediate transfer belt B is exemplified as an example of an image holding means, but the present invention is not limited to this. For example, the present invention can be applied to a cylindrical intermediate transfer drum, a photosensitive drum, or a photosensitive belt. The present invention can also be applied to a configuration that does not have an intermediate transfer body and records an image directly from a photosensitive body onto a recording sheet S.

[0069] (H04) In the above embodiment, the second wiring 302 that transmits a light-on / off signal to the second light-emitting thyristor L2n affects the light amount of the first light-emitting thyristor L2n-1. However, the present invention is not limited to this. The present invention can be applied to any wiring that affects the light emission of the light-emitting thyristor, such as a power supply wiring, instead of a signal wiring. (H05) In the above embodiment, the width L2 of the second electrode 305 is increased, but the present invention is not limited to this. For example, the second light-up signal line 75a can be extended to cover a part of the second electrode 305 (so that the area covered by the first electrode 304 is the same). Also, a wiring (third wiring) different from the second light-up signal line 75a can be formed and arranged to cover a part of the second electrode 305. In this case, the third wiring can be formed in the same layer as the second wiring 302, and can be manufactured in the same film formation and etching process as the second wiring.

[0070] (H06) In the above embodiment, the structure of the light-emitting thyristor is illustrated as the light-emitting unit, but is not limited thereto. For example, the light-emitting unit may be only a light-emitting diode. In addition, the wiring can also be applied to a configuration in which current is supplied to each of the light-emitting units, for example, the configuration described in JP 2020-123603 A. In addition, the present invention is not limited to a configuration of an LED head made of a light-emitting diode or the like, and can also be applied to a configuration having a laminated substrate such as a vertical cavity surface emitting laser (VCSEL). (H07) In the above embodiment, the case where there are a plurality of first light-emitting thyristors L2n-1 and second light-emitting thyristors L2n has been illustrated, but this is not limiting. The present invention can also be applied to a case where there is one each of the first light-emitting thyristor L2n-1 and second light-emitting thyristor L2n. In addition, the modified examples may be appropriately combined with each other, for example, by combining (H06) and (H07) to configure the light-emitting unit with a VCSEL and to provide one each of the first VCSEL and second VCSEL.

[0071] (H08) In the above embodiment, the case of a print head used in an image forming apparatus is illustrated as an example of a light emitting device, but the present invention is not limited thereto. The present invention may be applied to a light emitting element array used for optical transmission, in which case it may be combined with an optical transmission path, and the light emitted from the first light emitting unit and the light emitted from the second light emitting unit may be put into the same optical transmission path or into different optical transmission paths. The present invention may also be applied to a light emitting substrate used for optical measurement, and a light receiving element that receives the light emitted from the first light emitting unit and the second light emitting unit may be configured on the same substrate, and a lens through which the light emitted from the first light emitting unit and the second light emitting unit passes before reaching an object may be added. In the (H09) embodiment, the light-emitting unit is applied to each of the light-emitting thyristors, and the first wiring 301 is connected to the first light-emitting thyristors L1, L3, ..., L19. However, the present invention is not limited to this. For example, the present invention may be configured to supply a current to a group of light-emitting elements.

[0072] FIG. 13 is an explanatory diagram of another example of the arrangement of light-emitting parts in the present invention. (H010) As illustrated in the first embodiment, the light-emitting thyristors L are arranged in a staggered pattern, but the present invention is not limited to this. For example, as illustrated in Fig. 13, the present invention can be applied to a case where the light-emitting thyristors L are arranged densely in a planar manner, rather than in a row, and the first light-emitting thyristor L1' on the outer periphery and the second light-emitting thyristor L2' on the inside are arranged so that the second wiring 302' to the second light-emitting thyristor L2' passes between the first light-emitting thyristors L1' as in the first embodiment. [Explanation of symbols]

[0073] 75a...second connecting line, 75b...first connecting line, 80...Substrate, 301…first wiring, 302...second wiring, wiring, 304...first electrode, 305...light shielding material, second electrode, third wiring, L1, L3, L2n-1...first light-emitting portion, L2, L4, L2n: second light-emitting portion; LPH: Light emitting device, RI1: Second current limiting resistor, RI2…First current limiting resistor.

Claims

1. A plurality of first light emitting units arranged at intervals along a predetermined first direction; a plurality of second light emitting units arranged at intervals along the first direction, the second light emitting units being arranged at positions offset from the first light emitting units in a second direction intersecting the first direction and offset from each of the first light emitting units along the first direction; a first wiring electrically connected to each of the first light-emitting portions; a second wiring electrically connected to each of the second light-emitting units, the second wiring being disposed on a light-emitting surface side of the first light-emitting unit in a third direction intersecting the first direction and the second direction; Equipped with A part of the second light-emitting section is covered with a light-shielding material in accordance with a difference in light amount between the first light-emitting section and the second light-emitting section so as to reduce a difference in light amount between the first light-emitting section and the second light-emitting section, thereby adjusting the light extraction efficiency of the first light-emitting section and the second light-emitting section. A light emitting device characterized by:

2. A substrate; A plurality of first light emitting units disposed on the substrate; a plurality of second light emitting units disposed on the substrate and positioned at positions offset from the first light emitting units; a wiring arranged on a light emitting side of the substrate and at a position that affects the optical path of the first light emitting unit; Equipped with A part of the second light-emitting section is covered with a light-shielding material in accordance with a difference in light amount between the first light-emitting section and the second light-emitting section so as to reduce a difference in light amount between the first light-emitting section and the second light-emitting section, thereby adjusting the light extraction efficiency of the first light-emitting section and the second light-emitting section. A light emitting device characterized by:

3. The wiring is a wiring for supplying a current to each of the second light-emitting units.

3. The light emitting device according to claim 2.

4. a first wiring that supplies a current to the first light emitting unit within the stack; 4. The light emitting device according to claim 1, further comprising:

5. A first electrode disposed on a light emitting side of the first light emitting portion; a second electrode that is disposed on a light emitting side of the second light emitting portion and has a width greater than that of the first electrode along a first direction in which the first light emitting portions are disposed at intervals; 5. The light emitting device according to claim 1, further comprising:

6. a third wiring made of the same material as the second wiring, the third wiring being arranged at a position that affects the optical path of the second light-emitting portion and electrically connected to each of the second light-emitting portions; The light emitting device according to claim 5 , further comprising:

7. the third wiring is disposed at a position that affects the optical path of the second light-emitting portion and is laminated in the same layer as the second wiring; The light emitting device according to claim 6 , further comprising:

8. a first connection line to which all of the first light emitting units are connected; a second connection line to which all of the second light emitting units are connected; a first current limiting resistor connected to the first connection line and configured to limit a current supplied through the first connection line; a second current limiting resistor connected to the second connection line and limiting a current supplied through the second connection line, the second current limiting resistor having a resistance value relative to the first current limiting resistor set according to a light amount difference between the first light-emitting unit and the second light-emitting unit; 8. The light emitting device according to claim 1, further comprising:

9. adjusting a voltage applied to the first connecting line and the second connecting line in accordance with an average amount of light of the first light-emitting unit and the second light-emitting unit; 9. The light emitting device according to claim 8.

10. An image holding means; a charging means for charging a surface of the image holding means; a latent image forming device comprising the light emitting device according to any one of claims 1 to 9, which forms a latent image on a charged image holding means; An image forming apparatus comprising:

Images