Flexible Display Device

Abstract

To provide a display device improving poor corrosion quality of a GIP wiring part while increasing productivity.SOLUTION: A flexible display device includes: a board including a display area divided into an optical area and a general area, and a non-display area divided into a bending area and a non-bending area; a first insulation film disposed on the board; a wire disposed on the first insulation film of the non-bending area; a second insulation film disposed on the wire; a connection wire that is disposed on the second insulation film in the non-bending area and has a first contact area connected to the wire; a first flattening layer disposed on the connection wire; and a link wire that is disposed on the first flattening layer and extends to the bending area, and has a second contact area connected to the connection wire.SELECTED DRAWING: Figure 1a

Description

[Technical field]

[0001] The present specification relates to a flexible display device, and more particularly, to a flexible display device capable of reducing a bezel width. [Background technology]

[0002] 2. Description of the Related Art As we enter the information age, the field of display devices that visually display electrical information signals is rapidly developing, and research is ongoing to develop various display devices with improved performance, such as thinner, lighter, and less power consumption.

[0003] Representative display devices include a liquid crystal display (LCD), a field emission display (FED), an electro-wetting display (EWD), and an organic light emitting display (OLED).

[0004] Electroluminescent displays, such as organic light-emitting displays, are self-emitting displays that do not require a separate light source, unlike liquid crystal displays, and can be manufactured to be lightweight and thin. Electroluminescent displays are also advantageous in terms of power consumption due to low voltage operation, and are also excellent in color composition, response speed, viewing angle, and contrast ratio (CR), and are expected to be used in a variety of fields.

[0005] In an electroluminescence display device, a light emitting layer is disposed between two electrodes, an anode electrode and a cathode electrode, to form a light emitting element. That is, when holes from the anode electrode are injected into the light emitting layer and electrons from the cathode electrode are injected into the light emitting layer, the injected electrons and holes are recombined with each other to form excitons in the light emitting layer, thereby emitting light.

[0006] Meanwhile, efforts are being made to reduce a bezel area, which is an outer periphery of a display area, in order to increase the size of an effective display screen within the same area of ​​a display device.

[0007] However, since wiring and driving circuits for driving the screen are arranged in the bezel area, which corresponds to the non-display area, there is a limit to how much the bezel area can be reduced. Summary of the Invention [Problem to be solved by the invention]

[0008] In recent years, in relation to flexible electroluminescent displays that can maintain display performance even when warped by applying a flexible substrate made of a ductile material such as plastic, there have been efforts to reduce the bezel area by bending a non-display area of ​​the flexible substrate in order to reduce the bezel area while securing an area for wiring and driving circuits. Hereinafter, for convenience, such a display device will be referred to as a bezel bending display device.

[0009] Meanwhile, in order to reduce the bezel width, a bezel bending display device is applied, and a photo acrylic (PAC) is applied as the planarization layer in a structure that applies two wiring layers and two planarization layers, in order to improve productivity. In this case, corrosion defects may occur in the GIP (Gate-In-Panel) wiring part near the contact hole adjacent to the bending area.

[0010] Therefore, an object of the present invention is to provide a flexible light-emitting display device which improves productivity while improving corrosion defects in the GIP wiring portion.

[0011] The object of the present invention is not limited to the above-mentioned objects, and other objects not mentioned herein will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0012] In order to solve the above-mentioned problems, a flexible display device according to one embodiment of the present invention includes a substrate including a display region divided into an optical region and a general region, and a non-display region divided into a bending region and a non-bending region, a first insulating film disposed on the substrate, a wiring disposed on the first insulating film in the non-bending region, a second insulating film disposed on the wiring, a connecting wiring disposed on the second insulating film in the non-bending region and having a first contact region connected to the wiring, a first planarization layer disposed on the connecting wiring, a link wiring disposed on the first planarization layer, extending to the bending region and having a second contact region connected to the connecting wiring, a second planarization layer disposed on the link wiring and including an open region having a portion removed to expose the second contact region of the link wiring, and a third insulating film disposed on the second planarization layer and filling the open region.

[0013] Further details of the embodiments are included in the detailed description and the drawings. Effect of the Invention

[0014] The present invention uses a photoacryl (PAC)-based material as a planarization layer, removes a portion of the planarization layer above the contact hole of the GIP wiring part, and fills it with a bank of polyimide (PI)-based material, thereby improving the productivity and improving the corrosion defect of the GIP wiring part.

[0015] The effects of the present invention are not limited to the above-mentioned examples, and various other effects are included within the scope of the present invention. [Brief description of the drawings]

[0016] [Figure 1a] 1 is a plan view illustrating a flexible display device according to an embodiment of the present invention; [Figure 1b] 1 is a plan view illustrating a flexible display device according to an embodiment of the present invention; [Figure 1c]1 is a plan view illustrating a flexible display device according to an embodiment of the present invention; [Figure 1d] 1 is a plan view illustrating a flexible display device according to an embodiment of the present invention; [Figure 2a] FIG. 2 is a diagram illustrating an example of a first optical region of the flexible display device of FIG. 1; [Figure 2b] FIG. 2 is a diagram illustrating an example of a first optical region of the flexible display device of FIG. 1; [Diagram 3] 2 is an equivalent circuit diagram of a sub-pixel of a flexible display device according to an embodiment of the present invention. [Figure 4] 2 is a diagram showing an arrangement of sub-pixels in a display area in a display panel according to an embodiment of the present invention. [Figure 5a] 4A to 4C are diagrams illustrating exemplary arrangements of signal lines in a first optical region and a general region in a display panel according to an embodiment of the present invention. [Figure 5b] 4A to 4C are diagrams illustrating exemplary arrangements of signal lines in a second optical region and a general region in a display panel according to an embodiment of the present invention. [Figure 6] 2 is a diagram showing the cross-sectional structure of a non-transmissive region and a transmissive region in a first optical region and the cross-sectional structure of a general region in a flexible display device according to an embodiment of the present invention. [Figure 7] 1 is a cross-sectional view of a portion of a flexible display device according to an embodiment of the present invention; [Figure 8] 1 is a partial cross-sectional view of a flexible display device according to another embodiment of the present invention; [Figure 9] FIG. 2 is a plan view showing a GIP wiring portion according to an embodiment of the present invention. [Figure 10] 10 is a diagram showing a cross section taken along line CC' in FIG. 9. FIG. [Figure 11] 1 is a plan view showing a first optical region of a flexible display device according to an embodiment of the present invention. [Figure 12] FIG. 12 is an enlarged view of a region X in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] The advantages and features of the present invention, and the methods for achieving them, will become apparent from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various different forms, and the embodiments are provided solely for the purpose of making the disclosure of the present invention complete and fully conveying the scope of the invention to those skilled in the art to which the present invention pertains. The present invention is defined only by the claims.

[0018] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are illustrative, and the present invention is not limited to the illustrated matters. In addition, when explaining the present invention, if it is determined that a specific description of related known technology may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. In addition, when the words "include," "have," "be made," etc. are used in this specification, other parts may be added since "only" is not used. When a component is expressed in the singular, it includes the case where it includes the plural, unless otherwise expressly specified.

[0019] When interpreting elements, they are interpreted as including a margin of error even if there is no other explicit description.

[0020] When describing a positional relationship, for example when describing the positional relationship of two parts using "on top of," "at the top of," "at the bottom of," "next to," etc., one or more other parts may be located between the two parts, so long as "immediately" or "directly" is not used.

[0021] When an element or layer is referred to as being on another element or layer, this includes the case where the element or layer is directly on the other element or has other layers or elements interposed therebetween.

[0022] Although the terms "first", "second" and the like are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, the first component referred to below may be the second component within the technical concept of the present invention.

[0023] Like reference numbers refer to like elements throughout the specification.

[0024] The size and thickness of each component shown in the drawings are shown for convenience of explanation, and the present invention is not necessarily limited to the size and thickness of the components shown.

[0025] The features of the various embodiments of the present invention may be partially or fully combined or combined with each other, and may be technically interlocked and driven in various ways, as will be readily understood by those skilled in the art, and each embodiment may be implemented independently of each other, or may be implemented together in a related relationship.

[0026] Various embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0027] 1a to 1d are schematic plan views of a flexible display device according to an embodiment of the present invention.

[0028] 1a to 1d, a flexible display device 100 according to an embodiment of the present invention may include a display panel DP for displaying an image and one or more optical electronic devices 150, 150a, 150b. The optical electronic devices 150, 150a, 150b may include a light receiving device for receiving light.

[0029] The display panel DP is a panel for displaying images to the user.

[0030] The display panel DP may include a display element for displaying an image, a driving element for driving the display element, and wiring for transmitting various signals to the display element and the driving element. The display element may be defined differently depending on the type of the display panel DP. For example, when the display panel DP is an organic light-emitting display panel, the display element may be an organic light-emitting element including an anode electrode, an organic layer, and a cathode electrode. For example, when the display panel DP is a liquid crystal display panel, the display element may be a liquid crystal display element.

[0031] In the following, it is assumed that the display panel DP is an organic light emitting display panel, but the display panel DP is not limited to being an organic light emitting display panel.

[0032] Meanwhile, the display panel DP may be configured to include a substrate, a number of insulating films on the substrate, a transistor layer, a light emitting element layer, etc. The display panel DP may include a number of sub-pixels and various signal lines for driving the sub-pixels to display an image. The signal lines may include a number of data lines, a number of gate lines, a number of power lines, etc. In this case, each of the sub-pixels may include a transistor located in the transistor layer and a light emitting element located in the light emitting element layer.

[0033] The display panel DP can include a display area DA and a non-display area NDA.

[0034] The display area DA is an area in which an image is displayed on the display panel DP.

[0035] In the display area DA, a number of sub-pixels constituting a number of pixels and a circuit for driving the number of sub-pixels may be arranged. The number of sub-pixels are the minimum units constituting the display area DA, and a display element may be arranged in each of the number of sub-pixels, and the number of sub-pixels may constitute a pixel. For example, an organic light-emitting element including an anode electrode, an organic layer, and a cathode electrode may be arranged in each of the number of sub-pixels, but is not limited thereto. In addition, the circuit for driving the number of sub-pixels may include a driving element and wiring, etc. For example, the circuit may be composed of a thin film transistor, a storage capacitor, a gate line, a data line, etc., but is not limited thereto.

[0036] The non-display area NDA is an area where no image is displayed.

[0037] The non-display area NDA may be bent so that it is not visible at the front or may be hidden by a case (not shown) and is also called the bezel area.

[0038] 1a to 1d, the non-display area NDA is illustrated as surrounding the rectangular display area DA, but the shapes and arrangements of the display area DA and the non-display area NDA are not limited to the examples illustrated in Fig. 1a to 1d. That is, the display area DA and the non-display area NDA may have a shape suitable for the design of an electronic device equipped with the flexible display device 100. For example, the exemplary shape of the display area DA may be a pentagon, a hexagon, a circle, an ellipse, etc.

[0039] In the non-display area NDA, various wirings and circuits for driving the organic light emitting elements in the display area DA may be arranged, for example, link wirings for transmitting signals to a number of sub-pixels and circuits in the display area DA, GIP (Gate-In-Panel) wirings, or driving ICs such as gate driver ICs and data driver ICs may be arranged, but are not limited thereto.

[0040] The flexible display device 100 may further include various additional elements for generating various signals or driving pixels in the display area DA. The additional elements for driving the pixels may include an inverter circuit, a multiplexer, an electrostatic discharge (ESD) circuit, etc. The flexible display device 100 may also include additional elements associated with functions other than driving the pixels. For example, the flexible display device 100 may further include additional elements providing a touch sensing function, a user authentication function (e.g., fingerprint recognition), a multi-level pressure sensing function, a tactile feedback function, etc. The aforementioned additional elements may be located in the non-display area NDA and / or an external circuit connected to the connection interface.

[0041] Referring to FIGS. 1a to 1d, a display area DA can include, but is not limited to, a first optical area DA1 and a second optical area DA2.

[0042] In Figures 1a to 1d, one or more optical electronic devices 150, 150a, 150b are electronic components located below (on the side opposite the viewing surface of) the display panel DP.

[0043] Light may be incident on the front (viewing) surface of the display panel DP and transmitted through the display panel DP to one or more opto-electronic devices 150, 150a, 150b located below the display panel DP (opposite the viewing surface).

[0044] The one or more optical electronic devices 150, 150a, 150b may be devices that receive light transmitted through the display panel DP and perform a function determined by the received light. For example, the optical electronic devices 150, 150a, 150b may include one or more of a photographing device such as a camera (image sensor), an illuminance sensor, a detection sensor, a proximity sensor, etc.

[0045] As described above, the electronic devices 150, 150a, and 150b, which are devices that require light reception, may be located behind (below) the display panel DP. That is, the electronic devices 150, 150a, and 150b may be located on the opposite side to the viewing surface of the display panel DP. The electronic devices 150, 150a, and 150b are not exposed to the front surface of the flexible display device 100. Therefore, when a user looks at the front surface of the flexible display device 100, the electronic devices 150, 150a, and 150b are not visible.

[0046] As an example, a camera located behind (below) the display panel DP is a front camera that captures the front, and can also be considered as a camera lens.

[0047] The electronic devices 150, 150a, and 150b may be arranged to overlap with a display area DA of the display panel DP, i.e., the electronic devices 150, 150a, and 150b may be located within the display area DA.

[0048] Referring to FIGS. 1a to 1d, a display area DA may include a general area NA and one or more optical areas DA1, DA2.

[0049] One or more of the optical areas DA1, DA2 may be areas that overlap one or more of the optical-electronic devices 150, 150a, 150b.

[0050] 1a, the display area DA may include a general area NA and a first optical area DA1, where at least a part of the first optical area DA1 may overlap with the first opto-electronic device 150.

[0051] Although FIG. 1a shows a structure in which the first optical area DA1 is circular, the shape of the first optical area DA1 according to the embodiment of the present invention is not limited thereto.

[0052] For example, as shown in FIG. 1b, the shape of the first optical area DA1 may be an octagon, or may be any other polygonal shape.

[0053] According to the example of Fig. 1c, the display area DA can include a general area NA, a first optical area DA1 and a second optical area DA2. In the example of Fig. 1c, the general area NA may be present between the first optical area DA1 and the second optical area DA2. Here, at least a portion of the first optical area DA1 may overlap with the first optical-electronic device 150a, and at least a portion of the second optical area DA2 may overlap with the second optical-electronic device 150b.

[0054] According to the example of Fig. 1d, the display area DA may include a general area NA, a first optical area DA1 and a second optical area DA2. In the example of Fig. 1d, there is no general area NA between the first optical area DA1 and the second optical area DA2. That is, the first optical area DA1 and the second optical area DA2 may be in contact with each other. Here, at least a part of the first optical area DA1 may overlap with the first optical-electronic device 150a, and at least a part of the second optical area DA2 may overlap with the second optical-electronic device 150b.

[0055] The one or more optical regions DA1, DA2 should have both an image display structure and a light transmission structure formed therein. That is, since the one or more optical regions DA1, DA2 are a part of the display region DA, sub-pixels for image display should be arranged in the one or more optical regions DA1, DA2. The one or more optical regions DA1, DA2 should have a light transmission structure formed therein to transmit light to one or more optical electronic devices 150, 150a, 150b.

[0056] One or more optical electronic devices 150, 150a, 150b, which are devices that need to receive light, are located behind (below, opposite the viewing surface) the display panel DP to receive light that has passed through the display panel DP.

[0057] The one or more optical-electronic devices 150, 150a, 150b are not exposed on the front (viewing) surface of the display panel DP, and therefore, when a user looks at the front surface of the flexible display device 100, the optical-electronic devices 150, 150a, 150b are not visible to the user.

[0058] For example, the first optical-electronic device 150, 150a may be a camera, and the second optical-electronic device 150b may be a detection sensor such as a proximity sensor, an illuminance sensor, etc. For example, the detection sensor may be an infrared sensor that detects infrared rays.

[0059] Conversely, the first optical-electronic device 150, 150a may be a sensing sensor and the second optical-electronic device 150b may be a camera.

[0060] In the following description, for convenience of explanation, the first optical electronic device 150, 150a is a camera, and the second optical electronic device 150b is a detection sensor, for example, where the camera may be a camera lens or an image sensor.

[0061] When the first optical electronic device 150, 150a is a camera, the camera may be a front camera located behind (below) the display panel DP, capturing an image in the front direction of the display panel DP. Thus, a user can capture an image through a camera that is not visible on the viewing surface while looking at the viewing surface of the display panel DP.

[0062] The general area NA and one or more optical areas DA1, DA2 included in the display area DA are areas in which images can be displayed, but the general area NA is an area in which a light-transmitting structure does not need to be formed, and the one or more optical areas DA1, DA2 are areas in which a light-transmitting structure must be formed.

[0063] Therefore, one or more of the optical regions DA1 and DA2 must have a transmittance above a certain level, and the general region NA may have no light transmittance or a low transmittance below a certain level.

[0064] For example, one or more of the optical areas DA1, DA2 and the general area NA may differ from each other in terms of resolution, subpixel arrangement structure, number of subpixels per unit area, electrode structure, line structure, electrode arrangement structure, line arrangement structure, or the like.

[0065] For example, the number of sub-pixels per unit area in one or more optical regions DA1 and DA2 may be smaller than the number of sub-pixels per unit area in the general region NA. That is, the resolution of one or more optical regions DA1 and DA2 may be lower than the resolution of the general region NA. In this case, the number of sub-pixels per unit area is a unit for measuring resolution, and can also be called PPI (Pixels Per Inch), which means the number of pixels within 1 inch.

[0066] For example, the number of subpixels per unit area in the first optical region DA1 may be smaller than the number of subpixels per unit area in the general region NA, and the number of subpixels per unit area in the second optical region DA2 may be equal to or greater than the number of subpixels per unit area in the first optical region DA1.

[0067] The first optical area DA1 may have various patterns, such as a circle, an ellipse, a square, a hexagon, an octagon, etc. The second optical area DA2 may have various patterns, such as a circle, an ellipse, a square, a hexagon, an octagon, etc. The first optical area DA1 and the second optical area DA2 may have the same pattern or different patterns.

[0068] Referring to FIG. 1c, when the first optical area DA1 and the second optical area DA2 are adjacent, the entire optical area including the first optical area DA1 and the second optical area DA2 may also have various patterns, such as a circle, an ellipse, a square, a hexagon, or an octagon.

[0069] In the following, for convenience of explanation, an example will be given in which the first optical area DA1 and the second optical area DA2 are each circular.

[0070] In the flexible display device 100 according to an embodiment of the present invention, if the first optical electronic device 150, 150a, which is not exposed to the outside and is hidden under the display panel DP, is a camera, the flexible display device 100 according to an embodiment of the present invention can be said to be a display to which UDC (Under Display Camera) technology is applied.

[0071] Accordingly, in the case of the flexible display device 100 according to an embodiment of the present invention, a notch or a camera hole for exposing a camera does not need to be formed in the display panel DP, so that the area of ​​the display area DA does not decrease.

[0072] As a result, since a notch or camera hole for exposing a camera does not need to be formed in the display panel DP, the size of the bezel area can be reduced, design restrictions can be eliminated, and design freedom can be increased.

[0073] In the flexible display device 100 according to an embodiment of the present invention, although one or more optical electronic devices 150, 150a, 150b are located hidden behind the display panel DP, the one or more optical electronic devices 150, 150a, 150b must be able to receive light normally and perform their designated functions normally.

[0074] In addition, in the flexible display device 100 according to an embodiment of the present invention, although one or more optical electronic devices 150, 150a, 150b are positioned behind the display panel DP and overlap with the display area DA, normal image display must be possible in one or more optical areas DA1, DA2 overlapping with the one or more optical electronic devices 150, 150a, 150b in the display area DA.

[0075] Therefore, the flexible display device 100 according to an embodiment of the present invention may have a structure capable of improving the transmittance of the first and second optical areas DA1 and DA2 overlapped with the electronic devices 150, 150a, and 150b.

[0076] 2a and 2b are diagrams illustrating the first optical region of the flexible display device of FIG. 1 as an example.

[0077] In comparison with FIG. 2a, FIG. 2b further shows the wiring SL and the sub-pixel light-emitting areas EA1, EA2, EA3, and EA4.

[0078] 2a and 2b, the first optical area DA1 may be overlapped with the optical-electronic device. The first optical area DA1 may include a non-transmitting area NTA and a transmitting area TA.

[0079] The transmission area TA is a part of the first optical area DA1, and an opaque structure such as a cathode electrode is removed to allow external light to pass through to the optical electronic device. For example, the transmission area TA may have a circular or elliptical shape and may be referred to as a hole area.

[0080] The non-transmitting area NTA is a part of the first optical area DA1, in which the transistors in the transistor layer and the light-emitting elements in the light-emitting element layer may be located.

[0081] The non-transmissive area NTA can include a pixel area PA in which a large number of sub-pixel light-emitting areas EA1, EA2, EA3, and EA4 exist, and a wiring area WA in which signal lines SL are arranged.

[0082] When the transmissive area TA is surrounded by the non-transmissive area NTA, the first optical area DA1 may include, but is not limited to, multiple transmissive areas TA that are separated from each other.

[0083] FIG. 3 is an equivalent circuit diagram of a sub-pixel of a flexible display device according to an embodiment of the present invention.

[0084] Referring to FIG. 3, in a flexible display device according to an embodiment of the present invention, each of a number of sub-pixels SP arranged on a display panel may include a light emitting element 120, a driving transistor Td, a scan transistor Ts, a storage capacitor Cst, etc.

[0085] In this case, the light emitting element 120 may include a pixel electrode, a common electrode, and a light emitting layer located between the pixel electrode and the common electrode. The pixel electrode may be disposed in each sub-pixel SP, and the common electrode may be disposed in common to a number of sub-pixels SP. For example, the pixel electrode may be an anode electrode, and the common electrode may be a cathode electrode. In another example, the pixel electrode may be a cathode electrode, and the common electrode may be an anode electrode. For example, the light emitting element 120 may be an organic light emitting diode (OLED), a micro LED (Micro Light Emitting Diode), or a quantum dot (QD) light emitting element, etc.

[0086] The driving transistor Td is a transistor for driving the light emitting element 120, and may include a first node N1, a second node N2, and a third node N3.

[0087] A first node N1 of the driving transistor Td may be a gate node of the driving transistor Td and may be electrically connected to a source node or a drain node of the scan transistor Ts. A second node N2 of the driving transistor Td may be a source node or a drain node of the driving transistor Td and may be electrically connected to a pixel electrode of the light emitting element 120. A third node N3 of the driving transistor Td may be electrically connected to a driving voltage line DVL that supplies a driving voltage EVDD.

[0088] In addition, the scan transistor Ts may be controlled by a scan signal SCAN and may be connected between the first node N1 of the driving transistor Td and the data line DL. The scan transistor Ts may be turned on or off by the scan signal SCAN provided through the gate line GL to control the connection between the data line DL and the first node N1 of the driving transistor Td.

[0089] The scan transistor Ts is turned on by a scan signal SCAN having a turn-on level voltage, and can transmit the data voltage Vdata supplied from the data line DL to the first node N1 of the driving transistor Td.

[0090] The turn-on level voltage of the scan signal SCAN, which can turn on the scan transistor Ts, may be a high level voltage or a low level voltage. The turn-off level voltage of the scan signal SCAN, which can turn off the scan transistor Ts, may be a low level voltage or a high level voltage. For example, when the scan transistor Ts is an n-type transistor, the turn-on level voltage may be a high level voltage and the turn-off level voltage may be a low level voltage. As another example, when the scan transistor Ts is a p-type transistor, the turn-on level voltage may be a low level voltage and the turn-off level voltage may be a high level voltage.

[0091] Each of the drive transistor Td and the scan transistor Ts may be an n-type transistor or a p-type transistor.

[0092] The storage capacitor Cst may be connected between a first node N1 and a second node N2 of the driving transistor Td. The storage capacitor Cst is charged with an amount of charge corresponding to a voltage difference between both ends and serves to maintain the voltage difference between both ends for a predetermined frame time, thereby enabling a corresponding sub-pixel SP to emit light for the predetermined frame time.

[0093] The storage capacitor Cst may be an external capacitor intentionally designed outside the driving transistor Td, rather than a parasitic capacitor that is an internal capacitor that exists between the gate node and the source node (or the drain node) of the driving transistor Td.

[0094] The sub-pixel SP of the flexible display device according to an embodiment of the present invention may further include one or more transistors or one or more capacitors.

[0095] FIG. 4 is a diagram showing an arrangement of sub-pixels in a display area in a display panel according to an embodiment of the present invention.

[0096] That is, FIG. 4 shows the arrangement of sub-pixels SP in three areas NA, DA1, and DA2 included in the display area of ​​the display panel according to the embodiment of the present invention.

[0097] Referring to FIG. 4, a plurality of sub-pixels SP may be arranged in each of a general area NA, a first optical area DA1, and a second optical area DA2 included in a display area.

[0098] For example, the sub-pixels SP may include a red sub-pixel Red SP that emits red light, a green sub-pixel Green SP that emits green light, and a blue sub-pixel Blue SP that emits blue light.

[0099] Thus, each of the general area NA, the first optical area DA1, and the second optical area DA2 may include a light emitting area EA of the red sub-pixel Red SP, a light emitting area EA of the green sub-pixel Green SP, and a light emitting area EA of the blue sub-pixel Blue SP.

[0100] Referring to FIG. 4, the general area NA does not include a light-transmitting structure and may include the light-emitting area EA.

[0101] However, the first optical area DA1 and the second optical area DA2 must not only include the light emitting area EA but also include a light transmitting structure.

[0102] Thus, the first optical region DA1 may include a light-emitting region EA and a first transmissive region TA1, and the second optical region DA2 may include a light-emitting region EA and a second transmissive region TA2.

[0103] The luminescent area EA and the transmissive areas TA1 and TA2 can be distinguished based on whether they are capable of transmitting light or not, that is, the luminescent area EA can be an area that does not transmit light, and the transmissive areas TA1 and TA2 can be areas that can transmit light.

[0104] The light emitting area EA and the transmissive areas TA1 and TA2 can be distinguished by the presence or absence of a specific metal layer. For example, a cathode electrode may be formed in the light emitting area EA, but not in the transmissive areas TA1 and TA2. A light shielding layer may be formed in the light emitting area EA, but not in the transmissive areas TA1 and TA2.

[0105] In this case, since the first optical region DA1 includes the first transmission region TA1 and the second optical region DA2 includes the second transmission region TA2, both the first optical region DA1 and the second optical region DA2 are regions through which light can pass.

[0106] In this case, the transmittance (degree of transmission) of the first optical region DA1 may be the same as the transmittance (degree of transmission) of the second optical region DA2.

[0107] In this case, the first transmission regions TA1 in the first optical region DA1 and the second transmission regions TA2 in the second optical region DA2 may have the same pattern or size, or the first transmission regions TA1 in the first optical region DA1 and the second transmission regions TA2 in the second optical region DA2 may have different patterns or sizes, but the ratio of the first transmission regions TA1 in the first optical region DA1 and the ratio of the second transmission regions TA2 in the second optical region DA2 may be the same.

[0108] Alternatively, the transmittance (degree of transmission) of the first optical area DA1 and the transmittance (degree of transmission) of the second optical area DA2 may be different from each other.

[0109] In this case, the first transmission regions TA1 in the first optical region DA1 and the second transmission regions TA2 in the second optical region DA2 may have different patterns or sizes. Or, even if the first transmission regions TA1 in the first optical region DA1 and the second transmission regions TA2 in the second optical region DA2 have the same patterns or sizes, the ratio of the first transmission regions TA1 in the first optical region DA1 and the ratio of the second transmission regions TA2 in the second optical region DA2 may be different from each other.

[0110] For example, if the first optical electronic device overlapped with the first optical area DA1 is a camera and the second optical electronic device overlapped with the second optical area DA2 is a sensor, the camera may require a larger amount of light than the sensor.

[0111] Therefore, the transmittance (degree of transmission) of the first optical area DA1 can be higher than the transmittance (degree of transmission) of the second optical area DA2.

[0112] In this case, the first transmission region TA1 of the first optical region DA1 may be larger than the second transmission region TA2 of the second optical region DA2, or even if the first transmission region TA1 of the first optical region DA1 and the second transmission region TA2 of the second optical region DA2 are the same size, the ratio of the first transmission region TA1 in the first optical region DA1 may be larger than the ratio of the second transmission region TA2 in the second optical region DA2.

[0113] For convenience of explanation, the following description will be given taking as an example a case where the transmittance (degree of transmission) of the first optical area DA1 is greater than the transmittance (degree of transmission) of the second optical area DA2.

[0114] In addition, as shown in FIG. 4, in the embodiment of the present invention, the transmissive areas TA1 and TA2 can be called transparent areas, and the transmittance can be called transparency.

[0115] In addition, as shown in FIG. 4, in the embodiment of the present invention, it is assumed that the first optical area DA1 and the second optical area DA2 are located at the upper end of the display area of ​​the display panel and are arranged side by side.

[0116] Referring to Figure 4, the horizontal display area in which the first optical area DA1 and the second optical area DA2 are arranged is called the first horizontal display area HA1, and the horizontal display area in which the first optical area DA1 and the second optical area DA2 are not arranged is called the second horizontal display area HA2.

[0117] 4, the first horizontal display area HA1 may include a general area NA, a first optical area DA1, and a second optical area DA2, whereas the second horizontal display area HA2 may include only the general area NA.

[0118] FIG. 5a is a diagram illustrating an example of the arrangement of signal lines in a first optical region and a general region in a display panel according to an embodiment of the present invention.

[0119] FIG. 5b is a diagram illustrating an example of the arrangement of signal lines in the second optical region and the general region in a display panel according to an embodiment of the present invention.

[0120] That is, Figure 5a shows the arrangement of signal lines in the first optical area DA1 and the general area in a display panel according to an embodiment of the present invention, and Figure 5b shows the arrangement of signal lines in the second optical area DA2 and the general area in a display panel according to an embodiment of the present invention.

[0121] The first horizontal display area HA1 shown in FIGS. 5a and 5b is a part of the first horizontal display area HA1 in the display panel, and the second horizontal display area HA2 is a part of the second horizontal display area HA2 in the display panel.

[0122] The first optical area DA1 shown in FIG. 5a is a part of the first optical area DA1 in the display panel, and the second optical area DA2 shown in FIG. 5b is a part of the second optical area DA2 in the display panel.

[0123] 5a and 5b, the first horizontal display area HA1 may include a general area, a first optical area DA1 and a second optical area DA2, and the second horizontal display area HA2 may include a general area.

[0124] Various types of horizontal lines HL1, HL2 and various types of vertical lines VLn, VL1, VL2 may be arranged on the display panel.

[0125] In the embodiment of the present invention, the horizontal direction and the vertical direction refer to two intersecting directions, and the horizontal direction and the vertical direction may differ depending on the viewing direction. For example, in the embodiment of the present invention, the horizontal direction may refer to the direction in which one gate line extends and is arranged, and the vertical direction may refer to the direction in which one data line extends and is arranged. Thus, the horizontal and vertical directions are taken as examples.

[0126] Referring to Figures 5a and 5b, the horizontal lines arranged on the display panel may include a first horizontal line HL1 arranged in the first horizontal display area HA1 and a second horizontal line HL2 arranged in the second horizontal display area HA2.

[0127] The horizontal lines arranged on the display panel may be gate lines, i.e., the first horizontal line HL1 and the second horizontal line HL2 may be gate lines, and may include various types of gate lines according to the structure of the sub-pixels.

[0128] Referring to Figures 5a and 5b, the vertical lines arranged on the display panel may include a general vertical line VLn arranged only in the general region, a first vertical line VL1 passing through the first optical region DA1 and the general region, and a second vertical line VL2 passing through the second optical region DA2 and the general region.

[0129] The vertical lines arranged in the display panel may include data lines, driving voltage lines, etc., and may further include reference voltage lines, initialization voltage lines, etc. That is, the general vertical line VLn, the first vertical line VL1, and the second vertical line VL2 may include data lines, driving voltage lines, etc., and may further include reference voltage lines, initialization voltage lines, etc.

[0130] In the embodiment of the present invention, the term "horizontal" in the second horizontal line HL2 only means that a signal is transmitted from left (or right) to right (or left), and does not mean that the second horizontal line HL2 extends in a straight line only in the exact horizontal direction. That is, in Figures 5a and 5b, the second horizontal line HL2 is shown in a straight line, but unlike this, the second horizontal line HL2 may include a bent or curved portion. Similarly, the first horizontal line HL1 may also include a bent or curved portion.

[0131] In the embodiment of the present invention, the term "vertical" in the general vertical line VLn only means that a signal is transmitted from the top (or bottom) to the bottom (or top), and does not mean that the general vertical line VLn extends in a straight line only in the exact vertical direction. That is, in Figures 5a and 5b, the general vertical line VLn is shown in a straight line, but unlike this, the general vertical line VLn may include a bent or curved portion. Similarly, the first vertical line VL1 and the second vertical line VL2 may also include a bent or curved portion.

[0132] 5a, the first optical region DA1 included in the first horizontal region HA1 may include a light-emitting region and a first transmissive region. In the first optical region DA1, an outer region of the first transmissive region may include a light-emitting region.

[0133] Referring to FIG. 5a, in order to improve the transmittance of the first optical area DA1, the first horizontal line HL1 passing through the first optical area DA1 can pass by avoiding the first transmission area within the first optical area DA1.

[0134] Therefore, each of the first horizontal lines HL1 passing through the first optical regions DA1 may include a curved section or a bending section that detours around the outside of the outer frame of each of the first transmission regions.

[0135] As a result, the first horizontal line HL1 arranged in the first horizontal region HA1 and the second horizontal line HL2 arranged in the second horizontal region HA2 may have different patterns, lengths, etc. In other words, the first horizontal line HL1 passing through the first optical region DA1 and the second horizontal line HL2 not passing through the first optical region DA1 may have different patterns, lengths, etc.

[0136] In addition, in order to improve the transmittance of the first optical area DA1, the first vertical line VL1 passing through the first optical area DA1 can pass while avoiding the first transmission area within the first optical area DA1.

[0137] Therefore, each of the first vertical lines VL1 passing through the first optical area DA1 may include a curved section or a bending section that detours around the outside of the outer frame of each first transmission area.

[0138] Accordingly, the first vertical line VL1 passing through the first optical region DA1 and the general vertical line VLn arranged in the general region without passing through the first optical region DA1 may have different patterns or lengths.

[0139] Referring to FIG. 5a, the first transmission areas included in the first optical area DA1 in the first horizontal region HA1 may be arranged in a diagonal direction.

[0140] 5a, in the first optical region DA1 in the first horizontal region HA1, a light emitting region may be disposed between two first transmissive regions adjacent to each other in the left and right direction. In the first optical region DA1 in the first horizontal region HA1, a light emitting region may be disposed between two first transmissive regions adjacent to each other in the up and down direction.

[0141] Referring to FIG. 5a, the first horizontal line HL1 arranged in the first horizontal region HA1, i.e., the first horizontal line HL1 passing through the first optical region DA1, may include at least one curved or bending section that detours outside the outer frame of the first transmission region.

[0142] 5b, the second optical region DA2 included in the first horizontal region HA1 may include a light emitting region and a second transmissive region TA2. Within the second optical region DA2, an outer region of the second transmissive region TA2 may include a light emitting region.

[0143] The positions and arrangement of the light emitting region and the second transmission region TA2 in the second optical region DA2 may be the same as the positions and arrangement of the light emitting region and the second transmission region in the first optical region DA1 in FIG. 5a.

[0144] Alternatively, as shown in FIG. 5b, the position and arrangement of the light-emitting region and the second transmission region TA2 in the second optical region DA2 may be different from the position and arrangement of the light-emitting region and the second transmission region in the first optical region DA1 in FIG. 5a.

[0145] For example, referring to Fig. 5b, in the second optical region DA2, the second transmission regions TA2 may be arranged in the horizontal direction (left-right direction). A light-emitting region may not be arranged between two second transmission regions TA2 adjacent in the horizontal direction (left-right direction). Also, a light-emitting region in the second optical region DA2 may be arranged between the second transmission regions TA2 adjacent in the vertical direction (up-down direction). That is, a light-emitting region may be arranged between two rows of the second transmission regions TA2.

[0146] When the first horizontal line HL1 passes through the second optical area DA2 in the first horizontal area HA1 and the general area therearound, it may follow the same form as in FIG. 5a.

[0147] Alternatively, as shown in FIG. 5b, the first horizontal line HL1 may have a different shape from that of FIG. 5a when passing through the second optical area DA2 in the first horizontal area HA1 and the surrounding general area.

[0148] That is, the positions and arrangement of the light emitting region and the second transmission region TA2 in the second optical region DA2 in FIG. 5b are different from the positions and arrangement of the light emitting region and the second transmission region in the first optical region DA1 in FIG. 5a.

[0149] Referring to FIG. 5b, when the first horizontal line HL1 passes through the second optical area DA2 in the first horizontal region HA1 and the surrounding general area, it can pass in a straight line between the adjacent second transmission areas TA2 above and below without any curved or bent sections.

[0150] In other words, one first horizontal line HL1 may have a curved section or a bending section in the first optical area DA1 but may not have a curved section or a bending section in the second optical area DA2.

[0151] To improve the transmittance of the second optical area DA2, the second vertical line VL2 passing through the second optical area DA2 can pass by avoiding the second transmission area TA2 in the second optical area DA2.

[0152] Therefore, each of the second vertical lines VL2 passing through the second optical area DA2 may include a curved section or a bending section that detours around the outside of the outer frame of each of the second transmission areas TA2.

[0153] Accordingly, the second vertical line VL2 passing through the second optical region DA2 and the general vertical line VLn arranged in the general region without passing through the second optical region DA2 may have different patterns or lengths.

[0154] As shown in FIG. 5a, the first horizontal line HL1 passing through the first optical area DA1 may have a curved or bent section that detours around the outside of the outline of the first transmission area.

[0155] Therefore, the length of the first horizontal line HL1 passing through the first optical area DA1 and the second optical area DA2 may be slightly longer than the length of the second horizontal line HL2 that is arranged only in the general area without passing through the first optical area DA1 and the second optical area DA2.

[0156] As a result, the resistance of the first horizontal line HL1 (hereinafter also referred to as the first resistance) passing through the first optical area DA1 and the second optical area DA2 may be slightly larger than the resistance of the second horizontal line HL2 (hereinafter also referred to as the second resistance) which does not pass through the first optical area DA1 and the second optical area DA2 and is arranged only in the general area.

[0157] Referring to Figures 5a and 5b, due to the light transmission structure, the first optical region DA1, which is at least partially overlapped with the first optical electronic device, includes a plurality of first transmission regions, and the second optical region DA2, which is at least partially overlapped with the second optical electronic device, includes a plurality of second transmission regions TA2, so that the first optical region DA1 and the second optical region DA2 may have a smaller number of sub-pixels per unit area than a general region.

[0158] The number of sub-pixels to which the first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 is connected and the number of sub-pixels to which the second horizontal line HL2, which does not pass through the first optical region DA1 and the second optical region DA2 but is arranged only in the general region, are connected may be different from each other.

[0159] The number (first number) of sub-pixels to which a first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 is connected may be less than the number (second number) of sub-pixels to which a second horizontal line HL2 is connected that is arranged only in the general region without passing through the first optical region DA1 and the second optical region DA2.

[0160] The difference between the first and second numbers may vary depending on the difference between the resolution of the first and second optical regions DA1 and DA2 and the resolution of the general region. For example, the greater the difference between the resolution of the first and second optical regions DA1 and DA2 and the resolution of the general region, the greater the difference between the first and second numbers may be.

[0161] As described above, since the number (first number) of sub-pixels to which the first horizontal line HL1 passing through the first optical region DA1 and the second optical region DA2 is connected is smaller than the number (second number) of sub-pixels to which the second horizontal line HL2 is connected, which does not pass through the first optical region DA1 and the second optical region DA2 and is arranged only in the general region, the area in which the first horizontal line HL1 overlaps with other surrounding electrodes and lines may be smaller than the area in which the second horizontal line HL2 overlaps with other surrounding electrodes and lines.

[0162] Therefore, the parasitic capacitance (hereinafter referred to as the first capacitance) formed by the first horizontal line HL1 with other surrounding electrodes or lines may be much smaller than the parasitic capacitance (hereinafter referred to as the second capacitance) formed by the second horizontal line HL2 with other surrounding electrodes or lines.

[0163] When considering the magnitude relationship between the first resistance and the second resistance (the second resistance is greater than or equal to the first resistance) and the magnitude relationship between the first capacitance and the second capacitance (first capacitance<<second capacitance), the RC (Resistance-Capacitance) value (hereinafter also referred to as the first RC value) of the first horizontal line HL1 passing through the first optical area DA1 and the second optical area DA2 may be much smaller than the RC value (hereinafter also referred to as the second RC value) of the second horizontal line HL2 arranged only in the general area without passing through the first optical area DA1 and the second optical area DA2 (first RC value<<second RC value).

[0164] The difference between the first RC value of the first horizontal line HL1 and the second RC value of the second horizontal line HL2 (hereinafter referred to as RC Load deviation) may change the signal transmission characteristics through the first horizontal line HL1 and the signal transmission characteristics through the second horizontal line HL2.

[0165] FIG. 6 is a diagram illustrating a cross-sectional structure of a non-transmissive region and a transmissive region in a first optical region and a cross-sectional structure of a general region in a flexible display device according to an embodiment of the present invention.

[0166] 6, the first optical area DA1 of the display panel DP may include a transmissive area TA and a non-transmissive area NTA, and the general area NA of the display panel DP may be regarded as the non-transmissive area NTA.

[0167] The layer structure of the non-transmissive area NTA in the first optical area DA1, the layer structure of the transmissive area TA, and the layer structure of the general area NA will be considered below.

[0168] First, the layered structure of the general area NA is as follows.

[0169] In the general region NA, a transistor layer TRL may be disposed on the substrate SUB, a planarization layer PLN may be disposed on the transistor layer TRL, a light emitting element layer EDL may be disposed on the planarization layer PLN, an encapsulation layer ENCAP may be disposed on the light emitting element layer EDL, a touch sensor layer TSL may be disposed on the encapsulation layer ENCAP, and a protection layer PAC may be disposed on the touch sensor layer TSL.

[0170] In the general region NA, a number of transistors, such as driving transistors and scan transistors for each subpixel, may be disposed in the transistor layer TRL, and various insulating films for forming the transistors may be disposed. The various insulating films may include organic films and inorganic films.

[0171] In the general region NA, various wirings such as a data line, a gate line, a driving voltage line, etc. may be arranged in the transistor layer TRL.

[0172] In the general region NA, the light emitting element layer EDL may be arranged with the light emitting element 120 of each sub-pixel. That is, in the general region NA, the light emitting element layer EDL may be arranged with the pixel electrode, the light emitting layer, and the common electrode constituting the light emitting element 120.

[0173] In the general region NA, a touch sensor may be disposed on the touch sensor layer TSL, and a touch buffer film, a touch insulating film, and the like required for forming the touch sensor may be further disposed.

[0174] Next, the layer structure of the non-transmitting area NTA of the first optical area DA1 is the same as the layer structure of the general area NA.

[0175] 6, in the non-transmitting area NTA of the first optical area DA1, a transistor layer TRL may be disposed on the substrate SUB, and a planarization layer PLN may be disposed on the transistor layer TRL. In addition, a light emitting element layer EDL may be disposed on the planarization layer PLN, and an encapsulation layer ENCAP may be disposed on the light emitting element layer EDL. A touch sensor layer TSL may be disposed on the encapsulation layer ENCAP, and a protection layer PAC may be disposed on the touch sensor layer TSL.

[0176] The light emitting element 120 is vulnerable to moisture and oxygen. The encapsulation layer ENCAP can prevent the penetration of moisture and oxygen and prevent the light emitting element 120 from being exposed to moisture and oxygen. The encapsulation layer ENCAP may be composed of one layer or multiple layers.

[0177] In the non-transmitting area NTA of the first optical area DA1, a number of transistors, such as driving transistors and scan transistors of each subpixel, may be disposed in the transistor layer TRL, and various insulating films for forming the transistors may be disposed on the transistor layer TRL, where the various insulating films may include organic films and inorganic films.

[0178] In addition, in the non-transmission area NTA of the first optical area DA1, various wirings such as a data line, a gate line, and a driving voltage line may be disposed in the transistor layer TRL.

[0179] In the non-transmitting region NTA of the first optical region DA1, the light-emitting element layer EDL may be arranged with the light-emitting element 120 of each sub-pixel. That is, in the non-transmitting region NTA of the first optical region DA1, the light-emitting element layer EDL may be arranged with the pixel electrode, the light-emitting layer, and the common electrode constituting the light-emitting element 120.

[0180] In addition, in the non-transmitting area NTA of the first optical area DA1, the touch sensor TS may be disposed on the touch sensor layer TSL, and a touch buffer film, a touch insulating film, etc. required for forming the touch sensor TS may be further disposed.

[0181] The layered structure of the transmission area TA of the first optical area DA1 is as follows.

[0182] 6, in the transmissive region TA of the first optical region DA1, a transistor layer TRL may be disposed on the substrate SUB, and a planarization layer PLN may be disposed on the transistor layer TRL. In addition, a light emitting element layer EDL may be disposed on the planarization layer PLN, and an encapsulation layer ENCAP may be disposed on the light emitting element layer EDL. A touch sensor layer TSL may be disposed on the encapsulation layer ENCAP, and a protection layer PAC may be disposed on the touch sensor layer TSL.

[0183] In the transmissive region TA of the first optical region DA1, a number of transistors, such as driving transistors and scan transistors, and various wirings of each subpixel may be arranged in the transistor layer TRL, and the light emitting element 120 of each subpixel may be arranged in the light emitting element layer EDL. In the transmissive region TA of the first optical region DA1, a touch sensor TS may be arranged in the touch sensor layer TSL.

[0184] At this time, in the transmission area TA of the first optical area DA1, the transistor layer TRL is not provided with transistors and wiring. However, in the transmission area TA of the first optical area DA1, various insulating films necessary for forming transistors may be provided on the transistor layer TRL. Here, the various insulating films may include organic films and inorganic films.

[0185] Furthermore, in the transmissive region TA of the first optical region DA1, the light-emitting element layer EDL does not have the light-emitting elements 120 of the sub-pixels arranged therein. That is, in the transmissive region TA of the first optical region DA1, the light-emitting element layer EDL does not have the pixel electrodes, the light-emitting layer, and the common electrode arranged therein. However, the present invention is not limited thereto, and in the transmissive region TA of the first optical region DA1, only some of the pixel electrodes, the light-emitting layer, and the common electrode may be arranged in the light-emitting element layer EDL. For example, in the transmissive region TA of the first optical region DA1, only the light-emitting layer may be arranged in the light-emitting element layer EDL.

[0186] In the transmissive area TA of the first optical area DA1, the touch sensor layer TSL is not provided with a touch sensor. In the transmissive area TA of the first optical area DA1, the touch sensor layer TSL may be provided with a touch buffer film, a touch insulating film, and the like.

[0187] 6, among the metal material layer and the insulating material layer disposed in the first optical region DA1 and the non-transmitting region NTA of the general region NA, the metal material layer is not disposed in the transmissive region TA of the first optical region DA1. However, among the metal material layer and the insulating material layer disposed in the first optical region DA1 and the non-transmitting region NTA of the general region NA, the insulating material layer may be extended to the transmissive region TA of the first optical region DA1.

[0188] In other words, the metal material layer is disposed in the non-transmitting area NTA of the first optical area DA1 and the non-transmitting area NTA of the general area NA, but not in the transmissive area TA of the first optical area DA1. The insulating material layer may be disposed in common in the non-transmitting area NTA of the first optical area DA1, the non-transmitting area NTA of the general area NA, and the transmissive area TA of the first optical area DA1, but the present invention is not limited thereto.

[0189] In addition, the transmissive area TA of the first optical region DA1 may overlap with the first opto-electronic device 150, and external light may be transmitted to the first opto-electronic device 150 through the transmissive area TA of the first optical region DA1. Therefore, for the first opto-electronic device 150 to operate normally, the transmissivity of the transmissive area TA of the first optical region DA1 must be high.

[0190] Meanwhile, the planarization layer PLN of the first optical region DA1 and the general region NA may be composed of two layers, a first planarization layer and a second planarization layer, and photo acrylic (PAC) may be applied to improve productivity. That is, the present invention applies a bezel bending display device to reduce the bezel width, and applies two wiring layers and two planarization layers, while applying PAC to improve productivity. In this case, corrosion defects may occur in the source / drain wiring due to moisture penetration from the top of the display panel. In particular, in the GIP wiring part near the contact hole adjacent to the bending region, different layers of wiring are connected to each other, and heterogeneous contact corrosion, i.e., galvanic corrosion, may occur. Galvanic corrosion is corrosion in which when two materials are exposed to a corrosive environment in a state of contact with each other, the movement of intermetallic electrons occurs due to the potential difference between them, and the corrosion rate of a metal with a relatively high potential (noble potential) decreases, and the corrosion rate of a metal with a relatively low potential (active potential) increases. Therefore, PI has been applied instead of PAC as the planarization layer PLN in the past. However, in the case of the UDC model or UDIR model, the UV reliability becomes weak as the cathode is removed to ensure the transmittance of the transmissive region TA, and at the same time, when PI is applied instead of PAC as the planarization layer PLN, it may be vulnerable to pixel shrinkage defects due to outgassing. For example, when PAC is applied, the pixel shrinkage occurrence rate relative to the input quantity is 0%, whereas when PI is applied, the pixel shrinkage occurrence rate relative to the input quantity reaches 100%.

[0191] Therefore, the present invention is characterized in that, while using a PAC-based material as the planarization layer PLN, a part of the planarization layer PLN above the contact hole of the GIP wiring part is removed and filled with a bank of a PI-based material, or a part of the wiring above the contact hole of the GIP wiring part is covered with a metal layer of an anode electrode or a touch electrode to prevent moisture permeation, thereby improving productivity and improving corrosion defects of the GIP wiring part. A detailed description of this will be given later with reference to Figures 7 to 11.

[0192] FIG. 7 is a partial cross-sectional view of a flexible display device according to an embodiment of the present invention.

[0193] FIG. 8 is a partial cross-sectional view of a flexible display device according to another embodiment of the present invention.

[0194] 7 and 8 show a part of a cross section of the non-transmitting area NTA and the transmitting area TA of the first optical area.

[0195] In Fig. 7, banks 116 are arranged in the transmissive region TA, whereas in Fig. 8, part of the banks 116 is removed from the transmissive region TA. That is, Fig. 7 and Fig. 8 differ only in the shape of the banks 116 in the transmissive region TA, and other configurations are substantially the same, so a duplicated description will be omitted.

[0196] Referring to Figures 7 and 8, the non-transmitting area NTA and the transmitting area TA of the first optical area can both basically include a substrate SUB, a transistor layer TRL, a planarization layer PLN, a light-emitting element layer EDL, an encapsulation layer ENCAP, a touch sensor layer TSL and a protective layer PAC.

[0197] First, the laminate structure of the non-transmissive area NTA included in the first optical area will be described.

[0198] The substrate SUB may include a first substrate 110a, a second substrate 110b, and an interlayer insulating film 110c. The interlayer insulating film 110c may be disposed between the first substrate 110a and the second substrate 110b. By configuring the substrate SUB with the first substrate 110a, the second substrate 110b, and the interlayer insulating film 110c in this manner, it is possible to prevent moisture penetration. For example, the first substrate 110a and the second substrate 110b may be polyimide (PI) substrates.

[0199] In the transistor layer TRL, various patterns 131, 132, 133, 134 for forming transistors such as the driving transistor Td, various insulating films 111a, 111b, 112, 113a, 113b, 114, and various metal patterns TM, GM, 135 may be arranged.

[0200] The stacked structure of the transistor layer TRL will be described in further detail below.

[0201] A multi-buffer layer 111a may be disposed on the second substrate 110b, and an active buffer layer 111b may be disposed on the multi-buffer layer 111a.

[0202] A metal layer 135 may be disposed on the multi-buffer layer 111a.

[0203] Here, the metal layer 135 can function as a light shield and can also be referred to as a light blocking layer.

[0204] An active buffer layer 111b may be disposed on the metal layer 135.

[0205] The active layer 134 of the driving transistor Td may be disposed on the active buffer layer 111b.

[0206] A gate insulating film 112 may be disposed on the active layer 134 .

[0207] In addition, a gate electrode 131 of the driving transistor Td may be disposed on the gate insulating film 112. At this time, a gate material layer GM may be disposed on the gate insulating film 112 at a position different from the position where the driving transistor Td is formed.

[0208] A first interlayer insulating film 113a may be disposed on the gate electrode 131 and the gate material layer GM. A metal pattern TM may be disposed on the first interlayer insulating film 113a. A second interlayer insulating film 113b may be disposed on the first interlayer insulating film 113a while covering the metal pattern TM.

[0209] A source electrode 132 and a drain electrode 133 of the driving transistor Td may be disposed on the second interlayer insulating film 113b.

[0210] The source electrode 132 and the drain electrode 133 may be connected to one side and the other side of the active layer 134 through contact holes formed in the second interlayer insulating film 113 b, the first interlayer insulating film 113 a and the gate insulating film 112, respectively.

[0211] A portion of the active layer 134 overlapping with the gate electrode 131 is a channel region. One of the source electrode 132 and the drain electrode 133 is connected to one side of the channel region in the active layer 134, and the other is connected to the other side of the channel region in the active layer 134.

[0212] A passivation layer 114 may be disposed over the source electrode 132 and the drain electrode 133 .

[0213] A planarization layer PLN may be located on top of the transistor layer TRL.

[0214] The planarization layer PLN may include a first planarization layer 115a and a second planarization layer 115b. The first planarization layer 115a may be made of a PI-based material, and the second planarization layer 115b may be made of a PAC-based material. That is, the pixel shrinkage issue in the UDC model or UDIR model is mainly caused by outgassing of the second planarization layer 115b rather than the first planarization layer 115a, and only the second planarization layer 115b may be made of a PAC-based material.

[0215] A first planarization layer 115 a may be disposed on the passivation layer 114 .

[0216] A connecting electrode 125 may be disposed on the first planarization layer 115a.

[0217] The connection electrode 125 may be connected to one of the source electrode 132 and the drain electrode 133 through a contact hole formed in the first planarization layer 115a.

[0218] A second planarization layer 115b may be disposed on the connecting electrode 125.

[0219] The light emitting element layer EDL may be located on the second planarization layer 115b.

[0220] The laminated structure of the light emitting element layer EDL will be considered in detail below.

[0221] The pixel electrode 121 may be disposed on the second planarization layer 115b. In this case, the pixel electrode 121 may be electrically connected to the connecting electrode 125 through a contact hole provided in the second planarization layer 115b. For example, the pixel electrode 121 may be an anode electrode.

[0222] The bank 116 may be disposed to cover the pixel electrode 121. A portion of the bank 116 corresponding to a light emitting region of a sub-pixel may be opened. A portion of the pixel electrode 121 may be exposed in the open portion of the bank 116 (hereinafter, referred to as an open region). In this case, the bank 116 may be made of a PI-based material.

[0223] The light-emitting layer 122 may be disposed in and around the open areas of the bank 116. This allows the light-emitting layer 122 to be disposed on the pixel electrodes 121 exposed through the open areas of the bank 116.

[0224] A common electrode 123 may be disposed on the light-emitting layer 122. For example, the common electrode 123 may be a cathode electrode.

[0225] The pixel electrode 121, the light emitting layer 122, and the common electrode 123 may form a light emitting element 120. The light emitting layer 122 may include a number of organic films.

[0226] An encapsulation layer ENCAP may be located on top of the light emitting element layer EDL.

[0227] The encapsulation layer ENCAP may have a single-layer structure or a multi-layer structure. For example, the encapsulation layer ENCAP may include a first encapsulation layer 117a, a second encapsulation layer 117b, and a third encapsulation layer 117c.

[0228] In this case, the first and third sealing layers 117a and 117c may be made of an inorganic film, and the second sealing layer 117b may be made of an organic film. Among the first, second and third sealing layers 117a, 117b and 117c, the second sealing layer 117b is the thickest and may serve as a planarization layer.

[0229] The first encapsulating layer 117a may be disposed on the common electrode 123 and may be disposed closest to the light emitting element 120. The first encapsulating layer 117a may be formed of an inorganic insulating material that can be deposited at low temperature. For example, the first encapsulating layer 117a may be composed of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), aluminum oxide (Al2O3), or the like. Since the first encapsulating layer 117a is deposited in a low temperature atmosphere, it is possible to prevent the light emitting layer 122, which includes organic matter that is vulnerable to high temperature atmospheres, from being damaged during the deposition process.

[0230] The second encapsulation layer 117b may be formed to have a smaller area than the first encapsulation layer 117a. In this case, the second encapsulation layer 117b may be formed to expose both ends of the first encapsulation layer 117a. The second encapsulation layer 117b may play a role of buffering to relieve stress between layers due to warping of the flexible display device and to enhance planarization performance.

[0231] For example, the second sealing layer 117b may be made of an organic insulating material such as acrylic resin, epoxy resin, polyimide, polyethylene, silicon oxycarbon (SiOC), etc. For example, the second sealing layer 117b may be formed through an inkjet method, but is not limited thereto.

[0232] Although not shown, one or more dams may be disposed at or near the edge of the slope of the encapsulation layer ENCAP to prevent the encapsulation layer ENCAP from collapsing. The one or more dams may be disposed at or near the boundary between the display area and the non-display area.

[0233] The second sealing layer 117b containing an organic substance may be located only on the inner surface of the innermost primary dam. That is, the second sealing layer 117b may not be present on the top of all dams. Alternatively, the second sealing layer 117b containing an organic substance may be located on at least the top of the primary dam among the primary dam and the secondary dam. That is, the second sealing layer 117b may be located so as to extend to the top of the primary dam. Or, the second sealing layer 117b may be located so as to extend through the top of the primary dam to the top of the secondary dam.

[0234] The third encapsulation layer 117c may be formed on the substrate SUB on which the second encapsulation layer 117b is formed, to cover the top and side surfaces of the second encapsulation layer 117b and the first encapsulation layer 117a. At this time, the third encapsulation layer 117c may minimize or block external moisture or oxygen from penetrating into the first encapsulation layer 117a and the second encapsulation layer 117b. For example, the third encapsulation layer 117c may be made of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0235] A touch sensor layer TSL may be disposed on top of the above-mentioned encapsulation layer ENCAP.

[0236] The laminated structure of the touch sensor layer TSL will be described in detail below.

[0237] A touch buffer film 118a may be disposed on top of the encapsulation layer ENCAP, and a touch sensor 140 may be disposed on the touch buffer film 118a.

[0238] The touch sensor 140 may include a touch sensor metal 141 and a bridge metal 142 located in different layers. A touch interlayer insulating film 118b may be disposed between the touch sensor metal 141 and the bridge metal 142.

[0239] For example, the touch sensor metal 141 may include a first touch sensor metal, a second touch sensor metal, and a third touch sensor metal that are arranged adjacent to each other. The first touch sensor metal and the second touch sensor metal are electrically connected to each other, but when the third touch sensor metal is between the first touch sensor metal and the second touch sensor metal, the first touch sensor metal and the second touch sensor metal may be electrically connected through a bridge metal 142 in another layer. The bridge metal 142 may be insulated from the third touch sensor metal by the touch interlayer insulating film 118b.

[0240] When the touch sensor layer TSL is formed, a chemical solution (such as a developing solution or an etching solution) used in the process or moisture from the outside may be generated. By disposing the touch buffer film 118a and disposing the touch sensor layer TSL thereon, it is possible to prevent the chemical solution, moisture, etc., used during the manufacture of the touch sensor layer TSL from penetrating into the light emitting layer 122 containing an organic substance. As a result, the touch buffer film 118a can prevent damage to the light emitting layer 122, which is vulnerable to the chemical solution or moisture.

[0241] The touch buffer film 118a may be formed of an organic insulating material having a low dielectric constant of 1-3 and may be formed at a certain temperature (e.g., a low temperature of 100° C. or less) to prevent damage to the light emitting layer 122 including an organic material vulnerable to high temperatures. For example, the touch buffer film 118a may be formed of an acrylic-based, epoxy-based, or siloxane-based material. The encapsulation layer ENCAP may be damaged and the touch sensor metal 141 located on the touch buffer film 118a may crack due to warping of the flexible display device. Even if the flexible display device warps, the touch buffer film 118a made of an organic insulating material and having planarization performance can prevent damage to the encapsulation layer ENCAP and cracking of the metals 141 and 142 constituting the touch sensor 140.

[0242] A protective layer PAC may be disposed to cover the touch sensor 140. The protective layer PAC may be composed of an organic insulating film.

[0243] The laminate structure of the transmission area TA included in the first optical area will be described below.

[0244] 7 and 8, the substrate SUB and various insulating films 111a, 111b, 112, 113a, 113b, 114, 115a, 115b, 117a, 117b, 117c, and PAC arranged in the non-transmitting region NTA of the first optical region may also be arranged in the same manner in the transmitting region TA of the first optical region.

[0245] However, a material layer having electrical properties or opaque properties (e.g., a metal material layer, a semiconductor layer, etc.) other than an insulating material in the non-transmissive area NTA of the first optical area may not be disposed in the transmissive area TA of the first optical area.

[0246] For example, metal material layers 135, 131, GM, TM, 132, 133, 125 and semiconductor layer 134 associated with transistors are not disposed in the transmissive region TA. In addition, pixel electrode 121 and common electrode 123 included in light emitting element 120 may not be disposed in the transmissive region TA. Light emitting layer 122 may or may not be disposed in the transmissive region TA. In addition, touch sensor metal 141 and bridge metal 142 included in touch sensor 140 are not disposed in the transmissive region TA. However, the present invention is not limited thereto.

[0247] That is, since the transmission area TA of the first optical region overlaps with the first optical electronic device 150, the transmittance of the transmission area TA must be high for the first optical electronic device 150 to operate normally.

[0248] Hereinafter, the configuration of the present invention, which improves the corrosion defect of the GIP wiring portion, will be described in detail with reference to FIGS.

[0249] FIG. 9 is a plan view showing a GIP wiring section according to an embodiment of the present invention.

[0250] FIG. 10 is a cross-sectional view taken along line CC' in FIG.

[0251] 9 and 10 show a part of the non-display area including the bending area BA and the non-bending area NBA, that is, a part of the GIP wiring portion.

[0252] At this time, the area other than the square shown in FIG. 9 indicates the area where the second planarizing layer 215b is disposed.

[0253] 9 and 10, the non-display area of ​​the GIP wiring portion may include a substrate SUB, GIP wiring GM1, SDM1, SDM2, planarization layers 115a, 215b, a bank 216, a touch buffer film 118a, a touch interlayer insulating film 118b, and a protective layer PAC.

[0254] Although not shown for convenience of explanation, the substrate SUB may include a first substrate, a second substrate, and an interlayer insulating film. The interlayer insulating film may be disposed between the first substrate and the second substrate.

[0255] On the upper part of the substrate SUB of the GIP wiring part, various insulating films of the transistor layer, i.e., the multi-buffer layer 111a, the active buffer layer 111b, and the gate insulating film 112, may be arranged. However, the present invention is not limited to this, and some insulating films may not be arranged.

[0256] On the gate insulating film 112, a GIP wiring GM1 can be disposed.

[0257] The GIP wiring GM1 can extend to a driving IC to receive a signal, or extend to a pixel in the display area to transmit a signal.

[0258] The GIP wiring GM1 may be made of the same metal material in the same layer as the gate electrodes of the transistors in the display area, but is not limited thereto.

[0259] A first interlayer insulating film 113a and a second interlayer insulating film 113b can be disposed on the GIP wiring GM1.

[0260] The interconnection line SDM1 may be disposed on the second interlayer insulating film 113b.

[0261] That is, the connecting wire SDM1 may include a first contact region disposed on the second interlayer insulating film 113b in the non-bending area NBA and connected to the GIP wire GM1.

[0262] The connecting wiring SDM1 can connect between the link wiring SDM2 and the GIP wiring GM1.

[0263] The connecting wire SDM1 may be electrically connected to the link wire SDM2, ie, the second contact region, through a plurality of first contact holes 140a, and may also be electrically connected to the GIP wire GM1 through a plurality of second contact holes 140b.

[0264] The connecting wire SDM1 may be made of the same metal material in the same layer as the source and drain electrodes of the transistors in the display area, but is not limited thereto.

[0265] A first planarization layer 115a may be disposed on the interconnect line SDM1.

[0266] In this case, the first planarization layer 115a may be made of a PI-based material.

[0267] The link wiring SDM2 may be disposed on the first planarization layer 115a.

[0268] The link wiring SDM2 may be a wiring that connects between the GIP wiring connected to the driving IC and the GIP wiring GM1 connected to the pixels in the display area.

[0269] The link wiring SDM2 may include a second contact region disposed on the first planarization layer 115a, extending to the bending region BA, and coupled to the connecting wiring SDM1.

[0270] The link wiring SDM2 may be made of the same metal material in the same layer as the connection electrodes in the display area, but is not limited thereto.

[0271] A second planarization layer 215b may be disposed on the link wiring SDM2.

[0272] The second planarization layer 215b may be made of a PAC series material.

[0273] Meanwhile, in one embodiment of the present invention, the second planarization layer 215b on the contact region of the GIP wiring part, i.e., the contact region where the first contact hole 140a and the second contact hole 140b are arranged, is partially removed to form an open region OP. A part of the link wiring SDM2, i.e., the second contact region, may be exposed by the open region OP.

[0274] At this time, although not shown, a blocking layer may be further formed to cover the end of the link wiring SDM2 exposed by the open area OP, i.e., the second contact area, and to block the end of the GIP wiring GM1, i.e., the first contact area of ​​the connecting wiring SDM1.

[0275] Here, the blocking layer may be disposed on the link line SDM2 so as to block the contact area around the first contact hole 140a to which the connecting line SDM1 and the link line SDM2 are connected and around the second contact hole 140b to which the connecting line SDM1 and the GIP line GM1 are connected.

[0276] The blocking layer may be made of a transparent conductive material such as ITO, IZO, IGZO, etc., but is not limited thereto.

[0277] The banks 216 may be disposed on the second planarization layer 215b, but are not limited thereto, and the banks 216 may not be disposed in some cases.

[0278] The bank 216 may be made of a PI-based material, which has good adhesion to the Ti of the link wiring SDM2 and is relatively more moisture-proof than PAC.

[0279] The banks 216 may be disposed so as to fill the open areas OP of the second planarization layer 215b, but the present invention is not limited thereto, and an insulating film made of a PI-based material other than the banks 216 may be used.

[0280] A touch buffer film 118a and a touch interlayer insulating film 118b may be disposed on the bank 216.

[0281] A protective layer PAC may be disposed on the touch interlayer insulating film 118b.

[0282] In this way, in one embodiment of the present invention, the second planarization layer 215b above the contact region of the GIP wiring part is partially removed, and the exposed open region OP is covered with the insulating film of the bank 216 or the touch buffer film 118a, thereby improving the corrosion defect of the GIP wiring part and preventing additional moisture permeation. The corrosion defect mainly occurs in a region where the potential difference between different metals is large, such as 0.4V or more, and therefore the open region OP may be formed over the entire GIP wiring part, or may be formed only in a part of the region where the potential difference between different metals is large. In addition, there is also freedom in terms of the corrosion significance due to the presence or absence of an insulating film of the sealing layer and the touch sensor layer above the contact region, and the degree of freedom in designing the sealing layer and the touch sensor layer above the contact region of the GIP wiring part can be increased.

[0283] FIG. 11 is a plan view illustrating a first optical region of a flexible display device according to an embodiment of the present invention.

[0284] FIG. 12 is an enlarged view of region X in FIG.

[0285] First, referring to FIG. 11, the first optical area DA1 may include a central area 910 and a bezel area 920 located on the outer periphery of the central area 910.

[0286] The first optical region DA1 may include a plurality of horizontal lines HL, which may connect the transistors located in the bezel region 920 and the light emitting elements located in the central region 910.

[0287] The flexible display device 100 according to the embodiment may include a routing structure 940. By including the routing structure 940, the central region 910 may be expanded by the predetermined region a because the pixels located in the predetermined region a may be connected to transistors located in the bezel region 920 by the routing structure 940.

[0288] Specifically considering the structure of the first optical area DA1 including the routing structure 940, it is as follows.

[0289] 10, the first optical region may include a plurality of light-emitting elements ED located in a central region 910 and a bezel region 920. The first optical region may include a plurality of light-emitting elements ED, so that the first optical region may display a screen.

[0290] The first optical region can include a number of transistors 1050 located in the bezel region 920. The central region 910 can be free of transistors 1050. By not having transistors located in the central region 910, the central region 910 can have a higher transmittance.

[0291] The first optical region includes a plurality of rows, and may include a first row R1 and a second row R2. The plurality of rows included in the first optical region may be any region that traverses the first optical region in a horizontal direction and may be defined by a pattern of transistors 1050.

[0292] The flexible display device may include light emitting elements ED located in a central region 910 and arranged in a first row R1, and transistors 1050 located in a bezel region 920 and arranged in a second row R2.

[0293] The flexible display device may include a routing structure 940 that electrically couples the light emitting elements ED in the first row R1 to the transistors 1050 in the second row R2.

[0294] The routing structure 940 can connect the transistors 1050 and the light-emitting elements ED located in different rows, so that the transistors 1050 located in a row in which a greater number of transistors 1050 than the light-emitting elements ED are arranged can be connected to the light-emitting elements ED located in a row in which a greater number of light-emitting elements ED than the transistors 1050 are arranged.

[0295] The number of light emitting elements ED included in the first row R1 of the central region 910 may be greater than the number of light emitting elements ED included in the second row R2 of the central region 910. Therefore, a greater number of transistors 1050 are required to drive the light emitting elements ED included in the first row R1, and a smaller number of transistors 1050 are required to drive the light emitting elements ED included in the second row R2. Therefore, among the transistors 1050 located in the second row R2 of the bezel region 920, the surplus transistors 1050 that are not electrically connected to the light emitting elements ED located in the second row R2 may be electrically connected to the light emitting elements ED located in the first row R1 by the routing structure 940.

[0296] The central region 910 may have a substantially uniform number of pixels per unit area throughout the central region 910. A substantially uniform number of pixels per unit area may mean, for example, that a pixel pattern is substantially uniform throughout the central region 910. Thus, a greater number of light-emitting elements ED may be located in the first row R1, which has a larger area overlapping with the central region 910 than the second row R2.

[0297] For example, the number of transistors 1050 included in the first row R1 of the bezel region 920 may be substantially the same as the number of transistors 1050 included in the second row R2 of the bezel region 920. In the above example, if the central region 910 includes more light emitting elements ED in the first row R1 and the central region 910 includes fewer light emitting elements ED in the second row R2, some of the transistors 1050 included in the second row R2 may not be electrically connected to the light emitting elements ED located in the second row R2, but may be electrically connected to the light emitting elements ED located in the first row R1.

[0298] And, the bezel region 920 may have a substantially identical number of transistors 1050 per unit area throughout the bezel region 920. A substantially identical pattern of transistors per unit area may mean that one transistor pattern is substantially uniform throughout the bezel region 920.

[0299] The area of ​​the region d1 where the bezel region 920 overlaps with the first row R1 may be substantially the same as the area of ​​the region d2 where the bezel region 920 overlaps with the second row R2. In such an example, the number of transistors 1050 located in the first row R1 of the bezel region 920 may be substantially the same as the number of transistors 1050 located in the second row R2 of the bezel region.

[0300] In such a case, the number of transistors 1050 located in a row of the bezel region 920 can remain constant, and the routing structure 940 can electrically connect excess transistors in a particular row to excess light-emitting elements in other rows, so that the flexible display device according to the embodiment can have a larger central area 910 than the flexible display device of the comparative example.

[0301] A flexible display device according to an embodiment of the present invention can be described as follows.

[0302] A flexible display device according to one embodiment of the present invention may include a substrate including a display region divided into an optical region and a general region, and a non-display region divided into a bending region and a non-bending region, a first insulating film disposed on the substrate, a wiring disposed on the first insulating film in the non-bending region, a second insulating film disposed on the wiring, a connecting wiring disposed on the second insulating film in the non-bending region and having a first contact region connected to the wiring, a first planarization layer disposed on the connecting wiring, a link wiring disposed on the first planarization layer, extending to the bending region and having a second contact region connected to the connecting wiring, a second planarization layer disposed on the link wiring and including an open region having a portion removed to expose the second contact region of the link wiring, and a third insulating film disposed on the second planarization layer and filling the open region.

[0303] According to another aspect of the present invention, the first insulating layer may include a multi-buffer layer, an active buffer layer, and a gate insulating layer.

[0304] According to still another feature of the present invention, the wiring can include GIP (Gate-In-Panel) wiring.

[0305] According to another aspect of the present invention, the GIP wiring can extend to a driving IC to receive a signal, or extend to a pixel in the display area to transmit a signal.

[0306] According to another aspect of the present invention, the GIP wiring may be made of the same metal material in the same layer as the gate electrodes of the transistors in the display area.

[0307] According to another aspect of the present invention, the second insulating film may include a first interlayer insulating film and a second interlayer insulating film.

[0308] According to another aspect of the present invention, the connecting wiring may be electrically connected to a second contact region of the link wiring through at least one first contact hole, and may be electrically connected to the wiring through at least one second contact hole.

[0309] According to another aspect of the present invention, the interconnection wires may be made of the same metal material and in the same layer as source and drain electrodes of transistors in the display area.

[0310] According to another aspect of the present invention, the first planarization layer may be made of a polyimide (PI)-based material.

[0311] According to another aspect of the present invention, the link wiring may connect between a GIP wiring connected to the driving IC and a GIP wiring connected to a pixel of the display area.

[0312] According to another aspect of the present invention, the link wiring may be made of the same metal material and in the same layer as the connection electrodes in the display area.

[0313] According to another aspect of the present invention, the second planarization layer may be made of a photoacryl (PAC) series material.

[0314] According to another aspect of the present invention, the third insulating film may include a bank.

[0315] According to another aspect of the present invention, the bank may be made of a PI-based material.

[0316] According to another aspect of the present invention, the flexible display device may further include an optoelectronic device disposed under the substrate and overlapping the optical region.

[0317] According to another aspect of the invention, the optical region includes a non-transmissive region and a transmissive region, the transmissive region being free of opaque electrodes including a cathode electrode, and the optical electronic device may be located in the transmissive region.

[0318] Although the embodiments of the present invention have been described in detail above with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications can be made within the scope of the technical idea of ​​the present invention. Therefore, the embodiments disclosed in the present invention are for illustration purposes, not for limiting the technical idea of ​​the present invention, and the scope of the technical idea of ​​the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative and not restrictive in all respects. The scope of protection of the present invention should be interpreted according to the following claims, and all technical ideas within the scope equivalent thereto should be interpreted as being included in the scope of the present invention. [Explanation of symbols]

[0319] 100 Flexible display device 150 Electronic equipment 150a 1st optoelectronic device 150b Second optoelectronic device DA display area DA1 1st optical area DA2 2nd optical area NA general area DP display panel NDA Hidden Area

Claims

1. a substrate including a display area divided into an optical area and a general area, and a non-display area divided into a bending area and a non-bending area; A first insulating film disposed on the substrate; a wiring disposed on the first insulating film in the non-bending region; A second insulating film disposed on the wiring; a connecting line disposed on the second insulating film in the non-bending region and having a first contact region connected to the wiring; a first planarization layer disposed on the interconnect; a link wiring disposed on the first planarization layer, extending to the bending region, and having a second contact region connected to the connecting wiring; a second planarization layer disposed on the link wiring and including an open area having a portion removed therefrom to expose a second contact area of ​​the link wiring; a third insulating film disposed on the second planarization layer and filling the open area.

2. The flexible display device of claim 1 , wherein the first insulating layer comprises a multi-buffer layer, an active buffer layer, and a gate insulating layer.

3. The flexible display device according to claim 1 , wherein the wiring includes a GIP (Gate-In-Panel) wiring.

4. The flexible display device of claim 3 , wherein the GIP wiring extends to a driving IC to receive a signal or extends to a pixel in the display area to transmit a signal.

5. The flexible display device according to claim 3 , wherein the GIP wiring is made of the same metal material as the gate electrodes of the transistors in the display area in the same layer.

6. The flexible display device of claim 1 , wherein the second insulating layer comprises a first interlayer insulating layer and a second interlayer insulating layer.

7. The flexible display device of claim 1 , wherein the connecting wire is electrically connected to the second contact region of the link wire through at least one first contact hole and is electrically connected to the wire through at least one second contact hole.

8. The flexible display device of claim 1 , wherein the interconnection wires are made of the same metal material and in the same layer as source and drain electrodes of transistors in the display area.

9. The flexible display device of claim 1 , wherein the first planarization layer is made of a polyimide (PI)-based material.

10. The flexible display device of claim 4 , wherein the link wiring connects between a GIP wiring connected to the driving IC and a GIP wiring connected to a pixel of the display area.

11. The flexible display device of claim 1 , wherein the link wiring is made of the same metal material as the connection electrodes in the display area and in the same layer.

12. The flexible display device of claim 1 , wherein the second planarization layer is made of a photoacryl (PAC) series material.

13. The flexible display device of claim 1 , wherein the third insulating film comprises a bank.

14. The flexible display device according to claim 13 , wherein the bank is made of a polyimide (PI) series material.

15. The flexible display device of claim 1 , further comprising an optical / electronic device located under the substrate and overlapping the optical region.

16. the optical region includes a non-transmitting region and a transmitting region; The transparent region is provided with the non-transparent electrodes, including the cathode electrode, removed; The flexible display of claim 15 , wherein the optical-electronic device is located in the transmissive region.

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