Photodetector
Patent Information
- Application Number
- JP2021560086
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2019-06-03
- Filing Date
- 2020-04-14
- Publication Date
- 2025-03-26
- Estimated Expiration
- 2040-04-14
Smart Images

Figure 0007651472000001 
Figure 0007651472000002 
Figure 0007651472000003
Abstract
Description
[Technical field]
[0001] This disclosure relates to photodetectors. [Background technology]
[0002] A conventional PN or PIN photodetector is operated by holding it at a constant reverse bias voltage. Incident photons are absorbed in a light absorbing region, generating electron-hole pairs that are swept to the contacts, thereby producing a photocurrent proportional to the brightness of the light incident on the photodiode.
[0003]
[0003] A non-conventional photodetector that operates using a pulsed voltage that is switched from reverse bias to forward bias is disclosed in US Patent Application Publication No. 2012 / 313155 A1. By switching to forward bias, a photocurrent is induced to flow through the device structure. However, the onset of photocurrent flow is not instantaneous, but rather occurs after a time delay from the onset of light incidence. This time delay is called the trigger time. The trigger time is proportional to the inverse of the light intensity, and therefore the trigger time is used as a measure of the intensity of the incident light.
[0004] 1A and 1B are schematic representations in cross-section and plan view, respectively, of a photodetector 1 as disclosed in US Patent Application Publication No. 2012 / 313155 A1. The growth direction, i.e., perpendicular to the plane of the wafer, is indicated as the z-direction. First and second gates G1, G2, held at voltages VG1 and VG2, extend in the y-direction. The direction perpendicular to the gates, along which electrons and holes are swept, is the x-direction. Cross-section AA in FIG. 1A lies in the xz-plane, as shown in FIG. 1B. The gates G1, G2 are disposed on either side of a light absorbing layer 15, the central portion of which is open for receiving incident photons. The light absorbing layer 15 may be an intrinsic or doped semiconductor, such as silicon or germanium, suitable for absorbing input photons in the wavelength range of interest. Highly doped n+ and p+ regions are disposed on either side of the body region 15 beyond the gates and serve as outputs for reading out the optical signal. The layers of the photodetector 1 are epitaxially fabricated on a semiconductor-on-insulator (SOI) substrate 3 with a silicon wafer and a buffer layer 7, on which an insulator layer 8 is deposited. The gates G1, G2 are formed from a conductive material (e.g. metal, silicide, or semiconductor). The gates G1, G2 are separated from the light absorbing layer 15 by an insulator or dielectric material 4, e.g. silicon oxide or silicon nitride. The photodetector 1 is operated with the following bias voltages: a negative voltage VG1 (e.g. -2V) is applied to the gate G1, a negative or zero voltage V1 is applied to the n+ region, a positive voltage VG2 (e.g. 2V) is applied to the gate G2, and a positive voltage V2 (e.g. 1V) is applied to the p+ region. The trigger time of the photodetector is a function of the electric field in the light absorbing layer 15 and can therefore be adjusted by adjusting the gate voltages. Under these bias conditions, photons incident on the light absorbing layer 15 between the gates, for example from the optical fiber device 30, are absorbed, thereby generating electron-hole pairs that are then swept away by the electric field induced by the bias voltage, thus being detected as a current flowing between the n+ and p+ regions. Summary of the Invention
[0005]
[0005] According to one aspect of the present disclosure, there is provided a photodetector device comprising: first and second light absorbing regions made of a semiconductor material and doped n-type and p-type, respectively, configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector device; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, the first and second contact regions having a higher doping concentration than the first and second light absorbing regions, the first and second contact regions designated p+ and n+, respectively; and first and second contacts connected to the first and second contact regions, respectively. The n-type and p-type photoabsorption regions and the n+ and p+ contact regions are arranged in an n+ pn p+ array such that after the voltage applied between the n+ and p+ contacts is switched from reverse bias to forward bias, electrons and holes generated in the first and second photoabsorption regions in response to photon absorption drift toward the p+ and n+ contact regions, respectively, thereby causing current to begin flowing between the n+ and p+ contacts after a time delay that is inversely proportional to the incident light intensity.
[0006] In some embodiments, the first and second light absorbing regions are disposed side-by-side with respect to a substrate, and the first and second contact regions may be disposed laterally spaced apart on either side of the first and second light absorbing regions.
[0007]
[0007] In some embodiments, the first and second light absorbing regions are formed as respective epitaxial layers disposed on top of each other relative to a substrate. The photodetector arrangement may further comprise an isolation trench extending vertically through the structure to define an array of pixels of the photodetector. The isolation trench extends through at least one of the first and second light absorbing regions and the first and second contact regions to further divide the photodetector into an array of independently contacted pixels, which can therefore be read out individually by suitable electronics. The photodetector may further comprise a semiconductor circuit layer, for example in silicon CMOS technology, disposed on the epitaxial layer forming one of the first and second contact regions, the semiconductor circuit layer comprising an array of readout sensors for the photodetector pixel array, electrically connected to the pixels through vias. In an improvement to the photodetector array, the pixels are further divided into an array of sub-pixels by respective additional isolation trenches. The additional isolation trenches for each pixel are disposed laterally within the isolation trenches that define the pixel. Because the additional insulating groove extends vertically through one of the first and second contact regions and at least one of the first and second light absorbing regions but not into the other of the first and second contact regions, multiple sub-pixels of any one pixel remain in common contact, thereby allowing any group of sub-pixels to be biased and read out as a single pixel unit.
[0008]
[0008] In some embodiments, the first and second light absorbing regions are arranged such that one of the first and second light absorbing regions is formed as an epitaxial layer on a substrate or integrally formed with the substrate, and the other of the first and second light absorbing regions is formed as a buried region within the epitaxial layer.
[0009]
[0009] In some embodiments, the first and second light absorbing regions are arranged such that one of the first and second light absorbing regions is formed in a first portion as an epitaxial layer on a substrate or is integrally formed with the substrate, and the other of the first and second light absorbing regions is formed as an additional buried region in the epitaxial layer. The buried region and the additional buried region may be laterally separated by a portion of the epitaxial layer or the substrate. One of the first and second contact regions may be formed as a further additional buried region within the buried region of the first or second light absorbing region, respectively. The first and second contact regions may be formed as respective further additional buried regions within the buried region of the first and second light absorbing region, respectively.
[0010]
[0010] In some embodiments, one of the first and second contact regions is formed as an epitaxial layer on the substrate, and at least one of the first and second optical absorption regions is formed at least partially as an additional epitaxial layer on the epitaxial layer of one of the first and second contact regions.
[0011] In some embodiments, at least one of the first and second contact regions is formed as a buried region within an epitaxial layer forming at least a portion of the first and second light absorbing regions, respectively.
[0012]
[0012] In some embodiments, the first and second contact regions are formed as first and second buried regions laterally spaced apart, respectively, within epitaxial layers that form at least a portion of the first and second optical absorption regions, respectively.
[0013]
[0013] In some embodiments, one of the first and second contact regions is formed as first and second laterally spaced buried regions formed within an epitaxial layer that forms at least a portion of one of the first and second optical absorption regions, respectively.
[0014]
[0014] It will be understood that the semiconductor materials from which the light absorbing regions are formed are selected with a band gap in mind, so that the band-to-band absorption of photons occurs over a desired energy range as required by the photodetector to meet specifications. The semiconductor materials of the two light absorbing regions may be the same, so that the pn junction between the p-type and n-type regions is a homojunction, or two different semiconductor materials may be selected, so that the pn junction is a heterojunction. In the case of a heterojunction, the two different materials may be included in the same material system, for example the SiGeC material system or the GaAlInAsP material system, and thus be able to form an alloy with each other.
[0015]
[0015] According to another aspect of the present disclosure, there is provided a method of manufacturing a photodetector device, the method including the steps of: making first and second light absorbing regions made of a semiconductor material and doped n-type and p-type, respectively, the first and second light absorbing regions being configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector device; making first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, the first and second contact regions having a higher doping concentration than the first and second light absorbing regions, designated p+ and n+, respectively; and providing first and second contacts connected to the first and second contact regions, respectively. The n-type and p-type photoabsorption regions and the n+ and p+ contact regions are arranged in an n+ pn p+ array such that after the voltage applied between the n+ and p+ contacts is switched from reverse bias to forward bias, electrons and holes generated in the n-type and p-type photoabsorption regions in response to photon absorption drift toward the p+ and n+ contact regions, respectively, thereby causing current to begin flowing between the n+ and p+ contacts after a time delay that is inversely proportional to the incident light intensity.
[0016]
[0016] In the above method, the first and second light absorbing regions may be fabricated as respective epitaxial layers disposed on top of each other relative to a substrate. The method may further include the step of fabricating an insulating trench extending vertically through the first and second light absorbing regions and at least one of the first and second contact regions to further divide the photodetector into an array of independently contacted pixels. Additional insulating trenches are provided such that multiple subpixels of any one pixel remain in common contact by further dividing each pixel into an array of subpixels by additional insulating trenches disposed laterally within the pixel-defining insulating trenches and extending vertically through one of the first and second contact regions and at least one of the first and second light absorbing regions but not through the other of the first and second contact regions.
[0017] According to another aspect of the present disclosure, there is provided a method of operating a photodetector device as set forth above, the method including the steps of operating the photodetector device by repeatedly applying a voltage to reverse bias the n+ and p+ contacts, switching the reverse bias voltage to a forward bias voltage such that after the switching, electrons and holes generated in the first and second light absorbing regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, and sensing the onset of current flow between the first and second contacts. A time delay between the switching and the onset is measured, the time delay being inversely proportional to the incident light intensity. This sequence of reverse-forward biasing is then repeated.
[0018] In summary, a photodetector device and corresponding method of manufacture are proposed for a photodetector comprising n-type and p-type light absorbing regions arranged to form a pn junction and n+ and p+ contact regions connected to the respective contacts. The light absorbing regions and contact regions are arranged in an n+ pn p+ arrangement, such that after the voltage applied between the n+ and p+ contacts is switched from reverse bias to forward bias, electrons and holes generated in the light absorbing regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, and initiate current flow between the contacts after a time delay inversely proportional to the incident light intensity.
[0019]
[0019] In the following, the invention will be further explained with reference to exemplary embodiments shown, by way of example only, in the drawings. [Brief description of the drawings]
[0020] [Figure 1A] FIG. 1 shows a schematic representation in cross-section of a prior art photodetector as disclosed in US Patent Application Publication No. 2012 / 313155 A1. [Figure 1B]FIG. 1 shows a schematic representation in plan view of a prior art photodetector as disclosed in US Patent Application Publication No. 2012 / 313155 A1. [Figure 2A] FIG. 1 shows a schematic representation in a cross-sectional view of a photodetector according to a first embodiment of the invention. [Figure 2B] FIG. 1 shows a schematic representation in plan view of a photodetector according to a first embodiment of the invention. [Figure 3A] 2 is an energy band diagram illustrating a photodetector according to a first embodiment, the photodetector having a reverse biased state; [Figure 3B] 1 is an energy band diagram illustrating a photodetector according to a first embodiment, the photodetector having a forward biased conductive state; [Figure 3C] 1 is an energy band diagram illustrating a photodetector according to a first embodiment, the photodetector having a forward biased non-conducting state; [Figure 4] 3C and 3B are graphs of output current as a function of bias voltage for the photodetector according to the first embodiment of FIGS. 2A and 2B with ("ON") and without ("OFF") incident light, i.e., in the forward biased conductive and non-conductive states, respectively. [Figure 5A] FIG. 13 shows oscilloscope scope screenshots of applied voltage Vd and output current I in the absence of light. [Figure 5B] FIG. 13 shows oscilloscope scope screenshots of applied voltage Vd and output current I in the presence of light. [Figure 6] 1 is a graph plotting the reciprocal trigger time 1 / t relative to absorbed optical power A. [Figure 7] FIG. 4 is a schematic cross-sectional view of a photodetector according to a second embodiment of the present invention. [Figure 8] FIG. 11 is a schematic cross-sectional view of a photodetector according to a third embodiment of the present invention. [Figure 9]FIG. 11 is a schematic cross-sectional view of a photodetector according to a fourth embodiment of the present invention. [Figure 10] FIG. 11 is a schematic cross-sectional view of a photodetector according to a fifth embodiment of the present invention. [Figure 11] FIG. 13 is a schematic cross-sectional view of a photodetector according to a sixth embodiment of the present invention. [Figure 12] FIG. 13 is a schematic cross-sectional view of a photodetector according to a seventh embodiment of the present invention. [Figure 13] FIG. 13 is a schematic cross-sectional view of a photodetector according to an eighth embodiment of the present invention. [Figure 14] FIG. 13 is a schematic cross-sectional view of a photodetector according to a ninth embodiment of the present invention. [Figure 15] FIG. 16 is a schematic cross-sectional view of a photodetector according to a tenth embodiment of the present invention. [Figure 16] FIG. 1 shows a detector array comprising a one-dimensional (2D) array of light sensors, each light sensor of the 2D array being a photodetector as described above. [Figure 17] FIG. 2 illustrates a photodetector according to any of the above-described embodiments in operation as a high-speed photoelectric converter. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0021]
[0020] In the following detailed description, for purposes of explanation and not limitation, specific details are set forth in order to provide a deeper understanding of the present disclosure. It will be apparent to those skilled in the art that the present disclosure may be practiced in other embodiments that depart from these specific details.
[0022] 2A and 2B show schematic representations in cross-sectional and plan views, respectively, of a photodetector according to a first embodiment of the present invention.
[0023]
[0022] The growth direction, i.e. the direction perpendicular to the plane of the wafer, is denoted as the z-direction. The first and second contact regions, which are n+ and p+ doped semiconductor regions respectively, extend in the y-direction. The cross section AA in FIG. 2A lies in the xz-plane as shown in FIG. 2B. The contact regions are arranged on either side of a body region 15 formed with two parts, namely a p-doped semiconductor partial region 15p adjacent to the n+ contact region and an n-doped semiconductor partial region 15n adjacent to the p+ contact region, the n-type and p-type partial regions having a common interface where the n-type partial region and the p-type partial region meet. Thereby, in the x-direction, the structure has an n+ pn p+ arrangement in the x-direction. The body partial regions 15p and 15n may be formed from any suitable semiconductor material, such as silicon or germanium or silicon carbide, or suitable alloys thereof, with a band gap selected suitable for absorbing input photons hv in the wavelength range to be detected. Heavily doped n+ and p+ regions are disposed beyond the gate on either side of the body region 15 and serve as outputs for reading out the photocurrent. The layers of the photodetector are epitaxially fabricated on a semiconductor-on-insulator (SOI) substrate 3 formed from a silicon wafer 7 and an insulator layer 8.
[0024]
[0023] The photodetector can be operated with the following bias voltages: a negative or zero voltage V1 (e.g. 0 or -1V) is applied to the n+ region and a positive voltage V2 (e.g. +1V) is applied to the p+ region. The n-type and p-type sub-regions of the body region are not biased. The trigger time of the photodetector is related to the electric field in the body region and can therefore be adjusted by adjusting the bias voltages V1 and V2. Under these bias conditions, photons hv incident on the light absorbing region, for example from the optical fiber device 30, are absorbed, thereby generating electron-hole pairs, which are then swept away by the electric field induced by the bias voltages and thereby detected as a current flowing between the n+ and p+ regions.
[0025]
[0024] Figures 3A, 3B, and 3C are energy band diagrams along the x-direction. Figure 3A shows the photodetector in reverse bias. Figures 3B and 3C show the photodetector in forward bias with bias voltage V2-V1. Figure 3B shows the conditions that result in a non-conducting structure when there is no light incident, and Figure 3C shows the conditions that result in a conducting structure when there is light incident. In forward bias, the sensor does not detect any light, and little to no current flows between the p+ and n+ regions due to the barrier created or caused by the bias voltage V2-V1. However, when the sensor detects light, the incident photon is absorbed and an electron-hole pair is generated, and the sensor changes to a conducting state. That is, under the electric field created by the bias voltage, the holes move toward the n+ contact region and the electrons move toward the p+ contact region. The transferred holes accumulate in a portion of the p region adjacent to the n+ contact region, inducing a lowering of a potential barrier against electron movement and an electron current flowing from the n+ region. Similarly, the transferred electrons accumulate in a portion of the n region adjacent to the p+ contact region, inducing a lowering of a hole barrier and a hole current flowing from the p+ region. In its conducting state, the sensor achieves a large internal current gain. Furthermore, a positive feedback mechanism accelerates the accumulation of excess positive and negative carriers adjacent the respective n+ and p+ contact regions, thereby lowering the associated potential barriers corresponding to such regions, allowing current to flow between the p+ and n+ regions of the photosensor, resulting in an output current upon detection of, or in response to, incident light.
[0026]
[0025] Figure 4 is a schematic graph showing the output current of the photodetector as a function of the bias voltage V2-V1 between the n+ and p+ contact regions when incident light is detected ("ON") and not detected ("OFF"), i.e., in the conductive and non-conductive states of Figures 3C and 3B, respectively. Note that above a threshold bias voltage Vth, the output current in the conductive state is nearly static with varying bias voltage, which is the preferred operating state when the incident light intensity is measured by the trigger time rather than the amount of photocurrent.
[0027]
[0026] Figures 5A and 5B show oscilloscope screenshots of the applied voltage Vd = V2 - V1 and the output current I in the absence and presence of light, respectively. The trigger time t decreases with increasing light intensity. Figure 5A shows the trigger time t0 = 5.5 μs in the absence of light. Figure 5B shows the trigger time t1 = 1.5 μs in the presence of light at an absorbed power of 35 nW. The switch from the low current state to the high current state occurs very abruptly, which is favorable for a high accuracy measurement of the delay time. The output current of 0.8 mA is more than four orders of magnitude higher than the output current achievable with a conventional photodiode at an absorbed power of 35 nW.
[0028]
[0027] Figure 6 is a graph plotting the reciprocal trigger time 1 / t relative to the absorbed optical power A in nanowatts. As shown in Figure 6, there is a linear relationship between the inverse of the trigger time and the absorbed optical power.
[0029]
[0028] Figure 7 is a schematic cross-sectional view of a vertical photodetector according to a second embodiment of the invention. Vertical means that the layers are formed epitaxially in the xy plane, which is the plane of the substrate, so that the arrangement of the layers is in the z direction. This structure is further divided into individual pixels in a one-dimensional row array or a two-dimensional matrix array by filling the insulating trenches with a dielectric material that electrically insulates adjacent pixels from each other. This dielectric material may be a material deposited after etching, or may be a material created by an oxidation process after etching, for example. Instead of filling the trenches with a dielectric material, the trenches may be left unfilled or may only be partially filled with a thin layer of oxide or other insulating material that coats the sides of the trenches. The insulating trenches thereby extend vertically through at least one of the light absorbing and contacting regions to further divide the photodetector into an array of independently contacted pixels.
[0030]
[0029] The semiconductor layers are deposited on a suitable substrate in the arrangement p+ np n+ as shown or in the reverse arrangement. Doping of each layer may be performed during deposition or during a post-deposition process such as ion implantation, or a combination of both as needed. The n-type and p-type layers form the light absorbing region of the photodetector, and the n+ and p+ layers form the contact region. The n-type and p-type layers have an interface forming a pn junction. The n-type and p-type layers have a band gap suitable for absorbing incident photons hv in a particular wavelength (energy) range, and generate electron and hole pairs that drift towards the p+ and n+ layers, respectively, when the pn junction is forward biased. Electron-hole pairs are generated by absorption of photons in the p layer (schematically shown) or n layer while the photodetector is forward biased, and are separated by a forward bias induced applied electric field, with the holes drifting towards the n+ layer and the electrons drifting towards the p+ layer. Although a substrate is not shown, a suitable substrate may be provided, such as a p+ substrate that makes ohmic contact to the p+ layer pixels. When the structure is switched from reverse bias to forward bias about the pn junction, the electron-hole pairs generated by photon absorption will initiate current flow between the contacts if a sufficient number of electrons and holes drift to sufficiently lower the barrier. There is therefore a time delay from the reverse-to-forward bias switching event to the start of current flow that is inversely proportional to the incident light intensity.
[0031]
[0030] The photodetector is operated by repeated cycles of switching from reverse bias to forward bias. That is, operation proceeds by applying a voltage to reverse bias the n+ and p+ contacts and switching the reverse bias voltage to a forward bias voltage. After switching, electrons and holes generated in the light absorbing region in response to photon absorption drift towards the p+ and n+ contact regions, respectively. The photodetector then senses the onset of current flow between the first and second contacts. The time delay between said switching and said onset is measured, said time delay being inversely proportional to the incident light intensity. This reverse to forward bias sequence is then repeated. The repetition of driving and reading may be periodic or aperiodic. In the periodic case, the interval between the forward and reverse bias segments is fixed. In the aperiodic case, the reverse bias segment has a fixed interval, but the forward bias interval varies depending on the incident light intensity within a time window set between a minimum and a maximum value. After the onset of current flow occurs and the time delay is measured, the forward bias segment of the period can be terminated, so that the forward bias section has a maximum value when there is no incident light since there is no onset of current flow, a minimum value when the incident light intensity is high since the time delay is shorter than the minimum, but an intermediate value when there is incident light intensity such that the time delay for the onset of current flow is within the time window.
[0032]
[0031] Figure 8 is a schematic cross-sectional view of a vertical photodetector according to a third embodiment of the invention, as will be understood in large part from the above description of Figure 7. In the third embodiment, each pixel is composed of a group of sub-pixels. As in the second embodiment, each pixel is delimited by a dielectric material trench that extends through the entire structure, i.e. through the n+ pn p+ layers. The sub-pixels of a given pixel are separated from each other by the dielectric material trench, but not entirely through the structure, i.e. at least through the top contact layer (here n+), at least part way through the upper layer (here p) of the light absorbing layer, and possibly even part way through the lower layer (here n) of the light absorbing layer. The sub-pixels of any one pixel thereby remain in common contact, by further dividing each pixel into a one- or two-dimensional array of sub-pixels by additional insulating trenches, arranged laterally for each pixel within the insulating trench that defines the pixel, and that extend vertically through one of the contact areas and at least one of the light absorbing areas, but not through the other of the contact areas. This sub-pixel structure can serve to reduce internal capacitance and thus achieve better sensitivity.
[0033]
[0032] Figure 9 is a schematic cross-sectional view of a vertical photodetector according to a fourth embodiment of the present invention. The photodetector structure shown in Figure 7 is combined with a semiconductor circuit layer arranged on the top contact region. This circuit layer comprises an array of readout sensors for the pixel array of the photodetector with the sensor-pixel connections being realized using vias. In particular, the circuit layer may be a CMOS circuit layer allowing electrical connections to the pixels by through-silicon vias (TSVs). A bias voltage can then be applied to the n+ and p+ contact regions via the TSVs. Furthermore, a signal current induced by the incident light hv can be detected pixel by pixel via the TSV connections. This CMOS circuit layer is shown arranged on the n+ contact layer, but could alternatively be arranged on the p+ contact layer. The structure of Figure 7 may also be combined with a CMOS circuit layer in a similar manner.
[0034]
[0033] Figure 10 is a schematic cross-sectional view of a photodetector according to a fifth embodiment of the present invention. This embodiment may be understood as a variation of the embodiment of Figure 7 in that the bottom-to-top epitaxial layer structure includes a p+ contact layer, an n-type layer, and a p-type layer, the n-type layer and the p-type layer forming the light absorbing region. However, instead of forming the top contact as an epitaxial layer, the top contact is formed by one or more buried regions in the p-type epitaxial layer. Two adjacent buried regions are shown, and the arrangement of the adjacent buried regions serves to define the pixel. Alternatively, a dielectric material trench may be used, as described in other embodiments. Furthermore, it is noted that in some embodiments, the light hv may be incident from a cut side, as shown in the schematic. Although a substrate is not shown, a suitable substrate may be provided, such as a p+ substrate for ohmic contact to the p+ layer. It will also be understood that an inverted structure is feasible, i.e., n+→p+, p→n, n→p, and p+→n+ in the figures.
[0035]
[0034] Figure 11 is a schematic cross-sectional view of a photodetector according to a sixth embodiment of the invention. A lateral n+pn p+ structure, conceptually somewhat similar to the structure of Figures 2A / 2B, is used. A p-type layer is epitaxially deposited on a substrate 3. In the p-type layer, a buried n-type region is formed and a p+ contact region is formed within the n-type region. An n+ contact region is formed in the p-type layer, laterally offset from the n-type region. It will be understood that an inverse structure is also feasible. Furthermore, the substrate 3 is not an electrically active part of the photodetector and may for example be an n-type, p-type, semi-insulating (SI) semiconductor, sapphire or insulator, as required.
[0036]
[0035] Figure 12 is a schematic cross-sectional view of a photodetector according to a seventh embodiment of the present invention. A p-type or n-type substrate 3 is provided. A buried n-type region is formed at the surface of the substrate and a p+ contact region is formed within the n-type region. A p-type buried region is formed laterally offset from the n-type region and an n+ contact region is formed within the p-type buried region.
[0037]
[0036] Figure 13 is a schematic cross-sectional view of a photodetector according to an eighth embodiment of the present invention. This embodiment is a variation of the embodiment of Figure 12, in which an epitaxial layer takes over the role of the substrate of Figure 12. The substrate 3 is therefore not an electrically active part of the photodetector and may for example be an n-type, p-type, semi-insulating (SI) semiconductor, sapphire or an insulator, as required.
[0038]
[0037] Figure 14 is a schematic cross-sectional view of a photodetector according to a ninth embodiment of the present invention. A p-type layer is deposited on a substrate. A buried n-type region is formed in the p-type layer, a p-type region is formed in the n-type region, and a p+ contact region is formed in the p-type region. An n+ contact region is formed in the p-type layer laterally offset from the n-type region. It will be understood that the inverse structure is also feasible. Furthermore, the substrate 3 is not an electrically active part of the photodetector, and may be, for example, an n-type, p-type, semi-insulating (SI) semiconductor, sapphire, or an insulator, as required. In this device structure, the active pn junctions for the time-delayed photoinduced current are indicated in the figure.
[0039]
[0038] Figure 15 is a schematic cross-sectional view of a photodetector according to a tenth embodiment of the invention. A p-type layer is deposited on a p+ substrate 3. A buried n-type region is formed in the p-type layer, a p-type region is formed in the n-type region, and an n+ contact region is formed in the p-type region. A p+ contact region is formed in the p-type layer, laterally offset from the n-type region. It will be understood that the inverse structure is also feasible. In this device structure, the active pn junction for the time-delayed photoinduced current is indicated in the figure.
[0040]
[0039] Figure 16 shows a detector array comprising a one-dimensional (2D) array of light sensors 5, each light sensor of the 2D array being a photodetector as described above. In addition to the array of sensors, the detector array may also include control circuitry 25 for managing the acquisition, capture, and / or sensing operation of the light sensors of the array with appropriate control signal outputs. For example, the control circuitry (which may be integrated on the same substrate as the sensors) may control or enable / disable the sensors such that data acquisition or sensing is correlated with data transmission rate, and the detector array may be coupled to a number of fiber optic output devices, each fiber optic device being associated with one of the sensors or a group of sensors. The sensors may be configured and / or arranged in any array architecture and in combination with any type of integrated circuit configuration. Furthermore, any manufacturing technique may be used to create the array.
[0041]
[0040] Figure 17 shows a photodetector according to any of the above-mentioned embodiments combined with an optional current amplifier. The photodetector is shown operating as a high-speed photoelectric converter operable to convert an optical pulse train or other more complex signal of the incident light hv into an equivalent electrical pulse train or other more complex signal. The pulse train shown diagrammatically above represents the optical signal transmitted through the optical fiber 30, and the pulse train shown diagrammatically below represents the electrical signal output by the photodetector receiving the optical signal as input. Due to the large output signal, the photodetector does not require an amplifier and can be directly connected to digital circuits. Not requiring an amplifier is beneficial, since amplifiers are a source of noise.
[0042]
[0041] It should be noted that the term "circuit" may specifically refer to a single component or multiple components (whether in integrated circuit form or otherwise) that are coupled together, active and / or passive, to realize or perform a desired function. The term "circuitry" may specifically refer to a circuit (whether integrated or otherwise), a group of such circuits, one or more processors, one or more state machines, one or more processors implementing software, one or more gate arrays, programmable gate arrays and / or field programmable gate arrays, or a combination of one or more circuits (whether integrated or otherwise), one or more state machines, one or more processors, one or more processors implementing software, one or more gate arrays, programmable gate arrays and / or field programmable gate arrays. The term "data" may specifically refer to a current or voltage signal(s), which may be a single bit (or equivalent) or multiple bits (or equivalent), whether in analog or digital form.
[0043]
[0042] It should further be noted that the various circuits and circuit configurations disclosed herein may be described using computer-aided design tools and may be expressed (or represented) as data and / or instructions embodied in various computer-readable media, e.g., in terms of their behavior, register transfers, logic components, transistors, layout shapes, and / or other characteristics. File or other object formats in which such circuit representations may be implemented include, but are not limited to, formats corresponding to behavioral languages such as C, Verilog, and HLDL, formats corresponding to register level description languages such as RTL, and formats corresponding to geometry description languages such as GDSII, GDSIII, GDSIV, CIF, MEBES, and any other suitable formats and languages. Computer-readable media in which data and / or instructions having such formats may be embodied include, but are not limited to, various forms of non-volatile storage media (e.g., optical, magnetic, or semiconductor storage media) and carrier waves that may be used to transfer data and / or instructions having such formats via wireless, optical, or wired signal media or combinations thereof. Examples of transfer of data and / or instructions having such formats via a carrier wave include, but are not limited to, transfer over the Internet (upload, download, email, etc.) and / or other computer networks via one or more data transfer protocols (e.g., HTTP, FTP, SMTP, etc.) The present invention further relates to such representations of the circuitry described herein and / or techniques implemented therewith, and thus are intended to be included within the scope of the present invention.
[0044]
[0043] In practice, when received in a computer system via one or more computer readable media, such data and / or instruction based representations of the circuits described above may be processed by a processing entity (e.g., one or more processors) in the computer system in conjunction with the execution of one or more other computer programs, including but not limited to netlist generators, place and route programs, etc., to generate a representation or image of a physical manifestation of such circuitry. Such representation or image may then be used in device fabrication, for example, by enabling the generation of one or more masks that are used to form various components of the circuitry in the device fabrication process.
[0045]
[0044] Additionally, the various circuits and circuitry and techniques disclosed herein may be represented by simulation and simulation instruction-based representation using computer-aided design, simulation and / or testing tools. Simulation of the circuitry of the present invention, including the photodetectors and / or techniques implemented therein, may be performed by a computer system, and the characteristics and operation of such circuitry and techniques implemented therein may be simulated, emulated, replicated, analyzed and / or predicted by the computer system. The present invention further relates to such simulation and testing of the devices and / or circuitry of the present invention, and / or techniques implemented therein, and is therefore intended to be included within the scope of the present invention. Computer readable media and data corresponding to such simulation and / or testing tools are further intended to be included within the scope of the present invention.
[0046] It will be apparent to those skilled in the art that many improvements and modifications can be made to the exemplary embodiments described above without departing from the scope of the present disclosure.
Claims
1. A photodetector device comprising: first and second light absorbing regions, respectively n-type and p-type doped, made of a semiconductor material, formed as respective epitaxial layers stacked one on top of the other on a substrate, and configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said first and second photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; A photodetector arrangement, wherein the first and second contact regions are laterally spaced apart on either side of the first and second light absorbing regions.
2. A photodetector device comprising: first and second light absorbing regions, respectively n-type and p-type doped, made of a semiconductor material, formed as respective epitaxial layers stacked one on top of the other on a substrate, and configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said first and second photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; a photodetector arrangement, further comprising an insulating trench extending vertically through the first and second light absorbing regions and through at least one of the first and second contact regions to further divide the photodetector into an array of independently contacted pixels.
3. 3. The photodetector apparatus of claim 2, further comprising a semiconductor circuit layer disposed on an epitaxial layer forming one of the first and second contact regions, the circuit layer comprising an array of read sensors for the pixel array of the photodetector electrically connected to the pixels through vias.
4. 3. The photodetector arrangement of claim 2, wherein each pixel is further divided into an array of sub-pixels by an additional insulating trench for each pixel, the additional insulating trench being disposed laterally within the insulating trench that defines the pixel and extending vertically through one of the first and second contact areas and at least one of the first and second light absorbing areas but not through the other of the first and second contact areas, thereby allowing multiple sub-pixels of any one pixel to remain in common contact.
5. A photodetector device comprising: first and second light absorbing regions, respectively n-type and p-type doped, made of a semiconductor material, formed as respective epitaxial layers stacked one on top of the other on a substrate, and configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said first and second photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; a photodetector device, wherein the first and second light absorbing regions are arranged such that one of the first and second light absorbing regions is formed as an epitaxial layer on a substrate or integrally formed with the substrate, and the other of the first and second light absorbing regions is formed as a buried region within the epitaxial layer.
6. A photodetector device comprising: first and second light absorbing regions, respectively n-type and p-type doped, made of a semiconductor material, formed as respective epitaxial layers stacked one on top of the other on a substrate, and configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said first and second photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; a photodetector device, the first and second light absorbing regions being arranged such that one of the first and second light absorbing regions is formed in a first portion as an epitaxial layer on a substrate or integrally formed with the substrate, and is formed in a second portion as a buried region in the epitaxial layer or substrate, and the other of the first and second light absorbing regions is formed as an additional buried region in the epitaxial layer.
7. 7. A photodetector arrangement as claimed in claim 6, wherein the buried region and the further buried region are laterally separated by a portion of the epitaxial layer or the substrate.
8. 7. A photodetector arrangement as claimed in claim 6, wherein one of the first and second contact regions is formed as a further additional buried region within a buried region of the first or second light absorbing region, respectively.
9. 7. A photodetector arrangement as claimed in claim 6, wherein the first and second contact regions are formed as respective further additional buried regions within the buried regions of the first and second light absorbing regions, respectively.
10. A photodetector apparatus comprising: first and second light absorbing regions, respectively n-type and p-type doped, made of a semiconductor material, formed as respective epitaxial layers stacked one on top of the other on a substrate, and configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said first and second photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; a photodetector apparatus, wherein one of the first and second contact regions is formed as an epitaxial layer in the substrate, and at least one of the first and second light absorbing regions is formed at least partially as an additional epitaxial layer in the epitaxial layer of the one of the first and second contact regions.
11. A photodetector apparatus comprising: first and second light absorbing regions, respectively n-type and p-type doped, made of a semiconductor material, formed as respective epitaxial layers stacked one on top of the other on a substrate, and configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said first and second photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; At least one of the first and second contact regions is formed as a buried region within an epitaxial layer forming at least a portion of the first and second light absorbing regions, respectively.
12. A photodetector apparatus comprising: first and second light absorbing regions, respectively n-type and p-type doped, made of a semiconductor material, formed as respective epitaxial layers stacked one on top of the other on a substrate, and configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said first and second photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; the first and second contact regions being formed as first and second laterally spaced apart buried regions, respectively, in an epitaxial layer forming at least a portion of the first and second light absorbing regions, respectively.
13. A photodetector apparatus comprising: first and second light absorbing regions, respectively n-type and p-type doped, made of a semiconductor material, formed as respective epitaxial layers stacked one on top of the other on a substrate, and configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said first and second photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; a photodetector apparatus, wherein one of the first and second contact regions is formed as first and second laterally spaced apart buried regions formed in an epitaxial layer forming at least a portion of one of the first and second light absorbing regions, respectively.
14. A method of manufacturing a photodetector device, the method comprising: fabricating first and second light absorbing regions using a semiconductor material, the first and second light absorbing regions being doped n-type and p-type, respectively, the first and second light absorbing regions being fabricated as respective epitaxial layers stacked on top of one another on a substrate, the first and second light absorbing regions being configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; creating first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, designated p+ and n+, respectively; providing first and second contacts connected to the first and second contact regions, respectively; said n-type and p-type photoabsorption regions and said n+ and p+ contact regions are arranged in an n+ pn p+ array such that after a voltage applied between said first contact and said second contact is switched from reverse bias to forward bias, electrons and holes generated in said n-type and p-type photoabsorption regions in response to photon absorption drift towards the p+ and n+ contact regions, respectively, thereby causing current to begin to flow between said first contact and said second contact after a time delay that is inversely proportional to incident light intensity; the method further comprising creating an isolation trench extending vertically through the first and second light absorbing regions and at least one of the first and second contact regions to further divide the photodetector into an array of independently contacted pixels.
15. 1. A method of operating a photodetector apparatus, the method comprising: Providing a photodetector arrangement, the photodetector arrangement comprising: first and second light absorbing regions made of a semiconductor material, doped n-type and p-type, respectively, fabricated as respective epitaxial layers stacked on top of one another on a substrate, the first and second light absorbing regions configured to generate electron and hole pairs in response to absorption of photons when light is incident on the photodetector arrangement; first and second contact regions made of a semiconductor material and doped p-type and n-type, respectively, said first and second contact regions having a higher doping concentration than said first and second light absorbing regions, said first and second contact regions being designated p+ and n+, respectively; first and second contacts connected to the first and second contact regions, respectively; the n-type and p-type photoabsorption regions and the n+ and p+ contact regions are arranged in an n+ pn p+ arrangement; the first and second contact regions being laterally spaced apart on either side of the first and second light absorbing regions; The method further comprises: applying a reverse bias voltage to reverse bias the n+ and p+ contacts; switching the reverse bias voltage to a forward bias voltage such that after the switching, electrons and holes generated in the first and second light absorbing regions in response to photon absorption drift toward the p+ and n+ contact regions, respectively; sensing an initiation of current flow between said first contact and said second contact and measuring a time delay between said switching and said initiation, said time delay being inversely proportional to incident light intensity; and operating the photodetector arrangement by repeating:
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