Isolation structure in image sensor

Abstract

To provide an optical device capable of improving a quantum efficiency of a BSI image sensor by actually minimizing or removing a cross talk between adjacent pixel structures, and provide a method.SOLUTION: An optical device 100 includes: a substrate 102; a first radiation sensing element 106A and a second radiation sensing element 106B provided to the substrate; and a shallow trench isolation (STI) structure 108 provided onto the substrate. The substrate includes: a front side front surface 102F; and a back side front surface 102B opposite to the front side front surface. The optical device further includes a deep trench isolation (DTI) structure 110 provided onto the STI structure in the substrate. The DTI structure includes: a metal filling layer 110A; and dielectric body layers 110B and 110C surrounding a metal structure. The DTI structure is extended vertically upward from the front side front surface of the substrate.SELECTED DRAWING: Figure 1

Description

[Background technology]

[0001] Image sensors are used to sense incident visible or invisible radiation, such as visible or infrared light. Complementary metal-oxide semiconductor (CMOS) image sensors and charge-coupled device (CCD) image sensors are used in a variety of applications, such as digital still cameras, cell phones, tablets, and goggles. These image sensors utilize an array of pixels that absorb (i.e., sense) incident radiation and convert it into an electrical signal. One example of an image sensor is a backside illuminated (BSI) image sensor, which detects radiation from the "backside" of the BSI image sensor's substrate. Summary of the Invention [Problem to be solved by the invention]

[0002] A BSI image sensor includes an array of pixel structures (including photodiodes, transistors, and other components) in a substrate (e.g., a semiconductor substrate). The pixel structures are configured to receive (or absorb) electromagnetic radiation (e.g., infrared radiation) projected toward the substrate and convert photons from the received radiation into electrical signals. The electrical signals are then distributed to processing components attached to the BSI image sensor. The pixel structures overlie an interconnect structure configured to distribute the electrical signals generated in the pixel structures to the appropriate processing components.

[0003] In a BSI image sensor, an interconnect structure is bonded to the front surface of a substrate, and color filters and microlenses are bonded to the back side of the substrate to collect light with minimal or no obstruction from the interconnect structure and / or pixel structure components. As a result, BSI image sensors have improved performance under low light conditions and a higher quantum efficiency (QE) (e.g., photon-to-electron conversion rate) than front-side illuminated image sensors.

[0004] A challenge with BSI image sensors is the reduction or elimination of crosstalk between adjacent pixel structures. Adjacent pixel structures can interfere with each other's operation. This crosstalk can occur when light from a pixel structure passes into an adjacent pixel structure, causing the adjacent pixel structure to sense the light. Such crosstalk can reduce the accuracy and quantum efficiency of the BSI image sensor. [Means for solving the problem]

[0005] The present invention provides, in some embodiments, an optical device including a substrate, a first radiation sensing element and a second radiation sensing element, and a first isolation structure and a second isolation structure. The substrate includes a first surface and a second surface opposite the first surface. The first and second radiation sensing elements are provided on the substrate. The first isolation structure is provided on the substrate between the first radiation sensing element and the second radiation sensing element. The first isolation structure includes a first surface and a second surface opposite the first surface. The second isolation structure is provided in the substrate and on the first surface of the first isolation structure. The second isolation structure includes a metal structure and a dielectric layer surrounding the metal structure. The second isolation structure extends vertically above the first surface of the substrate.

[0006] The present invention also provides, in some embodiments, an optical device including a substrate, first and second pixel structures, a shallow trench isolation (STI) structure, a deep trench isolation (DTI) structure, and a grid structure. The substrate includes a front surface and a back surface. The first and second pixel structures are disposed on the substrate. The STI structure is disposed between the first and second pixel structures. The DTI structure is disposed on the STI structure. The DTI structure includes a metal structure and a dielectric liner disposed along sidewalls of the metal structure and on the STI structure. The grid structure is disposed on the back surface of the substrate and is substantially aligned with the DTI structure.

[0007] The present invention further provides, in some embodiments, a method: a first radiation sensing element and a second radiation sensing element are formed through a first surface of a substrate; a first isolation structure is formed through the first surface of the substrate between the first radiation sensing element and the second radiation sensing element; a trench region is formed on a second surface of the substrate opposite the first surface of the substrate; an isolation trench is formed through the second surface of the substrate and on the first isolation structure; a dielectric layer is formed in the isolation trench; the dielectric layer extends vertically above the second surface of the substrate; and a metal layer is formed on the dielectric layer. Effect of the Invention

[0008] In accordance with the present invention, crosstalk between adjacent pixel structures is substantially minimized or eliminated, improving the quantum efficiency of the BSI image sensor. [Brief description of the drawings]

[0009] Aspects of the present invention are best understood from the following detailed description when read in conjunction with the accompanying drawing figures. [Figure 1] FIG. 1 illustrates a cross-sectional view of a BSI image sensor with an isolation structure according to some embodiments. [Diagram 2] FIG. 2 illustrates a cross-sectional view of a BSI image sensor with isolation structures and grid structures according to some embodiments. [Diagram 3] FIG. 3 is a flow diagram of a method for fabricating a BSI image sensor with isolation structures according to some embodiments. [Figure 4] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Diagram 5] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 6] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 7]4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 8] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 9] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 10] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 11] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 12] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 13] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 14] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 15] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 16] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 17] 4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 18]4-18 depict cross-sectional views of a BSI image sensor with isolation structures at various stages of the fabrication process according to some embodiments. [Figure 19] FIG. 19 is a flow diagram of a method for fabricating a BSI image sensor with isolation structures and grid structures according to some embodiments. [Figure 20] 20-24 depict cross-sectional views of a BSI image sensor with isolation and grid structures at various stages in the manufacturing process according to some embodiments. [Figure 21] 20-24 depict cross-sectional views of a BSI image sensor with isolation and grid structures at various stages in the manufacturing process according to some embodiments. [Figure 22] 20-24 depict cross-sectional views of a BSI image sensor with isolation and grid structures at various stages in the manufacturing process according to some embodiments. [Figure 23] 20-24 depict cross-sectional views of a BSI image sensor with isolation and grid structures at various stages in the manufacturing process according to some embodiments. [Figure 24] 20-24 depict cross-sectional views of a BSI image sensor with isolation and grid structures at various stages in the manufacturing process according to some embodiments.

[0010] Exemplary embodiments are described with reference to the accompanying drawings, in which like reference numbers generally indicate identical, functionally similar, and / or structurally similar elements, and descriptions of elements having the same reference numbers apply to each other unless otherwise noted. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The following embodiments provide many different embodiments or examples for implementing different features of the provided subject matter. To simplify the invention, specific examples of elements and arrangements are described below. Of course, these are illustrative and not intended to be limiting. For example, the formation of a first feature above a second feature in the description may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which an additional feature is formed between the first and second features such that the first and second features are not in direct contact. As used herein, the formation of a first feature on a second feature means that the first feature is formed in direct contact with the second feature. In addition, the present invention may repeat reference numbers and / or letters in various embodiments. This repetition does not in itself dictate a relationship between the various embodiments and / or configurations referred to.

[0012] Spatially relative terms such as "below," "lower," "upper," "top," and the like may be used herein to facilitate description to explain the relationship of one element or feature depicted in the figures to another element or feature. The spatially relative terms are intended to encompass different orientations of the device during use or operation in addition to the orientation depicted. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may be interpreted accordingly.

[0013] References herein to "one embodiment," "embodiment," "exemplary embodiment," "exemplary," and the like indicate that the embodiment being described may include a particular feature, structure, or characteristic, but it should be noted that each embodiment does not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Moreover, if a particular feature, structure, or characteristic is described in connection with one embodiment, it is within the knowledge of one of ordinary skill in the art to provide such feature, structure, or characteristic in connection with other embodiments, whether or not explicitly described.

[0014] It is to be understood that the terms and phrases used herein are for the purpose of description rather than limitation, as would be interpreted by one of ordinary skill in the relevant art in light of the teachings herein.

[0015] In some embodiments, the terms "about" and "substantially" can refer to a given quantity value that varies within 5% of the value (e.g., ±1%, ±2%, ±3%, ±4%, ±5% of the value). These values ​​are merely examples and are not intended to be limiting. The terms "about" and "substantially" can refer to a percentage of a value as interpreted by one of ordinary skill in the relevant art in light of the teachings herein.

[0016] The present invention provides an exemplary BSI image sensor with an isolation structure between adjacent pixel structures and a method for fabricating the BSI image sensor. In some embodiments, the BSI image sensor may include a stack of isolation structures disposed between adjacent pixel structures to optically isolate the adjacent pixel structures from one another. In some embodiments, the stack of isolation structures may include a shallow trench isolation (STI) structure disposed on a front surface of a substrate of the BSI image sensor and a deep trench isolation (DTI) structure disposed on and in physical contact with the STI structure.

[0017] In some embodiments, the DTI structure can extend about 80 nm to about 130 nm above the backside surface of the substrate of the BSI image sensor. In some embodiments, the STI structure can include one or more dielectric layers, and the DTI structure can include a metal fill layer and a dielectric liner surrounding the metal fill layer. Including such a metal fill layer in the DTI structure and having the DTI structure extend above the backside surface of the substrate can substantially minimize or eliminate crosstalk between adjacent pixel structures, improving the quantum efficiency of the BSI image sensor.

[0018] In some embodiments, the quantum efficiency of the BSI image sensor can be further improved by including a trench region substantially aligned with the pixel structure above the backside surface of the substrate. In some embodiments, by using the trench region in conjunction with the DTI structure, the quantum efficiency of the BSI image sensor for detecting light in the near infrared region (e.g., between about 800 nm wavelength and about 1000 nm wavelength) can be improved by about 0.5 times to about 1.5 times compared to a BSI image sensor without the trench region and / or DTI structure.

[0019] 1 illustrates a cross-sectional view of a BSI image sensor 100 (also referred to as an "optical device 100") according to some embodiments. In some embodiments, the BSI image sensor includes: (i) a substrate 102 having a backside surface 102B and a frontside surface 102F; (ii) an interconnect structure 104 disposed on the frontside surface 102F of the substrate 102; (iii) pixel structures 106A, 106B disposed on the substrate 102; (iv) an STI structure 108 disposed on the substrate 102; (v) a DTI structure 110 disposed on the STI structure 108; and (vi) a backside surface 102B. The optical element includes an anti-reflective coating (ARC) 112 disposed on surface 102B, (vii) a passivation layer 114 disposed on ARC 112, (viii) a dielectric layer 116 disposed on passivation layer 114, (ix) color filters 118A, 118B disposed on dielectric layer 116, (x) microlenses 120A, 120B disposed on dielectric layer 116, and (xi) a metal shielding layer 122.

[0020] In some embodiments, the substrate 102 may be a semiconductor material such as silicon, germanium (Ge), silicon germanium (SiGe), silicon-on-insulator (SOI) structures, and combinations thereof. Additionally, the substrate 102 may be doped with a p-type dopant (e.g., boron, indium, aluminum, or gallium) or an n-type dopant (e.g., phosphorus or arsenic).

[0021] In some embodiments, the backside surface 102B may include a first array of periodic groove regions 102Ga and a second array of periodic groove regions 102Gb. The first array of periodic groove regions 102Ga may be substantially aligned with the pixel structure 106A, and the second array of periodic groove regions 102Gb may be substantially aligned with the pixel structure 106B. These arrays of periodic groove regions 102Ga and 102Gb may provide a larger incident surface area for the radiation beam 124 to be incident on each pixel structure 106A and 106B compared to a BSI image sensor having a flat backside surface and no periodic groove regions on the backside surface of the substrate. The larger incident surface area may improve the quantum efficiency of the pixel structures 106A and 106B of the BSI image sensor 100.

[0022] In some embodiments, the groove regions 102Ga and 102Gb may have a triangular cross-sectional shape, as shown in FIG. 1. In some embodiments, the groove regions 102Ga and 102Gb may have other cross-sectional shapes, such as a rectangular or semi-elliptical shape. In some embodiments, the groove regions 102Ga and 102Gb may allow multiple reflections of the incident radiation beam 124 off the inner walls of the groove regions 102Ga and 102Gb without leaving the groove regions 102Ga and 102Gb. Such multiple reflections of the incident radiation beam 124 may increase the likelihood that the incident radiation beam 124 will be absorbed and processed by the pixel structures 106A and 106B, and the amount of the incident radiation beam 124 that is absorbed and processed by the pixel structures 106A and 106B, thus improving the quantum efficiency of the BSI image sensor 100. In some embodiments, each groove region of the first and second arrays of groove regions 102Ga-102Gb may have an angle A between inner walls of the groove region of about 60° to about 90° to enable multiple reflections of the incident radiation beam 124 at the inner walls of the groove regions 102Ga and 102Gb.

[0023] In some embodiments, the interconnect structure 104 may include an intermetal dielectric (IMD) layer 104A, a metal line 104B, a metal via 104C, and a sensing element 104D disposed in the IMD layer 104A. The metal line 104B and the metal via 104C form an interconnect (e.g., wiring) between the pixel structures 106A and 106B and other components (not shown in FIG. 1). In some embodiments, the metal line 104B and the metal via 104C may include a conductive material such as copper (Cu), ruthenium (Ru), cobalt (Co), a Cu alloy (e.g., Cu-Ru, Cu-Al, or copper-manganese (CuMn)), and any other suitable conductive material. The layout of the metal line 104B and the metal via 104C is exemplary and not limiting, and other layout variations of the metal line 104B and the metal via 104C are within the scope of the present invention. The number and arrangement of metal lines 104B and metal vias 104C may differ from that shown in FIG.

[0024] In some embodiments, the sensing elements 104D may be an array of field effect transistors (FETs) and / or memory cells electrically connected to the respective pixel structures 106A and 106B and configured to read electrical signals generated in these regions as a result of the light-to-charge conversion process. In some embodiments, the interconnect structure 104 may be attached via a buffer layer (not shown in FIG. 1 ) to a carrier substrate (not shown in FIG. 1 ) that may provide support to structures (e.g., the interconnect structure 104, the substrate 102, etc.) fabricated thereon. The carrier substrate may be a silicon wafer, a glass substrate, or other suitable material.

[0025] In some embodiments, pixel structures 106A and 106B (also referred to as "radiation sensing regions 106A and 106B" or "radiation sensing elements 106A and 106B") may be provided on the substrate 102. For illustrative purposes, two pixel structures 106A and 106B are shown in FIG. 1, however additional pixel structures 106A and 106B may be implemented on the substrate 102. The pixel structures 106A and 106B sense radiation, such as a radiation beam 124 that enters each of the pixel regions 105A and 105B and impinges on the backside surface 102B at different angles of incidence. In some embodiments, each pixel structure 106A and 106B may include a photodiode capable of converting photons of the radiation beam 124 into an electric charge. In some embodiments, the pixel structures 106A and 106B may include a photodiode, a transistor, an amplifier, other similar devices, or a combination thereof.

[0026] In some embodiments, the pixel structures 106A and 106B may be electrically and optically isolated from each other by a stack of isolation structures 107. In some embodiments, each stack of isolation structures 107 may include an STI structure 108 and a DTI structure 110. The STI structures 108 may be disposed on the substrate 102, and a surface of the STI structures 108 facing the interconnect structures 104 may be substantially coplanar with the front surface 102F. In some embodiments, the STI structures 108 may include a dielectric material, such as silicon oxide, silicon nitride, silicon oxynitride, fluorine-doped silicate glass (FSG), a low-k dielectric material (e.g., a material having a k value less than 3.9), and any other suitable dielectric material.

[0027] In some embodiments, the DTI structure 110 may be disposed on and in physical contact with the STI structure 108. The DTI structure 110 may be formed on the STI structure 108 without substantial gaps at the interface between the DTI structure 110 and the STI structure 108 to substantially minimize or prevent light leakage between the pixel regions 105A and 105B and / or between the pixel structures 106A and 106B, thereby improving the quantum efficiency of the pixel structures 106A and 106B. The presence of gaps at the interface between the DTI structure 110 and the STI structure 108 may allow a radiation beam 124 (e.g., photons) entering the pixel region 105A to travel through the gap to the pixel region 105B, or vice versa.

[0028] In some embodiments, the DTI structure 110 may extend a distance D1 along the Z-axis above the backside surface 102B. Such extension of the DTI structure 110 above the substrate 102 may substantially minimize or prevent radiation beam 124 (e.g., photons) entering pixel region 105A at an angle of incidence greater than 0° from diverging into pixel region 105B, or vice versa. As a result, by extending the DTI structure 110 above the substrate 102, a greater number of photons may be captured and processed by pixel structures 106A and 106B, thereby improving the quantum efficiency of the BSI image sensor 100. In some embodiments, the distance D1 may range from about 80 nm to about 130 nm. With the distance D1 within this range, the DTI structure 110 may improve the quantum efficiency of the BSI image sensor 100 without compromising the size and manufacturing cost of the BSI image sensor 100.

[0029] In some embodiments, each DTI structure 110 may include a metal fill layer 110A, a dielectric layer 110B surrounding the metal fill layer 110A, and a high-k dielectric layer 110C surrounding the dielectric layer 110B. The dielectric layer 110B and the high-k dielectric layer 110C may electrically isolate the metal fill layer 110A from the substrate 102 and / or the pixel structures 106A and 106B. The metal fill layer 110A may prevent photons in the pixel region 105A from escaping through the dielectric material to the pixel region 105B or vice versa. Furthermore, the metal fill layer 110A may enable multiple reflections of the radiation beam 124 (e.g., photons) in the pixel regions 105A and 105B that do not leave the pixel regions 105A and 105B. Such multiple reflections of the radiation beam 124 can increase the amount of the radiation beam 124 that is absorbed and processed by the pixel structures 106A and 106B, thereby improving the quantum efficiency of the BSI image sensor 100. In some embodiments, because a metal layer can block a radiation beam more effectively than a dielectric layer of substantially equal thickness, the DTI structure 110 using the metal fill layer 110A can be formed with a narrower width along the X-axis than a DTI structure formed with a dielectric layer and without the metal fill layer. As a result, a smaller and more compact BSI image sensor 100 can be formed using the DTI structure 110 without compromising quantum efficiency.

[0030] In some embodiments, the metal fill layer 110A may include a metallic material such as tungsten (W), aluminum (Al), cobalt (Co), ruthenium (Ru), and other suitable metallic materials. In some embodiments, the dielectric layer 110B may include silicon oxide, silicon nitride, silicon oxynitride, or other suitable insulating oxide and / or nitride materials. In some embodiments, the high-k dielectric layer 110C may include a high-k material such as hafnium oxide (HfO2), aluminum oxide (Al2O3), any other suitable high-k dielectric material, and combinations thereof.

[0031] In some embodiments, the STI structure 108 may have a height H1 of about 150 nm to about 250 nm along the Z axis and a width W1 of about 300 nm to about 500 nm along the X axis. In some embodiments, the DTI structure 110 may have a height H2 of about 5 μm to about 10 μm along the Z axis and a width W2 of about 300 nm to about 400 nm along the X axis. In some embodiments, the height H2 may be greater than the height H1 to sufficiently prevent crosstalk between the pixel structures 106A and 106B. In some embodiments, the width W1 of the STI structure 108 may be greater than the width W2 of the DTI structure 110 to sufficiently block photons from escaping to an adjacent pixel structure, since the STI structure 108 may not have a metal layer, unlike the DTI structure 110. As discussed above, a metal layer can block photons more effectively than a dielectric layer of substantially equal thickness. In some embodiments, the metal fill layer 110A may have a thickness T1 along the X-axis of about 70 nm to about 150 nm, the dielectric layer 110B may have a thickness T2 along the X-axis of about 100 nm to about 150 nm, and the high-k dielectric layer 110C may have a thickness T3 along the X-axis of about 10 nm to about 20 nm. With thicknesses T2 and T3 within the above-mentioned ranges, the dielectric layer 110B and the high-k dielectric layer 110C can sufficiently electrically isolate the metal fill layer 110A from the substrate 102 and / or the pixel structures 106A and 106B without compromising the size and manufacturing cost of the BSI image sensor 100. With heights H1 and H2, widths W1 and W2, and thickness T1 within the above-mentioned ranges, the STI structure 108 and the DTI structure 110 can substantially minimize or prevent crosstalk between the pixel structures 106A and 106B without compromising the size and manufacturing cost of the BSI image sensor 100.

[0032] The ARC 112 may be provided on the backside surface 102B to prevent the incident radiation beam 124 from reflecting off the pixel structures 106A and 106B. In some embodiments, the ARC 112 may comprise a high-k dielectric material, such as hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), zirconium dioxide (ZrO2), aluminum oxide (Al2O3), and any other suitable high-k dielectric material. In some embodiments, the ARC 112 may have a thickness T4 of about 1 nm to about 50 nm. With the thickness T4 in this range, the ARC 112 may be sufficient to prevent the radiation beam 124 incident on the pixel structures 106A and 106B from leaving the pixel regions 105A and 105B without compromising the size and manufacturing cost of the BSI image sensor 100. In some embodiments, the ARC 112 and the high-k dielectric layer 110C may comprise the same material. In some embodiments, a passivation layer 114 may be provided on the ARC 112 and may include a dielectric material, such as silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), or any other suitable dielectric material. In some embodiments, the dielectric layer 116 may include an oxide layer.

[0033] In some embodiments, color filters 118A and 118B may be disposed on the dielectric layer 116, and top surfaces of the color filters 118A and 118B may be substantially coplanar with a top surface of the dielectric layer 116. The color filters 118A and 118B may be substantially aligned with the pixel structures 106A and 106B, respectively. In some embodiments, the color filters 118A and 118B may comprise a polymeric material. In some embodiments, microlenses 120A and 120B may be disposed on the color filters 118A and 118B, respectively.

[0034] In some embodiments, a metal shielding layer 122 (also referred to as a "black level correction layer 122") may be provided on the backside surface 102B, as well as on the dielectric layer 116, the passivation layer 114, and the ARC 112. The metal shielding layer 122 shields a black reference sensor (not shown) of the BSI image sensor 100 from the radiation beam 124. The black reference sensor can be used to generate a reference black level signal in the BSI image sensor 100. As a result of shielding the black reference sensor, the black reference sensor can provide a black reference signal for image processing in the BSI image sensor 100.

[0035] 2 illustrates a cross-sectional view of a BSI image sensor 200 (also referred to as an "optical device 200") according to some embodiments. The description of BSI image sensor 100 also applies to BSI image sensor 200 unless otherwise stated.

[0036] In some embodiments, the BSI image sensor 200 may include a metal grid structure 226 in addition to the components of the BSI image sensor 100. The metal grid structure 226 may be disposed in the dielectric layer 116 and may be substantially aligned with the DTI structure 110. In some embodiments, the metal grid structure 226 may be separated from the DTI structure 110 by a distance D2 along the Z axis of about 100 nm to about 300 nm for ease of fabrication. In some embodiments, the grid structure may have a width W3 along the X axis of about 100 nm to about 300 nm. With the width W3 within this range, the metal grid structure 226 may substantially minimize or prevent crosstalk between the pixel structures 106A and 106B without compromising the size and fabrication cost of the BSI image sensor 200. In some embodiments, the width W3 may be wider or narrower than W2.

[0037] FIG. 3 is a flow diagram of an example method 300 for fabricating the BSI image sensor 100 shown in FIG. 1, according to some embodiments. For illustrative purposes, the operations depicted in FIG. 3 will be described with reference to an example manufacturing process for fabricating the BSI image sensor 100 as depicted in FIGS. 4-18. FIGS. 4-18 are cross-sectional views of the BSI image sensor 100 at various stages of fabrication, according to some embodiments. Operations may be performed in different orders or may not be performed depending on the particular application. It should be noted that the method 300 may not provide a complete BSI image sensor 100. Thus, it should be understood that additional processes may be provided before, during, or after the method 300, and other processes may only be briefly described herein. Elements in FIGS. 4-18 having the same numbers as elements in FIG. 1 are described above.

[0038] 3, pixel structures and STI structures are formed through the front surface of the substrate in operation 305. For example, as shown in FIG. 4, pixel structures 106A and 106B and STI structures 108 are formed through the front surface 102F of the substrate 102. In some embodiments, after the formation of the STI structures 108, the interconnect structures 104 may be formed on the front surface 102F.

[0039] 3, in operation 310, groove regions are formed on the backside surface of the substrate. For example, as shown in FIG. 5, groove regions 102Ga and 102Gb are provided on the backside surface 102B of the substrate 102. In some embodiments, the groove regions 102Ga and 102Gb may be formed by performing a photolithography process and an etching process on the backside surface 102B. In some embodiments, the triangular cross-sectional shape of the groove regions 102Ga and 102Gb may be formed by performing an anisotropic dry etching process followed by a wet etching process through a patterned masking layer (not shown) formed on the backside surface 102B.

[0040] 3, in operation 315, ARCs and a passivation layer are formed on the trench regions. For example, as shown in FIG. 6, ARCs 112 and passivation layer 114 are formed on trench regions 102Ga and 102Gb. In some embodiments, forming ARCs 112 may include depositing a high-k dielectric material on the structure of FIG. 5 using an atomic layer deposition (ALD) process, a chemical vapor deposition (CVD) process, or any other suitable high-k dielectric material deposition process. In some embodiments, forming passivation layer 114 may include depositing an oxide material on ARCs 112 using an ALD process, a CVD process, or any other suitable oxide material deposition process. As shown in FIG. 7, forming passivation layer 114 may be followed by forming a silicon oxide layer 716 on passivation layer 114. Forming silicon oxide layer 716 may include depositing silicon oxide layer 716 having a thickness T5 of about 100 nm to about 200 nm on the structure of FIG. 6 using a CVD process.

[0041] 3, DTI structures are formed through the backside surface of the substrate in act 320. For example, DTI structures 110 are formed through the backside surface 102B as described with reference to FIGS. In some embodiments, the formation of the DTI structure 110 may include the sequential operations of (i) forming an isolation trench 810 having a width W2 on the STI structure 108, as shown in FIG. 8; (ii) forming a high-k dielectric layer 910 on the structure of FIG. 8 to form the structure of FIG. 9; (iii) forming an oxide layer 1010 on the structure of FIG. 9 to form the structure of FIG. 10; (iv) removing portions of the high-k dielectric layer 910 and the oxide layer 1010 outside the isolation trench 810 using an etching process to form the structure of FIG. 11; (v) depositing a metal layer 1210 on the structure of FIG. 11 to fill the isolation trench 810 and form the structure of FIG. 12; and (vi) removing portions of the metal layer 1210 outside the isolation trench 810 using an etching process to form the structure of FIG. 13.

[0042] In some embodiments, forming the isolation trench 810 may include (i) forming a patterned photoresist layer (not shown) using a photolithography process on the structure of FIG. 7, and (ii) performing an etching process on the silicon oxide layer 716, the passivation layer 114, the ARC 112, and the substrate 102 through the patterned photoresist layer to expose the backside surface of the STI structure 108, as shown in FIG. 8.

[0043] In some embodiments, forming the high-k dielectric layer 910 may include depositing a substantially conformal layer of HfO2 and Al2O3 on the top surface of the silicon oxide layer 716, the sidewalls of the isolation trench 810, and along exposed surfaces of the STI structure 108 using an ALD process, as shown in Figure 9. In some embodiments, forming the oxide layer 1010 may include depositing a substantially conformal layer of silicon oxide on the high-k dielectric layer 910 using an ALD process, as shown in Figure 10.

[0044] The formation of the DTI structure 110 may be followed by the formation of a silicon oxide layer 1416 on the structure of FIG. 13 to form the structure of FIG. 14. The formation of the silicon oxide layer 1416 may include depositing a silicon oxide layer (not shown) on the structure of FIG. 13 using a CVD process and performing a chemical mechanical polishing (CMP) process on the deposited silicon oxide layer to form a silicon oxide layer 1416 having a thickness T6 of about 80 nm to about 130 nm on the DTI structure 110. The silicon oxide layer 1416 may act as a buffer layer to protect the DTI structure 110 from being etched during subsequent processing of the BSI image sensor 100. With the thickness T6 within the above-mentioned range, the silicon oxide layer 1416 can sufficiently prevent etching of the DTI structure 110 during subsequent processing without compromising the size and manufacturing cost of the BSI image sensor 100.

[0045] 3, a metallic shielding layer is formed on the backside surface of the substrate in operation 325. For example, as described with reference to FIGS. In some embodiments, the formation of the metal shielding layer 122 may include the sequential operations of (i) forming a patterned photoresist layer (not shown) on the structure of FIG. 14 using a photolithography process; (ii) performing an etching process on the silicon oxide layers 716 and 1416, the passivation layer 114, and the ARC 112 through the patterned photoresist layer to form an opening 1522, as shown in FIG. 15; (iii) depositing a substantially conformal layer of metal (not shown) on the top surface of the silicon oxide layer 1416, along the sidewalls of the opening 1522, and along the exposed backside surface 102B at the opening 1522; (iv) forming a patterned masking layer (not shown) on the deposited substantially conformal layer of metal; and (v) etching the deposited substantially conformal layer of metal through the patterned masking layer to form the structure of FIG. 16.

[0046] As shown in Figure 17, the formation of the metal shielding layer 122 may be followed by the formation of a silicon oxide layer 1716. In some embodiments, the formation of the silicon oxide layer 1716 may include depositing a layer of silicon oxide (not shown) on the structure of Figure 16 and performing a CMP process on the deposited silicon oxide layer to make a top surface of the silicon oxide layer 1716 substantially coplanar with a top surface of the metal shielding layer 122, as shown in Figure 17. The silicon oxide layers 716, 1416, 1716 may form the dielectric layer 116.

[0047] 3, color filters and microlenses are formed on the backside surface of the substrate in operation 330. For example, as shown in FIG 18, color filters 118A and 118B may be formed in the dielectric layer 116, and microlenses 120A and 120B may be formed on the color filters 118A and 118B, respectively.

[0048] FIG. 19 is a flow diagram of an example method 1900 for fabricating the BSI image sensor 200 shown in FIG. 2, according to some embodiments. For illustrative purposes, the operations depicted in FIG. 19 will be described with reference to an example manufacturing process for fabricating the BSI image sensor 200 as depicted in FIGS. 20-24. FIGS. 20-24 are cross-sectional views of the BSI image sensor 200 at various stages of fabrication, according to some embodiments. Operations may be performed in different orders or may not be performed depending on the particular application. It should be noted that the method 1900 may not provide a complete BSI image sensor 200. Thus, it should be understood that additional processes may be provided before, during, or after the method 1900, and other processes may only be briefly described herein. Elements in FIGS. 20-24 having the same numbers as elements in FIGS. 1-2 are described above.

[0049] With reference to Figure 19, acts 1905-1920 are similar to acts 305-320 of Figure 3. After act 1920, a structure is formed that is similar to the structure of Figure 14. Subsequent processing on the structure of Figure 14 in acts 1925-1930 will now be described with reference to Figures 20-24.

[0050] 19, a metal grid structure and a metal shielding layer are formed on the backside surface of the substrate in operation 1925. For example, a metal grid structure 226 and a metal shielding layer 122 are formed on the backside surface 102B as described with reference to FIGS. In some embodiments, the formation of the metal grid structure 226 and the metal shielding layer 122 may include the sequential operations of (i) forming a patterned photoresist layer (not shown) using a photolithography process on a structure similar to that of FIG. 14 ; (ii) performing an etching process on the silicon oxide layers 716 and 1416, the passivation layer 114, and the ARC 112 through the patterned photoresist layer to form an opening 2022, as shown in FIG. 20 ; (iii) depositing a substantially conformal metal layer 2122 on the top surface of the silicon oxide layer 1416, along the sidewalls of the opening 2022, and along the exposed backside surface 102B at the opening 1522, as shown in FIG. 21 ; (iv) forming a patterned masking layer (not shown) on the metal layer 2122; and (v) etching the metal layer 2122 through the patterned masking layer to form the structure of FIG. 22 . In some embodiments, the metal grid structure 226 may be formed in operation 1925 without forming the metal shielding layer 122. That is, the metal shielding layer 122 may not be formed in operation 1925.

[0051] As shown in Figure 23, the formation of the metal grid structure 226 and the metal shielding layer 122 may be followed by the formation of a silicon oxide layer 1716. In some embodiments, the formation of the silicon oxide layer 1716 may include depositing a layer of silicon oxide (not shown) on the structure of Figure 22 and performing a CMP process on the deposited layer of silicon oxide to make the top surface of the silicon oxide layer 1716 substantially coplanar with the top surfaces of the metal grid structure 226 and the metal shielding layer 122, as shown in Figure 23. The silicon oxide layers 716, 1416, 1716 may form the dielectric layer 116.

[0052] 19, color filters and microlenses are formed on the backside surface of the substrate in operation 1930. For example, as shown in FIG 24, color filters 118A and 118B may be formed in the dielectric layer 116, and microlenses 120A and 120B may be formed on the color filters 118A and 118B, respectively.

[0053] The present invention provides exemplary BSI image sensors (e.g., BSI image sensors 100 and 200) having isolation structures (e.g., DTI structure 110 and STI structure 108) between adjacent pixel structures (e.g., pixel structures 106A and 106B), and exemplary methods (e.g., methods 300 and 1900) for forming the BSI image sensors. In some embodiments, the BSI image sensor may include a stack of isolation structures disposed between adjacent pixel structures to optically isolate the adjacent pixel structures from one another. In some embodiments, the stack of isolation structures may include a shallow trench isolation (STI) structure disposed on a front surface (e.g., front surface 102F) of a substrate (e.g., substrate 102) of the BSI image sensor, and a deep trench isolation (DTI) structure disposed on and in physical contact with the STI structure.

[0054] In some embodiments, the DTI structure may extend about 80 nm to about 130 nm above the backside surface (e.g., backside surface 102B) of the BSI image sensor substrate. In some embodiments, the STI structure may include one or more dielectric layers, and the DTI structure may include a metal fill layer (e.g., metal fill layer 110A) and a dielectric liner (e.g., dielectric layers 110B and 110C) surrounding the metal fill layer. Including such a metal fill layer in the DTI structure and having the DTI structure extend above the backside surface of the substrate may substantially minimize or prevent crosstalk between adjacent pixel structures (e.g., pixel structures 106A and 106B), improving the quantum efficiency of the BSI image sensor.

[0055] In some embodiments, the quantum efficiency of the BSI image sensor can be further improved by including a trench region (e.g., trench regions 102Ga and 102Gb) on the backside surface of the substrate that is substantially aligned with the pixel structure. In some embodiments, by using the trench region in conjunction with the DTI structure, the quantum efficiency of the BSI image sensor for detecting light in the near infrared region (e.g., between wavelengths of about 800 nm and about 1000 nm) can be improved by about 0.5 to about 1.5 times compared to a BSI image sensor without the trench region and / or DTI structure.

[0056] In some embodiments, an optical device includes a substrate having a first surface and a second surface opposite the first surface, first and second radiation sensing elements disposed on the substrate, a first isolation structure disposed on the substrate between the first and second radiation sensing elements and having a first surface and a second surface opposite the first surface, and a second isolation structure disposed on the substrate on the first surface of the first isolation structure. The second isolation structure includes a metal structure and a dielectric layer surrounding the metal structure. The second isolation structure extends vertically above the first surface of the substrate.

[0057] According to some embodiments of the present invention, the second surface of the first isolation structure is substantially coplanar with the second surface of the substrate.

[0058] According to some embodiments of the present invention, the height of the second isolation structure is greater than the height of the first isolation structure.

[0059] According to some embodiments of the present invention, the width of the first isolation structure is greater than the width of the second isolation structure.

[0060] According to some embodiments of the invention, the second isolated structure extends vertically above the first surface of the substrate a distance of about 80 nm to about 130 nm.

[0061] According to some embodiments of the present invention, the dielectric layer is in physical contact with the first surface of the first isolation structure.

[0062] According to some embodiments of the present invention, the dielectric layer comprises an oxide layer surrounding the metal structure and a high-k dielectric layer surrounding the oxide layer, the materials of the oxide layer and the high-k dielectric layer being different from each other.

[0063] According to some embodiments of the present invention, the dielectric layer includes a silicon oxide layer surrounding the metal structure and a high-k dielectric layer including hafnium oxide and aluminum oxide surrounding the silicon oxide layer.

[0064] According to some embodiments of the present invention, the metal structure comprises tungsten or aluminum.

[0065] According to some embodiments of the present invention, the first surface of the substrate includes a groove region substantially aligned with the first and second radiation sensing elements.

[0066] According to some embodiments of the present invention, the groove region has a triangular cross-section.

[0067] According to some embodiments of the present invention, the optical device further comprises a buffer layer on the second isolation structure.

[0068] In some embodiments, an optical device includes a substrate having a front surface and a back surface, first and second pixel structures disposed on the substrate, an STI structure disposed between the first and second pixel structures, a DTI structure disposed on the STI structures, and a grid structure disposed on the back surface of the substrate and substantially aligned with the DTI structures, the DTI structure including a metal structure and a dielectric liner disposed along sidewalls of the metal structure and on the STI structures.

[0069] According to some embodiments of the present invention, the dielectric liner includes a silicon oxide layer surrounding the metal structure and a high-k dielectric layer including hafnium oxide and aluminum oxide surrounding the silicon oxide layer.

[0070] According to some embodiments of the present invention, the metal structure comprises tungsten or aluminum.

[0071] According to some embodiments of the present invention, the optical device further comprises a buffer layer between the metal structure and the grid structure.

[0072] In some embodiments, a method includes forming first and second radiation sensing elements through a first surface of a substrate, forming a first isolation structure between the first and second radiation sensing elements through the first surface of the substrate, forming a groove region on a second surface of the substrate opposite the first surface of the substrate, forming an isolation trench through the second surface of the substrate on the first isolation structure, forming a dielectric layer in the isolation trench, and forming a metal layer on the dielectric layer, the dielectric layer extending vertically above the second surface of the substrate.

[0073] According to some embodiments of the present invention, forming the dielectric layer includes depositing a high-k dielectric layer along the sidewalls of the isolation trench and over the first isolation structure, and depositing an oxide layer over the high-k dielectric layer, the materials of the oxide layer and the high-k dielectric layer being different from each other.

[0074] According to some embodiments of the present invention, the method further includes forming a grid structure on the metal layer.

[0075] According to some embodiments of the present invention, the method further comprises forming a buffer layer between the metal layer and the grid structure.

[0076] The foregoing outlines features of several embodiments to better enable those skilled in the art to understand aspects of the present invention. Those skilled in the art should appreciate that this disclosure may readily be used as a basis for designing or modifying other processes and structures to carry out the same purposes and / or achieve the same advantages as the embodiments presented herein. Those skilled in the art should also appreciate that such equivalent structures do not depart from the spirit and scope of the present invention, and that various modifications, substitutions, and alterations may be made without departing from the spirit and scope of the present invention. [Industrial Applicability]

[0077] The present invention provides a smaller, more compact BSI image sensor with improved quantum efficiency. [Explanation of symbols]

[0078] 100, 200: BSI image sensors, optical devices 102: Substrate 102B: Back surface 102F: Front surface 102Ga: First array of periodic groove regions 102Gb: Second array of periodic groove regions 104: Interconnect structure 104A: Intermetal Dielectric (IMD) layer 104B: Metal wire 104C: Metal vias 104D: Sensing element 105A, 105B: pixel area 106A, 106B: pixel structure 107: Stack of isolated structure 108:STI structure 110:DTI structure 110A: Metal filled layer 110B: Dielectric layer 110C, 910: high-k dielectric layer 112: Anti-Reflection Coating (ARC) 114: Passivation layer 116: Dielectric layer 118A, 118B: Color filters 120A, 120B: Microlenses 122: Metal shielding layer 124: Radiation beam 226: Metal grid structure 300, 1900: Method 305, 310, 315, 320, 325, 330, 1905, 1910, 1915, 1920, 1925, 1930: Operation 716, 1416: 1716: Silicon oxide layer 810: Isolation trench 1010: oxide layer 1210, 2122: Metal layer 1522, 2022:Aperture A: Angle D1, D2: distance H1, H2: Height W1, W2: Width T1, T2, T3, T4, T5, T6: Thickness X, Y, Z: Axes

Claims

1. a substrate including a first surface and a second surface opposite the first surface, the first surface of the substrate being a light incidence surface; a first radiation sensing element and a second radiation sensing element provided on the substrate; an anti-reflective coating disposed on the first surface of the substrate; a passivation layer disposed on the anti-reflective coating; a first dielectric layer disposed on the passivation layer; a first isolation structure disposed on the substrate between the first radiation sensing element and the second radiation sensing element, the first isolation structure having a first surface and a second surface opposite the first surface; A metal structure; a second dielectric layer surrounding the metal structure; Including, a second isolation structure disposed on the first surface of the first isolation structure in the substrate; Including, the first dielectric layer includes a first layer, a second layer, and a third layer, the first layer being in physical contact with the passivation layer, the second layer being disposed on the first layer and the second isolation structure, and the third layer being disposed on the second layer; the second isolation structure protrudes from the first surface of the substrate, extends vertically above the first surface, extends through the anti-reflective coating and the passivation layer, and extends into the first layer of the first dielectric layer; the first layer of the first dielectric layer has a first top surface and a second top surface lower than the first top surface, the first top surface of the first dielectric layer being coplanar with a top surface of the second isolation structure; Optical devices.

2. the second surface of the first isolation structure is coplanar with the second surface of the substrate. The optical device of claim 1 .

3. the second dielectric layer being in physical contact with the first surface of the first isolation structure; The optical device of claim 1 .

4. the first surface of the substrate includes a groove region aligned with the first radiation sensing element and the second radiation sensing element. The optical device of claim 1 .

5. a substrate including a front surface and a back surface, the back surface being a light incidence surface; a first pixel structure and a second pixel structure provided on the substrate; an anti-reflective coating disposed on the back surface of the substrate; a passivation layer disposed on the anti-reflective coating; a dielectric layer disposed on the passivation layer; a shallow trench isolation structure provided between the first pixel structure and the second pixel structure; A metal structure; a dielectric liner disposed along a sidewall of the metal structure and over the shallow trench isolation structure; Including, a deep trench isolation structure provided on the shallow trench isolation structure; the deep trench isolation structure provided on the backside surface of the substrate; Aligned grid structure and Including, the dielectric layer includes a first layer, a second layer, and a third layer, the first layer being in physical contact with the passivation layer, the second layer being disposed on the first layer and the deep trench isolation structure, and the third layer being disposed on the second layer; the deep trench isolation structure protrudes from the backside surface of the substrate, extends vertically above the backside surface, through the anti-reflective coating and the passivation layer, and into the first layer of the dielectric layer; the first layer of the dielectric layer has a first upper surface and a second upper surface lower than the first upper surface, the first upper surface of the dielectric layer being coplanar with a top surface of the deep trench isolation structure; Optical devices.

6. The dielectric liner is a silicon oxide layer surrounding the metal structure; a high-k dielectric layer including hafnium oxide and aluminum oxide surrounding the silicon oxide layer; Including, 6. The optical device according to claim 5.

7. the metal structure comprises tungsten or aluminum; 6. The optical device according to claim 5.

8. forming a first radiation sensing element and a second radiation sensing element through a first surface of a substrate; forming a first isolation structure between the first radiation sensing element and the second radiation sensing element through the first surface of the substrate; forming a groove region on a second surface of the substrate opposite the first surface of the substrate; forming an anti-reflective coating on the second surface of the substrate; forming a passivation layer over the antireflective coating; forming a first layer of a first dielectric layer over the passivation layer; forming an isolation trench through the second surface of the substrate, the antireflective coating, the passivation layer, and the first layer of the first dielectric layer onto the first isolation structure; forming a second dielectric layer in the isolation trench, the second dielectric layer extending vertically above the second surface of the substrate and in contact with the antireflective coating, the passivation layer, and the first of the first dielectric layers; forming a metal layer on the second dielectric layer; forming a second layer of the first dielectric layer on the first layer, the second dielectric layer, and the metal layer; forming a third layer of the first dielectric layer on the second layer of the first dielectric layer; Including, the second surface is a light incidence surface; the first layer of the first dielectric layer has a first top surface and a second top surface lower than the first top surface, the first top surface of the first dielectric layer being coplanar with a top surface of the second dielectric layer and a top surface of the metal layer; method.

9. forming the second dielectric layer depositing a high-k dielectric layer along sidewalls of the isolation trench and over the first isolation structure; depositing an oxide layer over the high-k dielectric layer; Including, the oxide layer and the high-k dielectric layer are made of different materials; The method according to claim 8.

10. The method of claim 1, further comprising forming a grid structure on the second layer of the first dielectric layer and aligning the grid structure with a second isolation structure comprising the second dielectric layer and the metal layer. The method according to claim 8.

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