Display device

Abstract

To provide a display device suitable for an increase in size and to provide a high-resolution display device.SOLUTION: The display device supplies the same selection signal to two adjacent gate lines next to each other. Two pixels adjacent to each other in a column direction connect different source lines. One of the two source lines is overlapped with a conductive layer which functions as a pixel electrode. Further, a part of the semiconductor layer of a transistor is provided between the two source lines.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, and a , electronic device, lighting device, input device, input / output device, driving method thereof, or manufacturing method thereof The law can be cited as one example.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general. Transistors, semiconductor circuits, arithmetic units, memory devices, etc. are all types of semiconductor devices. In addition, it is also used in imaging devices, electro-optical devices, power generation devices (thin-film solar cells, organic thin-film solar cells, etc.) etc.), and electronic devices may include semiconductor devices. [Background technology]

[0004] In recent years, there has been a demand for high-resolution display devices. In televisions, the resolution is full HD (19 pixels). 20 x 1080) is the mainstream, but 4K (3840 x 2160 pixels) The development of high-resolution display devices such as 8K (7680 x 4320 pixels) is progressing. is.

[0005] A liquid crystal display device is known as one type of display device. The contrast is improved by controlling the amount of light transmitted from the backlight using the optical modulation effect of the crystal. It represents the object and displays the image.

[0006] Also, as a type of field effect transistor, a semiconductor formed on a substrate having an insulating surface is A thin-film transistor in which a channel region is formed using a thin film is known. uses amorphous silicon for the semiconductor film used in the channel region of a thin film transistor. For example, in the case of a liquid crystal display device, a thin film transistor is a switch for each pixel. It is used as a switching transistor.

[0007] A metal oxide is used as a channel forming region for a switching element connected to each pixel electrode. An active matrix type liquid crystal display device using a transistor is known (see Patent Document 1). Reference 2 and Patent Document 3). [Prior art documents] [Patent documents]

[0008] [Patent Document 1] JP 2001-053283 A [Patent Document 2] JP 2007-123861 A [Patent Document 3] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0009] Amorphous silicon (hereafter also referred to as amorphous silicon) and metal oxides (oxide semiconductors) Transistors using GaN (also called GaN) have a higher yield than transistors using polycrystalline silicon. It has the advantage of being highly productive and easy to fabricate on large substrates. It is difficult to increase the field effect mobility compared to the transistors that have been used in the past. When a large load is connected, it may be difficult to operate at a high drive frequency.

[0010] The trend towards larger screens is becoming more common in television equipment, monitors, digital signage, and other applications. In addition, in order to display smooth moving images, it is necessary to increase the frame frequency. However, the higher the resolution or the larger the screen size, the more negative effects In some cases, the load increases significantly, making it difficult to operate at a high frame frequency.

[0011] An object of one embodiment of the present invention is to provide a display device with high resolution. It is an object of the present invention to realize a display device suitable for miniaturization. Another object of the present invention is to provide a display device having a pixel structure in which a source line and a gate line are divided. Another object of the present invention is to realize a display device having high resolution without any problem. An object of the present invention is to realize a high-resolution display device by using a liquid crystal display.

[0012] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter can be extracted from descriptions in the specification, drawings, claims, etc. [Means for solving the problem]

[0013] One embodiment of the present invention is a semiconductor device including first to fourth wirings, a first transistor, and a second transistor. The display device has a third wiring and a fourth conductive layer. The wirings each extend in a first direction and are arranged in a second direction intersecting the first direction, and The first wiring and the second wiring are respectively connected to the second wiring. The first transistor extends in the first direction and is arranged in the first direction. The first transistor has a gate connected to the third one of the source and drain is electrically connected to the first wiring; and The other of the source and drain is electrically connected to the first conductive layer. The gate of the transistor is electrically connected to the fourth wiring, and either the source or the drain is electrically connected to the second wiring. and the other of the source and drain is electrically connected to the second conductive layer. The first conductive layer and the second conductive layer each have a portion overlapping with a portion of the second wiring. Different signals are supplied to the first and second wirings, and different signals are supplied to the third and fourth wirings. Each line is supplied with the same selection signal.

[0014] In the above, a liquid crystal layer and a first colored layer are provided so as to overlap with the first conductive layer. and further comprising a liquid crystal layer and a second colored layer superposed on the second conductive layer. In this case, the first colored layer and the second colored layer preferably transmit light of the same color. It is preferable.

[0015] In the above, a fifth wiring, a sixth wiring, a third transistor, a fourth transistor, It is preferable that the fifth conductive layer has a transistor, a third conductive layer and a fourth conductive layer. The wiring and the sixth wiring extend in the second direction. The third transistor has a gate Electrically connected to the third wiring, and either the source or the drain is electrically connected to the fifth wiring. The other of the source and the drain is electrically connected to the third conductive layer. The transistor has a gate electrically connected to the fourth wiring, and either the source or the drain is connected to the sixth wiring. The other of the source and drain is electrically connected to the fourth conductive layer. The third conductive layer and the fourth conductive layer are each overlapped with a part of the sixth wiring. In addition, different signals are supplied to the fifth wiring and the sixth wiring. is preferred.

[0016] In the above, a liquid crystal layer and a third colored layer are overlapped with the third conductive layer, It is preferable that the fourth conductive layer and the fourth colored layer are overlapped with each other. The third colored layer and the fourth colored layer transmit light of the same color and have a different color from the first colored layer. It is preferable that the light transmits light of a certain color.

[0017] In the above, the fifth wiring is configured to be located between the second wiring and the sixth wiring. Alternatively, the sixth wiring is preferably located between the second wiring and the fifth wiring. It is preferable to set the above.

[0018] In the above, the first semiconductor layer of the first transistor and the second transistor The second semiconductor layer of each of the semiconductor devices is a portion located between the first wiring and the second wiring. It is preferred that the compound has the formula:

[0019] In the above, the first semiconductor layer and the second semiconductor layer each contain a metal oxide. It is preferable to do so.

[0020] Alternatively, the first semiconductor layer and the second semiconductor layer are made of amorphous silicon, microcrystalline silicon, or the like. It is preferable that the insulating layer contains silicon or polycrystalline silicon.

[0021] In the above, a capacitor element electrically connected to the first transistor is further provided. In this case, it is preferable that the capacitance element is located between the first wiring and the second wiring. It is preferable that the second conductive layer has a portion overlapping with the first conductive layer.

[0022] In the above, the capacitance element is a fifth conductive film having a function of transmitting visible light. It is preferable that the insulating layer has a sixth conductive layer. Effect of the Invention

[0023] According to one embodiment of the present invention, a display device suitable for large size can be realized. It is possible to provide a display device with high resolution or a display device with improved productivity. Alternatively, a high-resolution display device can be realized without dividing the source lines and gate lines. Alternatively, a high-resolution display device can be realized by using amorphous silicon or the like.

[0024] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. can be extracted from descriptions in the specification, drawings, claims, etc. [Brief description of the drawings]

[0025] [Figure 1] 1 shows an example of the configuration of a display device. [Diagram 2] 1 shows an example of the configuration of a display device. [Diagram 3] 1 shows an example of the configuration of a display device. [Figure 4] 1 shows an example of the configuration of a display device. [Diagram 5] 1 shows an example of the configuration of a display device. [Figure 6] 1 shows an example of the configuration of a display device. [Figure 7] 1 shows an example of the configuration of a display device. [Figure 8] 1 shows an example of the configuration of a display device. [Figure 9] 1 shows an example of the configuration of a display device. [Figure 10] 1 shows an example of the configuration of a display device. [Figure 11] 1 shows an example of the configuration of a display device. [Figure 12] 1 shows an example of the configuration of a display device. [Figure 13] An example of a transistor configuration. [Figure 14] 1 shows an example of the configuration of a display device. [Figure 15] 1 shows an example of the configuration of a display device. [Figure 16] 1 shows an example of the configuration of a display device. [Figure 17] 1 shows an example of the configuration of a display device. [Figure 18] An example of a transistor configuration. [Figure 19] 1 shows an example of the configuration of a display device. [Figure 20] 1A to 1C are diagrams illustrating a laser irradiation method and a laser crystallization apparatus. [Figure 21] 1A to 1C are diagrams illustrating a laser irradiation method. [Figure 22] Example of electronic device configuration. [Figure 23] 2 shows an example of the configuration of a television device according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various changes and modifications may be made in the form and details without departing from the spirit and scope of the present invention. It will be easily understood by those skilled in the art that the present invention can be realized by the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0027] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and the repeated explanations are omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be used.

[0028] In each figure described in this specification, the size, layer thickness, or area of ​​each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.

[0029] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The numbers are added for the purpose of convenience and are not intended to be limiting.

[0030] A transistor is a type of semiconductor device that controls the amplification of current or voltage and the conduction or non-conduction of electricity. In this specification, the transistor can realize a switching operation that controls the , IGFET(Insulated Gate Field Effect Trans istor) and thin film transistor (TFT: Thin Film Transistor ).

[0031] In addition, the functions of "source" and "drain" may differ when using transistors with different polarities. In some cases, such as when the direction of the current changes during circuit operation, the two may be interchanged. Therefore, in this specification, the terms "source" and "drain" may be used interchangeably. It is possible.

[0032] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. Switching elements such as inverters, resistor elements, coils, capacitor elements, and other elements with various functions This includes children, etc.

[0033] In this specification, a display panel, which is one aspect of a display device, displays (outputs) images on a display surface. Therefore, the display panel is one aspect of an output device.

[0034] In the present specification, the substrate of the display panel is provided with, for example, an FPC (Flexible Printed Circuit). inted Circuit) or TCP (Tape Carrier Packa ge) or COG (Chip On Gauge) connectors attached to the board. Display module is a device that has ICs mounted using a method such as display glass. It may be called a display panel, a display unit, or simply a display panel.

[0035] In addition, in this specification, a touch sensor is a sensor that is touched by a detection object such as a finger or a stylus. It has the function of detecting pressing or approaching. It also has the position information Therefore, the touch sensor is one aspect of the input device. For example, a touch sensor may include one or more sensor elements.

[0036] In addition, in this specification and the like, a substrate having a touch sensor is referred to as a touch sensor panel or a single In this specification, the base of the touch sensor panel is A board with a connector, such as FPC or TCP, attached, or a substrate A touch sensor panel module is a device that has an IC mounted on it using a COG method or other methods. It may be called a sensor module, a sensor module, or simply a touch sensor.

[0037] In this specification and the like, a touch panel, which is one aspect of a display device, is a device for displaying images, etc. on a display surface. The function is to display (output) and to detect when a finger, stylus, or other object touches or presses the display surface. It also has a function as a touch sensor that detects the approach of the user. A touch panel is one type of input / output device.

[0038] The touch panel is, for example, a display panel (or display device) with a touch sensor, It can also be called a display panel (or display device) with a display function.

[0039] The touch panel may also have a display panel and a touch sensor panel. Alternatively, the display panel may have a touch sensor function inside or on its surface. It is also possible.

[0040] In the present specification, the substrate of the touch panel is provided with a connector such as an FPC or TCP. Those with connectors attached, or those with ICs mounted on the board using the COG method, etc. When called a touch panel module, a display module, or simply a touch panel, There is.

[0041] (Embodiment 1) In this embodiment, a display device according to one embodiment of the present invention will be described.

[0042] One embodiment of the present invention is a display region (also called a pixel portion) in which a plurality of pixels are arranged in a matrix. The pixel portion includes a wiring (a gate line or a scanning line) through which a selection signal is supplied. The signal to be written to the pixel (also called a video signal) is supplied via a wiring (so In this case, a plurality of gate lines, signal lines, data lines, etc. are provided. The gate lines and the source lines are arranged in parallel to each other, and the gate lines and the source lines are arranged in parallel to each other. They intersect.

[0043] A pixel includes at least one transistor and one display element. The element has a conductive layer that functions as a pixel electrode. The conductive layer is a source or The gate is electrically connected to one of the drains. The other of the source and drain is electrically connected to a source line.

[0044] Here, the extension direction of the gate lines is defined as the row direction or the first direction, and the extension direction of the source lines is defined as the column direction or the second direction. We will call this the first direction or the second direction.

[0045] Here, it is preferable that the same selection signal is supplied to two adjacent gate lines. In other words, it is preferable that the selection periods of these gate lines are the same. Using one set is preferable because it simplifies the configuration of the drive circuit.

[0046] When the same selection signal is supplied to two gate lines, two adjacent pixels in the column direction are simultaneously Therefore, these two pixels are connected to different source lines. That is, two source lines are arranged for each column.

[0047] Here, one of the two source lines is a conductive line that functions as a pixel electrode. It is preferable that the other source line is disposed so as not to overlap the pixel electrode. This allows the two source lines to be spaced apart without changing the definition. Therefore, the parasitic capacitance between them can be reduced. In this case, the length of the two parallel wires is long, so it is very effective to separate them. In addition, since one source line is arranged between pixel electrodes, The distance between two adjacent pixel electrodes can be reduced.

[0048] In addition, between the two source lines that are connected to the pixels in the same column, It is preferable that a portion is provided between each source line and each semiconductor layer. Therefore, the nodes between the source lines can be configured not to cross other source lines. The parasitic capacitance can be reduced.

[0049] By adopting such a configuration, one horizontal period can be made longer than in the past. For example, When the same selection signal is supplied to two gate lines, the length of one horizontal period is doubled. Furthermore, the parasitic capacitance between source lines can be reduced, so the load on the source lines can be reduced. This allows for extremely high resolution displays such as 4K and 8K. Even in such a device, it is possible to operate it using transistors with low field effect mobility. In addition, the screen size must be 50 inches or more, 60 inches or more, or 70 inches or more. The above-mentioned configuration can be applied to the above-mentioned large-sized display device.

[0050] In addition, in the transistor provided in each pixel, a metal It is preferable to use an oxide (oxide semiconductor). This allows the field effect mobility of the transistor to be increased compared to when the This allows the size (occupancy area) of the source line and the gate line to be reduced. The raw capacity can be reduced.

[0051] In addition, the semiconductor material used for the semiconductor layer of the transistor is amorphous silicon, When using a material that is difficult to increase the field effect mobility, the electrical resistance and capacitance of each source line By making the amount as small as possible, it is possible to drive a higher frame frequency or a larger display device. For example, the source line can be made of a low-resistance material (e.g., copper, aluminum). miniature, thickening the source line and increasing the width, and connecting the source line and other wiring. By making the interlayer insulating film between the lines thicker and reducing the area of ​​intersections between the source lines and other wiring Examples include:

[0052] A more specific example of the display device will be described below with reference to the drawings.

[0053] [Example of display device configuration] FIG. 1 is a block diagram of a display device 10 according to one embodiment of the present invention. The display device 10 includes: Pixel area (display area), source driver, and gate driver and a Gate Driver.

[0054] FIG. 1 shows an example in which there are two gate drivers on either side of the pixel region. A plurality of gate lines GL0 are connected to each gate driver. The gate line GL0(i) is a gate line that is connected to two gate lines (gate lines G L(i) and the gate line GL(i+1). The same selection signal is applied to the gate lines of

[0055] A number of source lines are connected to the source driver. In FIG. 1, two source lines (source lines SL L (j), source line SL R (j)) and two source lines (s Base line SL L (j+1), source line SL R (j+1)) and the j+2th pixel column The two source lines (source lines SL L (j+2), source line SL R (j+2) do.

[0056] Each pixel PIX has at least one transistor and functions as a pixel electrode of a display element. The pixel PIX corresponds to one color. Therefore, when a color display is performed by mixing the colors of light emitted by multiple pixels, the pixel PIX is They can also be called sub-pixels.

[0057] In addition, each of the pixels arranged in a row in the column direction is a pixel that exhibits the same color. When a liquid crystal element is used as the display element, it is preferable that the pixels arranged in a row in the column direction The liquid crystal display has a structure in which a colored layer that transmits light of the same color as the liquid crystal element is provided so as to overlap the liquid crystal element.

[0058] For example, the jth pixel column is a pixel that exhibits red color, and the j+1th pixel column is a pixel that exhibits green color. The j+2th pixel column is a pixel that exhibits blue color. In FIG. 1, to clearly indicate this, the symbols R, G, and B are used.

[0059] Here, one of the two source lines corresponding to one pixel column is It is preferable that the source line SL overlaps with the conductive layer 21. In FIG. R (j) etc. overlap with the conductive layer 21. Further, the source line overlapping with the conductive layer 21 is It is preferable to place the source line SL in the vicinity of the center of the conductive layer 21. L (j) and Source line SL R (j) Interval and source line SL R (j) and the source line connected to the adjacent pixel column SL L It is preferable to arrange the source lines so that the intervals between the source lines (j+1) are approximately the same. That is, by arranging the source lines at approximately equal intervals, the parasitic capacitance generated between the source lines is reduced. This reduces the amount of charge and the load per source line.

[0060] Here, in the case of a transistor such as amorphous silicon, where it is difficult to increase the field effect mobility, When applying a digital camera to a display device, a method of achieving high resolution is to divide the display area of ​​the display device into multiple pixel areas. In this driving method, for example, the source line and the gate However, in the above method, the characteristics of the driving circuit are Due to the unevenness of the image, the boundaries between the divided pixel areas are visible, reducing visibility. In addition, image processing to divide the input image data in advance may be required. This requires high-speed, large-scale image processing devices.

[0061] On the other hand, the display device of one embodiment of the present invention uses a transistor with relatively low field-effect mobility. Even in this case, it is possible to drive the display area without dividing it.

[0062] In particular, by using a transistor including an oxide semiconductor, the following For example, the size (area) of the transistor can be reduced, The parasitic capacitance of the transistor itself can be reduced. Compared to the conventional method, the aperture ratio can be improved, or the wiring width can be increased without sacrificing the aperture ratio. In addition, the on-state current of the transistor can be increased. This reduces the time required to write to the pixel. This shortens the charge / discharge period of the signal lines, making it possible to increase the frame frequency.

[0063] Furthermore, transistors using oxide semiconductors have Since the off-current can be made extremely small, the retention period of the potential written to the pixel can be extended, It is also possible to lower the frame frequency. For example, the frame frequency can be set to 0.1 Hz or higher. It can be made variable within a range of 80Hz or less. In television equipment, etc., The frame frequency is 30Hz to 240Hz, preferably 60Hz to 120Hz. It is preferable to do so.

[0064] Another advantage of using a transistor with extremely low off-state current is that it reduces the pixel storage capacitance. This allows the aperture ratio of the pixel to be increased and the pixel writing This can shorten the time required for writing.

[0065] In FIG. 1, an example is shown in which the source driver is arranged along one side of the pixel area. Source drivers may be arranged along two opposing sides of the region so as to sandwich the pixel region.

[0066] In FIG. 2A, of the two source lines corresponding to one pixel column, the source line located on the left S line SL L (j) and the source driver IC connected to the source line SL located on the right side. R ( j) and a source driver IC connected thereto are arranged facing each other. By adopting such a configuration, even in a large display device, the potential drop caused by the wiring resistance can be prevented. In addition, the display unevenness caused by the configuration shown in FIG. Compared to the previous configuration, the number of source driver ICs arranged on one side of the pixel area can be halved, This allows the area in which two source driver ICs can be arranged to be increased. This allows the distance between the two source driver ICs to be increased, improving production yields. can.

[0067] FIG. 2(B) shows an example in which the transistor connection method in FIG. 2(A) is changed. In FIG. 2B, the left side of the figure shows the multiple transistors connected to one gate line. The transistor connected to the source line on the left and the transistor connected to the source line on the right are alternately connected. They are arranged in a mutually reciprocal arrangement.

[0068] In FIG. 2A, multiple pixels connected to the same gate line are connected to a pair of source driver ICs. Therefore, the upper source driver IC drives the The rows driven by the source driver IC on the lower side are arranged alternately in the column direction. This makes it possible to reduce display unevenness caused by variations in the characteristics of source driver ICs.

[0069] On the other hand, in FIG. 2B, multiple pixels connected to the same gate line are The upper and lower source driver ICs are alternately driven by the The pixels driven by the source driver IC on the upper side and the pixels driven by the source driver IC on the lower side are The source driver is arranged in a row and a column. This makes it possible to more effectively reduce display unevenness caused by variations in the characteristics of driver ICs.

[0070] [Pixel configuration example] An example of the configuration of pixels arranged in the pixel region of the display device 10 will be described below.

[0071] FIG. 3A shows a circuit diagram including four pixels arranged in the row and column directions.

[0072] Each pixel includes a transistor 30, a liquid crystal element 20, and a capacitor 60.

[0073] The wirings S1 and S2 correspond to source lines, and the wirings G1 and G2 correspond to Each of them corresponds to a gate line. The wiring CS is electrically connected to one electrode of the capacitance element 60. , a predetermined potential is applied.

[0074] A pixel is formed by one of the wirings S1 and S2, and one of the wirings G1 and G2. In FIG. 3A, the pixel connected to the wiring S1 is called a pixel PI The pixel connected to X1 and wiring S2 is designated as pixel PIX2.

[0075] As an example, pixel PIX1 will be described. The gate of transistor 30 is connected to line G1 One of the source and drain is electrically connected to the wiring S1, and the other is The other electrode of the liquid crystal element 60 is electrically connected to one electrode (pixel electrode) of the liquid crystal element 20. A common potential is supplied to one electrode of the capacitance element 60.

[0076] In the configuration shown in FIG. 3A, pixels of the same configuration are arranged in a row in the row direction, and Pixels with different configurations are arranged alternately in columns. On the other hand, as shown in Figure 3(B), In addition, pixels having different configurations may be arranged alternately in the row direction.

[0077] FIG. 3C shows an example of the layout of the pixel PIX1 connected to the wiring S1 and the wiring G1. is doing.

[0078] As shown in FIG. 3C, the wiring G1 and the wiring CS extend in the row direction (horizontal direction) and The wiring S1 and the wiring S2 extend in the vertical direction.

[0079] In the transistor 30, a semiconductor layer 32 is provided on the wiring G1. A part of the wiring S1 functions as a gate electrode. The semiconductor layer 32 has a region located between the wiring S1 and the wiring S2. .

[0080] The other of the source electrode or drain electrode of the transistor 30 and a pixel electrode The conductive layer 21 is electrically connected via a connection portion 38. A colored layer 41 is provided at the position where the colored layer 41 is to be formed.

[0081] The conductive layer 21 has a portion overlapping the wiring S2. It is preferable that the wiring S1 does not overlap with the wiring S2. This can reduce the parasitic capacitance of the wiring S1.

[0082] Here, the distance between the wiring S1 and wiring S2 in the same pixel column is D1, and the distance between the wiring S2 and the adjacent pixel is When the distance of the wiring S1 connected to the wiring S1 is set to D2, the distance D1 and the distance D2 are set to be approximately equal. For example, the ratio of the distance D2 to the distance D1 (i.e., the value of D2 / D1) is preferably set as follows: It is preferable that the ratio is 0.8 or more and 1.2 or less, and more preferably 0.9 or more and 1.1 or less. This makes it possible to reduce the parasitic capacitance between the wiring S1 and the wiring S2.

[0083] In addition, by increasing the distance between the wirings, dust and other particles do not adhere to the wirings during the manufacturing process. In this case, the cleaning method can be easily removed by cleaning, thereby improving the yield. When a line cleaning device is used as a method for cleaning the substrate, the substrate is moved along the direction in which the wiring S1 extends. It is preferable to wash the surface while stirring the surface, since this makes it easier to remove dust.

[0084] In addition, in FIG. 3C, the wiring S1 and the wiring S2 have portions that are thicker than the other portions. This makes it possible to reduce the wiring resistance.

[0085] FIG. 3D shows an example of the layout of the pixel PIX2 connected to the wiring S2. In this example, the pixel PIX2 is connected to the line S2 and the line G2.

[0086] In FIG. 3D, the semiconductor layer 32 provided on the wiring G2 is electrically connected to the wiring S2. The wiring S1 and the wiring S2 are connected to each other and have a region located between the wiring S1 and the wiring S2.

[0087] The pixels shown in FIGS. 3C and 3D are arranged in a row in the column direction. If two pixels are adjacent in the row direction, they are considered to have the same color. In the case of two pixels arranged in a row in the column direction, it is preferable that the pixels have the following colors: A colored layer 41 that transmits light of the same color is disposed on the area where each conductive layer 21 overlaps. On the other hand, in the case of two pixels adjacent in the row direction, the conductive layers 21 A colored layer 41 that transmits light of a different color is disposed in the overlapping area.

[0088] [Variation 1] Here, by using a light-transmitting material for the pair of electrodes constituting the capacitor element 60, It is possible to increase the aperture (effective transmittance area rate).

[0089] In FIG. 4A, a pair of electrodes constituting a capacitance element 60 includes a conductive layer 31bt and a conductive layer 3 Here, the conductive layer 31bt and the conductive layer 33bt are The conductive layer 31bt contains a material that transmits visible light. The conductive layer 31bt is electrically connected to the wiring CS. The conductive layer 33bt is the other of the source electrode and the drain electrode of the transistor 30, The insulating layer 22 is electrically connected to a conductive layer 21 which functions as a pixel electrode.

[0090] FIG. 4B shows the layout shown in FIG. 4A with a light-shielding region 40s that blocks visible light. In this example, the transparent region 40t that transmits visible light is shown as a separate region. The area where the capacitance element 60 is provided can also be used as the transmission area 40t, so that the aperture ratio This improves the efficiency and reduces power consumption.

[0091] In FIG. 4C, a part of the conductive layer 33bt constituting the capacitance element 60 is This is an example in which the conductive layer 33 serves as the other of the source electrode and the drain electrode. A portion of bt overlaps with a portion of the semiconductor layer 32 and is electrically connected thereto.

[0092] This makes it possible to further increase the area of ​​the transmission region 40t, as shown in FIG. 4(D). In FIG. 4D, the light-shielding region 40s is made up of wirings S1 to S4 and wiring G. Therefore, the upper surface shape of the transparent region 40t is approximately symmetrical. This allows the shape of the display area to be roughly determined for two types of pixels arranged in a row in the column direction. It is possible to make them substantially equal, and thus to suppress the occurrence of display unevenness.

[0093] Here, the higher the ratio of the area of ​​the transmissive region 40t to the area occupied by one pixel, the greater the transmissive area. For example, the ratio of the surface area of ​​the transparent region to the surface area of ​​the pixel can be increased. The ratio of the product is 1% or more and 95% or less, preferably 10% or more and 95% or less, and more preferably 1 It can be 5% or more and 95% or less. In particular, it is preferable to set it to 30% or more or 50% or more. This is preferable. As a result, a display device with low power consumption can be realized. The area occupied by a pixel is For example, it can be calculated by dividing the area of ​​the pixel region by the total number of pixels.

[0094] [Modification 2] 5 shows an example of a transistor 30 having a different shape. The transistor shown in FIG. 30, one of the source electrode and the drain electrode on the semiconductor layer 32 has a substantially arcuate shape. The other of the source electrode and the drain electrode is disposed on the semiconductor layer 32 at a position substantially on a circular arc. The electrodes are arranged so that the distance between them is constant. The channel width of the transistor 30 can be increased, allowing a larger current to flow. The transistor 30 is configured as described above, particularly when the semiconductor layer 32 is made of amorphous silicon. This is suitable when using a

[0095] [Cross-section example 1] An example of a cross-sectional configuration of a display device will be described below.

[0096] [Cross-sectional configuration example 1-1] FIG. 6 shows an example of a cross section corresponding to the cutting line A1-A2 in FIG. 6 shows an example in which a transmissive liquid crystal element 20 is used as a display element. The plate 12 side is the display surface side.

[0097] The display device 10 has a configuration in which a liquid crystal 22 is sandwiched between a substrate 11 and a substrate 12. The liquid crystal element 20 includes a conductive layer 21 provided on the substrate 11 side and a conductive layer 22 provided on the substrate 12 side. The liquid crystal 22 is sandwiched between the conductive layer 21 and the liquid crystal 23. An alignment film 24a is provided between the liquid crystal 22 and the conductive layer 23, and an alignment film 24b is provided between the liquid crystal 22 and the conductive layer 23. There are.

[0098] The conductive layer 21 functions as a pixel electrode, and the conductive layer 23 functions as a common electrode, etc. In addition, both the conductive layer 21 and the conductive layer 23 have a function of transmitting visible light. The liquid crystal element 20 is a transmissive liquid crystal element.

[0099] A colored layer 41 and a light-shielding layer 42 are provided on the surface of the substrate 12 facing the substrate 11. An insulating layer 26 is provided covering the light shielding layer 41 and the light shielding layer 42, and a conductive layer 23 is provided covering the insulating layer 26. The colored layer 41 is provided in an area where it overlaps with the conductive layer 21. is provided to cover the transistor 30 and the connection portion 38.

[0100] A polarizing plate 39a is disposed on the outer side of the substrate 11, and a polarizing plate 39 is disposed on the outer side of the substrate 12. Further, a backlight unit 90 is disposed on the outer side of the polarizing plate 39a. It is provided.

[0101] A transistor 30, a capacitance element 60, etc. are provided on the substrate 11. Transistor The transistor 30 functions as a selection transistor for the pixel. The liquid crystal element 20 is electrically connected thereto.

[0102] The transistor 30 shown in FIG. 6 is a transistor having a so-called bottom gate channel etch structure. The transistor 30 includes a conductive layer 31a functioning as a gate electrode and a gate The insulating layer 34 functions as an insulating layer, the semiconductor layer 32, and the source and drain electrodes. The semiconductor layer 32 has a pair of conductive layers 33a and 33b that function as a conductive layer. The portion overlapping with the conductive layer 31a functions as a channel forming region. a or conductive layer 33b.

[0103] The conductive layer 31a corresponds to a part of the wiring G1 in FIG. 3(C), and the conductive layer 33a corresponds to , which correspond to a part of the wiring S1. In addition, the conductive layer 31b and the conductive layer 33c, which will be described later, Corresponds to wiring CS and wiring S2.

[0104] The semiconductor layer 32 is made of a metal oxide having semiconductor properties (also called an oxide semiconductor). It is preferable that a transistor using an oxide semiconductor is used. This eliminates the need for the crystallization process that was previously necessary, and allows transistors to be formed on large substrates with good yield. Furthermore, a transistor using an oxide semiconductor can be fabricated using amorphous silicon. It is possible to achieve a higher field effect mobility than that of the conventional semiconductor.

[0105] The capacitance element 60 is composed of a conductive layer 31b, an insulating layer 34, and a conductive layer 33b. Moreover, a conductive layer 33c is provided on the conductive layer 31b with an insulating layer 34 interposed therebetween.

[0106] An insulating layer 82 and an insulating layer 81 are laminated to cover the transistor 30 and the like. The conductive layer 21, which functions as a base electrode, is provided on the insulating layer 81. The conductive layer 21 and the conductive layer 33b are connected to each other through the openings provided in the insulating layers 81 and 82. The insulating layer 81 preferably functions as a planarizing layer. The insulating layer 82 serves as a protective film for preventing impurities from diffusing into the transistor 30 and the like. For example, it is preferable that the insulating layer 82 is made of an inorganic insulating material, and the insulating layer 81 is made of an inorganic insulating material. An organic insulating material can be used.

[0107] [Cross-sectional configuration example 1-2] FIG. 7 shows an example in which the colored layer 41 is provided on the substrate 11 side. The configuration on side 12 can be simplified.

[0108] When the colored layer 41 is used as a planarizing film, the insulating layer 81 is not provided. Good too.

[0109] [Cross-sectional configuration example 1-3] In the above, the liquid crystal element is a vertical electric field type in which a pair of electrodes sandwiching the liquid crystal is arranged vertically. Although an example of a liquid crystal element is shown, the configuration of the liquid crystal element is not limited to this, and various types of liquid crystal elements may be used. can be applied.

[0110] In Fig. 8, FFS (Fringe Field Switching) mode is applied. 1 shows a schematic cross-sectional view of a display device having a liquid crystal element.

[0111] The liquid crystal element 20 includes a conductive layer 21 that functions as a pixel electrode and a conductive layer 21 and an insulating layer 83 interposed therebetween. The conductive layer 23 has a slit-like or comb-like upper surface shape. It has.

[0112] In addition, in this configuration, a capacitance is formed at the portion where the conductive layer 21 and the conductive layer 23 overlap. can be used as the capacitance element 60. Therefore, the area occupied by the pixel can be reduced. This makes it possible to realize a high-definition display device, and also to improve the aperture ratio.

[0113] In FIG. 8, the conductive layer 23 functioning as a common electrode is located on the liquid crystal 22 side. As shown in FIG. 9, the conductive layer 21 functioning as a pixel electrode is located on the liquid crystal 22 side. In this case, the conductive layer 21 has a slit-like or comb-like upper surface shape.

[0114] [Cross-sectional configuration example 1-4] In the following, a case where a light-transmitting conductive film is used for the capacitor element 60 and the like will be described.

[0115] The configuration shown in FIG. 10 differs from the configuration shown in FIG. 6 mainly in the configuration of the capacitance element 60. The configuration shown in FIG. 10 is a cross section corresponding to the layout shown in FIG. .

[0116] The capacitance element 60 includes, from the substrate 11 side, a conductive layer 31bt, an insulating layer 34, and a conductive layer 33bt. The conductive layer 31bt and the conductive layer 33bt each have a light-transmitting property. For example, the transmittance of visible light is 70% or more and less than 100%, preferably For example, a metal oxide film having a metal oxide content of 80% or more and less than 100% can be used.

[0117] The conductive layer 31bt is provided in contact with a part of the conductive layer 31b, and these are electrically connected. The conductive layer 33bt is provided in contact with a part of the conductive layer 33b, and these are electrically connected. This is being continued.

[0118] Here, when a metal oxide film and a metal film are laminated, a metal oxide film is formed on a metal film. When the metal film is formed, the surface of the metal film is oxidized, and the electrical resistance of the metal film itself and the relationship between the metal film and the metal oxide are increased. The contact resistance between the oxide films may become high. It is preferable to provide a conductive layer containing a metal or the like on the conductive layer containing a metal oxide.

[0119] [Cross-sectional configuration example 1-5] FIG. 11 shows a cross section corresponding to the layout shown in FIG.

[0120] In FIG. 11, a part of the conductive layer 33bt is provided in contact with the semiconductor layer 32. Therefore, a part of the conductive layer 33bt is connected to the source electrode and the drain electrode of the transistor 30. It functions as one side.

[0121] In addition, the conductive layer 21 is provided in contact with a part of the upper surface of the conductive layer 33bt. By applying a metal oxide film to the conductive layer 33bt and the conductive layer 33bt, the contact resistance between them is reduced. It is possible.

[0122] [Cross-sectional configuration example 1-6] FIG. 12 shows a conductive layer that functions as a gate electrode of a transistor and a source The conductive layer functioning as the electrode and the drain electrode is formed by a light-transmitting conductive film and a light-shielding conductive film. The layered structure is made of conductive films having a high conductivity, and these are then used as half-tone masks and gray-tone masks. This is an example of a case where the pattern is formed using exposure technology using a mask or multiple exposure technology. This reduces the number of photomasks required.

[0123] In addition, in the laminated film processed using such an exposure technique, the edge of the upper layer is A characteristic cross-sectional shape is obtained that is located inside the edge of the underlying layer.

[0124] In the transistor 30, a conductive layer 31at is provided on the substrate 11 side of the conductive layer 31a. In addition, a pair of conductive layers 33at and 33b functioning as a source electrode and a drain electrode are provided. A conductive layer 33bt is provided in contact with the semiconductor layer 32. 33a is provided.

[0125] The capacitance element 60 is composed of a part of the conductive layer 33bt and a part of the conductive layer 31bt. Moreover, the conductive layer 31b constituting the wiring CS is provided on the conductive layer 33bt.

[0126] Further, a conductive layer 33ct is provided below the conductive layer 33c.

[0127] Here, when manufacturing a display device, the fewer photolithography steps in the manufacturing process, the better. In other words, the fewer the number of photomasks, the lower the manufacturing cost. do.

[0128] For example, in the configuration shown in FIG. 6, among the processes on the substrate 11 side, the process of forming the conductive layer 31a, etc., A process of forming the conductor layer 32, a process of forming the conductive layer 33a, etc., and a process of forming an opening that will become the connection portion 38. The semiconductor device can be manufactured through a total of five photolithography steps, including the step of forming the conductive layer 21. In other words, a backplane substrate can be manufactured using five photomasks. On the other hand, on the substrate 12 (opposing substrate) side, the colored layer 41 and the light-shielding layer 42 are formed as follows: In the case of using the inkjet method or the screen printing method, a photomask is not required. For example, when the three colored layers 41 and the light-shielding layer 42 are provided, they are Compared to forming the mask using the lithography method, the number of photomasks required can be reduced by more than four. can.

[0129] The above is a description of the cross-sectional configuration example.

[0130] [Transistor configuration example 1] An example of a transistor configuration different from the above will be described below.

[0131] By using a metal oxide for the semiconductor layer 32 of the transistor described below, When OS transistors are used, the image remains unchanged. During periods where the change is below a certain level, the frequency of updating the video signal is set extremely low. This makes it possible to reduce power consumption.

[0132] The transistor shown in FIG. 13A has an insulating layer 8 on a channel forming region of a semiconductor layer 32. The insulating layer 84 is provided to prevent the conductive layer 33a and the conductive layer 33b from being etched. It functions as an etching stopper.

[0133] In the transistor shown in FIG. 13B, an insulating layer 84 covers the semiconductor layer 32 and is separated from the insulating layer 34. In this case, the conductive layer 33a and the conductive layer 33b are formed on the insulating layer 8. 4 is connected to the semiconductor layer 32 via an opening provided in the semiconductor layer 4 .

[0134] The transistor shown in FIG. 13C includes an insulating layer 85 and a conductive layer 86. The insulating layer 85 is , which covers the semiconductor layer 32, the conductive layer 33a, and the conductive layer 33b. 6 is provided on the insulating layer 85 and has a region overlapping with the semiconductor layer 32 .

[0135] The conductive layer 86 is located on the opposite side of the semiconductor layer 32 from the conductive layer 31. When the first gate electrode is the first gate electrode, the conductive layer 86 functions as a second gate electrode. By applying the same potential to the conductive layer 31 and the conductive layer 86, the on-state current of the transistor In addition, the conductive layer 31 or the conductive layer 86 may be provided with a threshold voltage control layer. By applying a potential for driving one side and a potential for driving the other side, the threshold voltage of the transistor is The pressure can be controlled.

[0136] 13A to 13C, the end of the semiconductor layer 32 is closer to the end of the conductive layer 31 than the end of the conductive layer 31. Although an example in which the end of the semiconductor layer 32 is located on the outer side has been shown, the present invention is not limited to this. Alternatively, the position of the second electrode 14 may be located on the inner side.

[0137] The transistor shown in FIG. 13D is a top-gate transistor. The conductive layer 31, which functions as an electrode, is disposed above the semiconductor layer 32 (on the side opposite to the surface on which the semiconductor layer is to be formed). An insulating layer 34 and a conductive layer 31 are formed on the semiconductor layer 32. The insulating layer 82 covers the upper surface and side edges of the semiconductor layer 32 and the conductive layer 31. The conductive layer 33a and the conductive layer 33b are provided on the insulating layer 82. The conductive layer 33a and the conductive layer 33b are connected to the semiconductor layer 32 through an opening provided in the insulating layer 82. Connected.

[0138] In this example, the insulating layer 34 does not exist in the area where it does not overlap the conductive layer 31. However, the insulating layer 34 may be provided to cover the upper surface and side edges of the semiconductor layer 32. .

[0139] The transistor shown in FIG. 13D includes a conductive layer 31 and a conductive layer 33a or a conductive layer 33b. Since it is easy to separate the physical distance between them, the parasitic capacitance between them can be reduced. be.

[0140] The transistor shown in FIG. 13E has a conductive layer 87 and an insulating layer 88 in comparison with the transistor shown in FIG. 13D. The difference is that the conductive layer 87 has a region overlapping with the semiconductor layer 32. Moreover, an insulating layer 88 is provided to cover the conductive layer 87 .

[0141] The conductive layer 87 functions as a second gate electrode. , it is possible to control the threshold voltage, etc.

[0142] The above is a description of the configuration example of the transistor.

[0143] [Cross-section example 2] The following is a cross-sectional view of a display device in which silicon is used for the semiconductor layer of a transistor. An example will be described.

[0144] [Cross-sectional configuration example 2-1] The structure shown in FIG. 14 is different from the above-mentioned sectional structure example 1-1 (FIG. 8) in that the transistor 30 The main difference is in the configuration.

[0145] The transistor 30 shown in FIG. 14 is a transistor having a so-called bottom gate channel etch structure. The transistor 30 includes a conductive layer 31 that functions as a gate electrode and a gate The insulating layer 34 functions as an insulating layer, the semiconductor layer 32, and the source and drain regions. A pair of impurity semiconductor layers 35 functioning as a source electrode and a drain electrode. The semiconductor layer 32 overlaps with the conductive layer 31. The portion where the semiconductor layer 32 is in contact with the impurity semiconductor layer 35 functions as a channel formation region. The impurity semiconductor layer 35 is provided in contact with the conductive layer 33a or the conductive layer 33b. can be.

[0146] The semiconductor layer 32 is preferably made of a semiconductor containing silicon. For example, amorphous silicon is For example, amorphous silicon, microcrystalline silicon, or polycrystalline silicon can be used. Amorphous silicon is preferable because it can be formed on a large substrate with good yield. The display device according to one embodiment of the present invention uses amorphous silicon having a relatively low field-effect mobility. Even with a transistor that is too thin, a good display is possible. In this case, hydrogenated amorphous silicon is used, in which dangling bonds are terminated with hydrogen. It is preferable to use a-Si:H.

[0147] The impurity semiconductor film constituting the impurity semiconductor layer 35 is doped with an impurity element that imparts one conductivity type. If the transistor is n-type, one conductivity type is given to it. An example of a semiconductor doped with an impurity element is silicon doped with P or As. Alternatively, when the transistor is a p-type transistor, an impurity element that imparts one conductivity type is It is possible to add, for example, B, but it is preferable that the transistor is an n-type. The impurity semiconductor layer 35 may be formed of an amorphous semiconductor or a microcrystalline semiconductor. The insulating layer 11 may be formed of a crystalline semiconductor.

[0148] [Cross-sectional configuration example 2-2] FIG. 15 shows an example in which the colored layer 41 is provided on the substrate 11 side. Except for the configuration of 0, the above-mentioned cross-sectional configuration example 1-2 can be used.

[0149] [Cross-sectional configuration example 2-3] 16 and 17 are schematic cross-sectional views of a display device having a liquid crystal element to which the FFS mode is applied. Except for the configuration of the transistor 30, the above-mentioned cross-sectional configuration example 1-3 can be used.

[0150] The above is the description of the cross-sectional configuration example 2.

[0151] [Transistor configuration example 2] An example of a transistor configuration different from the above will be described below.

[0152] The transistor shown in FIG. 18A has a semiconductor layer 32 and an impurity semiconductor layer 35 between them. The body layer 37 is

[0153] The semiconductor layer 37 may be formed of a semiconductor film similar to the semiconductor layer 32. The layer 37 is formed by etching the semiconductor layer 32 when the impurity semiconductor layer 35 is etched. It can function as an etching stopper to prevent the loss of the insulating film. In FIG. 18(A), an example in which the semiconductor layer 37 is separated into left and right sides is shown. A part of 7 may cover the channel formation region of the semiconductor layer 32 .

[0154] The semiconductor layer 37 may contain a lower concentration of impurities than the impurity semiconductor layer 35. This allows the semiconductor layer 37 to be an LDD (Lightly Doped Drain) region. This can function as a gate region, and suppresses hot carrier degradation when a transistor is operated. It can be suppressed.

[0155] The transistor shown in FIG. 18B has an insulating layer 8 on a channel forming region of a semiconductor layer 32. The insulating layer 84 is provided to prevent etching during etching of the impurity semiconductor layer 35. It acts as a stopper.

[0156] The transistor shown in FIG. 18C has a semiconductor layer 32p instead of the semiconductor layer 32. The semiconductor layer 32p includes a semiconductor film having high crystallinity. For example, the semiconductor layer 32p is a polycrystalline semiconductor. The transistor includes a conductor or a single crystal semiconductor. This makes the transistor have high field effect mobility. It is possible.

[0157] The transistor shown in FIG. 18D has a semiconductor layer 32 in a channel formation region of the semiconductor layer 32. For example, the transistor shown in FIG. It is formed by irradiating a region with laser light or the like to crystallize it locally. This makes it possible to realize a transistor with high field effect mobility.

[0158] The transistor shown in FIG. 18(E) is the same as the transistor shown in FIG. 18(A) except that the semiconductor layer 3 The semiconductor device has a crystalline semiconductor layer 32p in a channel formation region of the second semiconductor device.

[0159] The transistor shown in FIG. 18(F) is the same as the transistor shown in FIG. 18(B), except that the semiconductor layer 3 The semiconductor device has a crystalline semiconductor layer 32p in a channel formation region of the second semiconductor device.

[0160] This completes the description of the second configuration example of the transistor.

[0161] [Shape of the conductive layer] Conductive films that can be used for wiring such as gate lines and source lines are made of low-resistance materials such as metals and alloys. It is preferable to use a highly resistant material because it is possible to reduce the wiring resistance. In the case of a display device, it is effective to increase the width of the wiring. Such conductive films do not transmit visible light, so in a transmissive liquid crystal display device, the width of the wiring itself is In some cases, the aperture ratio decreases due to an increase in the number of wirings or the like.

[0162] Therefore, by devising the shape of the edge of the conductive film, the light from the backlight unit can be efficiently can be extracted objectively.

[0163] FIG. 19A shows a cross-sectional view of a conductive layer 33 constituting a source line and the like and its vicinity. The conductive layer 33 has an end portion that has an inverse tapered shape.

[0164] Here, the taper angle is the angle between the bottom surface (the surface in contact with the surface on which the thin film is formed) and the The taper angle is the angle between the side and the surface. The taper angle is greater than 0 degrees and less than 180 degrees. If the angle is less than 90 degrees it is called a forward taper, and if it is greater than 90 degrees it is called a reverse taper.

[0165] As shown in FIG. 19A, the conductive layer 33 has an inverse tapered shape. A part of the light 50 incident from the unit is reflected by the side surface of the conductive layer 33 and reaches the liquid crystal 22. As a result, compared with the case where the side surface of the conductive layer 33 is vertical and has a forward tapered shape, This can increase the light extraction efficiency.

[0166] Here, the taper angle of the conductive layer 33 is greater than 90 degrees and less than 135 degrees, and preferably 91 degrees. It is preferable that the angle be set to 120 degrees or more, and more preferably 95 degrees or more and 110 degrees or less.

[0167] In FIG. 19B, the conductive layer 31 constituting the gate line etc. has an inverse tapered shape. By forming the conductive layer 31 as well as the conductive layer 33 into an inverse tapered shape, This makes it possible to effectively increase the light extraction efficiency.

[0168] The above is the explanation of the shape of the wiring.

[0169] [About each component] Each of the above components will be described below.

[0170] 〔substrate〕 A material having a flat surface can be used for the substrate of the display panel. The substrate from which the light is extracted is made of a material that transmits the light. For example, glass, quartz, ceramic, etc. Materials such as SiO2, sapphire, and organic resins can be used.

[0171] By using a thin substrate, the display panel can be made lighter and thinner. Furthermore, by using a substrate having a thickness sufficient to provide flexibility, a flexible display panel can be realized. Alternatively, a thin glass having flexibility may be used for the substrate. Alternatively, a composite material in which glass and a resin material are bonded together with an adhesive layer may be used.

[0172] [Transistor] The transistor includes a conductive layer functioning as a gate electrode, a semiconductor layer, and a A conductive layer that functions as a drain electrode and a conductive layer that functions as a gate insulating layer. and an insulating layer.

[0173] Note that the structure of a transistor included in a display device of one embodiment of the present invention is not particularly limited. For example, a planar type transistor or a staggered type transistor may be used. Alternatively, a top-gate or bottom-gate transistor may be used. Alternatively, gate electrodes may be provided above and below the channel. It may be possible to use

[0174] The crystallinity of the semiconductor material used in the transistor is not particularly limited. Semiconductors with crystallinity (microcrystalline semiconductors, polycrystalline semiconductors, single crystal semiconductors, or partially crystalline semiconductors) If a semiconductor having crystallinity is used, the transistor This is preferable because it is possible to suppress deterioration of the transistor characteristics.

[0175] In addition, the semiconductor material used in transistors must have an energy gap of 2 eV or more. It is preferable to use a metal oxide having a polarization energy of 2.5 eV or more, and more preferably 3 eV or more. A typical example is a metal oxide containing indium, for example, CAC -OS, etc. can be used.

[0176] Metal oxides with a wider band gap and lower carrier density than silicon are used. Due to the low off-state current of the transistor, The accumulated charge can be retained for a long period of time.

[0177] The semiconductor layer may be, for example, indium, zinc, and M (aluminum, titanium, gallium, germanium, etc.). Rumanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium or The film can be expressed as an In-M-Zn oxide film containing metals such as hafnium. .

[0178] When the metal oxide constituting the semiconductor layer is an In-M-Zn oxide, The atomic ratio of metal elements in the sputtering target used to deposit a film is In≧M It is preferable that Zn≧M is satisfied. The atomic ratios are In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In :M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4. 1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5: The atomic ratio of the semiconductor layers to be formed is preferably 1:8 or the like. This includes a ±40% variation in the atomic ratio of metal elements contained in the ring target.

[0179] The bottom-gate transistor described in this embodiment can reduce the manufacturing process. In addition, the use of metal oxides allows the formation of the film at a lower temperature than polycrystalline silicon. Materials with low heat resistance can be used as wiring and electrode materials below the semiconductor layer, and as substrate materials. The range of materials that can be used is widened. For example, A multi-layer glass substrate or the like can be suitably used.

[0180] The semiconductor layer is a metal oxide film having a low carrier density. For example, Carrier density is 1×10 17 / cm 3 Less than or equal to 1×10 15 / cm 3The following is further Preferably 1 x 10 13 / cm 3 Less than or equal to 1×10 11 / cm 3 Below, More preferably, 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 More than a career Such metal oxides may be high purity intrinsic or It is called a high-purity intrinsic metal oxide in terms of quality. This results in a low impurity concentration and a low defect level density. Therefore, it can be said to be a metal oxide with stable properties.

[0181] In addition, the semiconductor characteristics and electrical characteristics (electric field characteristics) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition depending on the characteristics of the device (e.g., effective mobility, threshold voltage, etc.). In order to obtain the semiconductor characteristics of a transistor, the carrier density, impurity concentration, and defect density of the semiconductor layer are It is preferable to appropriately set the recess density, the atomic ratio of metal elements to oxygen, the interatomic distance, the density, etc. It is.

[0182] In the metal oxides that make up the semiconductor layer, silicon and carbon, which are group 14 elements, If it is included, oxygen vacancies will increase in the semiconductor layer, causing it to become n-type. The silicon and carbon concentrations in the layer (obtained by secondary ion mass spectrometry) were calculated by 2× 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following do.

[0183] In addition, alkali metals and alkaline earth metals generate carriers when bonded with metal oxides. This may result in an increase in the off-state current of the transistor. Alkaline or alkaline earth metals in body layers obtained by secondary ion mass spectrometry. The concentration of is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 To the following:

[0184] In addition, if the metal oxide that makes up the semiconductor layer contains nitrogen, the electrons that act as carriers This increases the carrier density and makes it easier to become n-type. Transistors using this material tend to be normally-on. The nitrogen concentration obtained by secondary ion mass spectrometry is 5×10 18 atoms / cm 3 below It is preferable to set

[0185] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned crystal-like oxide semiconductor) stalline oxide semiconductor), polycrystalline oxide semiconductor, nc-OS(nanocrystalline oxide semiconductor r), pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like Examples of semiconductors include amorphous oxide semiconductors, amorphous oxide semiconductors, and amorphous oxide semiconductors.

[0186] In addition, the semiconductor layer of the transistor disclosed in one embodiment of the present invention may include CAC-OS(Cl oud-Aligned Composite oxide semiconductor r) may also be used.

[0187] Note that, as the semiconductor layer of the transistor disclosed in one aspect of the present invention, the above-described non-single-crystalline oxide semiconductor or CAC-OS can be preferably used. Further, as the non-single-crystalline oxide semiconductor nc-OS or CAAC-OS can be preferably used.

[0188] Note that, in one aspect of the present invention, it is preferable to use CAC-OS as the semiconductor layer of the transistor. By using CAC-OS, high electrical characteristics or high reliability can be imparted to the transistor.

[0189] Note that, among the regions of CAAC-OS, polycrystalline oxide semiconductor, nc-OS, pseudo-amorphous oxide semiconductor, and amorphous oxide semiconductor, a mixed film having two or more types may be used. The mixed film may have, for example, a single-layer structure or a laminated structure including any two or more types of the above-described regions.

[0190] <Configuration of CAC-OS> Hereinafter, the configuration of CAC (Cluster-Aligned Composite)-OS that can be used for the transistor disclosed in one aspect of the present invention will be described.

[0191] CAC-OS is, for example, a composition in which elements constituting a metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof. Note that, hereinafter, in the metal oxide, one or more metal elements are unevenly distributed, and a region having the metal element is in a mixed state in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof, in a mosaic or patch state ​ Also called.

[0192] The metal oxide preferably contains at least indium. In addition to these, aluminum, gallium, yttrium, and zinc are preferably contained. Thorium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Contains one or more of the following: tantalum, tungsten, or magnesium. It may be included.

[0193] For example, CAC-OS in In-Ga-Zn oxide (In- The Ga-Zn oxide may be specifically referred to as CAC-IGZO. (hereinafter referred to as InO X1 (X1 is a real number greater than 0.) or Indium Zinc Oxide (hereinafter, In X2 Zinc Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0. ) and gallium oxide (GaO X3 (X3 is a real number greater than 0) ), or gallium zinc oxide (Ga X4 Zinc Y4 O Z4 (X4, Y4, and Z1 and Z2 are real numbers greater than 0.) The material is separated into a mosaic pattern. The mosaic-like InO X1 , or In X2 Zinc Y2 O Z2 is distributed uniformly in the film. This is a configuration (hereinafter also referred to as a cloud-like configuration).

[0194] In other words, CAC-OS isX3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 A composite metal oxide having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is is greater than the atomic ratio of In to the element M in the second region. Assume that the In concentration is higher than in region 2.

[0195] IGZO is a common name and refers to a compound made of In, Ga, Zn, and O. A typical example is InGaO3(ZnO). m1 (m1 is a natural number), or In (1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of the crystalline compound include those represented by the following formula:

[0196] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned on the ab plane. In the case of ZnO, the crystal structure is non-oriented and connected.

[0197] On the other hand, CAC-OS is a material structure of metal oxide. In a material composition containing a, Zn, and O, some of the nanoparticles are observed to be mainly composed of Ga. The regions where the In nanoparticles are observed are the same as those where the In nanoparticles are observed as the main component. This refers to a structure in which the crystals are randomly distributed in a mosaic pattern. Structure is a secondary factor.

[0198] Note that CAC-OS does not include a laminated structure of two or more films with different compositions. For example, a structure consisting of two layers, one containing In as the main component and the other containing Ga as the main component, Not at all.

[0199] In addition, GaO X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 In some cases, it may be difficult to observe a clear boundary between the region in which the main component is the

[0200] Instead of gallium, aluminum, yttrium, copper, vanadium, and beryllium are used. Aluminum, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium If one or more selected species from the group consisting of uranium, uranium, etc. are included, CAC-OS will In one area, the metal element is observed as a nanoparticle, and in another area, In is observed as a nanoparticle. The nanoparticle-like regions are randomly distributed in a mosaic pattern. This refers to.

[0201] CAC-OS is formed by sputtering without intentionally heating the substrate. In addition, when the CAC-OS is formed by a sputtering method, the deposition gas The gas is selected from an inert gas (typically argon), oxygen gas, and nitrogen gas. One or more of these may be used. The lower the flow rate ratio of the gas, the more preferable. For example, the flow rate ratio of oxygen gas is preferably 0% or more and less than 30%. Or, it is preferable to set it to 0% or more and 10% or less.

[0202] CAC-OS is a method for measuring X-ray diffraction (XRD). When measured using the out-of-plane θ / 2θ scan, In other words, no clear peaks are observed in the measurement area from the X-ray diffraction. It can be seen that the orientation of the regions in the ab plane direction and the c-axis direction is not observed.

[0203] In addition, CAC-OS uses an electron beam with a probe diameter of 1 nm (also called a nanobeam electron beam). In the electron beam diffraction pattern obtained by irradiating the sample, a ring-shaped region of high brightness and the corresponding Several bright spots are observed in the ring region. Therefore, the electron diffraction pattern indicates that the CAC-OS The crystal structure of nc (nano- It can be seen that the crystalline structure is

[0204] For example, in the CAC-OS of In-Ga-Zn oxide, the energy dispersive X Energy Dispersive X-ray spectroscopy (EDX) The EDX mapping obtained using scopy revealed that GaO X3 The area where is the main component And, In X2 Zinc Y2 O Z2 , or InO X1 The areas where the main component is It can be confirmed that the compound has a structure similar to that shown in FIG.

[0205] CAC-OS has a structure different from that of IGZO compounds in which metal elements are uniformly distributed. It has different properties from GZO compounds. That is, CAC-OS is GaO X3 The main components are and the region where In X2 Zinc Y2 O Z2, or InO X1 The region where is the main component and the region where is The phase is gradually separated, and the regions each consisting of one element as a main component are arranged in a mosaic pattern.

[0206] Here, In X2 Zinc Y2 O Z2 , or InO X1 The area where GaO is the main component X This is a region with high conductivity compared to the region where In 3 is the main component. X2 Zinc Y2 O Z2 , or InO X1 The carriers flow through the area where the main component is gold. Therefore, the conductivity of In is expressed as a metal oxide. X2 Zinc Y2 O Z2 , or InO X The regions where 1 is the main component are distributed in a cloud-like shape in the metal oxide, which leads to high field effect transfer. Mobility (μ) can be achieved.

[0207] On the other hand, GaO X3 The region where the main components are In X2 Zinc Y2 O Z2 , or InO X1 This region has higher insulating properties than the region where GaO is the main component. X3 etc. The distribution of the region in which the main component is is in the metal oxide suppresses leakage current and provides good switching performance. Switching operation can be achieved.

[0208] Therefore, when CAC-OS is used in a semiconductor device, GaO X3 Insulation and , In X2 Zinc Y2 O Z2 , or InO X1The conductivity caused by the This results in a high on-state current (I on ), and high field-effect mobility (μ) can be done.

[0209] In addition, semiconductor devices using CAC-OS have high reliability. It is ideal for a variety of semiconductor devices including displays.

[0210] In addition, a transistor having a CAC-OS semiconductor layer has high field-effect mobility and Because of its high dynamic capability, the transistor is connected to a driving circuit, typically a scanning transistor which generates a gate signal. By using this in a line driver circuit, it is possible to provide a display device with a narrow frame width (also called a narrow frame). In addition, the transistor can be used in a signal line driver circuit (particularly, a signal line driver (Demultiplexer connected to the output terminal of a shift register in a drive circuit) Therefore, it is possible to provide a display device having a small number of wires connected to the display device.

[0211] In addition, the transistor with CAC-OS in the semiconductor layer is a transistor using low-temperature polysilicon. Unlike conventional transistors, no laser crystallization process is required. It is possible to reduce the manufacturing cost even for ultra-high visibility display devices. ("4K resolution", "4K2K", "4K"), Super Hi-Vision ("8K resolution" In the case of large-scale display devices with high resolution such as 1080p, 1080p, 8K4K, and 8K, By using a transistor having a CAC-OS semiconductor layer in the driver circuit and display section, This is preferable because it is possible to write in a short time and reduce display defects.

[0212] Alternatively, the semiconductor in which the transistor channel is formed may be, for example, silicon. When amorphous silicon is used, it is possible to form a large substrate with a When using amorphous silicon, hydrogen is used to form transistors. Hydrogenated amorphous silicon (a-Si:H) with dangling bonds terminated It is preferable to use the

[0213] In addition, silicon having crystallinity such as microcrystalline silicon, polycrystalline silicon, and single crystal silicon can be used. In particular, polycrystalline silicon can be formed at a lower temperature than single crystal silicon. It also has higher field effect mobility and higher reliability than amorphous silicon.

[0214] When silicon is used, a conductive layer is provided between the semiconductor layer and the source or drain electrode. It is preferable to provide an impurity semiconductor layer to which an impurity element that imparts a type is added. When the semiconductor is n-type, it is treated as a semiconductor doped with an impurity element that gives it one conductivity type. For example, silicon doped with P or As can be used. If the transistor is a p-type, In this case, it is possible to add, for example, B as an impurity element to give one conductivity type. In addition, the impurity semiconductor layer is preferably an amorphous semiconductor. The insulating film 12 may be formed of a crystalline semiconductor such as a microcrystalline semiconductor.

[0215] The bottom-gate transistor described in this embodiment can reduce the manufacturing process. In addition, the use of amorphous silicon in this case is preferable compared to polycrystalline silicon. Since it can be formed at low temperatures, it is highly resistant and can be used as a material for wiring and electrodes below the semiconductor layer, and as a material for substrates. The possibility of using low-heat materials allows for a wider range of material choices. For example, a very large glass substrate can be used. Since the impurity region of the transistor is easily formed in a self-aligned manner, the characteristics of the transistor are not uniform. In this case, it is preferable to use polycrystalline silicon or single crystal silicon. It may be suitable for various purposes.

[0216] [Conductive Layer] In addition to the gates, sources, and drains of transistors, various wiring and Materials that can be used for the conductive layers such as electrodes include aluminum, titanium, chromium, and titanium alloys. Aluminum, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or thallium Examples of the metals include tin and tin oxide, and alloys containing tin as the main component. Films containing the materials can be used as single layers or as multilayer structures. For example, silicon A single-layer structure of an aluminum film containing titanium, a two-layer structure of an aluminum film laminated on a titanium film, A two-layer structure in which an aluminum film is laminated on a stainless steel film, and a copper-magnesium-aluminum alloy Two-layer structure with copper film laminated on gold film, two-layer structure with copper film laminated on titanium film, tungsten A two-layer structure in which a copper film is laminated on top of a titanium film or titanium nitride film is laminated on top of that with an aluminum film. A titanium or copper film is laminated on top of the titanium or titanium nitride film. Layer structure, molybdenum film or molybdenum nitride film, and aluminum film or A three-layer structure in which a copper film is laminated and a molybdenum film or molybdenum nitride film is further formed on top of the copper film. Incidentally, oxides such as indium oxide, tin oxide, and zinc oxide may also be used. In addition, the use of copper containing manganese is preferable because it improves the controllability of the shape by etching. .

[0217] In addition to the gate, source and drain of a transistor, various components constituting a display device Examples of light-transmitting conductive materials that can be used for conductive layers such as wirings and electrodes include Indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, gallium-added Conductive oxides such as zinc oxide doped with gold or graphene can be used. , silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt The material is made of metals such as titanium, copper, palladium, or titanium, or alloys containing such metals. Alternatively, a nitride of the metal material (for example, titanium nitride) may be used. When using metal materials or alloy materials (or their nitrides), they must have light-transmitting properties. The thickness of the conductive layer may be as thin as possible. Also, a laminated film of the above materials may be used as the conductive layer. For example, a laminated film of an alloy of silver and magnesium and indium tin oxide can be used. These are preferable because they can improve the electrical conductivity of the various wiring and Conductive layers such as electrodes and conductive layers of display elements (conductive layers that function as pixel electrodes and common electrodes) It can also be used for the layer.

[0218] In addition, the conductive material having light transmission is made to have low resistance by including impurity elements. The oxide semiconductor (oxide conductor (OC)) It is preferable.

[0219] [Insulating layer] Examples of insulating materials that can be used for each insulating layer include acrylic and epoxy. In addition to resins and resins with siloxane bonds, silicon oxide, silicon oxynitride, silicon oxynitride Inorganic insulating materials such as silicon, silicon nitride, and aluminum oxide can also be used.

[0220] Insulating films with low water permeability include silicon nitride films and silicon oxynitride films, which are made of nitrogen and silicon. and films containing nitrogen and aluminum, such as an aluminum nitride film. A silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or the like may also be used.

[0221] [Liquid crystal element] The liquid crystal element may be, for example, a vertical alignment (VA) A liquid crystal element in which the vertical alignment mode is applied can be used. Multi-Domain Vertical Alignment mode, PVA( Patterned Vertical Alignment) mode, ASV (Adv Anced Super View mode, etc. can be used.

[0222] In addition, the liquid crystal element may be a liquid crystal element to which various modes are applied. For example, in addition to VA mode, TN (Twisted Nematic) mode, IPS (In -Plane-Switching mode, FFS (Fringe Field Switching) mode itching) mode, ASM(Axially Symmetric aligne) d Micro-cell mode, OCB (Optically Compensated ed Birefringence mode, FLC (Ferroelectric L iquid Crystal mode, AFLC (AntiFerroelectric) Liquid Crystal mode, ECB (Electrically Con trolled birefringence mode, guest host mode, etc. are applied. A liquid crystal element having such a structure can be used.

[0223] The liquid crystal element is a device that controls the transmission or non-transmission of light by the optical modulation action of liquid crystal. The optical modulation of liquid crystals is achieved by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal used in the liquid crystal element is controlled by a These include thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, and polymer dispersed liquid crystal (PDLC). : Polymer Dispersed Liquid Crystal), polymer network Network Liquid Crystal (PNLC: Polymer Network Liquid Crystal tal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. Depending on the conditions, cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. It shows phases such as cubic and isotropic.

[0224] As the liquid crystal material, either a positive type liquid crystal or a negative type liquid crystal may be used. It is only necessary to use an optimum liquid crystal material depending on the mode and design to be applied.

[0225] In addition, an alignment film can be provided to control the alignment of the liquid crystal. When adopting this method, liquid crystals exhibiting a blue phase without using an alignment film may be used. When the temperature of a cholesteric liquid crystal is increased, the cholesteric phase changes to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is difficult to distinguish between the two. In order to improve the range, a liquid crystal composition containing a chiral agent of several weight percent or more is used in the liquid crystal layer. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response time and optically isotropic In addition, the liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent does not require alignment treatment. In addition, no alignment film is required, and the viewing angle dependency is small. This prevents electrostatic damage caused by rubbing, and This can reduce defects and damage to the liquid crystal display device during the manufacturing process.

[0226] The liquid crystal element may be a transmissive liquid crystal element, a reflective liquid crystal element, or a semi-transmissive liquid crystal element. There are elements, etc.

[0227] In one embodiment of the present invention, a transmissive liquid crystal element can be particularly preferably used.

[0228] When using a transmissive or semi-transmissive liquid crystal element, two polarizing A backlight is provided on the outer side of the polarizing plate. It may be a direct-light type backlight or an edge-light type backlight. Direct backlight equipped with LED (Light Emitting Diode) This makes local dimming easier and increases contrast. In addition, when an edge-light type backlight is used, the module including the backlight can be displayed more clearly. This is preferable because it allows the thickness of the module to be reduced.

[0229] In addition, by turning off the edge-lit backlight, a see-through display is achieved. It is possible.

[0230] [Colored layer] Materials that can be used for the coloring layer include metal materials, resin materials, pigments, and dyes. Examples of such materials include resin materials.

[0231] [Light blocking layer] Materials that can be used for the light-shielding layer include carbon black, titanium black, Examples of the material include a metal, a metal oxide, and a composite oxide including a solid solution of a plurality of metal oxides. The film may be a film containing a resin material, or may be a thin film of an inorganic material such as a metal. In addition, the light-shielding layer may be a laminated film of a film containing the material of the colored layer. A film containing a material for a colored layer that transmits light and a material for a colored layer that transmits light of another color By using the same material for the colored layer and the light-shielding layer, a laminated structure with a film containing This is preferable because it allows the equipment to be standardized and the process to be simplified.

[0232] The above is a description of each component.

[0233] The configuration examples and manufacturing method examples illustrated in this embodiment and the corresponding drawings, etc. Also, parts of the present invention may be implemented in appropriate combination with other configuration examples, manufacturing method examples, drawings, etc. can be done.

[0234] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0235] (Embodiment 2) In this embodiment, a polycrystalline silicon film that can be used for a semiconductor layer of a transistor is An example of a crystallization method and a laser crystallization apparatus will be described.

[0236] To form a polycrystalline silicon layer with good crystallinity, an amorphous silicon layer is provided on a substrate, It is preferable to crystallize the amorphous silicon layer by irradiating it with laser light. The light is a linear beam, and the substrate is moved while the linear beam is irradiated onto the amorphous silicon layer. In this way, a polycrystalline silicon layer can be formed in a desired region on the substrate.

[0237] The linear beam method has a relatively good throughput. This is a method in which the laser light is irradiated multiple times while moving relatively. The resulting change in beam profile is likely to cause variations in crystallinity. For example, the semiconductor layer crystallized by this method may be used as a transistor in a pixel of a display device. When used, random stripes due to variations in crystallinity may be visible on the display.

[0238] In addition, the length of the linear beam is ideally equal to or greater than the length of one side of the substrate. The length of the beam is limited by the output of the laser oscillator and the configuration of the optical system. In processing mold substrates, it is practical to irradiate the laser in a folded manner within the substrate surface. There is an area where the laser light is irradiated with overlapping light. The crystallinity of this area is different from that of the other areas. Since the crystallinity is likely to differ, display unevenness may occur in the region.

[0239] In order to prevent the above problems, a laser is locally applied to the amorphous silicon layer formed on the substrate. Localized laser irradiation can be used to crystallize the material. Therefore, it is easy to form a thin polycrystalline silicon layer.

[0240] FIG. 20(A) shows a method of locally irradiating a laser beam onto an amorphous silicon layer formed on a substrate. FIG.

[0241] A laser beam 826 emitted from the optical system unit 821 is reflected by a mirror 822 and The laser light 826 enters the microlens array 823. are focused to form a plurality of laser beams 827.

[0242] A substrate 830 on which an amorphous silicon layer 840 is formed is fixed to the stage 815. By irradiating the amorphous silicon layer 840 with a plurality of laser beams 827, a plurality of polycrystalline silicon A composite layer 841 can be formed at the same time.

[0243] The individual microlenses of the microlens array 823 are arranged at a pixel pitch of the display device. Alternatively, they may be provided at intervals that are an integral multiple of the pixel pitch. In either case, the laser irradiation and the movement of the stage 815 in the X or Y direction are repeated. By repeating this process, a polycrystalline silicon layer can be formed in the regions corresponding to all pixels.

[0244] For example, the microlens array 823 has a pixel pitch of M rows and N columns (M and N are natural numbers). When a microlens is used, first, laser light is irradiated at a predetermined starting position, and a polycrystalline A silicon layer 841 can be formed. Then, the silicon layer 841 is moved in the row direction by a distance of N columns. Then, the laser beam is irradiated to the substrate 841, and polycrystalline silicon layers 841 are formed in M ​​rows and N columns. It is possible to form 2N columns of polycrystalline silicon layers 841. By repeating this process, In this way, a plurality of polycrystalline silicon layers 841 can be formed in a desired area. When performing the laser irradiation process, the laser is irradiated by moving the distance of N columns in the row direction. Then, the movement in the column direction by a distance of M rows and the irradiation of the laser light are repeated.

[0245] In addition, by appropriately adjusting the oscillation frequency of the laser light and the moving speed of the stage 815, Even if the laser is irradiated while moving the 815 in one direction, the pixel pitch of the polycrystalline silicon A layer of com can be formed.

[0246] The size of the laser beam 827 is set to, for example, a size that includes the entire semiconductor layer of one transistor. The area can be as small as the entire channel region of one transistor. Alternatively, the area of ​​the channel region of one transistor can be reduced. These can be made to have an area large enough to include the required transistor electrical characteristics. Just use them according to their characteristics.

[0247] In addition, in the case of a display device having a plurality of transistors in one pixel, The size of the module 827 is large enough to include the entire semiconductor layer of each transistor in one pixel. The size of the laser beam 827 can be determined based on the area of ​​a plurality of pixels. The area may be large enough to include the entire semiconductor layer of the transistor.

[0248] As shown in FIG. 21A, between the mirror 822 and the microlens array 823 A mask 824 may be provided on the substrate 821. The mask 824 may include a plurality of masks corresponding to the respective microlenses. An opening is provided. The shape of the opening can be reflected in the shape of the laser beam 827. If the mask 824 has a circular opening as shown in FIG. 21(A), a circular laser beam can be generated. If the mask 824 has a rectangular opening, a beam 827 can be obtained. A rectangular laser beam 827 can be obtained. The mask 824 is, for example, a transistor This is effective when it is desired to crystallize only the channel region. As shown in FIG. 21(B), the optical unit 821 may be provided between the optical unit 821 and the mirror 822.

[0249] FIG. 20(B) shows a laser that can be used in the local laser irradiation process described above. FIG. 1 is a perspective view illustrating the main configuration of a laser crystallization apparatus. The laser crystallization apparatus has an XY stage. The components of the moving mechanism 812, the moving mechanism 813, and the stage 815 are also included. , a laser oscillator 820 for shaping a laser beam 827, an optical system unit 821, The image forming apparatus has a lens 822 and a microlens array 823.

[0250] The moving mechanism 812 and the moving mechanism 813 have a function of performing reciprocating linear motion in the horizontal direction. The mechanism for powering the moving mechanism 812 and the moving mechanism 813 may be, for example, a motor. A ball screw mechanism 816 for driving the moving mechanism can be used. Since the directions of movement of each of the moving mechanisms 813 intersect perpendicularly, the stays fixed to the moving mechanism 813 The handle 815 can be freely moved in the X and Y directions.

[0251] The stage 815 has a fixing mechanism such as a vacuum suction mechanism, and is used to fix the substrate 830 and the like. In addition, the stage 815 may have a heating mechanism as necessary. Although not shown, the stage 815 has a pusher pin and a mechanism for raising and lowering the pin. When carrying in or out the substrate 830, the substrate 830 can be moved up and down.

[0252] The laser oscillator 820 may be configured to output light having a wavelength and intensity suitable for the purpose of processing. A pulsed laser is preferred, but a CW laser may also be used. Typically, the wavelength is 351 nm-3 Excimer laser capable of emitting ultraviolet light such as 53 nm (XeF) and 308 nm (XeCl) Alternatively, a solid-state laser (YAG laser, fiber laser, etc.) can be used. Double waves (515nm, 532nm, etc.) or triple waves (343nm, 355nm, etc.) Also, a plurality of laser oscillators 820 may be used.

[0253] The optical system unit 821 includes, for example, a mirror, a beam expander, a beam homogenizer, The in-plane energy distribution of the laser light 825 output from the laser oscillator 820 is It is possible to stretch the material while making it uniform.

[0254] The mirror 822 may be, for example, a dielectric multilayer mirror. The microlens array 823 is mounted on a quartz plate, for example. The upper surface or the upper and lower surfaces of the lens may be provided with a plurality of convex lenses.

[0255] By using the above laser crystallization apparatus, polycrystalline silicon with little variation in crystallinity can be produced. A thin film layer can be formed.

[0256] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0257] (Embodiment 3) In this embodiment, an electronic device of one embodiment of the present invention will be described with reference to drawings.

[0258] The electronic devices exemplified below include a display device according to one embodiment of the present invention in a display portion. Therefore, it is an electronic device that has achieved high resolution. Also, high resolution and large screen It is possible to provide an electronic device that is compatible with both.

[0259] The display unit of the electronic device according to one embodiment of the present invention may be a display device that supports, for example, full high definition, 4K2K, 8K4 It can display images with resolutions of 16K, 8K, or higher. The display screen size must be 20 inches or more diagonally, or 30 inches or more diagonally, The diagonal can be 50 inches or more, 60 inches or more, or 70 inches or more. Cut.

[0260] Examples of electronic devices include television sets, desktop or notebook computers, etc. Personal computers, computer monitors, digital signage Electronic Signage (digital signage), pachinko machines and other large game machines In addition to electronic devices with screens, digital cameras, digital video cameras, digital photo cameras, Examples of such devices include cameras, mobile phones, portable game consoles, personal digital assistants, and audio playback devices. .

[0261] The electronic device or lighting device according to one embodiment of the present invention can be used for interior or exterior walls of a house or building, Or, it can be incorporated along curved surfaces in the interior or exterior of a vehicle.

[0262] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images and information on the display unit. And if a secondary battery is included, the antenna may be used for contactless power transmission.

[0263] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Numbers, distance, light, liquids, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared rays) It may have.

[0264] The electronic device according to one embodiment of the present invention can have various functions. Functions for displaying still images, videos, text images, etc. on the display, touch panel function, calendar Functions such as displaying date or time, running various software (programs) a function to read out a program or data recorded on a recording medium; It can have functions etc.

[0265] FIG. 22A shows an example of a television device. A television device 7100 includes a housing 7 A display unit 7000 is built into the housing 101. 101 is shown as a supported configuration.

[0266] The display device of one embodiment of the present invention can be applied to the display portion 7000.

[0267] The television device 7100 shown in FIG. 22A is operated by an operation switch provided in the housing 7101. This can be done by a separate remote control 7111 or the display unit 70. The display unit 7000 may be provided with a touch sensor, and the operation can be performed by touching the display unit 7000 with a finger or the like. The remote control unit 7111 may display information to be output from the remote control unit 7111. The remote control 7111 may have a display unit that displays the operation keys or touch panel. The channel and volume can be controlled by the touch panel, and the display 7000 displays You can control the image that is displayed.

[0268] The television device 7100 includes a receiver and a modem. The receiver can receive general television broadcasts. It can also receive TV broadcasts by wire or by modem. By connecting to a wireless communication network, one-way (sender to receiver) or It is also possible to communicate information in both directions (between sender and receiver, or between receivers). be.

[0269] FIG. 22B shows a notebook personal computer 7200. The mobile computer 7200 includes a housing 7211, a keyboard 7212, a pointing device, The display unit 7000 is assembled in the housing 7211. It is embedded in the

[0270] The display device of one embodiment of the present invention can be applied to the display portion 7000.

[0271] Figure 22 (C) and (D) show digital signage. An example of a sub-sign is shown below.

[0272] The digital signage 7300 shown in FIG. 22C includes a housing 7301, a display unit 7000, and a speaker 7303. In addition, LED lamps, operation keys (power switch, It may have a variety of functions, including a control switch, connection terminals, various sensors, a microphone, etc. Cut.

[0273] FIG. 22(D) shows a digital signage 740 attached to a cylindrical pillar 7401. The digital signage 7400 is a display unit provided along the curved surface of a pillar 7401. It has 7000.

[0274] In FIG. 22C and FIG. 22D, the display device of one embodiment of the present invention is applied to the display portion 7000. It is possible.

[0275] The larger the display unit 7000, the more information can be displayed at one time. The wider the display unit 7000 is, the more easily it will catch people's attention, and the more effective it will be for advertising, for example. can.

[0276] By applying a touch panel to the display unit 7000, images or videos can be displayed on the display unit 7000. It is preferable because it not only displays information but also allows users to operate it intuitively. Or when used to provide information such as traffic information, intuitive operation is required. This can improve usability.

[0277] Also, as shown in FIG. 22(C) and (D), the digital signage 7300 or the digital The signage 7400 is a device that is connected to a smartphone or other information terminal 7311 or It is preferable that the display unit 7411 can be connected to the information terminal 7411 by wireless communication. The advertisement information displayed on the 7000 is displayed on the screen of the information terminal 7311 or the information terminal 7411. In addition, the information terminal 7311 or the information terminal 7411 can be operated. By operating the buttons, the display on the display unit 7000 can be switched.

[0278] In addition, the Digital Signage 7300 or Digital Signage 7400 can be equipped with an information terminal. A game is played using the screen of the information terminal 7311 or the information terminal 7411 as the operation means (controller). This allows an unspecified number of users to participate in the game at the same time and have fun. It is possible to do so.

[0279] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0280] (Embodiment 4) In this embodiment, a television set to which the display device of one embodiment of the present invention can be applied is An example of the device will be described with reference to the drawings.

[0281] FIG. 23A shows a block diagram of a television device 600. As shown in FIG.

[0282] In the drawings attached to this specification, the components are classified by function and are divided into independent blocks. Although the block diagram shows a block diagram, the actual components are completely separated by function. This can be difficult, and one component may be involved in multiple functions.

[0283] The television device 600 includes a control unit 601, a storage unit 602, a communication control unit 603, an image processing unit, and a processing circuit 604, a decoder circuit 605, a video signal receiving unit 606, a timing controller 6 07, a source driver 608, a gate driver 609, a display panel 620, etc.

[0284] The display device exemplified in the above embodiment is applied to the display panel 620 in FIG. This makes it possible to provide a large-sized, high-resolution television with excellent visibility. The device 600 can be realized.

[0285] The control unit 601 is, for example, a central processing unit (CPU). For example, the control unit 601 can function as a system bus 63. 0, a storage unit 602, a communication control unit 603, an image processing circuit 604, and a decoder circuit 605. and a function of controlling components such as a video signal receiving unit 606.

[0286] Signals are transmitted between the control unit 601 and each component via a system bus 630. The control unit 601 also receives control signals from each component connected via a system bus 630. It has functions such as processing the signals input from the This allows overall control of each component connected to the system bus 630. It is possible.

[0287] The storage unit 602 includes registers and keys that can be accessed by the control unit 601 and the image processing circuit 604. It functions as a cache memory, a main memory, a secondary memory, etc.

[0288] Examples of storage devices that can be used as secondary memories include rewritable non-volatile A storage device using a non-volatile memory element can be used. For example, a flash memory, MRAM(Magnetoresistive Random Access Memo ry), PRAM (Phase change RAM), ReRAM (Resisti ve RAM), FeRAM (Ferroelectric RAM), etc. can be done.

[0289] It can also be used as temporary memory such as a register, cache memory, or main memory. The memory devices that can do this are DRAM (Dynamic RAM) and SRAM (Static RAM). Even if a volatile memory element such as a volatile random access memory (VRAM) is used, good.

[0290] For example, a DRAM is used as the RAM provided in the main memory. A virtual memory space is allocated and used as a working space for the memory unit 601. The operating system, application programs, and program modules stored in Modules, program data, etc. are loaded into RAM for execution. These data, programs, and program modules are directly accessible to the control unit 601. are processed and manipulated.

[0291] On the other hand, ROM has a BIOS (Basic Input / Output) that does not require rewriting. It can store the ROM, such as the ROM (read-only memory) and firmware. Mask ROM and OTPROM (One Time Programmable Read Only) d Only Memory), EPROM (Erasable Programmable EPROM can be used. UV-EPROM (Ultra-Voltage Erasable Read-Only) is a type of EEPROM that allows data to be erased by exposure to ultraviolet light. iolet Erasable Programmable Read Only Me mory), EEPROM (Electrically Erasable Program ammunition read only memory, and flash memory. can be.

[0292] In addition to the storage unit 602, a removable storage device may be connectable. For example, a hard disk drive (Hard Disk Drive: HDD or Solid State Drive ve:SSD) and other recording media drives, flash memory, Blu-ray discs, It is preferable that the device has a terminal for connecting to a recording medium such as a DVD. It is possible.

[0293] The communication control unit 603 has a function of controlling communication carried out via a computer network. For example, the control unit 601 may be configured to connect to a computer network. The control signal for controlling the operation of the computer is transmitted to the computer network. The Internet, which is the foundation of the World Wide Web (WWW), Net, extranet, PAN (Personal Area Network), LAN (Local Area Network), CAN (Campus Area Network) Network), MAN(Metropolitan Area Network), WAN (Wide Area Network), GAN (Global Area N It can connect to computer networks such as the Internet and communicate with them.

[0294] The communication control unit 603 is a ), ZigBee (registered trademark), etc., to communicate with computer networks or other The device may have a function of communicating with the electronic device.

[0295] The communication control unit 603 may have a function for wireless communication. For example, All you need to do is install a high-frequency circuit (RF circuit) and send and receive RF signals. The system converts electromagnetic signals and electrical signals in the frequency bands specified by the regulations into each other, and converts the electromagnetic signals into It is a circuit that uses a practical frequency band to communicate wirelessly with other communication devices. The frequency ranges from several tens of kHz to several tens of GHz are generally used. The circuit has a high-frequency circuit section that supports multiple frequency bands, and the high-frequency circuit section includes an amplifier ( It can be configured with a mixer, filter, DSP, RF transceiver, etc. Cut.

[0296] The video signal receiving unit 606 includes, for example, an antenna, a demodulation circuit, and an AD conversion circuit (analog The demodulation circuit demodulates the signal input from the antenna. The AD conversion circuit converts the demodulated analog signal into a digital signal. The signal processed by the video signal receiving unit 606 is sent to the decoder circuit 605. do.

[0297] The decoder circuit 605 receives the digital signal from the video signal receiving unit 606. The video data is decoded according to the specifications of the broadcasting standard to be transmitted and sent to the image processing circuit. For example, the broadcasting standard for 8K broadcasting is H.265. | MPEG-H High Efficiency Video Coding (abbreviation :HEVC) etc.

[0298] The broadcasting waves that can be received by the antenna of the video signal receiving unit 606 include terrestrial waves, Or radio waves transmitted from a satellite. Also, broadcasting waves that can be received by an antenna. There are analog broadcasts, digital broadcasts, etc., and there are also video and audio, or audio only. For example, UHF band (approximately 300MHz to 3GHz) or VHF band (30 Receiving broadcast radio waves transmitted in a specific frequency band (MHz to 300MHz) For example, multiple data received in multiple frequency bands can be used for transmission. The rate can be increased and more information can be obtained. Images having a resolution exceeding that of the vision can be displayed on the display panel 620. For example, displaying images with resolutions of 4K2K, 8K4K, 16K8K, or higher. It can be done.

[0299] In addition, the video signal receiving unit 606 and the decoder circuit 605 are connected to a computer network. The image processing circuit 604 receives broadcast data transmitted by a data transmission technique via the In this case, if the received signal is a digital signal, In other words, the video signal receiving unit 606 does not need to include a demodulation circuit and an AD conversion circuit.

[0300] The image processing circuit 604 processes the type based on the video signal input from the decoder circuit 605. It has a function of generating a video signal to be output to the video controller 607.

[0301] The timing controller 607 also receives the video signal processed by the image processing circuit 604. Based on the synchronous signal included in It has a function to generate signals (signals such as clock signals and start pulse signals). In addition to the above signals, the timing controller 607 outputs the video signals to the source driver 608. It has the function of generating a video signal.

[0302] The display panel 620 has a plurality of pixels 621. Each pixel 621 is driven by a gate driver 6 609 and the source driver 608. The figure shows an example of a display panel having a resolution according to the 8K4K standard, which is 7680 x 4320. The resolution of the display panel 620 is not limited to this, and may be full high-definition (pixel 4K2K (pixel count 3840 x 2160) or 4K2K (pixel count 1920 x 1080) It may be a resolution.

[0303] The control unit 601 and the image processing circuit 604 shown in FIG. 23A may be implemented by, for example, a processor. For example, the control unit 601 may include a central processing unit (CPU). Using a processor that functions as a central processing unit (CPU) In addition, the image processing circuit 604 may be, for example, a DSP (Digital Sign al Processor), GPU(Graphics Processing Un) It is also possible to use other processors such as the control unit 601 and the image processing circuit 60. 4. The above processor is implemented as an FPGA (Field Programmable Gate Array). Array) and FPAA (Field Programmable Analog Array) and FPAA (Field Programmable Analog Array) ray) and other PLDs (Programmable Logic Devices) The above configuration may be adopted.

[0304] The processor performs various data processing operations by interpreting and executing instructions from various programs. The programs that can be executed by the processor are those that the processor is capable of executing. The information may be stored in a memory area provided in the same place, or may be stored in a storage device provided separately. good.

[0305] In addition, a control unit 601, a storage unit 602, a communication control unit 603, an image processing circuit 604, a decoder The image signal receiving circuit 605, the image signal receiving unit 606, and the timing controller 607 are Two or more of these functions are integrated into a single IC chip to create a system LSI. For example, a processor, a decoder circuit, a tuner circuit, an AD conversion circuit, , DRAM, SRAM, etc., may be used as a system LSI.

[0306] In addition, the control unit 601 and ICs of other components are provided with an oxygen-containing channel forming region. It is also possible to use transistors that use nitride semiconductors and have extremely low off-state current. Since the off-state current of the transistor is extremely low, the transistor can be used as a memory element. It is used as a switch to hold the charge (data) that has flowed into the capacitance element that functions as a This allows the data to be held for a long period of time. By using it for registers or cache memories such as In other cases, the information from the immediately preceding process is saved in the memory element, so that the normally This enables off-line computing. This allows the television device 600 to consume less power. This will enable us to strengthen our capabilities.

[0307] Note that the configuration of the television device 600 illustrated in FIG. 23(A) is merely an example, and all configurations The television device 600 does not need to include any of the components shown in FIG. The television device 600 may have the necessary components. The present invention may have components other than those shown in the above.

[0308] For example, the television device 600 may have an external interface in addition to the configuration shown in FIG. It includes an interface, audio output unit, touch panel unit, sensor unit, camera unit, etc. For example, the external interface may be a USB (Universal al Serial Bus) terminal, LAN (Local Area Network) Connection terminal, power supply terminal, audio output terminal, audio input terminal, video output terminal, video External connection terminals such as input terminals, and optical communication transmission and reception using infrared, visible light, ultraviolet light, etc. For example, the audio input / output unit is a sound These include a hand controller, microphone, and speaker.

[0309] The image processing circuit 604 will now be described in more detail.

[0310] The image processing circuit 604 processes an image based on a video signal input from the decoder circuit 605. It is preferable that the device has a function of executing the process.

[0311] The image processing includes, for example, noise removal processing, gradation conversion processing, color correction processing, and brightness correction processing. Examples of color correction and brightness correction include gamma correction. do.

[0312] In addition, the image processing circuit 604 performs pixel interpolation processing associated with resolution up-conversion and frame It has the function of performing processing such as frame interpolation associated with frame frequency up-conversion. It is preferable that

[0313] For example, noise removal processing can be used to remove mosquito noise that occurs around the contours of characters, etc. Block noise that occurs in high-speed video, random noise that causes flickering, and increased resolution Removes various noises such as dot noise caused by conversion.

[0314] The grayscale conversion process converts the grayscale of the image into a grayscale that corresponds to the output characteristics of the display panel 620. For example, when increasing the number of gradations, for an image input with a small number of gradations, The histogram is smoothed by assigning a corresponding grayscale value to each pixel through interpolation. It can also be used to expand the dynamic range, called High Dynamic Range (HDR). The process is also included in the tone conversion process.

[0315] In addition, pixel interpolation processing creates data that does not actually exist when the resolution is up-converted. For example, the pixels around the target pixel are referenced and the intermediate color between them is displayed. Interpolate the data to

[0316] The color correction process is a process for correcting the color tone of an image. For example, the television device 600 The type, brightness, or color purity of the lighting in the space in which the device is installed is detected, and the display panel is adjusted accordingly. The brightness and color of the image displayed on the LCD panel 620 are adjusted to be optimal. The image is compared with images of various scenes in a pre-stored image list, and the closest The display device may have a function of correcting the image to be displayed with brightness and color tones suitable for an image of a different scene.

[0317] Interframe interpolation is used when increasing the frame frequency of a displayed image. For example, two images can be generated by subtracting two images. Generate an image of an interpolated frame to be inserted between two images. Or generate multiple images between two images. It is also possible to generate an image of an interpolated frame. For example, When the frame frequency of the video signal is 60Hz, multiple interpolated frames can be generated. As a result, the frame frequency of the video signal output to the timing controller 607 is doubled to 1. It can be increased to 20Hz, or 4 times to 240Hz, or 8 times to 480Hz. Cut.

[0318] The image processing circuit 604 also uses a neural network to perform image processing. In FIG. 23(A), the image processing circuit 604 is a neural network. 6 shows an example having a network 610.

[0319] For example, the neural network 610 derives a The image processing circuit 604 can then perform feature extraction. It is possible to select a suitable correction method or a parameter to be used for the correction.

[0320] Alternatively, the neural network 610 itself may have the function of performing image processing. That is, image data before image processing is input to the neural network 610. The image data that has been subjected to image processing may be output.

[0321] The weighting coefficient data used in the neural network 610 is stored in a data table. The weighting coefficients are stored in the storage unit 602 as a data table. The unit 603 can be updated to the latest version via a computer network. Alternatively, the image processing circuit 604 has a learning function and updates the data table including the weighting coefficients. This may be a possible configuration.

[0322] FIG. 23B is a schematic diagram of a neural network 610 included in the image processing circuit 604. Shows.

[0323] In this specification, the term "neural network" refers to a network that imitates the neural circuitry of living organisms and is used for learning. A general model that determines the strength of connections between neurons through learning and gives a problem-solving ability A neural network has an input layer, an intermediate layer (also called a hidden layer), and an output layer. A neural network that has two or more hidden layers is called a deep neural network. Deep neural network (DNN) is a machine learning method that uses deep neural networks. This is called training.

[0324] In addition, when discussing neural networks in this specification, etc., Determining the connection strengths (also called weighting coefficients) between neurons based on information is called “learning.” In this specification, the connection weights obtained by learning are used. The process of constructing a neural network using these data and deriving new conclusions from it is called "inference." There is a match.

[0325] The neural network 610 includes an input layer 611, one or more hidden layers 612, and an output The input layer 611 receives input data. The output layer 613 outputs The data is output.

[0326] The input layer 611, the intermediate layer 612, and the output layer 613 each have neurons 615. Here, the neuron 615 indicates a circuit element (product-sum operation element) that can realize a product-sum operation. In Figure 23(B), the data input between two neurons 615 in two layers is shown. The output direction is indicated by an arrow.

[0327] The computation in each layer is performed using the output of the neuron 615 in the previous layer, weight coefficients, and For example, the output of the i-th neuron in the input layer 611 is expressed as x i Then, the output is x i The connection strength (weight coefficient) between the j-th neuron in the next hidden layer 612 and j i Then, the output of the j-th neuron in the hidden layer is y j =f(Σw ji x i ). Note that i and j are integers equal to or greater than 1. Here, f(x) is the activation function, a sigmoid function, A threshold function or the like can be used. Similarly, the output of the neuron 615 in each layer is calculated by The activation function is calculated by multiplying and adding the output of the neuron 615 of the layer and the weighting coefficient. In addition, the connections between layers may be full connections in which all neurons are connected to each other, or Partial connections in which some neurons are connected to each other may also be used.

[0328] FIG. 23B shows an example having three intermediate layers 612. The number of intermediate layers is not limited to this, and it is sufficient to have one or more intermediate layers. The number of neurons in the hidden layer 6 can be changed according to the specifications. The number of neurons 615 in the input layer 611 or the output layer 613 is The number of the conductors may be more or less than that of the conductor 615.

[0329] The weighting coefficients, which are indicative of the connection strength between neurons 615, are determined by learning. The learning may be performed by a processor included in the television device 600, but may also be performed by a dedicated server. It is preferable to execute the program on a computer with high computing power, such as a server or the cloud. The weighting coefficients thus determined are stored in the storage unit 602 as a table, and are then input to the image processing circuit 606. The table is used by being read by the 04. The software can be updated via a computer network.

[0330] This concludes the explanation of neural networks.

[0331] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0332] 10 Display device 11 Substrate 12 Substrate 20 Liquid crystal element 21 Conductive layer 22 Liquid crystal 23 Conductive layer 24a Alignment film 24b Alignment film 26 Insulating layer 30 Transistor 31 Conductive layer 31a conductive layer 31b Conductive layer 31at conductive layer 31bt conductive layer 32 Semiconductor layer 32p Semiconductor layer 33 Conductive layer 33a conductive layer 33b Conductive layer 33c conductive layer 33at conductive layer 33bt conductive layer 33ct conductive layer 34 Insulating layer 35 Impurity semiconductor layer 37 Semiconductor layer 38 Connection 39a Polarizing plate 39b Polarizing plate 41 Colored layer 42 Light blocking layer 50 light 60 Capacitive element 81 Insulating layer 82 Insulating layer 83 Insulating Layer 84 Insulating Layer 85 Insulating Layer 86 Conductive Layer 87 Conductive Layer 88 Insulating Layer 90 Backlight unit 600 Television Equipment 601 Control section 602 Storage section 603 Communication Control Unit 604 Image Processing Circuit 605 Decoder Circuit 606 Video signal receiving unit 607 Timing Controller 608 Source Driver 609 Gate Driver 610 Neural Networks 611 Input Layer 612 Middle Class 613 Output Layer 615 Neurons 620 Display Panel 621 pixels 630 System Bus 812 Moving mechanism 813 Moving mechanism 815 Stage 816 Ball screw mechanism 820 Laser Oscillator 821 Optical Unit 822 Mirror 823 Microlens Array 824 Mask 825 Laser light 826 Laser light 827 Laser Beam 830 Substrate 840 Amorphous silicon layer 841 Polycrystalline silicon layer 7000 Display 7100 Television equipment 7101 Case 7103 Stand 7111 Remote control device 7200 Notebook Personal Computer 7211 Case 7212 Keyboard 7213 Pointing Device 7214 External connection port 7300 Digital Signage 7301 Case 7303 Speaker 7311 Information terminal 7400 Digital Signage 7401 Pillar 7411 Information terminal

Claims

1. A display area in which a plurality of pixels are arranged in a matrix, In the display area, a plurality of source lines are evenly arranged, A display device having a configuration in which two source lines among the plurality of source lines are arranged for each column, The pixel includes first to fourth pixels, the first pixel and the second pixel are adjacent to each other in a column direction, the third pixel and the fourth pixel are adjacent to each other in a column direction, the first pixel and the third pixel are adjacent to each other in a row direction, the second pixel and the fourth pixel are adjacent to each other in a row direction, the first pixel includes a first transistor and a first conductive layer; the second pixel includes a second transistor and a second conductive layer; the third pixel includes a third transistor and a third conductive layer; the fourth pixel includes a fourth transistor and a fourth conductive layer; the first conductive layer has a region that functions as a pixel electrode; the second conductive layer has a region that functions as a pixel electrode, the third conductive layer has a region that functions as a pixel electrode, the fourth conductive layer has a region that functions as a pixel electrode, a gate of the first transistor is electrically connected to a first wiring; a gate of the second transistor is electrically connected to a second wiring; a gate of the third transistor is electrically connected to the first wiring; a gate of the fourth transistor is electrically connected to the second wiring; one of a source and a drain of the first transistor is electrically connected to a third wiring; one of a source and a drain of the second transistor is electrically connected to a fourth wiring; one of a source and a drain of the third transistor is electrically connected to a fifth wiring; one of a source and a drain of the fourth transistor is electrically connected to a sixth wiring; the other of the source and the drain of the first transistor is electrically connected to the first conductive layer; the other of the source and the drain of the second transistor is electrically connected to the second conductive layer; the other of the source and the drain of the third transistor is electrically connected to the third conductive layer; the other of the source and the drain of the fourth transistor is electrically connected to the fourth conductive layer; the first conductive layer has a region overlapping the fourth wiring and does not overlap the third wiring; the second conductive layer has a region overlapping the fourth wiring and does not overlap the third wiring; the third conductive layer has an area overlapping the fifth wiring and does not overlap the sixth wiring; the fourth conductive layer has an area overlapping the fifth wiring and does not overlap the sixth wiring; the fourth wiring has a region between the third wiring and the sixth wiring, The sixth wiring has a region between the fourth wiring and the fifth wiring.

2. In claim 1, The display device, wherein the first conductive layer, the second conductive layer, and the fourth conductive layer transmit visible light.

Images