Display device

Abstract

To prevent misalignment of light-emitting elements.SOLUTION: A display device according to an embodiment comprises a wiring substrate having a plurality of link wiring lines arranged thereon; a plurality of display units spaced apart from each other on the wiring substrate; and a plurality of bonding members located between the display units and the wiring substrate and connected to the plurality of link wiring lines. The wiring substrate includes a thin-film transistor, and each of the display units includes a light-emitting element.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present specification relates to a display device, and more particularly to a display device in which a plurality of display units are arranged on a wiring board on which a plurality of link wirings are arranged. [Background technology]

[0002] Display devices are used in a variety of electronic devices, such as TVs, mobile phones, notebook computers, tablet PCs, etc. For this reason, research is ongoing to develop thinner, lighter, and less power-consuming display devices.

[0003] Among display devices, an emissive display device has a light emitting element or a light source built in the display device and displays information using light generated from the built-in self-emitting element or light source. A display device including a self-emitting element can be configured thinner than a display device having a built-in light source, and is flexible, which has the advantage that a display device that can be folded, bent, or rolled up can be configured.

[0004] Examples of display devices incorporating self-luminous elements include organic light emitting devices (OLEDs) that contain organic materials as a light emitting layer, and micro light emitting diode displays (Micro LEDs) that contain inorganic materials as a light emitting layer. Although OLEDs do not require a separate light source, they have a problem in that defective pixels are easily generated due to the characteristics of organic materials that are vulnerable to moisture and oxygen due to the external environment. In contrast, Micro LED displays use inorganic materials that are resistant to moisture and oxygen as a light emitting layer, so they are not affected by the external environment, have high reliability, and have a longer lifespan than OLEDs. Summary of the Invention [Problem to be solved by the invention]

[0005] An object of the present invention is to provide a large-area transparent display device by arranging a plurality of display units on a wiring board on which a plurality of link wirings are arranged.

[0006] In addition, the problem to be solved by the embodiments of the present specification is to provide a display device that can realize a zero bezel area in which the bezel area is arranged in a minimal space, the space is reduced, or there is essentially no bezel area.

[0007] Moreover, the problem to be solved by the embodiments of this specification is to provide a display device that prevents a decrease in transfer yield when transferring light-emitting elements onto a display unit or a display unit structure.

[0008] In addition, the problem to be solved by the embodiments of this specification is to provide a display device that prevents the problem of misalignment of light-emitting elements that occurs due to an increase in the number of times that light-emitting elements are transferred onto a display unit.

[0009] Another object of the present invention is to provide a display device that can be easily repaired when a defect occurs in a light emitting element or a thin film transistor.

[0010] The problem to be solved by one embodiment of the present specification is not limited to the above-mentioned object, and other objects and advantages of the present invention not mentioned can be understood from the following description and can be more clearly understood from the embodiment of the present specification. It will be understood that the objects and advantages of the present specification can be realized by the means and combinations thereof set forth in the claims. [Means for solving the problem]

[0011] A display device according to one embodiment of the present specification includes a wiring board, a plurality of link wirings arranged on the wiring board, a plurality of display units arranged spaced apart from each other on the wiring board, and a plurality of bonding members located between the plurality of display units and the wiring board and connected to the plurality of link wirings, wherein the wiring board includes thin film transistors, and the plurality of display units include light-emitting elements.

[0012] A display device according to another embodiment of the present specification includes a wiring board, a plurality of link wirings arranged on the wiring board, a plurality of display units arranged spaced apart from each other on the wiring board, and a plurality of bonding members located between the plurality of display units and the wiring board and connected to the plurality of link wirings, wherein the wiring board includes a light-emitting element, and the plurality of display units include thin film transistors. Effect of the Invention

[0013] According to the embodiments of the present specification, it is possible to realize a large-area transparent display device by arranging a plurality of display units so as to overlap each other on the upper surface of a wiring board on which a plurality of link wirings are arranged.

[0014] Furthermore, according to the embodiments of the present specification, a self-assembly substrate on which light-emitting elements are arranged is used as a display unit, and is directly bonded to a wiring substrate, thereby making it possible to omit the process of transferring the light-emitting elements, thereby achieving process optimization.

[0015] In addition, by directly bonding the self-assembly substrate on which the light-emitting elements are arranged to the wiring substrate, the use of a transfer substrate can be omitted, and there is an effect that the material components can be unified and an environmentally friendly product can be manufactured.

[0016] In addition, by directly bonding the self-assembly substrate on which the light-emitting elements are arranged to the wiring substrate, it is possible to omit the separate process of transferring the light-emitting elements onto the display unit, which has the effect of preventing a decrease in the transfer yield of the light-emitting elements and the occurrence of misalignment.

[0017] Furthermore, by directly bonding the self-assembly substrate on which the light-emitting elements are arranged to the wiring substrate, there is an advantage that, when a defective light-emitting element occurs, it can be easily repaired.

[0018] Furthermore, by directly bonding the display unit on which the thin film transistors are arranged to the wiring substrate on which the light emitting elements are arranged, there is an advantage that any defective thin film transistors can be easily repaired.

[0019] In addition, the problem to be solved by the embodiments of the present specification has the effect of arranging the bezel area in the minimum space, reducing the space of the bezel area, or realizing a zero bezel area in which there is essentially no bezel area.

[0020] The effects of the present specification are not limited to those mentioned above, and other effects not mentioned herein will be clearly understood by those skilled in the art from the following description. [Brief description of the drawings]

[0021] [Figure 1] 1 is a schematic plan view of a display device according to an embodiment of the present disclosure; [Diagram 2] FIG. 2 is a schematic plan view of the display device of FIG. 1 according to an embodiment of the present specification. [Diagram 3] FIG. 3 is a cross-sectional view of FIG. 2. [Figure 4] FIG. 4 is a cross-sectional view of FIG. 3 in a display device according to an embodiment of the present specification. [Diagram 5] FIG. 11 is a cross-sectional view showing a modified example of the display device according to the embodiment of the present specification. [Figure 6] 11 is a schematic cross-sectional view of a display device according to another embodiment of the present specification. [Figure 7] FIG. 7 is a cross-sectional view of the display device according to another embodiment of the present specification, as shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] The advantages and features of the present specification, and the methods for achieving them, will become clear from the detailed description of the embodiments described below in conjunction with the accompanying drawings. However, the present specification is not limited to the embodiments disclosed below, but may be configured in various different forms. However, the present embodiments are provided to complete the disclosure of the specification and to fully inform those skilled in the art of the present specification of the scope of the invention.

[0023] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings to explain the embodiments of this specification are illustrative, and this specification is not limited to the matters shown in the drawings. The same reference symbols throughout the specification refer to the same components. In addition, in explaining this specification, if a specific description of related known technology is judged to make the gist of this specification unclear, the detailed description will be omitted. When "includes," "has," "is," etc. are used as mentioned in this specification, other parts can be added unless "only" is used. When a component is expressed in the singular, it includes the case where it includes a plurality, unless otherwise explicitly stated.

[0024] When interpreting elements, they are interpreted as including a margin of error unless otherwise expressly stated.

[0025] When describing the positional relationship between two parts, for example, using "on", "at the top", "below", "to the side", etc., one or more other parts may be located between the two parts, unless "immediately" or "directly" is used.

[0026] When describing a temporal relationship, for example, using "after", "follows", "next to", "before", etc., non-consecutive cases can also be included, unless "immediately" or "directly" is used.

[0027] Although the terms "first", "second", etc. are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Thus, the first component referred to below may be the second component within the technical concept of this specification.

[0028] The features of the various embodiments of this specification may be partially or fully combined or interlocked with each other, and may be technically linked and driven in various ways, and each embodiment may be implemented independently of each other, or may be implemented together in a linked relationship.

[0029] Hereinafter, display devices according to embodiments of the present invention will be described with reference to the accompanying drawings.

[0030] A display device including a micro LED can realize a flexible display device while having a thinner structure than an organic light emitting display device, and therefore, it is easy to configure a large-area tiling display device by arranging a plurality of display devices including a plurality of micro LEDs.

[0031] The process of forming a display device including a micro LED includes first growing a light emitting element on a growth substrate, separating the light emitting element from the growth substrate, and aligning the light emitting element on a self-assembly substrate through a primary transfer process. The light emitting element may be a micro LED. Next, the light emitting element aligned on the self-assembly substrate is transferred to a transfer substrate and aligned, and then aligned from the transfer substrate to a substrate of the display device through a secondary transfer process, thereby forming a display device including a micro LED.

[0032] However, when the light emitting devices are transferred to the self-assembly substrate through the first transfer process, if the light emitting devices transferred onto the self-assembly substrate are not transferred to the target position and are over-transferred to a position that is different from the target position, the transfer yield is reduced. Also, the number of transfers increases in order to transfer light emitting devices having different colors, and as the number of transfers increases, the accuracy of the alignment of the light emitting devices decreases, which may cause a problem of misalignment in which the light emitting devices are not aligned to the target position.

[0033] In this regard, the display device according to the embodiment of the present specification is configured by forming a self-assembly substrate on which light-emitting elements are arranged from a display unit or a display unit structure, and directly bonding the self-assembly substrate to a wiring substrate, thereby preventing a decrease in transfer yield or the occurrence of a problem of misalignment of the light-emitting elements. The following description will be given with reference to the drawings.

[0034] Fig. 1 is a schematic plan view of a display device according to an embodiment of the present specification. Fig. 2 is a schematic plan view of Fig. 1 in a display device according to an embodiment of the present specification. Fig. 3 is a cross-sectional view of Fig. 2. And Fig. 4 is a cross-sectional view of Fig. 3 in a display device according to an embodiment of the present specification.

[0035] For ease of explanation, FIG. 1 shows only the following components of the display device (TD): a first base substrate 205 of a wiring board (M-SUB), a plurality of link wirings (LL) arranged on the first base substrate 205, a plurality of circuit films 210 on which integrated circuit chips 213 are arranged, a printed circuit board 215, and a plurality of display units (TU).

[0036] 1 to 3, a tiling display device (TD) according to an embodiment of the present specification may include a plurality of display units (TU) arranged on a wiring substrate (M-SUB). Adjacent display units (TU) may be arranged along a first direction and a second direction intersecting or crossing the first direction. Here, the first direction may be a horizontal direction, and the second direction may be a vertical direction. The wiring substrate (M-SUB) and the display unit (TU) may include glass or transparent plastic. This makes it possible to realize a large-area transparent display device.

[0037] A plurality of link wires (LL) and a plurality of transistors (TFT) may be arranged on the first base substrate 205 of the wiring substrate (M-SUB). The plurality of link wires (LL) may be arranged along one direction of the first base substrate 205. A driving unit including a printed circuit board 215 connected to an end of the link wires (LL) and connected to a circuit film 210 on which an integrated circuit chip 213 is mounted may be arranged at at least one end of the wiring substrate (M-SUB) to transmit various signals to each sub-pixel of the display unit. For example, the signals transmitted to the sub-pixels may include a high potential voltage, a low potential voltage, a scan signal, a data signal, etc. In the embodiment of the present specification, a configuration is shown in which the driving unit including the printed circuit board 215 connected to the circuit film 210 on which an integrated circuit chip 213 is mounted is arranged at both end portions of the first base substrate 205, but is not limited thereto.

[0038] The link lines (LL) can transmit various signals transmitted from the driver to the signal lines of the display units (TUs). For example, the signal lines can include high-potential voltage lines, low-potential voltage lines, scan lines, or data lines. This will be further described with reference to FIG. 4.

[0039] The wiring substrate (M-SUB) may include a thin film transistor (TFT). The thin film transistor (TFT) is electrically connected to each of a plurality of light emitting elements (ED) arranged on the display unit (TU) to transmit a driving signal to the light emitting elements (ED) to cause the light emitting elements (ED) to emit light. For this purpose, a first wiring electrode (CE1) and a second wiring electrode (CE2) electrically connected to the thin film transistor (TFT) may be arranged on the wiring substrate (M-SUB). The first wiring electrode (CE1) and the second wiring electrode (CE2) are electrically connected to the light emitting elements (ED) to transmit a driving signal from the thin film transistor (TFT) to the light emitting elements (ED).

[0040] The display units (TU) arranged on the wiring board (M-SUB) can be connected to the first base substrate 205 by electrical connections between the signal wirings and the link wirings (LL) arranged on the wiring board (M-SUB). Here, the link wirings (LL) are arranged so as to overlap the display units (TU) and may not be exposed to the outside. This makes it possible to reduce the area of ​​the circuit region where the link wirings (LL) are arranged, and the display area can be increased.

[0041] 2 and 3, the display units (TU1, TU2) may include a first display unit (TU1) and a second display unit (TU2) arranged adjacent to each other in one direction on a wiring substrate (M-SUB). For convenience of explanation, the drawings show only a configuration in which two display units (TU1, TU2) are arranged, but the present invention is not limited thereto. For example, each display unit may be arranged adjacent to another display unit on one side.

[0042] Each of the display units (TU1, TU2) according to an embodiment of the present specification may be a self-assembly substrate on which a plurality of light-emitting elements (ED) are arranged.

[0043] The plurality of light emitting elements (ED) may include a first light emitting element (ED1a), a second light emitting element (ED2a), and a third light emitting element (ED3a). The first light emitting element (ED1a), the second light emitting element (ED2a), or the third light emitting element (ED3a) may emit light of different hues. For example, the first light emitting element (ED1a) may emit red (R) light, the second light emitting element (ED2a) may emit green (G) light, and the third light emitting element (ED3a) may emit blue (B) light. However, without being limited thereto, the light emitting element may further include a white light emitting element that emits white light. The light emitting element according to the embodiment of the present specification may be a micro LED.

[0044] In addition, the plurality of light emitting elements (ED) may further include redundancy light emitting elements (ED1b, ED2b, ED3b) for a repair process. For example, the redundancy light emitting elements (ED1b, ED2b, ED3b) may include a first redundancy light emitting element (ED1b), a second redundancy light emitting element (ED2b), or a third redundancy light emitting element (ED3b) corresponding to the first light emitting element (ED1a), the second light emitting element (ED2a), or the third light emitting element (ED3a), respectively.

[0045] The wiring board (M-SUB) and the multiple display units (TU1, TU2) can be bonded together and electrically connected by multiple bonding members (BC1, BC2). The multiple bonding members (BC1, BC2) may be disposed on the multiple display units (TU1, TU2), respectively. The multiple bonding members (BC1, BC2) may be disposed between the wiring board (M-SUB) and the multiple display units (TU1, TU2), and may include a material having adhesive properties on at least one surface. In addition, the multiple bonding members (BC1, BC2) include a conductive material, and can electrically connect the wiring board (M-SUB) and the multiple display units (TU1, TU2).

[0046] For example, the bonding members (BC1, BC2) may each include a spacer pattern 211, a conductive connection pattern 217, and an adhesive pattern 220. One side of the bonding members (BC1, BC2) may be connected to the signal transmission wiring (ML) on the display unit (TU1, TU2), and the other side may be electrically connected to the link wiring (LL) on the wiring substrate (M-SUB).

[0047] For example, the filler 230 may include a transparent epoxy resin and be filled through an underfill process. The filler 230 may fix the wiring board (M-SUB) and the display units (TU1, TU2) together with the bonding members (BC1, BC2). The filler 230 may also fill a bezel area, which is a boundary area between the adjacently arranged display units (TU1, TU2). By configuring the filler 230 to include a transparent material, the core area can be blocked from the user's field of vision. As a result, the bezel area is arranged in a minimum space, the bezel area is reduced, or a zero bezel area in which there is substantially no bezel area is realized, thereby providing an effect of further increasing the area of ​​the display area.

[0048] Each of the display units (TU1, TU2) may include a light-emitting element (ED) disposed on a self-assembly substrate. The following description will be given with reference to FIG. 4. For convenience of explanation, FIG. 4 shows only one sub-pixel among the multiple sub-pixels.

[0049] Referring to FIG. 4, the wiring board (M-SUB) and the display units (TU1, TU2) can be attached and electrically connected by a plurality of bonding members (BC1, BC2).

[0050] The wiring substrate (M-SUB) may include a thin film transistor (TFT), a storage capacitor (Cst), and various wirings arranged on the first base substrate 205. The thin film transistor (TFT) may drive the light emitting element (ED), and the storage capacitor (Cst) may store a voltage so that the light emitting element (ED) continues to maintain the same state during one frame. The first base substrate 205 may be made of a transparent material including glass or plastic.

[0051] A light-shielding layer (LS) may be disposed on the first base substrate 205 of the wiring substrate (M-SUB). The light-shielding layer (LS) can block light incident on the active layer (ACT) of the thin film transistor (TFT) from the first base substrate 205 to reduce leakage current.

[0052] A buffer layer 104 is disposed on the light-shielding layer (LS). The buffer layer 104 can prevent impurities or moisture from penetrating through the first base substrate 205. The buffer layer 104 can include an insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

[0053] A thin film transistor (TFT) is disposed on the buffer layer 104. The thin film transistor (TFT) may include a semiconductor layer (ACT), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). A gate insulating layer (GI) may be disposed between the semiconductor layer (ACT) and the gate electrode (GE).

[0054] The semiconductor layer (ACT) may include an active region overlapping the gate electrode (GE) to form a channel, and a source region and a drain region located on both sides of the active region. An interlayer insulating film 106 is disposed on the gate electrode (GE). The interlayer insulating film 106 may include a source contact (SC) and a drain contact (DC). The source contact (SC) and the drain contact (DC) may partially expose the surfaces of the source region and the drain region of the semiconductor layer (ACT). The source contact (SC) and the drain contact (DC) may be electrically connected to a source electrode (SE) and a drain electrode (DE) located on the interlayer insulating film 106 and electrically connected to the source / drain region of the semiconductor layer (ACT), respectively. The source electrode (SE) and the drain electrode (DE) may be made of a conductive material, for example, but not limited to, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof.

[0055] The storage capacitor (Cst) is disposed apart from the thin film transistor (TFT) and may include a first capacitor electrode (ST1) and a second capacitor electrode (ST2). The first capacitor electrode (ST1) may be disposed between the first base substrate 205 and the buffer layer 104. The first capacitor electrode (ST1) may be integral with the light-shielding layer (LS). The buffer layer 104 and the gate insulating layer (GI) may be disposed on the first capacitor electrode (ST1) as dielectrics. The second capacitor electrode (ST2) may be disposed on the gate insulating layer (GI). The second capacitor electrode (ST2) may be made of the same material as the gate electrode (GE).

[0056] A first passivation layer 108 is disposed on the source electrode (SE) and the drain electrode (DE). The first passivation layer 108 serves to protect the thin film transistor (TFT) and may include an insulating material. A first planarization layer 110 is disposed on the first passivation layer 108. The first planarization layer 110 serves to flatten surface steps caused by lower wiring of the thin film transistor (TFT) and the like. The first planarization layer 110 may be configured to include, but is not limited to, a photoactive compound (PAC).

[0057] The first planarization layer 110 may include a via hole 112 exposing a portion of the surface of the source electrode (SE) and the drain electrode (DE). The via hole 112 may penetrate the first planarization layer 110 and the first passivation layer 108, respectively, to expose a portion of the surface of the drain electrode (DE).

[0058] A second passivation layer 116 including an insulating material may be disposed on the first planarization layer 110, and a second via contact 120 may be disposed to fill the via hole 112. A connecting electrode 125 connected to the interlayer connecting electrode 120 and a low resistance metal pattern 126 covering the connecting electrode 125 may be disposed on the second passivation layer 116.

[0059] One surface of the second via contact 120 may be connected to the drain electrode (DE), and the other surface may be connected to the connecting electrode 125. In addition, the drain electrode (DE) may be electrically connected to the light blocking layer (LS) through a first via contact (VC) penetrating the interlayer insulating film 105 and the buffer layer 104. The low resistance metal pattern 126 and the protective layer 135 may be formed to cover the connecting electrode 125, and may expose a portion of the surface of the connecting electrode 125.

[0060] A link wiring (LL) may be disposed on the first planarization layer 110. The link wiring (LL) can transmit various signals transmitted from a driving unit including a printed circuit board 215 to a plurality of signal transmission wirings (ML) of each of the plurality of display units (TU).

[0061] In the embodiment of the present specification, the link wiring (LL) is disposed on the second passivation layer 116, but the present invention is not limited to this. For example, the link wiring (LL) may be disposed on the first base substrate 205, on the same plane as the light-shielding layer (LS), and made of the same material.

[0062] The link wiring (LL) may be covered with a second planarization layer 140. The second planarization layer 140 may have a thickness sufficient to flatten a surface having a step caused by a circuit element such as a thin film transistor (TFT). The second planarization layer 140 may include a third via contact (IML). One surface of the third via contact (IML) may penetrate the second planarization layer 140 and connect with a part of the surface of the link wiring (LL). The other surface of the third via contact (IML) may be exposed at the surface of the second planarization layer 140.

[0063] The second planarization layer 140 may also include an opening 145. The opening 145 may penetrate the second planarization layer 140 and the protective layer 135 to expose a portion of a surface of the connecting electrode 125. A first wiring electrode (CE1) and a second wiring electrode (CE2) may be disposed on the second planarization layer 140 including the opening 144. The first wiring electrode (CE1) and the second wiring electrode (CE2) may be disposed spaced apart from each other. The second wiring electrode (CE2) may extend to an exposed surface of the opening 144 and be electrically connected to the drain electrode (DE) via the connecting electrode 125.

[0064] The first wiring electrode (CE1) and the second wiring electrode (CE2) may be disposed on the same layer and made of the same conductive material. In one example, the first wiring electrode (CE1) and the second wiring electrode (CE2) may include, but are not limited to, a transparent metal oxide such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

[0065] Further referring to FIG. 4, a display unit (TU) is disposed at a position facing a wiring substrate (M-SUB) including thin film transistors (TFTs).

[0066] The display unit (TU) may be a self-assembly substrate. The self-assembly substrate may include assembly electrodes (AE1, AE2), cladding electrodes (CDE1, CDE2), a partition pattern (PL) defining or adjacent to an assembly pocket (PK) region, and signal wiring (ML) disposed on the second base substrate 102.

[0067] The second base substrate 102 may include a glass or plastic material. The assembly electrodes (AE1, AE2) may include a first assembly electrode (AE1) and a second assembly electrode (AE2). The first assembly electrode (AE1) and the second assembly electrode (AE2) may be arranged to be spaced apart from each other and may respectively correspond to a plurality of light emitting devices (ED) assembled through a self-assembly process. The assembly electrodes (AE1, AE2) may include a transparent electrode material including indium-tin-oxide (ITO). When a voltage is applied to the first assembly electrode (AE1) and the second assembly electrode (AE2) during the self-assembly process, the first assembly electrode (AE1) and the second assembly electrode (AE2) may generate an electric field to stably fix the light emitting device (ED) moved into the assembly pocket (PK).

[0068] The first assembly electrode (AE1) and the second assembly electrode (AE2) are covered with clad electrodes (CDE1, CDE2). The clad electrodes (CDE1, CDE2) include a first clad electrode (CDE1) and a second clad electrode (CDE2), and are arranged to cover the first assembly electrode (AE1) and the second assembly electrode (AE2), respectively.

[0069] The first clad electrode (CDE1) and the second clad electrode (CDE2) prevent corrosion of the first assembly electrode (AE1) and the second assembly electrode (AE2) during a self-assembly process performed in a fluid, and facilitate the formation of an electric field for assembling the light emitting device (ED). The first clad electrode (CDE1) and the second clad electrode (CDE2) may include copper (Cu). For example, a gap between the first clad electrode (CDE1) and the second clad electrode (CDE2) is formed smaller than a gap between the first assembly electrode (AE1) and the second assembly electrode (AE2), so that the assembly position of the light emitting device (ED) disposed in the assembly pocket (PK) can be fixed more precisely.

[0070] A partition wall (PL) may be disposed on the clad electrodes (CDE1, CDE2). A portion of the partition wall (PL) may cover the upper portion of the clad electrodes (CDE1, CDE2), and another region may be disposed on the second base substrate 102. The partition wall (PL) includes an assembly pocket (PK) defined or contained therein. The assembly pocket (PK) may specify a position where the light emitting element (ED) is bonded. The partition wall (PL) may have a thickness at least equal to or greater than the height of the light emitting element (ED).

[0071] An adhesive layer (AD) is disposed on the clad electrodes (CDE1, CDE2). The adhesive layer (AD) serves to adhere the light emitting element (ED). The adhesive layer (AD) may be made of a thermosetting material or a photocurable material, but is not limited thereto.

[0072] A light-emitting element (ED) may be disposed on the adhesive layer (AD). The light-emitting element (ED) according to the embodiment of the present specification may be a micro LED. A micro LED is an inorganic LED and may be understood as a light-emitting element having a size of 100 μm or less. In the embodiment of the present specification, a horizontal micro LED is used as an example, but is not limited thereto. For example, the light-emitting element may be a flip-chip type micro LED or a nanorod type micro LED.

[0073] The light emitting element (ED) may include a nitride semiconductor structure (NSS), a first electrode (E1), and a second electrode (E2). The nitride semiconductor structure (NSS) may include a first semiconductor layer (NS1), an active layer (EL) and a second semiconductor layer (NS2) disposed on one side of the first semiconductor layer (NS1). The first electrode (E1) is disposed on the first semiconductor layer (NS1) where the active layer (EL) is not located, and the second electrode (E2) is disposed on the second semiconductor layer (NS2).

[0074] The first semiconductor layer (NS1) is a layer for supplying electrons to the active layer (EL) and may include a nitride semiconductor containing a first conductive type impurity. For example, the first conductive type impurity may include an N-type impurity. The active layer (EL) disposed on one side of the first semiconductor layer (NS1) may include a multi-quantum well (MQW) structure. The second semiconductor layer (NS2) is a layer for injecting holes into the active layer (EL). The second semiconductor layer (NS2) may include a nitride semiconductor containing a second conductive type impurity. For example, the second conductive type impurity may include a P-type impurity.

[0075] The protective layer pattern (PT) may cover the outside of the light emitting device (ED). The protective layer pattern (PT) prevents damage that may occur to the side of the nitride semiconductor structure (NSS) during a dry etching process performed to form the nitride semiconductor structure (NSS), thereby enhancing the characteristics of the device.

[0076] The light emitting element (ED) may be fixed by contacting the adhesive layer (AD) with a surface opposite to the surface of the first semiconductor layer (NS1) on which the active layer (EL) is disposed, so that the first electrode (E1) and the second electrode (E2) of the light emitting element (ED) are positioned to face the first wiring electrode (CE1) and the second wiring electrode (CE21) of the wiring substrate (M-SUB), respectively, and can be electrically connected to them.

[0077] Signal transmission wiring (ML) may be arranged on the second base substrate 102 of the display unit (TU). The signal transmission wiring (ML) may be arranged on the same plane as the assembly electrodes (AE1, AE2), but is not limited to this. The signal transmission wiring (ML) may include a plurality of signal transmission wirings. For example, the plurality of signal transmission wirings (ML) may include a plurality of scan lines, a plurality of high potential power supply lines, a plurality of data lines, and a plurality of reference voltage lines. The plurality of signal transmission wirings (ML) may be arranged on the same plane as each other on the first base substrate 205. In addition, the plurality of signal transmission wirings (ML) may be made of the same material as the assembly electrodes (AE1, AE2).

[0078] A wiring substrate (M-SUB) on which thin film transistors (TFTs) are arranged and a plurality of display units (TU) on which a plurality of light-emitting elements (EDs) are arranged can be bonded together and electrically connected via a plurality of bonding materials (BC).

[0079] One side of the bonding member (BC) may be electrically connected to the link line (LL) through the third via contact (IML) of the wiring substrate (M-SUB), and the other side of the bonding member (BC) may be electrically connected to the signal transmission line (ML) on the display unit (TU). The bonding member (BC) may include a spacer pattern 211, a conductive connection pattern 217, and an adhesive pattern 220.

[0080] The spacer pattern 211 may play a role in maintaining and supporting a gap between the wiring substrate (M-SUB) and the display unit (TU). The spacer pattern 211 may be configured in a reverse taper shape in which the width of one side in contact with the third via contact (IML) is wider than the other side, but is not limited thereto.

[0081] An outer surface of the spacer pattern 211 may be covered with a conductive connection pattern 217. For example, the conductive connection pattern 217 may be disposed to surround the outer surface of the spacer pattern 211 while covering the top surface of the spacer pattern 211. The conductive connection pattern 217 may be disposed to surround at least the outer surface of the spacer pattern 211. The conductive connection pattern 217 may be in contact with the third via contact (IML). The conductive connection pattern 217 may be made of a conductive material, for example, but is not limited to, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof.

[0082] An adhesive pattern 220 may be disposed on the conductive connection pattern 217. The adhesive pattern 220 may bond and fix the wiring board (M-SUB) and the display unit (TU). The adhesive pattern 220 may have electrical conductivity to transmit a signal transmitted to the link line (LL) on the wiring board (M-SUB) to the display unit (TU1). For this reason, the adhesive pattern 220 may be configured to include a material having electrical conductivity and adhesiveness. For example, the adhesive pattern 220 may include an anisotropic conductive film (ACF).

[0083] The space between the wiring substrate (M-SUB) and the display unit (TU) and the boundary area between adjacent display units can be filled with a transparent filler 230. The filler 230 can improve the bonding strength between the wiring substrate (M-SUB) and the display unit (TU). In addition, by filling the boundary area between adjacent display units with the transparent filler 230, the bezel area can be arranged in a minimum space, and the bezel area can be reduced or a zero bezel area in which there is substantially no bezel area can be realized.

[0084] According to the embodiment of the present specification, the self-assembly substrate on which the light-emitting element (ED) is arranged is directly bonded to the wiring substrate (M-SUB) as the display unit (TU), which makes it possible to omit the process step of transferring the light-emitting element, thereby achieving the effect of optimizing the process. In addition, since the process of transferring the light-emitting element can be omitted, it is possible to prevent the occurrence of problems such as a decrease in transfer yield and misalignment during the transfer process.

[0085] In addition, by directly bonding the display unit on which the light-emitting elements are arranged to the wiring board, it is possible to omit the use of a temporary transfer substrate for transferring the light-emitting elements, and it is possible to manufacture environmentally friendly products by unifying the material components.

[0086] In a display device according to an embodiment of the present specification, the light emitting element (ED) is disposed in the display unit (TU), and the thin film transistors (TFT) are disposed separately from each other on the wiring substrate (M-SUB). As a result, even if a defect occurs in the light emitting element (ED), only the display unit (TU) in which the light emitting element (ED) is disposed can be replaced and repaired, thereby optimizing the process.

[0087] Meanwhile, in the embodiment of the present specification, the display device in which the horizontal type micro LEDs are arranged has been described, but the vertical type micro LEDs may be arranged. Hereinafter, the description will be made with reference to FIG. 5.

[0088] Fig. 5 is a cross-sectional view showing a modified example of a display device according to an embodiment of the present specification. The display device according to Fig. 5 is similar to the display device according to Fig. 4 except that the light emitting device (ED) is a vertical micro LED, so differences will be mainly described and the same components will be briefly described or omitted.

[0089] 5, a thin film transistor (TFT) may be disposed on a wiring substrate (M-SUB). A first passivation layer 108 and a first planarization layer 110 may be disposed on the thin film transistor (TFT). A connecting electrode 125, a signal transmission line (ML), a low resistance metal pattern 126 disposed on the connecting electrode 125 and the signal transmission line (ML), and a protective layer 135 may be disposed on the first planarization layer 110. The protective layer 135 may expose a part of the surface of the low resistance metal pattern 126.

[0090] A link wiring (LL) may be disposed on the first base substrate 205 of the wiring board (M-SUB). The link wiring (LL) may be disposed on the same plane as the light shielding layer (LS), but is not limited to this. The link wiring (LL) and the signal transmission wiring (ML) may be electrically connected via a first through electrode (C1) that penetrates the first planarization layer 110, the first passivation layer 108, and the interlayer insulating film 106.

[0091] The low resistance metal pattern 126 and the signal transmission wiring (ML) may be connected to a second through electrode (C2) disposed through the second planarization layer 140. The second through electrode (C2) may be connected to a bonding member (BC) described later and electrically connected to the light emitting element (ED). The second planarization layer 140 may include a groove 143 and an opening 145. The groove 143 may have a side surface and a bottom surface having an inclination. A second wiring electrode (CE2) may be disposed on the second planarization layer 140 including the groove 143 and the opening 145. The second wiring electrode (CE2) may be connected to the low resistance metal pattern 126 exposed by the opening 145 and electrically connected to the connecting electrode 125. In addition, the second wiring electrode (CE2) may extend from the opening 145 to the groove 143 and be connected to a second electrode (E2) of the light emitting element (ED) disposed in the groove 143.

[0092] A display unit (TU) including a light-emitting element (ED) is disposed at a position facing a wiring substrate (M-SUB) including a thin film transistor (TFT). The display unit (TU) may include a first assembly electrode (AE1), a second assembly electrode (AE2), a first cladding electrode (CDE1), a second cladding electrode (CDE2), a first wiring electrode (CE1), an adhesive layer (AD), and an insulating separation layer (ISL) disposed on a second base substrate 102. The insulating separation layer (ISL) serves to insulate the first cladding electrode (CDE1) and the second cladding electrode (CDE2). In this specification, the insulating separation layer (ISL) is shown, but is not limited thereto. For example, as shown in FIG. 4, a partition wall (PL) including an assembly pocket (PK) that specifies the position where the light-emitting element (ED) is disposed may be disposed.

[0093] The light emitting element (ED) may be disposed on the adhesive layer (AD). The light emitting element (ED) may be a vertical micro LED. The light emitting element (ED) may include a nitride semiconductor structure (NSS), a first electrode (E1), and a second electrode (E2). The nitride semiconductor structure (NSS) may include a structure in which a first semiconductor layer (NS1), an active layer (EL), and a second semiconductor layer (NS2) are vertically stacked. A protective layer pattern (PT) may be disposed on the outer side of the nitride semiconductor structure (NSS).

[0094] A first electrode (E1) may be disposed on at least one surface of the first semiconductor layer (NS1) disposed in contact with the adhesive layer (AD). For example, the first electrode (E1) may be disposed extending from one surface of the first semiconductor layer (NS1) to a part of the side surface of the first semiconductor layer (NS1). A first wiring electrode (CE1) may be disposed in contact with the outside of the first electrode (E1). A second electrode (E1) may be disposed in contact with one surface of the second semiconductor layer (NS2). The second electrode (E2) may be disposed in contact with the second wiring electrode (CE2).

[0095] A wiring substrate (M-SUB) on which thin film transistors (TFTs) are arranged and a plurality of display units (TU) on which a plurality of light-emitting elements (EDs) are arranged can be bonded together and electrically connected via a plurality of bonding materials (BC).

[0096] One side of the bonding member (BC) may contact the second through electrode (C2) of the wiring substrate (M-SUB), and the other side of the bonding member (BC) may contact the first wiring electrode (CE1). Thus, the bonding member (BC) may be connected to the link line (LL) via the bonding member (BC). The bonding member (BC) may include a spacer pattern 211, a conductive connection pattern 217, and an adhesive pattern 220.

[0097] The space between the wiring substrate (M-SUB) and the display unit (TU) can be filled with a transparent filler 230. The filler 230 can improve the bonding strength between the wiring substrate (M-SUB) and the display unit (TU).

[0098] Defects can occur during the manufacturing process of the components arranged on each display unit (TU). By bonding each display unit (TU) onto the wiring substrate (M-SUB) using a bonding material (BC), it is possible to replace only the display unit with the defective components among the multiple display units. This makes it easy to perform the repair process and realizes process optimization.

[0099] In addition, the light emitting element (ED) is arranged on the display unit (TU), and the thin film transistor (TFT) is arranged on the wiring substrate (M-SUB) in a mutually separated manner, so that even if a defect occurs in the light emitting element (ED), the thin film transistor (TFT), which is a normal part, can be used without being removed, thereby preventing unnecessary increase in manufacturing process steps.

[0100] Fig. 6 is a schematic cross-sectional view of a display device according to another embodiment of the present specification. And Fig. 7 is a cross-sectional view of the display device according to another embodiment of the present specification, taken along line 7 in Fig. 6. Here, the same reference numerals as in Figs. 1 to 5 refer to the same components, and the same components may be briefly described or may be omitted.

[0101] 6 and 7, a thin film transistor (TFT) may be disposed on the display unit (TU), and a light emitting element (ED) may be disposed on the wiring substrate (M-SUB). The display unit (TU) and the wiring substrate (M-SUB) may be bonded together via a bonding material (BC).

[0102] A first passivation layer 108 and a first planarization layer 110 may be disposed on a thin film transistor (TFT) disposed on the display unit (TU). A connecting electrode 125, a low resistance metal pattern 126, and a protective layer 135 may be disposed on the first planarization layer 110. The protective layer 135 may expose a part of the surface of the low resistance metal pattern 126.

[0103] The second planarization layer 140 may include a groove 143 and an opening 145. A first wiring electrode (CE1) and a second wiring electrode (CE2) may be disposed on the second planarization layer 140 including the groove 143 and the opening 145. The first wiring electrode (CE1) may be connected to the low resistance metal pattern 126 exposed by the opening 145 to be electrically connected to the connecting electrode 125. In addition, the second wiring electrode (CE2) may extend from the opening 145 to the groove 143 to be connected to the first electrode (E1) of the light emitting element (ED) disposed in the groove 143. The second wiring electrode (CE2) may be disposed at a predetermined distance from the first wiring electrode (CE1).

[0104] A display unit (TU) including a light emitting element (ED) is disposed at a position facing a wiring substrate (M-SUB) including a thin film transistor (TFT).

[0105] The display unit (TU) may include a first assembly electrode (AE1), a second assembly electrode (AE2), a first cladding electrode (CDE1), a second cladding electrode (CDE2), a first wiring electrode (CE1), an adhesive layer (AD), and an insulating separation layer (ISL) arranged on the second base substrate 102. In addition, although the insulating separation layer (ISL) is shown in this specification, it is not limited thereto. For example, as shown in FIG. 4, a partition wall (PL) including an assembly pocket (PK) that specifies the position where the light emitting element (ED) is arranged may be arranged.

[0106] The light emitting element (ED) may be disposed on the adhesive layer (AD). The light emitting element (ED) may include a nitride semiconductor structure (NSS) including a first semiconductor layer (NS1), an active layer (EL) and a second semiconductor layer (NS2), a first electrode (E1) disposed on the first semiconductor layer (NS1), and a second electrode (E2) disposed on the second semiconductor layer (NS2). A protective layer pattern (PT) may be disposed on the outside of the nitride semiconductor structure (NSS).

[0107] The light emitting element (ED) may be, but is not limited to, a horizontal micro LED. For example, the light emitting element (ED) may be a vertical micro LED, a flip chip micro LED, or a nanorod micro LED.

[0108] The distance (d) between the first cladding electrode (CDE1) and the second cladding electrode (CDE2) is formed to be smaller than the distance between the first assembly electrode (AE1) and the second assembly electrode (AE2), for example, so that the assembly position of the light emitting element (ED) can be fixed more precisely when an electric field is generated for self-assembly.

[0109] A link wiring (LL) may be arranged on the first base substrate 205 of the wiring board (M-SUB). A bonding material (BC) may be arranged on the link wiring (LL) to electrically connect the display unit (TU) and the wiring board (M-SUB). The wiring board (M-SUB) on which a plurality of light emitting elements (ED) are arranged and a plurality of display units (TU) on which a plurality of thin film transistors (TFT) are arranged may be bonded together via a plurality of bonding materials (BC).

[0110] One side of each bonding member (BC) may contact the link line (LL) of the wiring substrate (M-SUB), and the other side of the bonding member (BC) may contact the first wiring electrode (CE1) of the display unit (TU). Thus, the bonding member (BC) may be connected to the link line (LL). The bonding member (BC) may include a spacer pattern 211, a conductive connection pattern 217, and an adhesive pattern 220.

[0111] The space between the wiring substrate (M-SUB) and the display unit (TU) can be filled with a transparent filler 230. The filler 230 can improve the bonding strength between the wiring substrate (M-SUB) and the display unit (TU).

[0112] In a display device according to another embodiment of the present specification, the light emitting element (ED) is disposed on the wiring substrate (M-SUB), and the thin film transistors (TFT) are disposed separately from each other on the display unit (TU). Therefore, when a defect occurs in the thin film transistor (TFT), only the display unit (TU) in which the thin film transistor (TFT) is disposed can be replaced and repaired, thereby optimizing the process.

[0113] As a result, in a display unit (TU) that includes both a thin film transistor (TFT) and a light emitting element (ED), if a defect occurs in some of the components, the normal components must also be removed. However, according to the embodiments of this specification, the normal components do not need to be removed, preventing the addition of unnecessary process steps and enabling process optimization.

[0114] In addition, since it is possible to prevent the use of harmful chemicals while performing unnecessary process steps, it is possible to realize an environmentally friendly product. [Explanation of symbols]

[0115] 102 second base substrate 205 First base substrate 211 Spacer Pattern 217 Conductive connection pattern 120 Adhesive Pattern BC, BC1, BC2 Bonding materials LL Link wiring TU, TU1, TU2 display unit M-SUB Wiring Board ED, ED1a, ED2a, ED3a Light emitting element TFT Thin Film Transistor AE1,AE2 Assembly electrode CDE1, CDE2 Clad electrodes

Claims

1. A wiring board; A plurality of link wirings arranged on the wiring board; a plurality of display units arranged on the wiring board at a distance from each other; a plurality of bonding members disposed between the display units and the wiring board, the bonding members being connected to the link wirings; Including, the wiring substrate includes a thin film transistor, and the display units include light-emitting elements; The wiring board includes: a first base substrate on which a light-shielding layer is disposed; the thin film transistor being located on the light-shielding layer and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a first via contact electrically connecting the drain electrode and the light blocking layer; a first planarization layer covering the thin film transistor on the first base substrate; a second via contact penetrating the first planarization layer and connecting to the drain electrode; a connection electrode electrically connected to the second via contact; a second planarization layer including an opening for exposing a portion of a surface of the connecting electrode; a first wiring electrode located on the second planarization layer; a second wiring electrode located on the second planarization layer including an exposed surface of the opening hole and spaced apart from the first wiring electrode; Including, Display device.

2. The wiring board is made of a single substrate, and the display units are disposed on the wiring board and spaced apart from each other in a first direction and a second direction crossing each other. The display device according to claim 1 .

3. A wiring board, A plurality of link wirings arranged on the wiring board; a plurality of display units arranged on the wiring board at a distance from each other; a plurality of bonding members disposed between the display units and the wiring board, the bonding members being connected to the link wirings; Including, the wiring substrate includes a thin film transistor, and the display units include light-emitting elements; The plurality of display units include A second base substrate made of a transparent material; a first assembly electrode located on the second base substrate; a second assembly electrode spaced apart from the first assembly electrode; a clad electrode including a first clad electrode covering the first assembly electrode and a second clad electrode covering the second assembly electrode; a partition wall including a first portion covering the first and second clad electrodes, respectively, and a second portion disposed on the second base substrate; Including, The partition includes an assembly pocket, and the light emitting device is located in the assembly pocket. Display device.

4. a spacing between the first clad electrode and the second clad electrode is shorter than a spacing between the first assembly electrode and the second assembly electrode; The display device according to claim 3 .

5. The light emitting element is electrically connected to the first wiring electrode and the second wiring electrode of the wiring substrate. The display device according to claim 1 .

6. The light emitting element is electrically connected to the first wiring electrode and the second wiring electrode of the wiring board. The display device according to claim 3 .

7. The partition has a thickness equal to or greater than the height of the light emitting element. The display device according to claim 3 .

8. The display device further includes a filler disposed between the wiring board and the plurality of display units, the filler including a transparent resin. The display device according to claim 1 .

9. A wiring board, A plurality of link wirings arranged on the wiring board; a plurality of display units arranged on the wiring board at a distance from each other; a plurality of bonding members disposed between the display units and the wiring board, the bonding members being connected to the link wirings; Including, the wiring substrate includes a thin film transistor, and the display units include light-emitting elements; The bonding member is a spacer pattern having one surface in contact with the wiring substrate; a conductive connection pattern covering an upper surface and an outer surface of the spacer pattern; an adhesive pattern located on the conductive connecting pattern and connected to the display unit; Display device.

10. A wiring board; A plurality of link wirings arranged on the wiring board; a self-assembly substrate disposed on the wiring substrate; a plurality of light emitting devices disposed on the self-assembly substrate; a plurality of bonding members disposed between the self-assembly substrate and the wiring substrate, bonding and electrically connecting the self-assembly substrate and the wiring substrate to each other, and respectively connected to the plurality of link wirings; the wiring substrate includes a thin film transistor, The wiring board includes: a first base substrate on which a light-shielding layer is disposed; the thin film transistor being located on the light-shielding layer and including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode; a first via contact electrically connecting the drain electrode and the light blocking layer; a first planarization layer covering the thin film transistor on the first base substrate; a second via contact penetrating the first planarization layer and connecting to the drain electrode; a connection electrode electrically connected to the second via contact; a second planarization layer including an opening for exposing a portion of a surface of the connecting electrode; a first wiring electrode located on the second planarization layer; a second wiring electrode located on the second planarization layer including an exposed surface of the opening hole and spaced apart from the first wiring electrode; Including, Display device.

11. The self-assembly substrate includes a plurality of display units each having a light-emitting element, and each of the display units is bonded and electrically connected to each other via each of the bonding members. The display device according to claim 10.

12. The plurality of light-emitting elements include a redundancy light-emitting element. The display device according to claim 10.

Images