Organic light emitting diode display device and method for manufacturing the same

Abstract

SOLUTION: An organic light-emitting diode display device according to the present invention includes a substrate 110 having a plurality of sub-pixels; at least one transistor disposed at each of the plurality of sub-pixels over the substrate; a first insulation layer 112 disposed over the at least one transistor; a first electrode 120 and a light-emitting layer 130 that are disposed in each of the plurality of sub-pixels, over the first insulation layer; and a light-emitting diode including a second electrode 140. Also, each of the plurality of sub-pixels includes a contact area and a light-emitting area, the light-emitting diode is electrically connected to at least one transistor in the contact area, and the first insulation layer includes a recessed portion in the contact area.EFFECT: A leakage current becomes the minimum, and can be improved in reliability.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a display device, and more particularly to an organic light emitting diode display device with improved color reproduction rate and a method for manufacturing the same. [Background technology]

[0002] As the information society advances, various demands for display devices for displaying images are increasing. In response to this, flat panel display devices (FPDs) such as liquid crystal display devices (LCDs) and organic light emitting diode display devices (OLEDs) have been developed and are being adopted in various fields.

[0003] Among flat panel display devices, an organic light emitting diode display device, also called an organic electroluminescent display device, is an element that emits light when an exciton is formed by combining electrons and holes when electric charges are injected into a light emitting layer provided between a cathode serving as an electron injection electrode and an anode serving as a hole injection electrode, and then the exciton is annihilated. Such an organic light emitting diode display device can be formed on a flexible substrate such as plastic, and has a high contrast ratio because it is a self-emitting element. In addition, since the response time is about several microseconds (μm), it is easy to realize moving images, there is no limit to the viewing angle, and it is stable even at low temperatures. Furthermore, since it can be driven at a relatively low voltage of 5V to 15V DC, it is easy to manufacture and design a driving circuit.

[0004] In recent years, as organic light emitting diode display devices are adopted in various fields, display devices with higher resolution are required. In order to realize higher resolution, it is necessary to provide more sub-pixels within the same area, which results in a reduction in the area of ​​each sub-pixel and a reduction in the distance between adjacent sub-pixels.

[0005] This reduction in the distance between adjacent sub-pixels can cause side leakage currents between adjacent sub-pixels, resulting in sub-pixels that should not emit light emitting light, reducing the color reproduction of the display. Summary of the Invention [Problem to be solved by the invention]

[0006] The present invention has been made to solve the above-mentioned problems, and aims to provide an organic light emitting diode display device that can minimize side leakage current between adjacent sub-pixels, and a manufacturing method thereof.

[0007] Another object of the present invention is to provide an organic light emitting diode display device capable of improving light efficiency, and a manufacturing method thereof. [Means for solving the problem]

[0008] In order to achieve the above-mentioned object, the organic light-emitting diode display device of the present invention includes a substrate having a plurality of sub-pixels, at least one transistor disposed in each of the plurality of sub-pixels on an upper portion of the substrate, a first insulating layer disposed on the upper portion of the at least one transistor, and a light-emitting diode disposed in each of the plurality of sub-pixels on the upper portion of the first insulating layer, the light-emitting diode including a first electrode, an emitting layer, and a second electrode, each of the plurality of sub-pixels including a contact region and an emitting region, the light-emitting diode being electrically connected to the at least one transistor in the contact region, and the first insulating layer having a recess in the contact region.

[0009] The organic light-emitting diode display device of the present invention further includes at least one contact electrode and at least one reflective layer made of the same material and provided on the same layer between the first insulating layer and the light-emitting diode, the at least one contact electrode being located in the contact region, and the at least one reflective layer being located in the light-emitting region.

[0010] The at least one contact electrode is located within the recess, and a distance between the at least one contact electrode and the substrate is less than a distance between the at least one reflective layer and the substrate.

[0011] The organic light emitting diode display device of the present invention further includes a first reflective layer, a second reflective layer, and a third reflective layer in the light emitting region between the first insulating layer and the light emitting diode, the plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel, and the first reflective layer, the second reflective layer, and the third reflective layer are located in the first sub-pixel, the second sub-pixel, and the third sub-pixel, respectively.

[0012] The distance between the second reflective layer and the second electrode in the second subpixel is smaller than the distance between the first reflective layer and the second electrode in the first subpixel, and is larger than the distance between the third reflective layer and the second electrode in the third subpixel.

[0013] The organic light-emitting diode display device of the present invention further includes a second insulating layer and a third insulating layer between the first insulating layer and the light-emitting diode, the first reflective layer being located between the first insulating layer and the second insulating layer, the second reflective layer being located between the second insulating layer and the third insulating layer, and the third reflective layer being located between the third insulating layer and the light-emitting diode.

[0014] The organic light-emitting diode display device of the present invention further includes a first contact electrode, a second contact electrode, and a third contact electrode that overlap and are electrically connected to each other in the contact regions of the first subpixel, the second subpixel, and the third subpixel, respectively, and the first contact electrode, the second contact electrode, and the third contact electrode are located within the recess.

[0015] The first contact electrode is located between the first insulating layer and the second insulating layer, the second contact electrode is located between the second insulating layer and the third insulating layer, and the third contact electrode is located between the third insulating layer and the light-emitting diode.

[0016] The organic light emitting diode display device of the present invention further includes a bank between the first electrode and the light emitting layer, covering an edge of the first electrode while exposing a central portion of the first electrode, the bank being located in the contact region.

[0017] Between adjacent subpixels, the bank has a trench.

[0018] A manufacturing method for an organic light-emitting diode display device of the present invention includes the steps of forming at least one transistor in each of a plurality of sub-pixels provided on a substrate, forming at least one insulating layer having a recess on top of the at least one transistor, and forming a light-emitting diode including a first electrode, a light-emitting layer, and a second electrode in each of the plurality of sub-pixels on top of the at least one insulating layer, each of the plurality of sub-pixels including a contact region and a light-emitting region, the light-emitting diode being electrically connected to the at least one transistor in the contact region, and the recess being located in the contact region.

[0019] The method for manufacturing an organic light emitting diode display device of the present invention further includes forming a bank between the first electrode and the light emitting layer, the bank covering an edge of the first electrode and exposing a center portion of the first electrode, the bank being located in the contact region.

[0020] The forming of the bank includes forming a bank material layer on the first electrode, polishing an upper surface of the bank material layer to form a bank layer, and selectively removing the bank layer.

[0021] The manufacturing method of the organic light-emitting diode display device of the present invention further includes, between the step of forming the at least one insulating layer and the step of forming the light-emitting diode, a step of forming at least one contact electrode and at least one reflective layer in the same process, wherein the at least one contact electrode is located in the contact region and the at least one reflective layer is located in the light-emitting region.

[0022] The at least one contact electrode is located within the recess, and a distance between the at least one contact electrode and the substrate is less than a distance between the at least one reflective layer and the substrate. Effect of the Invention

[0023] In the present invention, by disposing the trench between adjacent sub-pixels of different colors, the side leakage current between adjacent sub-pixels can be minimized, so that the color reproduction ratio can be improved.

[0024] In addition, by adopting a microcavity structure for each sub-pixel, light with high color purity can be obtained and the light efficiency can be improved, which results in low power consumption and reduced power consumption.

[0025] Furthermore, by providing a recess in the contact region where the light-emitting diode and the transistor are electrically connected and by polishing the upper surface of the bank to minimize the step between the contact region and the light-emitting region, leakage current can be minimized and reliability can be improved. [Brief description of the drawings]

[0026] [Figure 1] 1 is a plan view illustrating an organic light emitting diode display device according to an embodiment of the present invention; [Diagram 2] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention taken along line II' of FIG. [Diagram 3] 2 is a schematic cross-sectional view of an organic light-emitting diode display device according to an embodiment of the present invention taken along lines II-II', III-III', and IV-IV' in FIG. [Figure 4A] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4B] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4C] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4D] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4E] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4F] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4G] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4H]2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4I] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4J] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4K] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4L] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4M] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 4N] 2 is a schematic cross-sectional view of an organic light emitting diode display device according to an embodiment of the present invention, taken along line II' of FIG. 1. [Figure 5A] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5B] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5C] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5D] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5E]2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5F] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5G] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5H] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5I] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5J] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5K] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5L] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5M] 2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. [Figure 5N]2A to 2C are schematic cross-sectional views taken along lines II-II', III-III', and IV-IV' in FIG. 1 during a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an organic light emitting diode display device and a manufacturing method thereof according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0028] FIG. 1 is a plan view illustrating an organic light emitting diode display device according to an embodiment of the present invention.

[0029] As shown in Fig. 1, an organic light emitting diode display device according to an embodiment of the present invention includes a plurality of pixels P arranged in a matrix along a first direction, which is an X direction, and a second direction, which is a Y direction, and each pixel P includes a plurality of sub-pixels SP1, SP2, and SP3. Although Fig. 1 shows only two pixels P arranged along the second direction, a plurality of pixels P having the same configuration are also arranged along the first direction.

[0030] A pixel P may include a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3. For example, the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 may be red, green, and blue subpixels, respectively, but the present invention is not limited thereto. The number of subpixels included in a pixel P may vary, for example, a pixel P may include red, green, blue, and white subpixels.

[0031] Each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 includes at least one transistor and a light emitting diode.

[0032] On the other hand, each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 includes a light emitting area EA and a contact area CA. The light emitting diode is provided in the light emitting area EA and is electrically connected to at least one transistor in the contact area CA.

[0033] Between two adjacent sub-pixels SP1, SP2, SP3 in the first direction, a trench TCH is provided. The trench TCH may extend in the second direction. For example, a plurality of trenches TCH may be disposed between columns of sub-pixels.

[0034] The trench TCH may not be provided between two adjacent sub-pixels along the second direction, i.e., between the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, but the embodiment of the present invention is not limited thereto. Alternatively, the trench TCH may be provided between two adjacent sub-pixels SP1, SP2, SP3 along the second direction. For example, multiple trenches TCH may be disposed between rows of sub-pixels. Also, according to one embodiment, the trench TCH may completely surround each sub-pixel (e.g., in a grid or lattice configuration), but the embodiment is not limited thereto.

[0035] The trench TCH may be provided between two sub-pixels SP1, SP2, SP3 adjacent to each other along the second direction.

[0036] The cross-sectional structure of the organic light emitting diode display device according to the embodiment of the present invention will be described with reference to FIG. 2 and FIG.

[0037] Figures 2 and 3 are schematic cross-sectional views of an organic light emitting diode display device according to an embodiment of the present invention, in which Figure 2 shows a cross-section taken along line II' in Figure 1, and Figure 3 shows cross-sections taken along lines II-II', III-III', and IV-IV' in Figure 1. Here, the organic light emitting diode display device will be described by taking a top emission type as an example.

[0038] As shown in Figures 2 and 3, the organic light emitting diode display device according to the embodiment of the present invention includes a plurality of subpixels, for example, a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3, and each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 includes a transistor TR and a light emitting diode De.

[0039] Specifically, a transistor TR is disposed in each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 on the upper part of the substrate 110. The first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 constitute one pixel P.

[0040] Here, the substrate 110 may be made of a semiconductor material. For example, the substrate 110 may be a wafer made of single crystal silicon. However, embodiments of the present invention are not limited thereto, and the substrate 110 may be made of an insulating material such as glass or plastic.

[0041] The transistor TR may be a metal oxide semiconductor field effect transistor (MOSFET), although embodiments of the present invention are not limited thereto, and the transistor TR may be a thin film transistor (TFT).

[0042] Such a transistor TR may be a driving transistor connected to the light emitting diode De. Also, on the substrate 110, at least one transistor, at least one wiring, and at least one electrode connected to the driving transistor may be further provided.

[0043] For example, the substrate 110 may further include a switching transistor, a sensing transistor, a storage capacitor, a gate line, a data line, a power line, a sensing line, and / or a reference line.

[0044] The switching transistor is connected to the gate line, the data line and the drive transistor, and is switched by a gate signal on the gate line, so as to transmit a data signal on the data line to the drive transistor.

[0045] The drive transistor is connected to the switching transistor, the power supply wiring, and the light-emitting diode De, and is switched by a data signal transmitted through the switching transistor, so that a current due to the high potential voltage of the power supply wiring can be transmitted to the light-emitting diode De.

[0046] The sensing transistor is connected to the driving transistor, the sensing line, and the reference line, and is switched by a sensing signal on the sensing line to transmit a reference voltage on the reference line to the driving transistor or detect the voltage of the driving transistor.

[0047] The storage capacitor is connected to the switching transistor and the driving transistor, and can serve to hold the data signal transmitted through the switching transistor for one frame.

[0048] The driving transistor, the switching transistor, the sensing transistor, and the storage capacitor may be located in the contact area CA and / or in the light emitting area EA, and according to other non-limiting embodiments, the transistor TR may be located below or overlapping the light emitting area EA (e.g., to save space).

[0049] Next, a first insulating layer 112 is disposed on the transistor TR. The first insulating layer 112 may be located substantially over the entire surface of the substrate 110. The first insulating layer 112 has via holes 112a that expose the transistor TR of each of the subpixels SP1, SP2, and SP3. The via holes 112a are located in the contact regions CA.

[0050] The first insulating layer 112 also has a recess 113 in the contact region CA of each of the subpixels SP1, SP2, and SP3. The recess 113 is positioned to overlap the via hole 112a and has a width and area larger than those of the via hole 112a. For example, the via hole 112a may be located on the bottom surface of the recess 113.

[0051] The first insulating layer 112 may be formed in a single layer or in a multi-layer. For example, the first insulating layer 112 may be made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). However, the embodiment of the present invention is not limited thereto. The first insulating layer 112 may be made of an organic insulating material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0052] A first contact electrode 122a made of a metal material is disposed in each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 on the upper portion of the first insulating layer 112. The first contact electrode 122a is located in a contact region CA. At this time, the first contact electrode 122a is located in the recess 113.

[0053] The first contact electrode 122a is connected to the transistor TR through a via hole 112a provided in the first insulating layer 112. At this time, the first contact electrode 122a can be electrically connected to a source electrode or a drain electrode of the transistor TR.

[0054] Here, a via electrode 117 made of a metal material may be provided in the via hole 112a (e.g., between the transistor TR and the recess 113). Thus, the first contact electrode 122a may be in contact with the via electrode 117. For example, the via electrode 117 may be made of tungsten (W). However, the embodiment of the present invention is not limited thereto. The via electrode 117 may be omitted, and the first contact electrode 122a may be provided in the via hole 112a and directly connected to the transistor TR.

[0055] In addition, a first reflective layer 122 made of a metal material is disposed in the first subpixel SP1 on the first insulating layer 112. The first reflective layer 122 is located in the light emitting area EA of the first subpixel SP1. Here, the height of the first contact electrode 122a provided in the recess 113 is lower than the height of the first reflective layer 122. In the embodiment of the present invention, the height may be defined as the distance from the substrate 110. Therefore, the distance between the first contact electrode 122a provided in the recess 113 and the substrate 110 is shorter than the distance between the first reflective layer 122 and the substrate 110.

[0056] The first reflective layer 122 is made of the same material as the first contact electrode 122a and is connected to the first contact electrode 122a of the first subpixel SP1. For example, the first reflective layer 122 and the first contact electrode 122a are integrally formed. In this case, in the first subpixel SP1, the first reflective layer 122 may be electrically connected to the transistor TR. However, the embodiment of the present invention is not limited thereto. The first reflective layer 122 may be separated from the first contact electrode 122a.

[0057] The first reflective layer 122 and the first contact electrode 122a may be formed as a single layer or as a multilayer. For example, the first reflective layer 122 and the first contact electrode 122a may be made of aluminum (Al) or an aluminum alloy, or silver (Ag) or a silver alloy, and the silver alloy may be an alloy of silver, palladium, and copper (Ag-Pd-Cu:APC). Alternatively, the first reflective layer 122 and the first contact electrode 122a may have a three-layer structure of titanium, aluminum, and titanium (Ti / Al / Ti). However, the embodiment of the present invention is not limited thereto.

[0058] The second insulating layer 114 is disposed on the first reflective layer 122 and the first contact electrode 122a. The second insulating layer 114 may be located over substantially the entire surface of the substrate 110.

[0059] The second insulating layer 114 may be made of an inorganic insulating material. Therefore, the second insulating layer 114 may have a step due to the lower film, and the step of the second insulating layer 114 may be located within the recess 113 in a plan view. For example, the second insulating layer 114 may have a recess corresponding to or overlapping the recess 113 of the first insulating layer 112. For example, the second insulating layer 114 may be made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the embodiment of the present invention is not limited thereto.

[0060] The second insulating layer 114 has a first contact hole 114a exposing the first contact electrode 122a in each of the subpixels SP1, SP2, and SP3. That is, the first contact hole 114a is located in the contact area CA of each of the subpixels SP1, SP2, and SP3. Here, the first contact hole 114a can be located within the recess 113 or overlap with the recess 113 in a plan view. Such a first contact hole 114a can be located away from the via hole 112a so that the via hole 112a and the first contact hole 114a do not overlap. However, the embodiment of the present invention is not limited to this.

[0061] A second contact electrode 124a made of a metal material is disposed in each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 on the upper part of the second insulating layer 114. The second contact electrode 124a is located within the contact region CA. In this case, the second contact electrode 124a is located within the recess 113 in a plan view or overlaps the recess 113 and the first contact electrode 122a.

[0062] The second contact electrode 124a is connected to the first contact electrode 122a through a first contact hole 114a provided in the second insulating layer 114. Therefore, the second contact electrode 124a is electrically connected to the transistor TR. At this time, the second contact electrode 124a can be in direct contact with the first contact electrode 122a.

[0063] In addition, a second reflective layer 124 made of a metal material is disposed in the second subpixel SP2 on the second insulating layer 114. The second reflective layer 124 is located in the light emitting area EA of the second subpixel SP2. Here, the height of the second contact electrode 124a provided in the recess 113 is lower than the height of the second reflective layer 124. That is, the distance between the second contact electrode 124a provided in the recess 113 and the substrate 110 is shorter than the distance between the second reflective layer 124 and the substrate 110.

[0064] The second reflective layer 124 is made of the same material as the second contact electrode 124a and is connected to the second contact electrode 124a of the second subpixel SP2. For example, the second reflective layer 124 is integrally formed with the second contact electrode 124a. Therefore, in the second subpixel SP2, the second reflective layer 124 can be electrically connected to the transistor TR. However, the embodiment of the present invention is not limited thereto. The second reflective layer 124 may be separated from the second contact electrode 124a.

[0065] The second reflective layer 124 and the second contact electrode 124a may be formed as a single layer or as a multilayer. For example, the second reflective layer 124 and the second contact electrode 124a may be made of aluminum (Al) or an aluminum alloy, or silver (Ag) or a silver alloy, and the silver alloy may be an alloy of silver, palladium, and copper (Ag-Pd-Cu:APC). Alternatively, the second reflective layer 124 and the second contact electrode 124a may have a three-layer structure of titanium, aluminum, and titanium (Ti / Al / Ti). However, the embodiment of the present invention is not limited thereto.

[0066] A third insulating layer 116 is disposed on the second reflective layer 124 and the second contact electrode 124a. The third insulating layer 116 may be located over substantially the entire surface of the substrate 110.

[0067] The third insulating layer 116 may be made of an inorganic insulating material. Therefore, the third insulating layer 116 has a step due to the lower film, and the step of the third insulating layer 116 may be located within the recess 113 in a plan view. For example, the third insulating layer 116 may have a recess that overlaps both the recess of the second insulating layer 114 and the recess 113 of the first insulating layer 112. For example, the third insulating layer 116 may be made of silicon oxide (SiOx) or silicon nitride (SiNx). However, the embodiment of the present invention is not limited thereto.

[0068] The third insulating layer 116 has a second contact hole 116a exposing the second contact electrode 124a in each of the subpixels SP1, SP2, and SP3. That is, the second contact hole 116a is located in the contact region CA of each of the subpixels SP1, SP2, and SP3. Here, the second contact hole 116a is located in the recess 113 in a plan view. The second contact hole 116a can be located away from the first contact hole 114a and the via hole 112a so that the three different holes do not overlap each other. Also, in a plan view, the first contact hole 114a is located between the second contact hole 116a and the via hole 112a. However, the embodiment of the present invention is not limited to this.

[0069] A third contact electrode 126a made of a metal material is disposed in each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 on the upper part of the third insulating layer 116. The third contact electrode 126a is located in a contact region CA. In this case, the third contact electrode 126a is located in the recess 113 in a plan view, and overlaps with the first contact electrode 122a and the second contact electrode 124a. For example, the first, second, and third contact electrodes 122a, 124a, 126a can be stacked on top of each other.

[0070] The third contact electrode 126a is connected to the second contact electrode 124a through a second contact hole 116a provided in the third insulating layer 116. Therefore, the third contact electrode 126a is electrically connected to the transistor TR. At this time, the third contact electrode 126a can be in direct contact with the second contact electrode 124a.

[0071] In addition, a third reflective layer 126 made of a metal material is disposed in the third subpixel SP3 on the third insulating layer 116. The third reflective layer 126 is located in the light emitting area EA of the third subpixel SP3. Here, the height of the third contact electrode 126a provided in the recess 113 is lower than the height of the third reflective layer 126. That is, the distance between the third contact electrode 126a provided in the recess 113 and the substrate 110 is shorter than the distance between the third reflective layer 126 and the substrate 110.

[0072] The third reflective layer 126 is made of the same material as the third contact electrode 126a and is connected to the third contact electrode 126a of the third subpixel SP3. For example, the third reflective layer 126 is integrally formed with the third contact electrode 126a. Therefore, in the third subpixel SP3, the third reflective layer 126 can be electrically connected to the transistor TR. However, the embodiment of the present invention is not limited thereto. The third reflective layer 126 may be separated from the third contact electrode 126a.

[0073] The third reflective layer 126 and the third contact electrode 126a may be formed as a single layer or as a multilayer. For example, the third reflective layer 126 and the third contact electrode 126a may be made of aluminum (Al) or an aluminum alloy, or silver (Ag) or a silver alloy, and the silver alloy may be an alloy of silver, palladium, and copper (Ag-Pd-Cu:APC). Alternatively, the third reflective layer 126 and the third contact electrode 126a may have a three-layer structure of titanium, aluminum, and titanium (Ti / Al / Ti). However, the embodiment of the present invention is not limited thereto.

[0074] A first electrode 120 is disposed in the light-emitting region EA of each of the subpixels SP1, SP2, SP3 on the third insulating layer 116 or on the third reflective layer 126. The first electrode 120 in the first subpixel SP1 and the second subpixel SP2 is located on the upper part of the third insulating layer 116 and in contact with the third insulating layer 116, and the first electrode 120 in the third subpixel SP3 is located on the upper part of the third reflective layer 126 and in contact with the third reflective layer 126. For example, the third reflective layer 126 is disposed between the first electrode 120 and the third insulating layer 116 in the light-emitting region EA of the third subpixel SP3.

[0075] Here, at least one insulating layer may be further provided between the third insulating layer 116 and the first electrode 120 and between the third reflective layer 126 and the first electrode 120 .

[0076] The first electrode 120 also extends to the contact region CA of each of the subpixels SP1, SP2, and SP3. Therefore, the first electrode 120 is also disposed on the upper part of the third contact electrode 126a of each of the subpixels SP1, SP2, and SP3, and is in contact with and overlaps the third contact electrode 126a.

[0077] Therefore, the first electrode 120 of each of the sub-pixels SP1, SP2, and SP3 is electrically connected to the corresponding transistor TR via the first contact electrode 122a, the second contact electrode 124a, and the third contact electrode 126a.

[0078] The first electrode 120 may include a conductive material having a relatively high work function, for example, a transparent conductive oxide (TCO) such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0079] A bank 150 is disposed on the first electrode 120. The bank 150 has an opening that covers the edge of the first electrode 120 and exposes the center of the first electrode 120. A portion corresponding to the opening of the bank 150, i.e., a portion where the first electrode 120 is exposed through the bank 150, is defined as a light-emitting area EA. The remaining portion excluding the light-emitting area EA is defined as a non-light-emitting area, and the bank 150 is disposed in the non-light-emitting area. The contact area CA corresponds to the non-light-emitting area, and the bank 150 is located in the contact area CA.

[0080] For example, the bank 150 may be made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). However, the embodiment of the present invention is not limited thereto. The bank 150 may be made of an organic insulating material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin. The bank 150 may be formed in a single layer or in multiple layers.

[0081] In an embodiment of the present invention, bank 150 has a flat upper surface, which will be described in more detail below.

[0082] Meanwhile, trenches TCH are formed in the banks 150 and the third insulating layer 116 between adjacent subpixels SP1, SP2, and SP3, that is, between the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3.

[0083] In the embodiment of the present invention, the trench TCH is provided in the bank 150 and the third insulating layer 116, but the embodiment of the present invention is not limited thereto. For example, the trench TCH may extend completely through the bank 150 and partially through the third insulating layer 116, but the embodiment is not limited thereto. The trench TCH may be provided in the second insulating layer 114 below the third insulating layer 116, or may be provided in the first insulating layer 112 and the second insulating layer 114.

[0084] Such trenches TCH serve to separate the emissive layer 130 of adjacent subpixels SP1, SP2, SP3 in subsequent processing steps, minimizing side leakage current. According to other embodiments, the trenches TCH minimize side leakage current while thinning portions of the emissive layer 130 of adjacent subpixels SP1, SP2, SP3, without completely cutting the emissive layer 130 in the regions between the adjacent subpixels (e.g., the trenches TCH may cause portions of the emissive layer 130 to be too thin, increasing electrical resistance).

[0085] Specifically, if the trench TCH is not formed, the first stack 132, the second stack 136, and the charge generating layer 134 between adjacent subpixels SP1, SP2, and SP3 are connected to one another, which may cause side leakage current to occur. In addition, such side leakage current may cause the subpixels SP1, SP2, and SP3 that should not emit light to emit light, resulting in a decrease in color reproduction ratio.

[0086] This loss of color reproduction can be greater when side leakage currents occur between subpixels that emit light of different colors than when side leakage currents occur between subpixels that emit light of the same color.

[0087] Therefore, in the organic light emitting diode display device according to the embodiment of the present invention, in order to minimize the side leakage current between the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 emitting light of different colors, a trench TCH can be disposed between the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 emitting light of different colors. Here, the first stack 132 and the charge generation layer 134 between the adjacent subpixels SP1, SP2, and SP3 are separated from each other by the trench TCH, but the second stack 136 between the adjacent subpixels SP1, SP2, and SP3 may not be separated and may be connected to each other. Alternatively, the first stack 132, the charge generation layer 134, and the second stack 136 between the adjacent subpixels SP1, SP2, and SP3 may all be separated from each other by the trench TCH.

[0088] On the other hand, the trenches TCH do not have to be arranged between the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 that emit light of the same color.

[0089] For example, in the case where the organic light emitting diode display device according to the embodiment of the present invention is of a stripe type, as shown in Fig. 1, the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 are sequentially and repeatedly arranged along the first direction, and the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 of the same color are arranged along the second direction, respectively, but the trenches TCH are arranged in a line shape along the second direction between the subpixels SP1, SP2, and SP3 emitting light of different colors that are adjacent along the first direction in Fig. 1. The trenches TCH do not have to be arranged between the subpixels SP1, SP2, and SP3 emitting light of the same color that are adjacent along the second direction in Fig. 1.

[0090] Next, the light-emitting layer 130 is disposed on the first electrode 120 exposed through the opening of the bank 150 and on top of the bank 150. The light-emitting layer 130 includes a first stack 132, a charge generating layer 134, and a second stack 136, which are disposed in sequence.

[0091] The first stack 132 may include at least one hole injecting layer (HIL), at least one hole transporting layer (HTL), at least one emitting material layer (EML), and at least one electron transporting layer (ETL). The emitting material layer of the first stack 132 may emit one of red light, green light, blue light, and yellow light.

[0092] The charge generation layer (CGL) 134 may include a negative type (N-type) charge generation layer for supplying electrons to the first stack 132 and a positive type (P-type) charge generation layer for supplying holes to the second stack 136.

[0093] The second stack 136 can include at least one hole transport layer (HTL), at least one light emitting material layer (EML), at least one electron transport layer (ETL), and at least one electron injecting layer (EIL). The light emitting material layer of the second stack 136 can emit one of red light, green light, blue light, and yellow light.

[0094] Here, the luminescent material layers of the second stack 136 may emit light of a different color than the luminescent material layers of the first stack 132. For example, the luminescent material layers of the first stack 132 may emit blue light and the luminescent material layers of the second stack 136 may emit red light or green light. Or, the luminescent material layers of the first stack 132 may emit blue light and the luminescent material layers of the second stack 136 may emit yellow light.

[0095] As described above, at least one of the first stack 132, the charge generating layer 134, and the second stack 136 of the light emitting layer 130, including the charge generating layer 134, is separated at the upper part of the trench TCH by a step of the trench TCH, and is spaced apart for each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 without contacting each other.

[0096] For example, the first stack 132 and the charge generation layer 134 may be spaced apart or separated for each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3. In this case, the first stack 132 and the charge generation layer 134 become gradually thinner and disconnected from the top of the trench TCH toward the substrate 110. Meanwhile, the same material as the first stack 132 and the charge generation layer 134 may be stacked in the trench TCH. Also, a gap space or an empty space may exist in the trench TCH in a region where the first stack 132 and the charge generation layer 134 are cut or separated.

[0097] As described above, in the organic light emitting diode display device according to the embodiment of the present invention, the first stack 132 and the charge generating layer 134 in the upper part of the trench TCH are separated and spaced apart from each other for the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, respectively, so that the side leakage current between the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, which emit light of different colors, can be minimized.

[0098] While the embodiment of the present invention exemplifies the double-stack structure of the light-emitting layer 130 including the first stack 132, the charge generating layer 134, and the second stack 136, in other embodiments, the light-emitting layer can have a multi-stack structure including three or more stacks and two or more charge generating layers, in which case the two or more stacks and the two or more charge generating layers can be separated by a trench TCH.

[0099] The second electrode 140 is disposed on the light emitting layer 130. The second electrode 140 is disposed substantially over the entire surface of the substrate 110.

[0100] The first electrode 120, the light emitting layer 130 and the second electrode 140 constitute a light emitting diode De. Here, the first electrode 120 may be an anode, and the second electrode 140 may be a cathode. However, the embodiment of the present invention is not limited thereto. The first electrode 120 may be a cathode, and the second electrode 140 may be an anode.

[0101] The second electrode 140 is not separated on the upper part of the trench TCH, but is arranged to connect across the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3. In other words, the second electrode 140 can extend continuously across the trench TCH between the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3. The second electrode 140 can also have a recess, groove, or divot in the area overlapping with the trench TCH. Alternatively, the second electrode 140 can be separated on the upper part of the trench TCH, and spaced apart for each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3.

[0102] The second electrode 140 may be made of a transparent conductive material, a semi-transparent metallic material, or a metallic material having reflectivity. The second electrode 140 may include a conductive material having a relatively low work function.

[0103] For example, as described above, when the OLED display device according to the embodiment of the present invention is a top emission type, the second electrode 140 may be made of a transparent conductive oxide (TCO) such as indium tin oxide (ITO) or indium zinc oxide (IZO) that can transmit light, or a semi-transmissive metallic material such as magnesium (Mg), silver (Ag), or a magnesium-silver alloy (MgAg).

[0104] A first sealing layer 152, a second sealing layer 154, and a third sealing layer 156 are sequentially disposed on top of second electrode 140. First sealing layer 152 and third sealing layer 156 may be made of an inorganic insulating material, and second sealing layer 154 may be made of an organic insulating material.

[0105] For example, the first sealing layer 152 may be made of an inorganic insulating material such as aluminum oxide (AlOx), silicon oxide (SiOx), silicon nitride (SiNx), etc. Also, the third sealing layer 156 may be made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), and the second sealing layer 154 may be made of an organic insulating material such as an acrylic resin or an epoxy resin.

[0106] The first sealing layer 152, the second sealing layer 154, and the third sealing layer 156 can block moisture and oxygen from the outside.

[0107] Next, a color filter 160 is disposed on the third encapsulation layer 156. The color filter 160 may include a first color filter 160R, a second color filter 160G, and a third color filter 160B corresponding to the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, respectively. The first color filter 160R, the second color filter 160G, and the third color filter 160B may be red, green, and blue color filters, respectively. However, the embodiment of the present invention is not limited thereto.

[0108] Although not shown in the drawings, a cover substrate or a cover film may be disposed on the color filter 160 .

[0109] In this manner, in the organic light emitting diode display device according to the embodiment of the present invention, by disposing the trench TCH between the adjacent first subpixel SP1, second subpixel SP2, and third subpixel SP3 of different colors, it is possible to separate the first stack 132 and the charge generating layer 134 between the adjacent subpixels SP1, SP2, and SP3 of different colors, and minimize side leakage current.

[0110] Furthermore, by employing a microcavity structure in the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, it is possible to improve light efficiency.

[0111] More specifically, by utilizing the microcavity effect, in which light from an LED causes interference between two reflectors, selectively amplifying wavelengths and emitting light in a narrow color spectrum, light with high color purity can be obtained and high efficiency can be achieved at the front.

[0112] In order to realize the microcavity effect, the distances between the two reflectors in the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 are different. That is, in the organic light emitting diode display device according to the embodiment of the present invention, the microcavity effect is realized by making the distances between the first reflective layer 122, the second reflective layer 124, and the third reflective layer 126, and the second electrode 140 different. In this case, the first insulating layer 112, the second insulating layer 114, and the third insulating layer 116 are used to adjust the distances between the first reflective layer 122, the second reflective layer 124, and the third reflective layer 126, and the second electrode 140.

[0113] Specifically, the first reflective layer 122 of the first subpixel SP1 is disposed between the first insulating layer 112 and the second insulating layer 114, the second reflective layer 124 of the second subpixel SP2 is disposed between the second insulating layer 114 and the third insulating layer 116, and the third reflective layer 126 of the third subpixel SP3 is disposed between the third insulating layer 116 and the first electrode 120.

[0114] Therefore, the second distance d2 between the second reflective layer 124 and the second electrode 140 in the second subpixel SP2 is smaller than the first distance d1 between the first reflective layer 122 and the second electrode 140 in the first subpixel SP1, and is larger than the third distance d3 between the third reflective layer 126 and the second electrode 140 in the third subpixel SP3 (d1 > d2 > d3). The first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 can emit main peaks in the light ranges corresponding to red, green, and blue, respectively, and the intensities of the main peaks of red, green, and blue are greater than the intensities of light from the light-emitting layers 130 of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3. This improves the light extraction efficiency of red light, green light, and blue light in the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, and their luminance.

[0115] In addition, in the organic light-emitting diode display device according to the embodiment of the present invention, a recess 113 is provided in the contact area CA, and the upper surface of the bank 150 is polished and flattened, thereby minimizing the step between the contact area CA and the light-emitting area EA.

[0116] Specifically, since the contact electrodes 122a, 124a, 126a and the contact holes 114a, 116a are provided in the contact area CA, the steps in the contact area CA are higher than the light-emitting area EA and are formed at various heights. These steps cause the light-emitting layer 130 to become thinner in places, which results in a leakage current that turns on the light-emitting diode De that is in the off state, causing a panel failure.

[0117] Thus, in embodiments of the present invention, by providing recesses 113 in contact regions CA and polishing the top surface of bank 150 to minimize the step between contact regions CA and light emitting region EA, leakage current can be minimized and reliability can be improved. For example, light emitting layer 130 can extend across contact region CA and light emitting region EA while maintaining substantially the same or uniform thickness and substantially the same or uniform flatness of the top surface of light emitting layer 130.

[0118] A method for manufacturing an organic light emitting diode display device according to an embodiment of the present invention will now be described with reference to the accompanying drawings.

[0119] Figures 4A to 4N and Figures 5A to 5N are schematic cross-sectional views of a manufacturing process of an organic light-emitting diode display device according to an embodiment of the present invention, where Figures 4A to 4N correspond to line II' in Figure 1, and Figures 5A to 5N correspond to lines II-II', III-III', and IV-IV' in Figure 1.

[0120] As shown in Figures 4A and 5A, a transistor TR is formed in each of the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3 on the upper part of the substrate 110. The transistor TR may be located in a contact area CA of each of the subpixels SP1, SP2, and SP3. However, the embodiment of the present invention is not limited thereto. The transistor TR may be located in the light-emitting area EA of each of the subpixels SP1, SP2, and SP3 (e.g., below the light-emitting area EA to save space and reduce the footprint of each subpixel).

[0121] Next, an insulating material is deposited on the top of the transistor TR to form a first insulating layer 112 over substantially the entire surface of the substrate 110, and then the first insulating layer 112 is selectively removed using a photolithography process to form via holes 112a exposing the transistors TR of each subpixel SP1, SP2, and SP3.

[0122] Next, the via hole 112a is filled with a metal material to form a via electrode 117. For example, the via electrode 117 may be made of tungsten, but the embodiment of the present invention is not limited thereto.

[0123] Next, the upper surface of the first insulating layer 112 on which the via electrode 117 is formed is polished and planarized. Here, the polishing can be performed by chemical mechanical polishing (CMP) using chemical and physical actions.

[0124] Next, as shown in Figures 4B and 5B, the first insulating layer 112 in the contact area CA of each of the subpixels SP1, SP2, and SP3 is partially removed in a photolithography process to form a recess 113. At this time, the via hole 112a and a part of the via electrode 117 are also removed. According to another embodiment, the recess 113 can extend through the first insulating layer 112 so that the transistor TR and at least a part of the first contact electrode 122a are located on the same layer or at the same height. In this way, the via hole 112a and the via electrode 117 can be omitted, but the embodiment is not limited thereto.

[0125] Next, as shown in Figures 4C and 5C, a metal material is deposited on the top of the first insulating layer 112 having the recess 113, and then selectively removed using a photolithography process to form the first reflective layer 122 and the first contact electrode 122a.

[0126] Here, the first reflective layer 122 is located in the light emitting area EA of the first subpixel SP1, and the first contact electrode 122a is located in the contact area CA of each of the subpixels SP1, SP2, and SP3. The first contact electrode 122a is located in the recess 113 and contacts the via electrode 117. In addition, the first contact electrode 122a of the first subpixel SP1 may have a size larger than the first contact electrode 122a of the second subpixel SP2 and the first contact electrode 122a of the third subpixel SP3. For example, the first contact electrode 122a of the first subpixel SP1 is formed integrally with the first reflective layer 122 extending in the light emitting area EA of the first subpixel SP1.

[0127] As shown in Fig. 5C, in the first subpixel SP1, the first reflective layer 122 and the first contact electrode 122a are connected to each other. However, the embodiment of the present invention is not limited to this. In other embodiments of the present invention, the first reflective layer 122 and the first contact electrode 122a in the first subpixel SP1 may be separated and not electrically connected.

[0128] Next, as shown in Figures 4D and 5D, an insulating material is deposited on the first reflective layer 122 and the first contact electrode 122a to form a second insulating layer 114 over substantially the entire surface of the substrate 110, and then the second insulating layer 114 is selectively removed by a photolithography process to form first contact holes 114a in each of the sub-pixels SP1, SP2, and SP3.

[0129] The first contact hole 114a is located in the contact region CA and partially exposes the upper surface of the first contact electrode 122a. The first contact hole 114a is located in the recess 113 in a plan view and is separated from the via hole 112a.

[0130] Next, as shown in Figures 4E and 5E, a metal material is deposited on the top of the second insulating layer 114 in which the first contact hole 114a is formed, and then selectively removed using a photolithography process to form a second reflective layer 124 and a second contact electrode 124a.

[0131] Here, the second reflective layer 124 is located in the light emitting area EA of the second subpixel SP2, and the second contact electrode 124a is located in the contact area CA of each of the subpixels SP1, SP2, and SP3. In the contact area CA of each of the subpixels SP1, SP2, and SP3, the second contact electrode 124a is located in the recess 113 and overlaps with the first contact electrode 122a. The second contact electrode 124a contacts the first contact electrode 122a through the first contact hole 114a.

[0132] As shown in FIG 5E, the second reflective layer 124 and the second contact electrode 124a in the second subpixel SP2 are connected to each other or formed integrally. However, the embodiment of the present invention is not limited thereto. In other embodiments of the present invention, the second reflective layer 124 and the second contact electrode 124a in the second subpixel SP2 may be separated and not electrically connected.

[0133] Next, as shown in Figures 4F and 5F, an insulating material is deposited on the second reflective layer 124 and the second contact electrode 124a to form a third insulating layer 116 over substantially the entire surface of the substrate 110, and then the third insulating layer 116 is selectively removed by a photolithography process to form second contact holes 116a in each of the sub-pixels SP1, SP2, and SP3.

[0134] The second contact hole 116a is located in the contact region CA and partially exposes the upper surface of the second contact electrode 124a. The second contact hole 116a is located in the recess 113 in a plan view and is separated from the first contact hole 114a.

[0135] Next, as shown in Figures 4G and 5G, a metal material is deposited on the top of the third insulating layer 116 in which the second contact hole 116a is formed, and then selectively removed using a photolithography process to form a third reflective layer 126 and a third contact electrode 126a.

[0136] Here, the third reflective layer 126 is located in the light emitting area EA of the third subpixel SP3, and the third contact electrode 126a is located in the contact area CA of each of the subpixels SP1, SP2, and SP3. In the contact area CA of each of the subpixels SP1, SP2, and SP3, the third contact electrode 126a is located in the recess 113 and overlaps with the first contact electrode 122a and the second contact electrode 124a. The third contact electrode 126a contacts the second contact electrode 124a through the second contact hole 116a.

[0137] As shown in FIG 5G, the third reflective layer 126 and the third contact electrode 126a in the third subpixel SP3 are connected to each other or formed integrally. However, the embodiment of the present invention is not limited thereto. In other embodiments of the present invention, the third reflective layer 126 and the third contact electrode 126a in the third subpixel SP3 may be separated and not electrically connected.

[0138] Next, as shown in Figures 4H and 5H, a conductive material is deposited on the third reflective layer 126 and the third contact electrode 126a, and then selectively removed using a photolithography process to form a first electrode 120 in each sub-pixel SP1, SP2, and SP3.

[0139] The first electrode 120 is located in the light emitting area EA and the contact area CA of each of the subpixels SP1, SP2, and SP3. Here, the height of the first electrode 120 located in the contact area CA is lower than the height of the first electrode 120 located in the light emitting area EA. That is, the distance between the first electrode 120 located in the contact area CA and the substrate 110 is shorter than the distance between the first electrode 120 located in the light emitting area EA and the substrate 110.

[0140] The first electrode 120 in the light-emitting region EA of the first subpixel SP1 and the second subpixel SP2 is in contact with the third insulating layer 116, and the first electrode 120 in the light-emitting region EA of the third subpixel SP3 is in contact with the third reflective layer 126. The first electrode 120 in the contact region CA of each of the subpixels SP1, SP2, and SP3 overlaps with the first contact electrode 122a, the second contact electrode 124a, and the third contact electrode 126a, and covers and contacts the third contact electrode 126a. Therefore, the first electrode 120 is electrically connected to the transistor TR.

[0141] 4I and 5I, an insulating material is deposited on the first electrode 120 to form a bank material layer 150a substantially over the entire surface of the substrate 110. Here, the upper surface of the bank material layer 150a is not flat. That is, due to the first contact electrode 122a, the second contact electrode 124a, the third contact electrode 126a, the first contact hole 114a, the second contact hole 116a, etc., which are provided in the contact area CA, the bank material layer 150a has steps of various heights on its upper surface, and has unevenness.

[0142] The bank material layer 150a may be made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), although the embodiments of the present invention are not limited thereto.

[0143] 4J and 5J, the upper surface of the bank material layer 150a is polished and planarized by using a chemical mechanical polishing method, thereby forming a bank layer 150b having a smaller height and thickness than the bank material layer 150a and a flat upper surface.

[0144] 4K and 5K, the bank layer 150b is selectively removed by a photolithography process to form the bank 150 that exposes the center of the first electrode 120 while covering the edge of the first electrode 120. The bank 150 exposes the first electrode 120 located in the light-emitting area EA while covering the first electrode 120 located in the contact area CA.

[0145] Such a bank 150 has a flat upper surface, and the step between the bank 150 in the contact region CA and the first electrode 120 in the light-emitting region EA is relatively small. That is, the distance between the upper surface of the bank 150 in the contact region CA and the upper surface of the first electrode 120 in the light-emitting region EA is relatively small.

[0146] Next, as shown in FIG. 4L and FIG. 5L, the bank 150 and the third insulating layer 116 are etched at the boundaries between the adjacent first subpixel SP1, second subpixel SP2, and third subpixel SP3 to form trenches TCH.

[0147] 4M and 5M, a first stack 132 and a charge generating layer 134 are sequentially formed on the first electrode 120 and the bank 150 exposed through the opening of the bank 150. The first stack 132 and the charge generating layer 134 may be formed by a deposition process such as thermal evaporation. However, the present invention is not limited thereto.

[0148] The first stack 132 is separated by the trench TCH between each of the subpixels SP1, SP2, and SP3. That is, the first stack 132 has an independent pattern for each of the subpixels SP1, SP2, and SP3. Similarly, the charge generation layer 134 is separated by the trench TCH between each of the subpixels SP1, SP2, and SP3. That is, the charge generation layer 134 has an independent pattern for each of the subpixels SP1, SP2, and SP3. Therefore, the first stack 132 and the charge generation layer 134 in the adjacent subpixels SP1, SP2, and SP3 are not connected to each other, and are separated for each of the subpixels SP1, SP2, and SP3. At this time, each of the first stack 132 and the charge generation layer 134 between each of the subpixels SP1, SP2, and SP3 is formed along the sidewall of the trench TCH, and may become thinner and disconnected as it approaches the substrate 110 from the sidewall of the trench TCH.

[0149] Next, a second stack 136 and a second electrode 140 are sequentially formed on top of the charge generating layer 134. The second stack 136 and the second electrode 140 may be formed by a deposition process such as thermal evaporation, although embodiments of the present invention are not limited thereto.

[0150] Here, the second stacks 136 and the second electrodes 140 in the adjacent subpixels SP1, SP2, and SP3 may not be separated but may be connected to each other, or the second stacks 136 and / or the second electrodes 140 may be separated for each of the subpixels SP1, SP2, and SP3.

[0151] Next, as shown in Figures 4N and 5N, first sealing layer 152, second sealing layer 154, and third sealing layer 156 are sequentially formed on second electrode 140. At this time, first sealing layer 152 and third sealing layer 156 can be formed by a deposition process having excellent step coverage. As a result, first sealing layer 152 and third sealing layer 156 may be formed along the steps of the lower layers and have an uneven upper surface.

[0152] Meanwhile, the second encapsulation layer 154 may have a substantially flat upper surface by eliminating steps due to the lower layers. As a result, the third encapsulation layer 156 on the upper part of the second encapsulation layer 154 may also have a flat upper surface. The second encapsulation layer 154 may be formed by a solution process. However, the embodiment of the present invention is not limited thereto. The second encapsulation layer 154 may also be formed by a deposition process.

[0153] Next, a color resist is applied to the top of the third sealing layer 156, and the step of patterning using a photolithography process is repeated to form the first color filter 160R, the second color filter 160G, and the third color filter 160B in the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, respectively, thereby completing the color filter 160.

[0154] In this manner, in the organic light emitting diode display device according to the embodiment of the present invention, the recess 113 is provided in the contact area CA, and the bank 150 having a flat upper surface is formed by using chemical mechanical polishing (CMP) or the like, thereby minimizing the step between the contact area CA and the light emitting area EA, thereby minimizing leakage current and improving reliability.

[0155] The organic light emitting diode display device according to the embodiment of the present invention can be used in a head mounted display. A head mounted display is a display device in the shape of goggles or a helmet worn on the head, and is a glasses-type monitor for Virtual Reality (VR) or Augmented Reality (AR) that forms a focus in front of the user's eyes. The head mounted display can be realized by arranging various optical systems in front of the organic light emitting diode display device according to the embodiment of the present invention.

[0156] The present invention has been described above with reference to preferred embodiments thereof. However, a person having ordinary knowledge in the technical field to which the present invention pertains would be able to modify or change the present invention in various ways without departing from the technical concept and technical scope of the present invention as set forth in the claims. [Explanation of symbols]

[0157] 110...substrate, TR...transistor, De...light-emitting diode, TCH...trench, 112...first insulating layer, 114...second insulating layer, 116...third insulating layer, 112a...via hole, 113...recess, 114a...first contact hole, 116a...second contact hole, 117...via electrode, 120...first electrode, 130...light-emitting layer, 132...first stack, 134...charge generating layer, 136...first 2 stack, 140...second electrode, 150...bank, 122...first reflective layer, 124...second reflective layer, 126...third reflective layer, 122a...first contact electrode, 124a...second contact electrode, 126a...third contact electrode, 152...first sealing layer, 154...second sealing layer, 156...third sealing layer, 160...color filter, SP1...first subpixel, SP2...second subpixel, SP3...third subpixel

Claims

1. A substrate having a plurality of sub-pixels; at least one transistor disposed in each of the plurality of sub-pixels on the upper portion of the substrate; a first insulating layer on top of the at least one transistor; a light emitting diode disposed in each of the plurality of sub-pixels on the first insulating layer, the light emitting diode including a first electrode, a light emitting layer, and a second electrode; Each of the plurality of sub-pixels includes a contact region and a light-emitting region; the light emitting diode is electrically connected to the at least one transistor at the contact region; the first insulating layer has a recess in the contact region; The first insulating layer further includes a via hole in the contact region for electrically connecting the light emitting diode to the at least one transistor.

2. At least one contact electrode and at least one reflective layer are formed of the same material and are provided on the same layer between the first insulating layer and the light emitting diode; 2. The organic light emitting diode display device according to claim 1, wherein the at least one contact electrode is located in the contact region, and the at least one reflective layer is located in the light emitting region.

3. 3. The organic light-emitting diode display device according to claim 2, wherein the at least one contact electrode is located in the recess, and a distance between the at least one contact electrode and the substrate is shorter than a distance between the at least one reflective layer and the substrate.

4. further comprising a first reflective layer, a second reflective layer, and a third reflective layer in the light emitting region between the first insulating layer and the light emitting diode; the plurality of subpixels include a first subpixel, a second subpixel, and a third subpixel; The organic light emitting diode display device of claim 1 , wherein the first reflective layer, the second reflective layer, and the third reflective layer are located in the first sub-pixel, the second sub-pixel, and the third sub-pixel, respectively.

5. 5. The organic light emitting diode display device of claim 4, wherein a distance between the second reflective layer and the second electrode in the second subpixel is smaller than a distance between the first reflective layer and the second electrode in the first subpixel and is larger than a distance between the third reflective layer and the second electrode in the third subpixel.

6. a second insulating layer and a third insulating layer between the first insulating layer and the light emitting diode; the first reflective layer is located between the first insulating layer and the second insulating layer; the second reflective layer is located between the second insulating layer and the third insulating layer; The organic light emitting diode display device according to claim 4 , wherein the third reflective layer is located between the third insulating layer and the light emitting diode.

7. the first subpixel, the second subpixel, and the third subpixel further include a first contact electrode, a second contact electrode, and a third contact electrode that overlap and are electrically connected to each other in the contact region, The organic light emitting diode display device according to claim 6 , wherein the first contact electrode, the second contact electrode, and the third contact electrode are located within the recess.

8. the first contact electrode is located between the first insulating layer and the second insulating layer; the second contact electrode is located between the second insulating layer and the third insulating layer; The organic light emitting diode display device according to claim 7 , wherein the third contact electrode is located between the third insulating layer and the light emitting diode.

9. a bank between the first electrode and the light emitting layer, the bank covering an edge of the first electrode and exposing a center of the first electrode; The organic light emitting diode display device according to claim 1 , wherein the bank is located in the contact region.

10. 10. The organic light emitting diode display of claim 9, wherein the bank comprises a trench between adjacent subpixels.

11. forming at least one transistor in each of a plurality of sub-pixels provided on a substrate; forming at least one insulating layer having a recess over the at least one transistor; forming a light emitting diode including a first electrode, a light emitting layer, and a second electrode in each of the plurality of sub-pixels on top of the at least one insulating layer; Each of the plurality of sub-pixels includes a contact region and a light-emitting region; the light emitting diode is electrically connected to the at least one transistor at the contact region; The recess is located in the contact region.

12. forming a bank between the first electrode and the light emitting layer, the bank covering an edge of the first electrode and exposing a center of the first electrode; The method of claim 11 , wherein the bank is located in the contact region.

13. The step of forming the bank includes: forming a bank material layer on the first electrode; polishing an upper surface of the bank material layer to form a bank layer; The method of claim 12, further comprising the step of selectively removing the bank layer.

14. The method further includes forming at least one contact electrode and at least one reflective layer in the same process between the step of forming the at least one insulating layer and the step of forming the light emitting diode, the at least one contact electrode is located in the contact region; The method of claim 11, wherein the at least one reflective layer is located in the light-emitting region.

15. the at least one contact electrode is located within the recess; 15. The method of claim 14, wherein a distance between the at least one contact electrode and the substrate is shorter than a distance between the at least one reflective layer and the substrate.

16. The light emitting diode further includes at least one contact electrode provided between the first insulating layer and the light emitting diode; the via hole provided in the first insulating layer exposes the at least one transistor; the at least one contact electrode is located within the recess; 2 . The organic light emitting diode display device according to claim 1 , wherein the at least one contact electrode is electrically connected to the at least one transistor through the via hole provided in the first insulating layer.

17. The organic light-emitting diode display device of claim 16, wherein the recess overlaps the via hole and has a width and area greater than those of the via hole.

18. The organic light-emitting diode display device of claim 1, wherein the via hole is disposed between the at least one transistor and the recess.

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