Liquid dispensing device

The liquid ejection device addresses the issue of liquid mist entering the printhead by using a digital signal output circuit and an integrated circuit with a through hole to capture and detect ink mist, enhancing detection accuracy and preventing malfunctions.

JP7673455B2Active Publication Date: 2025-05-09SEIKO EPSON CORP
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Patent Information

Application Number
JP2021053645
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-03-26
Publication Date
2025-05-09
Estimated Expiration
2041-03-26

AI Technical Summary

Technical Problem

Existing liquid ejection devices, such as inkjet printers, face issues with liquid mist entering the printhead, leading to short circuits and malfunctions due to the mist being attracted to conductive parts.

Method used

The liquid ejection device incorporates a printhead with a digital signal output circuit, a liquid storage container, and an integrated circuit that detects abnormalities, including ink mist adhesion, by utilizing a through hole in the substrate to capture and guide ink to the integrated circuit for detection.

Benefits of technology

This configuration enhances the accuracy of detecting liquid mist abnormalities and reduces the risk of integrated circuit malfunction due to ink mist adhesion, thereby improving the reliability and performance of the liquid ejection device.

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Abstract

To provide a liquid discharge device which is improved in accuracy of detecting liquid having intruded into a print head.SOLUTION: A liquid discharge device includes: a print head for discharging liquid; a digital signal output circuit for outputting digital signals to the print head; and a liquid storage container for supplying liquid to the print head. The print head has: a supply port through which liquid is supplied from the liquid storage container; a nozzle plate with a plurality of nozzles for discharging liquid; a substrate with a first surface and a second surface different from the first surface; a connector to which digital signals are input; and an integrated circuit to which digital signals are input via the connector, and which outputs abnormality detection signals indicating presence / absence of abnormality of the print head. The connector is provided on the first surface, whereas the integrated circuit is provided on the second surface. In a mounting region where the integrated circuit is provided on the substrate, an open hole is formed penetrating the first surface and the second surface.SELECTED DRAWING: Figure 14
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Description

[Technical field]

[0001] The present invention relates to a liquid ejection device. [Background technology]

[0002] In a liquid ejection device such as an inkjet printer, a piezoelectric element provided in a print head is driven by a drive signal to eject liquid such as ink filled in a cavity from a nozzle, forming characters or an image on a medium. In such a liquid ejection device, most of the liquid ejected from the nozzle lands on the medium and forms an image.

[0003] However, a part of the liquid discharged from the nozzle may turn into mist before landing on the medium and float inside the liquid discharge device as liquid mist. Even after the liquid discharged from the nozzle lands on the medium, the liquid may turn into mist and float inside the liquid discharge device as liquid mist due to air currents generated by the transport of the medium onto which the liquid is discharged. Such liquid mist floating inside the liquid discharge device is very small, so it is charged by the Lenard effect. Therefore, the liquid mist may be attracted to conductive parts such as wiring patterns that transmit various signals to the print head and terminals that electrically connect the cable and the print head, and as a result, may enter the inside of the print head.

[0004] When liquid mist enters the interior of the print head, the liquid mist is attracted to the wiring patterns, terminals, electronic components, etc. provided inside the print head. If the liquid mist adheres between the wiring patterns and between the terminals, a short circuit occurs in the print head, which can result in malfunction of the print head and liquid ejection device.

[0005] Malfunctions of the print head and liquid ejection device caused by such liquid mist entering the interior of the print head are not limited to liquid mist entering the print head, but can also occur, for example, when liquid such as ink supplied to the print head leaks from a joint or the like, and the leaked liquid enters the interior of the print head and adheres to the wiring pattern or terminals provided inside the print head.

[0006] To address problems that can arise from liquid entering the interior of such a print head, for example, Patent Document 1 discloses a technology in which a print head that ejects liquid is equipped with an integrated circuit that detects abnormalities in the print head, and even if liquid such as ink enters the print head, the risk of ink adhering to the integrated circuit is reduced, thereby reducing the risk of the integrated circuit malfunctioning. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2020-142499 A Summary of the Invention [Problem to be solved by the invention]

[0008] However, the technique described in Patent Document 1 leaves room for improvement in terms of the accuracy of detecting liquid that has entered the interior of the print head. [Means for solving the problem]

[0009] One aspect of the liquid ejection device according to the present invention is to A print head that ejects liquid; a digital signal output circuit for outputting a digital signal to the print head; a liquid container for supplying liquid to the print head; Equipped with The print head includes: a supply port through which liquid is supplied from the liquid storage container; a nozzle plate having a plurality of nozzles for ejecting liquid; A substrate having a first surface and a second surface different from the first surface; a connector to which the digital signal is input; an integrated circuit that receives the digital signal via the connector and outputs an abnormality detection signal that indicates whether or not the print head is abnormal; having The connector is provided on the first surface, the integrated circuit is disposed on the second surface; A through hole penetrating the first surface and the second surface is provided in a mounting region of the substrate in which the integrated circuit is provided. [Brief description of the drawings]

[0010] [Figure 1] FIG. 2 is a diagram illustrating a functional configuration of the liquid ejection device. [Diagram 2] 4 is a diagram showing an example of the waveforms of drive signals COMA and COMB. FIG. [Diagram 3] FIG. 4 is a diagram showing an example of the waveform of a drive signal VOUT. [Figure 4] FIG. 4 is a diagram showing a configuration of a drive signal selection circuit. [Diagram 5] FIG. 13 is a diagram showing the decoded contents in a decoder. [Figure 6] FIG. 2 is a diagram illustrating a configuration of a selection circuit. [Figure 7] 5 is a diagram for explaining the operation of a drive signal selection circuit. FIG. [Figure 8] FIG. 1 is a diagram showing a schematic structure of a liquid ejection device. [Figure 9] FIG. 13 is an exploded perspective view of the head unit as viewed from the -Z side. [Figure 10] FIG. 2 is an exploded perspective view of the head unit as viewed from the +Z side. [Figure 11] This is a diagram of the head unit as seen from the +Z side. [Figure 12]FIG. 2 is an exploded perspective view showing a schematic configuration of a discharge head. [Figure 13] FIG. 2 is a cross-sectional view showing a schematic structure of a head chip. [Figure 14] 1A is a diagram showing an example of a configuration of a wiring board when the wiring board is viewed from the -Z side. FIG. [Figure 15] 1 is a diagram showing an example of a configuration of a wiring board when the wiring board is viewed from the +Z side. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Preferred embodiments of the present invention will be described below with reference to the drawings. The drawings are used for the convenience of explanation. Note that the embodiments described below do not unduly limit the contents of the present invention described in the claims. Furthermore, not all of the configurations described below are necessarily essential components of the present invention.

[0012] 1. Functional configuration of the liquid ejection device The functional configuration of a liquid ejection device 1 in this embodiment will be described with reference to Fig. 1. The liquid ejection device 1 in this embodiment will be described by taking as an example a so-called inkjet printer that forms a desired image on a medium by ejecting ink, as an example of a liquid, onto the medium. Such a liquid ejection device 1 receives image data transmitted by wired communication or wireless communication from an external device such as an external computer, and forms an image on the medium based on the received image data.

[0013] 1 is a diagram showing the functional configuration of a liquid ejection device 1. As shown in FIG.

[0014] The control unit 10 has a main control circuit 11 and a power supply circuit 12. A commercial voltage is input to the power supply circuit 12 from a commercial AC power supply (not shown) provided outside the liquid ejection device 1. The power supply circuit 12 generates a voltage VHV, which is a DC voltage with a voltage value of 42 V, and a voltage VDD, which is a DC voltage with a voltage value of 5 V, based on the input commercial voltage, and outputs them to the head unit 20. Such a power supply circuit 12 includes, for example, an AC / DC converter such as a flyback circuit that converts the commercial voltage, which is an AC voltage, into a DC voltage, and a DC / DC converter that converts the voltage value of the DC voltage output by the AC / DC converter.

[0015] The voltages VHV and VDD generated by the power supply circuit 12 are supplied to the head unit 20 to operate various components of the head unit 20. That is, the voltages VHV and VDD correspond to the power supply voltages of the head unit 20. The voltages VHV and VDD may also be used as power supply voltages for each part of the liquid ejection device 1, including the control unit 10. Furthermore, in addition to the voltages VHV and VDD, the power supply circuit 12 may generate voltage signals of voltage values ​​used by each part of the liquid ejection device 1, including the control unit 10 and the head unit 20, and output them to the corresponding components.

[0016] An image signal is input to the main control circuit 11 via an interface circuit (not shown) from an external device such as a host computer provided outside the liquid ejection device 1. The main control circuit 11 then generates various signals for forming an image on a medium according to the input image signal, and outputs the signals to the corresponding components.

[0017] Specifically, the main control circuit 11 performs a predetermined image processing on the input image signal, and then outputs the processed signal as an image information signal IP to the head unit 20. The image information signal IP output from the main control circuit 11 is an electric signal such as a differential signal, and is, for example, a signal conforming to a communication standard of PCIe (Peripheral Component Interconnect Express). Here, the image processing executed by the main control circuit 11 includes, for example, a color conversion process that converts the input image signal into red, green, and blue color information, and then converts it into color information corresponding to the color of the ink ejected from the liquid ejection device 1, and a halftone process that binarizes the color information. Note that the image processing executed by the main control circuit 11 is not limited to the above-mentioned color conversion process and halftone process.

[0018] Furthermore, the main control circuit 11 generates a transport control signal for transporting a medium on which an image based on the input image signal is formed, based on the input image signal, and outputs the signal to a medium transport unit (not shown). This starts transport of the medium.

[0019] As described above, the main control circuit 11 generates an image information signal IP that controls the operation of the head unit 20, outputs it to the head unit 20, and controls the transportation of the medium. This enables the head unit 20 to eject ink at a desired position on the medium. Such a main control circuit 11 is one or more semiconductor devices equipped with multiple functions, and is configured to include, for example, an SoC (System on a Chip).

[0020] The head unit 20 includes a head control circuit 21, a differential signal restoration circuit 22, a drive signal output circuit 50, and ejection heads 100-1 to 100-m. In the following description, the ejection heads 100-1 to 100-m all have the same configuration, and may be referred to as the ejection head 100 when there is no need to distinguish between them.

[0021] The head control circuit 21 outputs a control signal for controlling each part of the head unit 20 based on the image information signal IP input from the main control circuit 11. Specifically, the head control circuit 21 controls the ejection of ink from the ejection head 100 based on the image information signal IP. , dSIm1 to dSImn are generated and output to a differential signal restoration circuit 22. The differential signal restoration circuit 22 generates a differential signal dSCK by converting a control signal that controls the above-mentioned.

[0022] The differential signal restoration circuit 22 restores the input differential signal dSCK and differential signals dSIa1 to dSIan, ..., dSIm1 to dSImn, respectively, to generate a clock signal SCK and print data signals SIa1 to SIan, ..., SIm1 to SImn, and outputs them to the corresponding ejection heads 100-1 to 100-m.

[0023] In detail, the head control circuit 21 generates a differential signal dSCK including a pair of signals dSCK+, dSCK-, and outputs it to the differential signal restoration circuit 22. The differential signal restoration circuit 22 restores the differential signal dSCK including the input pair of signals dSCK+, dSCK-, to generate a clock signal SCK, and outputs it to the ejection heads 100-1 to 100-m.

[0024] Furthermore, the head control circuit 21 generates differential signals dSIa1-dSIan including a pair of signals dSIa1+-dSIan+, dSIa1--dSIan-, and outputs them to the differential signal restoration circuit 22. The differential signal restoration circuit 22 restores the input differential signals dSIa1-dSIan to generate print data signals SIa1-SIan, which are corresponding single-ended signals, and outputs them to the ejection head 100-1.

[0025] Similarly, the head control circuit 21 generates differential signals dSIm1 to dSImn including pairs of signals dSIm1+ to dSImn+, dSIm1- to dSImn-, and outputs them to the differential signal restoration circuit 22. The differential signal restoration circuit 22 restores the input differential signals dSIm1 to dSImn to generate print data signals SIm1 to SImn, which are corresponding single-ended signals, and outputs them to the ejection head 100-m.

[0026] That is, the ejection head 100-i (i is any of 1 to m) receives a clock signal SCK obtained by restoring a differential signal dSCK including a pair of signals dSCK+, dSCK- output by the head control circuit 21, by the differential signal restoration circuit 22, and print data signals SIi1 to SIin obtained by restoring differential signals dSIi1 to dSIin including a pair of signals dSIi1+ to dSIin+, dSIi1- to dSIin-, by the differential signal restoration circuit 22.

[0027] Here, the differential signal dSCK and the differential signals dSIa1-dSIan, ..., dSIm1-dSImn output from the head control circuit 21 may be differential signals of an LVDS (Low Voltage Differential Signaling) transfer method, or may be differential signals of various high-speed communication methods other than LVDS, such as LVPECL (Low Voltage Positive Emitter Coupled Logic) and CML (Current Mode Logic). The head unit 20 may have a differential signal generation circuit that generates a differential signal, and the differential signal generation circuit may generate the differential signal dSCK and the differential signals dSIa1-dSIan, ..., dSIm1-dSImn from the basic control signal oSCK that is the basis of the differential signal dSCK output from the head control circuit 21 and the basic control signals oSIa1-oSIan, ..., oSIm1-oSImn that are the basis of the differential signals dSIa1-dSIan, ..., dSIm1-dSImn, and output them to the differential signal restoration circuit 22.

[0028] In addition, the head control circuit 21 generates a latch signal LAT and a change signal CH as control signals for controlling the timing of ink ejection from the m ejection heads 100 based on the image information signal IP input from the main control circuit 11, and outputs them to each of the m ejection heads 100.

[0029] Furthermore, the head control circuit 21 generates drive signals COMA and COMB for driving the m ejection heads 100 based on the image information signal IP input from the main control circuit 11. The basic drive signals dA and dB are generated and output to the drive signal output circuit 50.

[0030] The drive signal output circuit 50 includes drive circuits 51a and 51b. A basic drive signal dA is input to the drive circuit 51a. The drive circuit 51a converts the basic drive signal dA to an analog signal, and then performs D-class amplification on the converted analog signal based on the voltage VHV to generate a drive signal COMA, which is output to the m ejection heads 100. The basic drive signal dB is input to the drive circuit 51b. The drive circuit 51b converts the basic drive signal dB to an analog signal, and then performs D-class amplification on the converted analog signal based on the voltage VHV to generate a drive signal COMB, which is output to the m ejection heads 100. The drive signal output circuit 50 also increases or decreases the voltage VDD to generate a reference voltage signal VBS, which is a reference potential when ink is ejected from the m ejection heads 100, and outputs the reference voltage signal VBS to the m ejection heads 100.

[0031] Here, in this embodiment, the description will be given assuming that the drive signals COMA, COMB and the reference voltage signal VBS output by the drive signal output circuit 50 are output in common to the m ejection heads 100, but the drive signal output circuit 50 may include a plurality of drive circuits 51a, 51b and output a plurality of drive signals COMA, COMB corresponding to the m ejection heads 100. Furthermore, the drive circuits 51a, 51b only need to be able to amplify analog signals corresponding to the input base drive signals dA, dB based on the voltage VHV, and may be configured to include, for example, a class A amplifier circuit, a class B amplifier circuit, or a class AB amplifier circuit.

[0032] The ejection head 100-1 receives print data signals SIa1 to SIan, a clock signal SCK, a latch signal LAT, a change signal CH, drive signals COMA and COMB, and a reference voltage signal VBS. The ejection head 100-1 also includes a diagnostic circuit 250, a temperature detection circuit 260, drive signal selection circuits 200-1 to 200-n, and head chips 300-1 to 300-n corresponding to the drive signal selection circuits 200-1 to 200-n, respectively.

[0033] The temperature detection circuit 260 included in the ejection head 100-1 detects the temperature of the ejection head 100-1 and outputs a temperature information signal TH indicating the detected temperature. The temperature information signal TH output by the temperature detection circuit 260 may include information indicating the temperature of the ejection head 100-1, and may also include information indicating whether the temperature of the ejection head 100-1 is equal to or higher than a predetermined temperature. The temperature information signal TH output by the temperature detection circuit 260 is input to the diagnosis circuit 250.

[0034] A diagnostic circuit 250 included in the ejection head 100-1 detects whether or not there is an abnormality in the ejection head 100-1, generates an abnormality detection signal AD indicative of the detection result, and outputs it to the head control circuit .

[0035] The diagnostic circuit 250 judges whether or not the temperature of the ejection head 100-1 is normal based on the temperature information signal TH input from the temperature detection circuit 260. That is, the diagnostic circuit 250 detects whether or not there is a temperature abnormality in the ejection head 100-1. Then, the diagnostic circuit 250 generates an abnormality detection signal AD indicating the presence or absence of a temperature abnormality, and outputs it to the head control circuit 21.

[0036] The diagnostic circuit 250 also receives the print data signals SIa1-SIan, the clock signal SCK, the latch signal LAT, and the change signal CH. The diagnostic circuit 250 detects whether or not there is an operational abnormality in the ejection head 100-1 based on the logical levels of the input print data signals SIa1-SIan, the clock signal SCK, the latch signal LAT, and the change signal CH. The diagnostic circuit 250 then generates an abnormality detection signal AD indicating whether or not there is an operational abnormality, and outputs it to the head control circuit 21.

[0037] For example, the diagnostic circuit 250 may detect the presence or absence of an operational abnormality caused by an abnormality in the propagation paths of the input print data signals SIa1-SIan, clock signal SCK, latch signal LAT, and change signal CH based on whether the logic levels of the input print data signals SIa1-SIan, clock signal SCK, latch signal LAT, and change signal CH are normal. The diagnostic circuit 250 may also cause the ejection head 100-1 to perform a predetermined operation based on the logic levels of the print data signals SIa1-SIan, clock signal SCK, latch signal LAT, and change signal CH, and detect the presence or absence of an operational abnormality of the ejection head 100-1 based on whether the predetermined operation is performed normally.

[0038] The diagnostic circuit 250 also detects whether the ink mist that has entered the inside of the ejection head 100-1 is adhering to the inside of the ejection head 100-1. The diagnostic circuit 250 then generates an abnormality detection signal AD indicating the presence or absence of adhesion of the ink mist, and outputs it to the head control circuit 21.

[0039] If the diagnostic circuit 250 determines that no abnormality has occurred in the ejection head 100-1, it outputs the clock signal SCK to the drive signal selection circuits 200-1 to 200-n as the clock signal cSCK, outputs each of the print data signals SIa1 to SIan to the corresponding drive signal selection circuits 200-1 to 200-n as the print data signals cSIa1 to cSIan, outputs the latch signal LAT to the drive signal selection circuits 200-1 to 200-n as the latch signal cLAT, and outputs the change signal CH to the drive signal selection circuits 200-1 to 200-n as the change signal cCH.

[0040] Here, the clock signal SCK and the clock signal cSCK output by the diagnostic circuit 250 may be the same signal, and similarly, each of the print data signals SIa1-SIan and each of the print data signals cSIa1-cSIan, the latch signal LAT and the latch signal cLAT, and the change signal CH and the change signal cCH may be the same signal. Also, the diagnostic circuit 250 may output the clock signal cSCK obtained by converting the clock signal SCK, and similarly, may output each of the print data signals cSIa1-cSIan obtained by converting each of the print data signals SIa1-SIan, the latch signal cLAT obtained by converting the latch signal LAT, and the change signal cCH obtained by converting the change signal CH. In the liquid ejection device 1 of this embodiment, the clock signal SCK and the clock signal cSCK output by the diagnostic circuit 250 are the same signal, each of the print data signals SIa1 to SIan and each of the print data signals cSIa1 to cSIan are the same signal, the latch signal LAT and the latch signal cLAT are the same signal, and the change signal CH and the change signal cCH are the same signal.

[0041] The diagnostic circuit 250 may also output to the head control circuit 21 an abnormality detection signal AD including a command indicating whether or not an abnormality has occurred in the ejection head 100, and if an abnormality has occurred in the ejection head 100, whether the abnormality is a temperature abnormality or an operational abnormality, and whether or not ink mist has adhered to the ejection head 100; however, it is preferable for the diagnostic circuit 250 to output to the head control circuit 21 a high or low level abnormality detection signal AD indicating whether or not a temperature abnormality, operational abnormality, or adhesion of ink mist has occurred in the ejection head 100. In other words, when an abnormality has occurred in the ejection head 100, it is preferable for the diagnostic circuit 250 to output a low or high level abnormality detection signal AD.

[0042] This allows the head control circuit 21 to detect whether or not there is an abnormality in the ejection head 100 in a short time without analyzing the command, and to perform operations such as stopping the printing process in the ejection head 100, thereby reducing the risk of an abnormality occurring in the ejection head 100 spreading to various parts of the liquid ejection device 1.

[0043] The print data signal cSIa1, the clock signal cSCK, the latch signal cLAT, the change signal cCH, and the drive signals COMA and COMB are input to the drive signal selection circuit 200-1 included in the ejection head 100-1. The drive signal selection circuit 200-1 included in the ejection head 100-1 generates a drive signal VOUT by selecting or not selecting the waveforms included in the drive signals COMA and COMB at the timing specified by the latch signal cLAT and the change signal cCH based on the print data signal cSIa1, and outputs the drive signal VOUT to the head chip 300-1 included in the ejection head 100-1. This drives the piezoelectric element 60 of the head chip 300-1, which will be described later, and ink is ejected from the corresponding nozzle as the piezoelectric element 60 is driven.

[0044] Similarly, the print data signal cSIan, the clock signal cSCK, the latch signal cLAT, the change signal cCH, and the drive signals COMA and COMB are input to the drive signal selection circuit 200-n included in the ejection head 100-1. The drive signal selection circuit 200-n included in the ejection head 100-1 generates a drive signal VOUT by selecting or deselecting the waveforms included in the drive signals COMA and COMB at the timing specified by the latch signal cLAT and the change signal cCH based on the print data signal cSIan, and outputs the drive signal VOUT to the head chip 300-n included in the ejection head 100-1. This drives the piezoelectric element 60 of the head chip 300-n, which will be described later, and ink is ejected from the corresponding nozzle as the piezoelectric element 60 is driven.

[0045] That is, each of the drive signal selection circuits 200-1 to 200-n switches whether or not to supply the drive signals COMA and COMB as the drive signal VOUT to the piezoelectric element 60 included in the corresponding head chip 300-1 to 300-n. Here, the ejection head 100-1 and the ejection heads 100-2 to 100-m are similar in configuration and operation, except that the signals input thereto are different. Therefore, a description of the configuration and operation of the ejection heads 100-2 to 100-m will be omitted. In addition, in the following description, the drive signal selection circuits 200-1 to 200-n included in the ejection head 100 all have the same configuration, and the head chips 300-1 to 300-n all have the same configuration. Therefore, when it is not necessary to distinguish between the drive signal selection circuits 200-1 to 200-n, they may be simply referred to as the drive signal selection circuit 200, and when it is not necessary to distinguish between the head chips 300-1 to 300-n, they may be simply referred to as the head chip 300. In this case, the explanation will be given on the assumption that the drive signal selection circuit 200 and the head chip 300 correspond to each other, and that the drive signal selection circuit 200 outputs a drive signal VOUT to the head chip 300. In this case, the explanation will be given on the assumption that the print data signal cSI, the clock signal cSCK, the latch signal cLAT, the change signal cCH, and the drive signals COMA and COMB are input to the drive signal selection circuit 200.

[0046] In the liquid ejection device 1 configured as above, the ejection head 100 that ejects ink onto a medium is an example of a print head, and one of the differential signal restoration circuit 22 that outputs the print data signals SIa1-SIan, which are digital signals, and the clock signal SCK to the ejection head 100, and the head control circuit 21 that outputs the latch signal LAT, which is a digital signal, and the change signal CH is an example of a digital signal output circuit. Note that in the present embodiment, the head control circuit 21 has been described as outputting the differential signals dSIa1-dSIan that are the basis of the print data signals SIa1-SIan, and the differential signal dSCK that is the basis of the clock signal SCK, but the head control circuit 21 may output the single-ended print data signals SIa1-SIan and the clock signal SCK. In this case, the liquid ejection device 1 does not need to include the differential signal restoration circuit 22.

[0047] 2. Configuration and operation of the drive signal selection circuit Next, a description will be given of the configuration and operation of the drive signal selection circuit 200. As described above, the drive signal selection circuit 200 selects or deselects the waveforms of the input drive signals COMA and COMB. By doing so, a drive signal VOUT is generated and output to the corresponding head chip 300. In explaining the configuration and operation of the drive signal selection circuit 200, first, an example of the waveforms of the drive signals COMA, COMB input to the drive signal selection circuit 200 and an example of the waveform of the drive signal VOUT output by the drive signal selection circuit 200 will be explained.

[0048] Fig. 2 is a diagram showing an example of the waveforms of the drive signals COMA and COMB. As shown in Fig. 2, the drive signal COMA is a waveform in which a trapezoidal waveform Adp1 arranged in a period T1 from when the latch signal LAT rises until when the change signal CH rises, and a trapezoidal waveform Adp2 arranged in a period T2 from when the change signal CH rises until when the latch signal LAT rises are consecutively arranged. When the trapezoidal waveform Adp1 is supplied to the head chip 300, a small amount of ink is ejected from the corresponding nozzle of the head chip 300, and when the trapezoidal waveform Adp2 is supplied to the head chip 300, a medium amount of ink, which is more than the small amount, is ejected from the corresponding nozzle of the head chip 300.

[0049] 2, the drive signal COMB is a waveform in which a trapezoidal waveform Bdp1 arranged in a period T1 is consecutively connected to a trapezoidal waveform Bdp2 arranged in a period T2. When the trapezoidal waveform Bdp1 is supplied to the head chip 300, ink is not ejected from the corresponding nozzle of the head chip 300. This trapezoidal waveform Bdp1 is a waveform for preventing an increase in ink viscosity by slightly vibrating the ink near the nozzle opening. When the trapezoidal waveform Bdp2 is supplied to the head chip 300, a small amount of ink is ejected from the corresponding nozzle of the head chip 300, similar to the case where the trapezoidal waveform Adp1 is supplied.

[0050] 2, the voltage values ​​at the start and end timings of the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2 are all common to all voltages Vc. That is, the trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2 each start and end at voltage Vc. A cycle Ta consisting of periods T1 and T2 corresponds to a printing cycle for forming new dots on the medium.

[0051] 2, the trapezoidal waveform Adp1 and the trapezoidal waveform Bdp2 are illustrated as having the same waveform, but the trapezoidal waveform Adp1 and the trapezoidal waveform Bdp2 may be different waveforms. In addition, in the case where the trapezoidal waveform Adp1 is supplied to the head chip 300 and in the case where the trapezoidal waveform Bdp1 is supplied to the head chip 300, a small amount of ink is ejected from the corresponding nozzle in both cases, but this is not limited to this. In other words, the waveforms of the drive signals COMA and COMB are not limited to the example shown in FIG. 2, and signals having various combinations of waveforms may be used depending on the properties of the ink ejected from the nozzles of the head chip 300 and the material of the medium on which the ink lands.

[0052] The drive signals COMA and COMB output by the drive signal output circuit 50 as described above are signals with a voltage value greater than that of the print data signal SI, the latch signal LAT, the change signal CH, and the clock signal SCK, and include trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp amplified based on the high-potential voltage VHV. At least one of the drive signals COMA and COMB is an example of a trapezoidal waveform signal, and at least one of the drive circuits 51a and 51b that output the drive signals COMA and COMB, and the drive signal output circuit 50 including the drive circuits 51a and 51b is an example of a trapezoidal waveform signal output circuit.

[0053] FIG. 3 is a diagram showing an example of the waveform of the drive signal VOUT corresponding to the sizes of dots formed on the medium being large dots LD, medium dots MD, small dots SD, and non-recording ND.

[0054] As shown in FIG. 3, the driving signal VOUT when a large dot LD is formed on the medium has a period In period Ta, the waveform is a continuous combination of a trapezoidal waveform Adp1 arranged in period T1 and a trapezoidal waveform Adp2 arranged in period T2. When this drive signal VOUT is supplied to the head chip 300, a small amount of ink and a medium amount of ink are ejected from the corresponding nozzle. Therefore, in period Ta, the ink droplets land on the medium and combine to form a large dot LD on the medium.

[0055] Moreover, the drive signal VOUT when a medium dot MD is formed on the medium has a waveform in which a trapezoidal waveform Adp1 arranged in period T1 and a trapezoidal waveform Bdp2 arranged in period T2 are consecutively arranged in a cycle Ta. When this drive signal VOUT is supplied to the head chip 300, a small amount of ink is ejected twice from the corresponding nozzle. Therefore, in the cycle Ta, each ink droplet lands on the medium and combines, forming a medium dot MD on the medium.

[0056] The drive signal VOUT when a small dot SD is formed on the medium has a waveform in which a trapezoidal waveform Adp1 arranged in period T1 is successively arranged with a constant waveform of voltage Vc arranged in period T2 during the cycle Ta. When this drive signal VOUT is supplied to the head chip 300, a small amount of ink is ejected once from the corresponding nozzle. Therefore, during the cycle Ta, this ink lands on the medium, and a small dot SD is formed on the medium.

[0057] The drive signal VOUT corresponding to the non-recording ND that does not form dots on the medium has a waveform in which a trapezoidal waveform Bdp1 arranged in period T1 and a constant waveform at voltage Vc arranged in period T2 are consecutively arranged in a cycle Ta. When this drive signal VOUT is supplied to the head chip 300, the ink near the opening of the corresponding nozzle only vibrates slightly, and the ink is not ejected. Therefore, in the cycle Ta, the ink does not land on the medium, and no dots are formed on the medium.

[0058] Here, the constant waveform of voltage Vc refers to the voltage supplied to head chip 300 when none of trapezoidal waveforms Adp1, Adp2, Bdp1, Bdp2 is selected as drive signal VOUT, and specifically, voltage Vc immediately before trapezoidal waveforms Adp1, Adp2, Bdp1, Bdp2 is the waveform of the voltage value held in head chip 300. Therefore, when none of trapezoidal waveforms Adp1, Adp2, Bdp1, Bdp2 is selected as drive signal VOUT, voltage Vc is supplied to head chip 300 as drive signal VOUT.

[0059] Next, the configuration and operation of the drive signal selection circuit 200 will be described. Fig. 4 is a diagram showing the configuration of the drive signal selection circuit 200. As shown in Fig. 4, the drive signal selection circuit 200 includes a selection control circuit 210 and a plurality of selection circuits 230. Fig. 4 also shows an example of a head chip 300 to which a drive signal VOUT output from the drive signal selection circuit 200 is supplied. As shown in Fig. 4, the head chip 300 includes p ejection sections 600 each having a piezoelectric element 60.

[0060] The print data signal cSI, the latch signal cLAT, the change signal cCH, and the clock signal cSCK are input to the selection control circuit 210. Furthermore, the selection control circuit 210 is provided with a set of a shift register (S / R) 212, a latch circuit 214, and a decoder 216 corresponding to each of the p ejection units 600 of the head chip 300. In other words, the drive signal selection circuit 200 includes the same number of sets of the shift register 212, the latch circuit 214, and the decoder 216 as the p ejection units 600 of the head chip 300.

[0061] The print data signal cSI is a signal synchronized with the clock signal cSCK, and outputs a large dot LD, a medium dot MD, a small dot SD, and a non-printing dot ND to each of the p ejection sections 600. The print data signal cSI input to the drive signal selection circuit 200 is held in the shift register 212 for each of the 2-bit print data [SIH, SIL] included in the print data signal cSI, corresponding to the p ejection units 600. Specifically, the selection control circuit 210 has p stages of shift registers 212 cascade-connected to each other, corresponding to the p ejection units 600, and the print data [SIH, SIL] input in serial as the print data signal cSI is transferred to the subsequent stages in sequence according to the clock signal cSCK. In FIG. 4, in order to distinguish the shift registers 212, the shift registers 212 to which the print data signal cSI is input are denoted as 1st stage, 2nd stage, ..., pth stage from the upstream side.

[0062] Each of the p latch circuits 214 latches the 2-bit print data [SIH, SIL] held in each of the p shift registers 212 at the rising edge of the latch signal cLAT.

[0063] 5 is a diagram showing the contents of the decode in the decoder 216. The decoder 216 outputs the selection signals S1 and S2 according to the latched 2-bit print data [SIH, SIL]. For example, when the 2-bit print data [SIH, SIL] is [1, 0], the decoder 216 outputs the logical level of the selection signal S1 to the selection circuit 230 as H and L levels during periods T1 and T2, and outputs the logical level of the selection signal S2 to the selection circuit 230 as L and H levels during periods T1 and T2.

[0064] The selection circuits 230 are provided corresponding to each of the discharge sections 600. That is, the number of selection circuits 230 included in the drive signal selection circuit 200 is p, which is the same as the number of discharge sections 600 included in the corresponding head chip 300. Fig. 6 is a diagram showing the configuration of a selection circuit 230 corresponding to one discharge section 600. As shown in Fig. 6, the selection circuit 230 has inverters 232a and 232b, which are NOT circuits, and transfer gates 234a and 234b.

[0065] The selection signal S1 is input to a positive control terminal of the transfer gate 234a that is not marked with a circle, and is logically inverted by the inverter 232a and input to a negative control terminal of the transfer gate 234a that is marked with a circle. A drive signal COMA is supplied to an input terminal of the transfer gate 234a. The selection signal S2 is input to a positive control terminal of the transfer gate 234b that is not marked with a circle, and is logically inverted by the inverter 232b and input to a negative control terminal of the transfer gate 234b that is marked with a circle. A drive signal COMB is supplied to an input terminal of the transfer gate 234b. The output terminals of the transfer gates 234a and 234b are connected in common, and a drive signal VOUT is output from this output terminal.

[0066] Specifically, the transfer gate 234a provides conduction between the input terminal and the output terminal when the selection signal S1 is at H level, and provides non-conduction between the input terminal and the output terminal when the selection signal S1 is at L level. The transfer gate 234b provides conduction between the input terminal and the output terminal when the selection signal S2 is at H level, and provides non-conduction between the input terminal and the output terminal when the selection signal S2 is at L level. That is, the selection circuit 230 selects the waveforms of the drive signals COMA and COMB based on the input selection signals S1 and S2, and outputs the drive signal VOUT having the selected waveform.

[0067] The operation of the drive signal selection circuit 200 will be described with reference to FIG. 7. FIG. 7 is a diagram for explaining the operation of the drive signal selection circuit 200. The print data [SIH, SIL] included in the print data signal cSI is input serially in synchronization with the clock signal cSCK, and is transferred sequentially in the shift register 212 corresponding to the ejection section 600. When the input of the clock signal cSCK stops, each shift register 212 holds 2-bit print data [SIH, SIL] corresponding to each of the p ejection sections 600. The print data [SIH, SIL] included in the print data signal cSI is input in the order corresponding to the p-stage, ..., 2-stage, 1-stage ejection sections 600 of the shift register 212.

[0068] Then, when the latch signal cLAT rises, the latch circuits 214 simultaneously latch the 2-bit print data [SIH, SIL] held in the shift register 212. In addition, in Fig. 7, LT1, LT2, ..., LTp indicate the 2-bit print data [SIH, SIL] latched by the latch circuits 214 corresponding to the 1st, 2nd, ..., pth stages of the shift register 212.

[0069] The decoder 216 outputs the logic levels of the selection signals S1, S2 as shown in FIG. 5 during each of the periods T1, T2, according to the dot size defined by the latched 2-bit print data [SIH, SIL].

[0070] Specifically, when the input print data [SIH, SIL] is [1, 1], the decoder 216 sets the selection signal S1 to H, H level during periods T1, T2, and sets the selection signal S2 to L, L level during periods T1, T2. In this case, the selection circuit 230 selects the trapezoidal waveform Adp1 during period T1, and selects the trapezoidal waveform Adp2 during period T2. As a result, the drive signal VOUT corresponding to the large dot LD shown in FIG. 3 is generated.

[0071] Furthermore, when the input print data [SIH, SIL] is [1, 0], the decoder 216 sets the selection signal S1 to H and L levels during periods T1 and T2, and sets the selection signal S2 to L and H levels during periods T1 and T2. In this case, the selection circuit 230 selects the trapezoidal waveform Adp1 during period T1, and selects the trapezoidal waveform Bdp2 during period T2. As a result, the drive signal VOUT corresponding to the medium dot MD shown in FIG. 3 is generated.

[0072] Furthermore, when the input print data [SIH, SIL] is [0, 1], the decoder 216 sets the selection signal S1 to H, L levels during periods T1, T2, and sets the selection signal S2 to L, L levels during periods T1, T2. In this case, the selection circuit 230 selects the trapezoidal waveform Adp1 during period T1, and does not select either the trapezoidal waveforms Adp2 or Bdp2 during period T2. As a result, the drive signal VOUT corresponding to the small dot SD shown in FIG. 3 is generated.

[0073] Furthermore, when the input print data [SIH, SIL] is [0, 0], the decoder 216 sets the selection signal S1 to L, L level during periods T1 and T2, and sets the selection signal S2 to H, L level during periods T1 and T2. In this case, the selection circuit 230 selects the trapezoidal waveform Bdp1 during period T1, and does not select either of the trapezoidal waveforms Adp2 and Bdp2 during period T2. As a result, the drive signal VOUT corresponding to the non-printing ND shown in FIG. 3 is generated.

[0074] As described above, the drive signal selection circuit 200 selects the waveforms of the drive signals COMA and COMB based on the print data signal cSI, the latch signal cLAT, the change signal cCH, and the clock signal cSCK, and outputs them as the drive signal VOUT. The drive signal selection circuit 200 then selects or deselects the waveforms of the drive signals COMA and COMB, thereby controlling the size of the dots formed on the medium, and as a result, dots of the desired size are formed on the medium in the liquid ejection device 1.

[0075] Here, a print data signal SI, which is a digital signal input to the discharge head 100 in response to the print data signal cSI, and a latch signal cLAT, which is a digital signal input to the discharge head 100 in response to the latch signal cLAT, are At least one of the latch signal LAT, which is a digital signal input to the ejection head 100 in response to the change signal cCH, and the change signal CH, which is a digital signal input to the ejection head 100 in response to the change signal cCH, is an example of a signal that specifies the ink ejection timing. In other words, the digital signal that is output by the head control circuit 21 and input to the diagnostic circuit 250 includes a signal that specifies the ink ejection timing and a clock signal SCK.

[0076] 3. Structure of the liquid ejection device Next, the schematic structure of the liquid ejection device 1 will be described. FIG. 8 is a diagram showing the schematic structure of the liquid ejection device 1. Here, in the following description, the head unit 20 will be described as having six ejection heads 100. In this case, the six ejection heads 100 may be referred to as ejection heads 100-1 to 100-6. In the following description, the Y direction corresponds to the transport direction in which the medium P is transported, the X direction is perpendicular to the Y direction and parallel to the horizontal plane and corresponds to the main scanning direction, and the Z direction corresponds to the vertical direction of the liquid ejection device 1 when the liquid ejection device 1 is installed. In the following description, when specifying the directions of the X direction, the Y direction, and the Z direction, the tip side of the arrow indicating the illustrated X direction may be referred to as the +X side and the starting point side as the -X side, the tip side of the arrow indicating the illustrated Y direction may be referred to as the +Y side and the starting point side as the -Y side, and the tip side of the arrow indicating the illustrated Z direction may be referred to as the +Z side and the starting point side as the -Z side. In the following description, the X direction, the Y direction, and the Z direction are assumed to be perpendicular to one another, but this is not limited to the case where the components of the liquid ejection device 1 are arranged to be perpendicular to one another.

[0077] As shown in FIG. 8, the liquid ejection device 1 includes, in addition to the control unit 10 and head unit 20 described above, a transport unit 40 that transports the medium P, and a liquid container 5 that stores ink.

[0078] As described above, the control unit 10 includes the main control circuit 11 and the power supply circuit 12, and controls the operation of the liquid ejection device 1 including the head unit 20. In addition to the main control circuit 11 and the power supply circuit 12, the control unit 10 may also include a memory circuit that stores various information about the liquid ejection device 1, an interface circuit for communicating with a host computer or the like provided outside the liquid ejection device 1, and the like.

[0079] The control unit 10 receives an image signal input from an external device such as a host computer provided outside the liquid ejection device 1, and generates a medium transport signal PT as a transport control signal for controlling the transport of the medium P based on the received image signal, and outputs the medium transport signal PT to the transport unit 40. As a result, the transport unit 40 transports the medium P along the Y direction. Such a transport unit 40 is configured to include rollers (not shown) for transporting the medium P, a motor for rotating the rollers, and the like.

[0080] The liquid container 5 stores ink to be ejected onto the medium P. Specifically, the liquid container 5 includes four containers in which ink of four colors, cyan C, magenta M, yellow Y, and black K, is stored separately. The ink stored in the liquid container 5 is supplied to the ejection head 100 of the head unit 20 via a tube (not shown) or the like. The liquid container 5 that supplies ink to the ejection head 100 is an example of a liquid storage container. The number of containers included in the liquid container 5 is not limited to four. Furthermore, the liquid container 5 may include a container in which ink of a different color is stored instead of or in addition to ink of a color other than cyan C, magenta M, yellow Y, and black K, and may also include multiple containers of any of cyan C, magenta M, yellow Y, and black K.

[0081] The head unit 20 includes ejection heads 100-1 to 100-6 arranged side by side in the X direction. Along the X-axis, ejection heads 100-1, 100-2, 100-3, 100-4, 100-5, and 100-6 are arranged in this order from the -X side to the +X side so as to be equal to or greater than the width of the medium P. The head unit 20 distributes the ink supplied from the liquid container 5 to each of the ejection heads 100-1 to 100-6, and operates based on an image information signal IP input from the control unit 10, thereby ejecting the ink supplied from the liquid container 5 from each of the ejection heads 100-1 to 100-6 to a desired position on the medium P. The number of ejection heads 100 included in the head unit 20 is not limited to six, and may be five or less, or seven or more.

[0082] As described above, in the liquid ejection device 1, the control unit 10 generates an image information signal IP based on an image signal input from a host computer or the like, and uses the generated image information signal IP to control the operation of the head unit 20 and to control the transport of the medium P in the transport unit 40. This allows the ink ejected from each of the ejection heads 100-1 to 100-6 to land at a desired position on the medium P. As a result, a desired image is formed on the medium P.

[0083] 4.Head unit structure Next, a description will be given of the structure of the head unit 20. Fig. 9 is an exploded perspective view of the head unit 20 as viewed from the -Z side. Fig. 10 is an exploded perspective view of the head unit 20 as viewed from the +Z side.

[0084] As shown in Figures 9 and 10, the head unit 20 includes an inlet flow path section G1 that introduces ink supplied from a liquid container 5 into the inside of the head unit 20, a supply flow path section G2 that supplies the introduced ink to the ejection head 100, a liquid ejection section G3 having a plurality of ejection heads 100 that eject ink, an ejection control section G4 that controls the ejection of ink from the ejection head 100, and a storage section G5 that houses the inlet flow path section G1, the supply flow path section G2, the liquid ejection section G3, and the ejection control section G4.

[0085] In the head unit 20, the introduction flow path section G1, the supply flow path section G2, the liquid discharge section G3, and the discharge control section G4 are stacked in the Z direction from the -Z side to the +Z side in the order of the discharge control section G4, the introduction flow path section G1, the supply flow path section G2, and the liquid discharge section G3. The storage section G5 is provided to store the stacked discharge control section G4, the introduction flow path section G1, the supply flow path section G2, and the liquid discharge section G3. The introduction flow path section G1, the supply flow path section G2, the liquid discharge section G3, the discharge control section G4, and the storage section G5 are fixed to each other by a fixing means such as an adhesive or a screw (not shown).

[0086] As shown in Figs. 9 and 10, the inlet flow passage section G1 has a plurality of inlets SI1 corresponding to the number of types of ink supplied to the head unit 20, and a plurality of outlets DI1 corresponding to the number of types of ink and the number of ejection heads 100 included in the head unit 20. The plurality of inlets SI1 are aligned along the -Y side of the inlet flow passage section G1 on the -Z side surface of the inlet flow passage section G1. A tube (not shown) or the like through which ink is supplied from the liquid container 5 shown in Fig. 8 is connected to each of the inlets SI1. The plurality of outlets DI1 are located on the +Z side surface of the inlet flow passage section G1. An ink flow passage is formed inside the inlet flow passage section G1, which communicates with the inlet SI1 and the outlet DI1 corresponding to the inlet SI1.

[0087] The supply flow path section G2 has a plurality of liquid supply units U2 corresponding to the number of ejection heads 100 included in the head unit 20. Also, each of the plurality of liquid supply units U2 has a plurality of inlets SI2 corresponding to the number of types of ink supplied to the head unit 20, The liquid supply unit U2 has a plurality of inlets SI2 corresponding to the number of types of ink supplied to the knit 20. The plurality of inlets SI2 are located on the -Z side of the liquid supply unit U2 and are connected to the outlets DI1 of the introduction flow path section G1. That is, the supply flow path section G2 has inlets SI2 corresponding to the outlets DI1 of the introduction flow path section G1. The outlets DI2 are located on the -Z side of the liquid supply unit U2. An ink flow path is formed inside the liquid supply unit U2, connecting the inlets SI2 to the outlets DI2 corresponding to the inlets SI2.

[0088] The liquid discharge section G3 includes discharge heads 100-1 to 100-6 and a support member 35. Each of the discharge heads 100-1 to 100-6 is located on the +Z side of the support member 35 and is fixed to the support member 35 by a fixing means such as an adhesive or a screw (not shown). A plurality of inlets SI3 are located on the -Z side of each of the discharge heads 100-1 to 100-6. The plurality of inlets SI3 of each of the discharge heads 100-1 to 100-6 pass through openings formed in the support member 35 and are exposed to the -Z side of the liquid discharge section G3. The plurality of inlets SI3 are connected to a plurality of outlets DI2 of the supply flow channel section G2. That is, the liquid discharge section G3 includes inlets SI3 corresponding to the respective outlets DI2 of the supply flow channel section G2.

[0089] Here, the flow of ink from the liquid container 5 to the multiple ejection heads 100 of the head unit 20 will be described. The ink stored in the liquid container 5 is introduced from an inlet SI1 of the inlet flow passage section G1 via a tube (not shown) or the like. The ink introduced from the inlet SI1 is distributed to the multiple ejection heads 100 by an ink flow passage (not shown) provided inside the inlet flow passage section G1, and then supplied to the liquid supply unit U2 via an outlet DI1 and an inlet SI2. The ink supplied to the liquid supply unit U2 is supplied to each of the multiple ejection heads 100 of the liquid ejection section G3 via an ink flow passage, an outlet DI2, and an inlet SI3 provided inside the liquid supply unit U2. That is, in this embodiment, the inlet flow passage section G1 and the liquid supply unit U2 function as a distribution flow passage member that distributes and supplies the ink supplied from the outlet DI1 to the head unit 20 to each of the ejection heads 100-1 to 100-6.

[0090] Here, an example of the arrangement of the ejection heads 100-1 to 100-6 in the head unit 20 will be described. FIG. 11 is a diagram of the head unit 20 as viewed from the +Z side. As shown in FIG. 11, in the head unit 20, the ejection heads 100-1 to 100-6 each have six head chips 300 arranged side by side in the X direction. Each head chip 300 has a plurality of nozzles N that ejects ink to be supplied onto the medium P. The nozzles N of each head chip 300 are arranged side by side along the row direction RD in a direction perpendicular to the Z direction and in a plane formed by the X direction and the Y direction. In the following description, the nozzles N arranged side by side along the row direction RD may be referred to as a nozzle row. Note that the number of head chips 300 of each of the ejection heads 100-1 to 100-6 is not limited to six.

[0091] Next, an example of the structure of the discharge head 100 will be described. Fig. 12 is an exploded perspective view showing a schematic configuration of the discharge head 100. As shown in Fig. 12, the discharge head 100 includes a filter section 110, a seal member 120, a wiring board 130, a holder 140, six head chips 300, and a fixed plate 150. The discharge head 100 is configured by stacking the filter section 110, the seal member 120, the wiring board 130, the holder 140, and the fixed plate 150 in this order from the -Z side to the +Z side along the Z direction, and the six head chips 300 are housed between the holder 140 and the fixed plate 150.

[0092] The filter section 110 has a generally parallelogram shape with two opposing sides extending along the X direction and two opposing sides extending along the column direction RD. The filter section 110 has four filters 113 and four inlets SI3. The four inlets SI3 are located on the -Z side of the filter section 110, and are provided corresponding to the four filters 113 located inside the filter section 110. The filters 113 collect air bubbles and foreign matter contained in the ink introduced from the inlets SI3. Ink is supplied from the liquid container 5 to the inlets SI3. The inlets SI3 are an example of a supply port.

[0093] The seal member 120 is located on the +Z side of the filter section 110, and has a generally parallelogram shape with two opposing sides extending along the X direction and two opposing sides extending along the column direction RD. At the four corners of the seal member 120, through openings 125 through which liquid flow paths 145, which will be described later, are inserted are provided. Such a seal member 120 is formed of an elastic member such as rubber.

[0094] The wiring board 130 is located on the +Z side of the seal member 120, and has a substantially parallelogram shape with two opposing sides extending along the X direction and two opposing sides extending along the column direction RD. In addition, notches 135 through which liquid flow paths 145 described later pass are formed at the four corners of the wiring board 130. In such a wiring board 130, wiring for transmitting various signals such as drive signals COMA, COMB and voltages VHV, VDD, etc. supplied to the ejection head 100 to the head chip 300 is formed, and the above-mentioned diagnostic circuit 250 is provided. That is, the wiring board 130 is located on the +Z side of the inlet SI3. In other words, the inlet SI3 is located above the wiring board 130 in the vertical direction. A specific example of the configuration of the wiring board 130 will be described later.

[0095] The holder 140 is located on the +Z side of the wiring board 130, and has a generally parallelogram shape with two opposing sides extending along the X direction and two opposing sides extending along the column direction RD. The holder 140 has holder members 141, 142, and 143. The holder members 141, 142, and 143 are layered in this order along the Z direction from the -Z side to the +Z side: the holder member 141, the holder member 142, and the holder member 143. The holder members 141 and 142, and the holder members 142 and 143 are bonded together with an adhesive or the like.

[0096] Moreover, an accommodation space having an opening (not shown) on the +Z side is formed inside holder member 143. Head chips 300 are accommodated in the accommodation space formed inside holder member 143. Here, the accommodation space formed inside holder member 143 may be a plurality of spaces capable of individually accommodating each of six head chips 300, or may be one space capable of commonly accommodating six head chips 300.

[0097] Holder 140 is also provided with slits 146 corresponding to each of six head chips 300. Flexible wiring board 346 for transmitting various signals such as drive signals COMA, COMB and voltages VHV, VDD, etc. to head chip 300 is inserted into slits 146. Six head chips 300 accommodated in an accommodation space formed inside holder member 143 are fixed to holder 140 by adhesive or the like.

[0098] Four liquid flow paths 145 are provided at the four corners of the surface on the -Z side of holder 140. Each of liquid flow paths 145 is inserted through a through opening 125 provided in seal member 120 and connected to filter section 110. As a result, ink supplied from inlet SI3 is supplied to holder 140 via liquid flow paths 145. Then, the ink supplied to holder 140 is distributed inside holder 140 corresponding to six head chips 300, and then supplied to each of the six head chips 300.

[0099] Fixed plate 150 is located on the +Z side of holder 140, and seals an accommodation space formed inside holder member 143 in which six head chips 300 are accommodated. Fixed plate 150 has a flat portion 151 and bent portions 152, 153, and 154. Flat portion 151 has a substantially parallelogram shape with two opposing sides extending along the X direction and two opposing sides extending along the row direction RD. Six openings 155 for exposing head chips 300 are formed in flat portion 151. Head chip 300 is fixed to fixed plate 150 such that two nozzle rows are exposed to flat portion 151 through openings 155.

[0100] The bent portion 152 is a member integral with the planar portion 151, connected to one side of the planar portion 151 extending along the X direction and bent toward the -Z side. The bent portion 153 is a member integral with the planar portion 151, connected to one side of the planar portion 151 extending along the column direction RD and bent toward the -Z side. The bent portion 154 is a member integral with the planar portion 151, connected to the other side of the planar portion 151 extending along the column direction RD and bent toward the -Z side.

[0101] Head chip 300 is located on the +Z side of holder 140 and on the -Z side of fixed plate 150. Head chip 300 is accommodated in an accommodating space formed by holder member 143 of holder 140 and fixed plate 150, and is fixed to holder member 143 and fixed plate 150.

[0102] Here, an example of the structure of the head chip 300 will be described. FIG. 13 is a cross-sectional view showing a schematic structure of the head chip 300. The cross-sectional view of the head chip 300 shown in FIG. 13 shows a case where the head chip 300 is cut in a direction perpendicular to the column direction RD so as to include at least one nozzle N. As shown in FIG. 13, the head chip 300 has a nozzle plate 310 provided with a plurality of nozzles N for ejecting ink, a flow path forming substrate 321 that defines a communication flow path 355, an individual flow path 353, and a reservoir R, a pressure chamber substrate 322 that defines a pressure chamber C, a protective substrate 323, a compliance portion 330, a vibration plate 340, a piezoelectric element 60, a flexible wiring substrate 346, and a case 324 that defines the reservoir R and a liquid inlet 351. Ink is supplied to the head chip 300 from a liquid outlet (not shown) provided in the holder 140 through the liquid inlet 351.

[0103] The ink supplied to the head chip 300 reaches the nozzle N via the ink flow path 350, which is configured to include the reservoir R, the individual flow path 353, the pressure chamber C, and the communication flow path 355. Then, the ink that has reached the nozzle N is ejected as the piezoelectric element 60 is driven.

[0104] Specifically, the ink flow path 350 is configured by stacking a flow path forming substrate 321, a pressure chamber substrate 322, and a case 324 along the Z direction. The ink introduced into the case 324 from the liquid inlet 351 is stored in a reservoir R. The reservoir R is a common flow path that communicates with a plurality of individual flow paths 353 corresponding to each of the plurality of nozzles N that constitute the nozzle row. The ink stored in the reservoir R is supplied to the pressure chamber C via the individual flow paths 353.

[0105] The pressure chamber C applies pressure to the ink stored therein, and ejects the ink supplied to the pressure chamber C from the nozzle N through the communication flow path 355. A vibration plate 340 is located on the -Z side of the pressure chamber C so as to seal the pressure chamber C, and a piezoelectric element 60 is located on the -Z side of the vibration plate 340. The piezoelectric element 60 is composed of a piezoelectric body and a pair of electrodes formed on both sides of the piezoelectric body. A drive signal VOUT is supplied to one of the pair of electrodes of the piezoelectric element 60 via a flexible wiring board 346, and a reference voltage signal VBS is supplied to the other of the pair of electrodes of the piezoelectric element 60 via the flexible wiring board 346. The piezoelectric body is displaced according to the potential difference generated between the pair of electrodes. That is, the piezoelectric element 60 including the piezoelectric body 0 is driven. As the piezoelectric element 60 is driven, the vibration plate 340 on which the piezoelectric element 60 is provided is deformed, and the internal pressure of the pressure chamber C changes. As a result, the ink stored in the pressure chamber C is ejected from the nozzle N through the communication flow path 355.

[0106] Further, a nozzle plate 310 and a compliance section 330 are fixed to the +Z side of the flow path forming substrate 321. The nozzle plate 310 is located on the +Z side of the communication flow path 355. The nozzle plate 310 has a plurality of nozzles N arranged in parallel along the row direction RD. That is, the nozzle plate 310 has a plurality of nozzles N that eject ink. The compliance section 330 is located on the +Z side of the reservoir R and the individual flow path 353, and includes a sealing film 331 and a support 332. The sealing film 331 is a flexible film-like member, and seals the +Z side of the reservoir R and the individual flow path 353. The outer periphery of the sealing film 331 is supported by a frame-shaped support 332. Further, the +Z side of the support 332 is fixed to the flat surface section 151 of the fixed plate 150. The compliance portion 330 configured as above protects the head chip 300, and reduces pressure fluctuations of the ink inside the reservoir R and inside the individual flow paths 253.

[0107] Here, the configuration including the piezoelectric element 60, the vibration plate 340, the nozzle N, the individual flow path 353, the pressure chamber C, and the communication flow path 355 corresponds to the above-mentioned ejection section 600. The head chip 300 including the nozzle plate 310 is an example of an ejection module.

[0108] Returning to FIG. 12, the ejection head 100 distributes ink supplied from the liquid container 5 to a plurality of nozzles N, and ejects ink from the nozzles N by driving the piezoelectric elements 60 based on a drive signal VOUT and a reference voltage signal VBS supplied via a flexible wiring board 346. Here, the drive signal selection circuit 200 that outputs the drive signal VOUT may be provided on the wiring board 130, or may be provided on the flexible wiring boards 346 corresponding to each of the head chips 300. In the following description, a semiconductor device including the drive signal selection circuit 200 is mounted by COF (Chip On Film) on the flexible wiring boards 346 corresponding to each of the head chips 300. This allows the wiring board 130 to be miniaturized, and therefore the ejection head 100 to be miniaturized.

[0109] Returning to FIGS. 9 and 10, the discharge control section G4 is located on the −Z side of the introduction channel section G1, and includes a wiring board 410 and a wiring board 420.

[0110] The wiring substrate 410 includes a surface 411 and a surface 412 located opposite the surface 411. The wiring substrate 410 is disposed such that the surface 412 faces the inlet flow path section G1, the supply flow path section G2, and the liquid ejection section G3, and the surface 411 faces the opposite side to the inlet flow path section G1, the supply flow path section G2, and the liquid ejection section G3.

[0111] A drive signal output circuit 50 that outputs drive signals COMA and COMB is provided on a surface 411 of the wiring board 410. A connection portion 413 is provided on a surface 412 of the wiring board 410. The connection portion 413 electrically connects the wiring board 410 and the wiring board 420, and propagates the drive signals COMA and COMB generated by the drive signal output circuit 50, and also propagates a plurality of signals including base drive signals dA and dB that are the basis of the drive signals COMA and COMB output by the drive signal output circuit 50.

[0112] The wiring substrate 420 includes a surface 421 and a surface 422 located on the opposite side of the surface 421. The wiring substrate 420 is disposed such that the surface 422 faces the inlet flow path section G1, the supply flow path section G2, and the liquid discharge section G3, and the surface 421 faces the opposite side of the inlet flow path section G1, the supply flow path section G2, and the liquid discharge section G3. Also, on the -Y side of the wiring substrate 420, A notch 427 is formed so that the inlet SI1 passes through.

[0113] A semiconductor device 423 and connection parts 424, 425, and 426 are provided on a surface 421 of the wiring board 420. The connection part 424 is connected to a connection part 413 provided on the wiring board 410. This electrically connects the wiring board 420 to the wiring board 410. As such a connection part 424, a BtoB (Board To Board) connector that electrically connects the wiring board 410 and the wiring board 420 without using a cable is used. The semiconductor device 423 is a circuit component that constitutes at least a part of the head control circuit 21 described above, and is composed of, for example, an SoC or the like. The semiconductor device 423 is provided in an area on the -X side of the wiring board 420 from the connection part 424. Voltages VHV and VDD that function as power supply voltages for the head unit 20 are input to the connection part 426. This connection part 426 is located on the -Y side of the semiconductor device 423 and on the -X side of the notch part 427. An image information signal IP output by the control unit 10 is input to the connection part 425. That is, the connection portion 425 has a plurality of terminals through which the input image information signal IP propagates. Such connection portion 425 is disposed on the -Y side of the semiconductor device 423 and on the -X side of the connection portion 426 such that the plurality of terminals through which the image information signal IP is input are aligned along the X direction.

[0114] Here, as described above, the image information signal IP input to the connection unit 425 is a signal that complies with a high-speed communication standard such as PCIe. Therefore, it is preferable that the connection unit 425 and the cable connected to the connection unit 425 are configured to be capable of stably transmitting signals of several Gbps, and it is preferable that the connection unit 425 uses a high-speed transmission connector such as an HDMI (registered trademark) (High-Definition Multimedia Interface) connector that complies with the HDMI communication standard or a USB connector that complies with the USB (Universal Serial Bus) communication standard.

[0115] On the other hand, since the connection portion 426 transmits the voltages VHV and VDD, it is preferable that a cable capable of stably transmitting a high-voltage signal can be connected, and for example, an FFC connector capable of connecting a flexible cable is used.

[0116] The storage section G5 includes a housing 450 in which openings 451, 452, and 453 are formed. When viewed along the Z direction, the housing 450 has a substantially rectangular shape including a pair of long sides extending along the X direction and a pair of short sides extending along the Y direction, and is formed of, for example, a metal such as aluminum, a resin, or the like.

[0117] An opening 454 is formed on the +Z side of the housing 450. The introduction flow path section G1, the supply flow path section G2, the liquid discharge section G3, and the discharge control section G4 are accommodated in the opening 454. That is, the opening 454 constitutes an accommodation space that accommodates the introduction flow path section G1, the supply flow path section G2, the liquid discharge section G3, and the discharge control section G4. The introduction flow path section G1, the supply flow path section G2, the liquid discharge section G3, and the discharge control section G4 accommodated in the opening 454 are fixed to the housing 450 by a fixing means such as an adhesive or a screw (not shown). Here, the opening 454 may be configured to be sealed by the support member 35 of the liquid discharge section G3 in a state in which the introduction flow path section G1, the supply flow path section G2, and the liquid discharge section G3 are accommodated.

[0118] The openings 451, 452, and 453 of the housing 450 are arranged in the order of opening 451, opening 452, and opening 453 on the -Y side of the housing 450 along the X direction from the -X side to the +X side. A connection portion 425 of the discharge control unit G4 accommodated in the accommodation space is inserted into the opening 451. A connection portion 426 of the discharge control unit G4 accommodated in the accommodation space is inserted into the opening 452. An inlet SI1 of the introduction flow path portion G1 is inserted into the opening 453 after passing through a notch portion 427 of the wiring board 420. That is, the openings 451, 452, and 453 are arranged to connect the introduction flow path portion G1, the supply flow path portion G2, and The inlet SI1 that supplies ink to the liquid ejection unit G3, and the connection units 425, 426 for transmitting various signals to the liquid ejection unit G3 and the ejection control unit G4 are exposed to the outside of the head unit 20. As a result, the storage unit G5 protects the inlet flow path unit G1, the supply flow path unit G2, the liquid ejection unit G3, and the ejection control unit G4 with the housing 450, and since the inlet SI1 that supplies ink, and the connection units 425, 426 for transmitting various signals to the liquid ejection unit G3 and the ejection control unit G4 are exposed to the outside of the head unit 20, the replacement work of the head unit 20 becomes easier, and the maintainability of the liquid ejection device 1 can be improved.

[0119] 5. Wiring Board Configuration and Ink Adhesion Detection Using Integrated Circuits As described above, the ejection head 100 in this embodiment generates the drive signal VOUT by selecting trapezoidal waveforms Adp1, Adp2, Bdp1, and Bdp2 included in the drive signals COMA and COMB at a timing defined by the print data signal cSI corresponding to the print data signal SI, the clock signal cSCK corresponding to the clock signal SCK, the latch signal cLAT corresponding to the latch signal LAT, and the change signal cCH corresponding to the change signal CH. Then, the ejection head 100 supplies the generated drive signal VOUT to the piezoelectric element 60 included in the ejection section 600. As a result, the piezoelectric element 60 is driven according to the potential of the drive signal VOUT, and an amount of ink according to the drive amount of the piezoelectric element 60 is ejected onto the medium P. As a result, an image is formed on the medium P.

[0120] If an abnormality were to occur in such a discharge head 100, the discharge accuracy of the ink discharged by the discharge head 100 would decrease, and the quality of the image formed on the medium P would decrease. In order to reduce the risk of such a decrease in image quality, the liquid discharge device 1 in this embodiment has a diagnostic circuit 250 that diagnoses whether or not the discharge head 100 has an abnormality.

[0121] As described above, the diagnostic circuit 250 diagnoses whether or not an abnormality has occurred in the ejection head 100 by diagnosing whether or not there is an operational abnormality in the ejection head 100 and whether or not there is an abnormality in the temperature of the ejection head 100. Furthermore, the diagnostic circuit 250 in this embodiment also detects whether or not the ink mist that has entered the inside of the ejection head 100 is adhering to the inside of the ejection head 100.

[0122] Here, the ink mist that invades the inside of the ejection head 100 includes ink mist that floats inside the liquid ejection device 1 when ink ejected from the nozzle N turns into mist before landing on the medium P, and ink mist that floats inside the liquid ejection device 1 when ink ejected from the nozzle N lands on the medium P and is resuspended and turned into mist by air currents generated by the transport of the medium P. Such ink mist floating inside the liquid ejection device 1 is charged by the Lenard effect because it is very fine. Therefore, the ink mist is attracted to conductive parts such as wiring patterns and terminals that transmit various signals to the ejection head 100, and invades the inside of the ejection head 100.

[0123] If ink mist enters the interior of the ejection head 100 and adheres to wiring, terminals, electronic components, and the like provided inside the ejection head 100, various abnormalities such as a short circuit may occur in the ejection head 100. In the liquid ejection device 1 of this embodiment, the diagnostic circuit 250 detects the presence or absence of an operational abnormality or temperature abnormality occurring in the ejection head 100, and detects whether ink is adhered to the interior of the ejection head 100, thereby reducing the risk of abnormalities occurring due to ink adhering to the interior of the ejection head 100.

[0124] Here, a specific configuration for the diagnostic circuit 250 to detect whether or not ink is attached to the inside of the ejection head 100 will be described.

[0125] FIG. 14 shows a wiring board 130 having an integrated circuit 550 including a diagnostic circuit 250, viewed from the -Z side. 14 is a diagram showing an example of the configuration of wiring board 130 when viewed from the +Z side. Also, Fig. 15 is a diagram showing an example of the configuration of wiring board 130 when viewed from the +Z side. Note that Fig. 14 illustrates, by dashed lines, a part of the configuration that cannot be seen when wiring board 130 is viewed from the -Z side, and similarly, Fig. 15 illustrates, by dashed lines, a part of the configuration that cannot be seen when wiring board 130 is viewed from the +Z side.

[0126] In explaining the configuration of the diagnostic circuit 250 for detecting whether or not ink mist is attached inside the ejection head 100, first, the configuration of the wiring board 130 on which the integrated circuit 550 including the diagnostic circuit 250 is provided will be explained.

[0127] 14 and 15, wiring board 130 has substrate 500, connecting portions 520 and 530, and integrated circuit 550. Note that wiring board 130 may have various electronic components such as resistive elements, capacitive elements, inductive elements, and semiconductor elements in addition to substrate 500, connecting portions 520 and 530, and integrated circuit 550. Furthermore, although not shown, wiring board 130 may include temperature detection circuit 260 described above.

[0128] The substrate 500 has a generally parallelogram shape having sides 511 and 512 facing each other, and sides 513 and 514 facing each other, and has a surface 501 and a surface 502 different from the surface 501 and facing the surface 501. Here, the surface 501 is an example of a first surface, and the surface 502 is an example of a second surface. The substrate 500 is provided such that the side 511 extends along the X direction, the side 512 is located on the -Y side of the side 511 and extends along the X direction, the side 513 extends along the column direction RD, and the side 514 is located on the -X side of the side 513 and extends along the column direction RD, with the surface 501 on the -Z side and the surface 502 on the +Z side. That is, in substrate 500, sides 511 and 512 are positioned opposite each other in the Y direction, sides 513 and 514 are positioned opposite each other in the X direction, and surface 501 faces upward and surface 502 faces downward in the vertical direction. In this case, substrate 500 is preferably positioned such that surface 501 is perpendicular to the vertical direction.

[0129] Further, notches 135 are formed at the four corners of the substrate 500. A liquid flow path 145 provided in the holder 140 passes through the notches 135. In other words, the ejection head 100 has a liquid flow path 145 that communicates with the inlet SI3, and at least a part of the liquid flow path 145 passes through the notches 135 that penetrate the surfaces 501 and 502 of the substrate 500. Here, the notches 135 are not limited to notches as long as they are configured to be able to connect the liquid flow path 145 provided in the holder 140 located on the +Z side of the substrate 500 to the inlet SI3 of the filter part 110 located on the -Z side of the substrate 500 so that they can communicate with each other. That is, the substrate 500 may have a hole that penetrates the surfaces 501 and 502 to insert the liquid flow path 145. Here, the notches 135 through which the liquid flow path 145 passes is an example of a through part.

[0130] Further, in the substrate 500, four FPC insertion holes 136 penetrating the surface 501 and the surface 502 of the substrate 500, and two FPC cutout portions 137 formed by cutting out a part of each of the sides 513 and 514 of the substrate 500 are formed. A flexible wiring board 346 of each of the six head chips 300 accommodated inside the holder 140 passes through each of the four FPC insertion holes 136 and the FPC cutout portion 137. The flexible wiring board 346 that passes through each of the four FPC insertion holes 136 and the FPC cutout portion 137 is electrically connected to a connection terminal 138 formed on the surface 501 of the substrate 500. This electrically connects the wiring board 130 and the head chip 300.

[0131] In the following description, the substrate 500 has a surface 501 and a surface 502 facing each other. The configuration with respect to surface 502 will be described, but substrate 500 may be a so-called multi-layer substrate including a plurality of wiring layers between surfaces 501 and 502.

[0132] The connection portion 520 has a plurality of terminals 521. The connection portion 520 is provided on the surface 501 of the substrate 500 such that the plurality of terminals 521 are aligned along the side 511. A flexible cable (not shown) or the like is attached to the connection portion 520 configured in this manner for electrically connecting the wiring substrate 420 and the wiring substrate 130. The connection portion 530 has a plurality of terminals 531. The connection portion 530 is provided on the surface 501 of the substrate 500 such that the plurality of terminals 531 are aligned along the side 512. A flexible cable (not shown) or the like is attached to the connection portion 530 configured in this manner for electrically connecting the wiring substrate 420 and the wiring substrate 130.

[0133] That is, the connection parts 520 and 530 electrically connect the wiring board 420 and the wiring board 130 via a flexible cable (not shown). As a result, six print data signals SI, a clock signal SCK, a latch signal LAT, and a change signal CH corresponding to the head chips 300-1 to 300-6 output from the wiring board 420, and drive signals COMA and COMB are input. At least one of the connection parts 520 and 530 is an example of a connector. Various signals are input from the wiring board 420 to the wiring board 130 via the connection parts 520 and 530, and various signals output from the ejection head 100 including the wiring board 130 are output to the wiring board 420.

[0134] The integrated circuit 550 is a substantially rectangular semiconductor device having sides 551 and 552 facing each other and sides 553 and 554 facing each other, and includes the diagnostic circuit 250. The integrated circuit 550 is provided on the surface 502 of the substrate 500 such that the side 551 extends in the X direction along the side 511, the side 552 extends in the X direction on the -Y side of the side 551, the side 553 extends in the Y direction, and the side 554 extends in the Y direction on the -X side of the side 553. Such an integrated circuit 550 is a surface-mounted component, and is preferably electrically connected to the substrate 500 via bump electrodes.

[0135] The integrated circuit 550 is a surface-mount component and may be, for example, a QFN (Quad Flat No leaded package) electrically connected to the substrate 500 via a plurality of electrodes formed along sides 551, 552, 553, and 554, or a QFP (Quad Flat Package) electrically connected to the substrate 500 via a plurality of terminals instead of the plurality of electrodes of the QFN. However, as described above, by electrically connecting the integrated circuit 550 and the substrate 500 via bump electrodes, it becomes possible to provide bump electrodes electrically connected to the substrate 500 in the integrated circuit 550 at a high density, and the integrated circuit 550 can be made smaller.

[0136] 14 and 15, the integrated circuit 550 is located near the connection section 520 extending along the side 511. For this reason, the six print data signals SI, the latch signal LAT, the change signal CH, and the clock signal SCK input to the integrated circuit 550 are preferably input from the connection section 520, and more preferably from the terminal 521 on the -X side arranged near the integrated circuit 550 among the multiple terminals 521 arranged side by side along the side 511 in the connection section 520. This makes it possible to shorten the length of the wiring along which the six print data signals SI, the latch signal LAT, the change signal CH, and the clock signal SCK propagate, reducing the risk of noise and the like being superimposed on the six print data signals SI, the latch signal LAT, the change signal CH, and the clock signal SCK.

[0137] As described above, the wiring board 130 is provided with six print data signals SI corresponding to the six head chips 300 via the connection parts 520 and 530, a latch signal LAT, and a change signal CH. A plurality of signals including a clock signal SCK, drive signals COMA and COMB, a reference voltage signal VBS, and voltages VHV and VDD are input to the wiring board 130. Among the plurality of signals input to the wiring board 130, six print data signals SI, a latch signal LAT, a change signal CH, and a clock signal SCK are input to the integrated circuit 550. A diagnostic circuit 250 included in the integrated circuit 550 diagnoses whether or not there is an operational abnormality in the ejection head 100 based on the logic levels of the six input print data signals SI, the latch signal LAT, the change signal CH, and the clock signal SCK.

[0138] That is, the integrated circuit 550 includes a diagnostic circuit 250, and six print data signals SI, a latch signal LAT, a change signal CH, and a clock signal SCK are input to the diagnostic circuit 250 included in the integrated circuit 550 via connections 520, 530. The diagnostic circuit 250 included in the integrated circuit 550 diagnoses whether or not there is an abnormality in the ejection head 100, and outputs an abnormality detection signal AD.

[0139] If the diagnostic circuit 250 diagnoses that no operational abnormality is occurring in the ejection head 100, the integrated circuit 550 generates six print data signals cSI corresponding to the six print data signals SI, a latch signal cLAT corresponding to the latch signal LAT, a change signal cCH corresponding to the change signal CH, and a clock signal cSCK corresponding to the clock signal SCK, and supplies them to the corresponding connection terminals 138.

[0140] In addition, among the multiple signals input to the wiring board 130, the drive signals COMA, COMB, the reference voltage signal VBS, and the voltages VHV, VDD are propagated through a wiring pattern (not shown) provided on the substrate 500 and supplied to the corresponding connection terminals 138.

[0141] The print data signal cSI, latch signal cLAT, change signal cCH, clock signal cSCK, drive signals COMA and COMB, reference voltage signal VBS, and voltages VHV and VDD supplied to the connection terminal 138 are propagated through a flexible wiring board 346 electrically connected to the connection terminal 138, and input to a drive signal selection circuit 200 mounted on the flexible wiring board 346 by COF. Then, the drive signal selection circuit 200 generates a drive signal VOUT based on the input print data signal cSI, latch signal cLAT, change signal cCH, clock signal cSCK, drive signals COMA and COMB, reference voltage signal VBS, and voltages VHV and VDD, and outputs the drive signal VOUT to the head chip 300. This causes a predetermined amount of ink to be ejected from the nozzles N of the head chip 300 at a predetermined timing.

[0142] 14 and 15, an integrated circuit 550 including a diagnostic circuit 250 is provided on a surface 502 of a substrate 500, and connecting portions 520 and 530 are provided on a surface 501 of the substrate 500. That is, in the wiring substrate 130, the connecting portions 520 and 530 and the integrated circuit 550 are provided on different mounting surfaces of the substrate 500. The substrate 500 is provided on the ejection head 100 such that the integrated circuit 550 faces the head chip 300. That is, the integrated circuit 550 is located between the substrate 500 and the head chip 300.

[0143] As described above, a flexible cable (not shown) for electrically connecting the wiring board 420 and the wiring board 130 is inserted into the connection parts 520, 530 of the wiring board 130. Therefore, a gap is formed in the vicinity of the connection parts 520, 530 in the ejection head 100, passing between the inside and outside of the ejection head 100, through which the flexible cable can pass. Since a gap is formed in the vicinity of the connection parts 520, 530, passing between the inside and outside of the ejection head 100, it is considered that most of the ink mist enters the inside of the ejection head 100 from the vicinity of the connection parts 520, 530.

[0144] As shown in FIG. 14 and FIG. 15, an integrated circuit 550 including a diagnostic circuit 250 is printed on six printed discs. When the integrated circuit 550 is disposed near the connection section 520 or the connection section 530 to which the six print data signals SI, the latch signal LAT, the change signal CH, and the clock signal SCK are input, the wiring length through which each of the six print data signals SI, the latch signal LAT, the change signal CH, and the clock signal SCK propagates can be shortened. This reduces the risk of noise being superimposed on the six print data signals SI, the latch signal LAT, the change signal CH, and the clock signal SCK. In other words, by disposing the integrated circuit 550 near the connection section 520 or the connection section 530, the accuracy of detection of the presence or absence of an operational abnormality in the ejection head 100 by the diagnostic circuit 250 of the integrated circuit 550 can be improved.

[0145] On the other hand, when the integrated circuit 550 is disposed near the connection portion 520 or the connection portion 530, a large amount of ink mist enters from the vicinity of the connection portions 520, 530, and the ink mist unintentionally adheres to the integrated circuit 550, which increases the possibility of malfunction of the integrated circuit 550. In other words, when the integrated circuit 550 is disposed near the connection portion 520 or the connection portion 530, there is a risk that the accuracy of detection of the presence or absence of an operational abnormality of the ejection head 100 by the diagnostic circuit 250 of the integrated circuit 550 will decrease.

[0146] To address this problem, in the wiring board 130, the connection parts 520, 530 and the integrated circuit 550 are provided on different mounting surfaces of the board 500, so that the board 500 functions as a shielding wall that reduces the risk of ink mist adhering to the integrated circuit 550, and as a result, even if the integrated circuit 550 is disposed near the connection part 520 or the connection part 530, it is possible to reduce the risk of ink mist adhering unintentionally to the integrated circuit 550. Therefore, it is possible to improve the accuracy with which the diagnostic circuit 250 detects whether or not there is an operational abnormality in the ejection head 100, and to reduce the risk of the integrated circuit 550 malfunctioning due to the influence of ink mist.

[0147] Furthermore, in the liquid ejection device 1 of this embodiment, as described above, the inlet SI3 that supplies ink to the ejection head 100 is located on the -Z side of the wiring substrate 130. That is, the inlet SI3 is located above the substrate 500 in the vertical direction. Therefore, the substrate 500 is located between the inlet SI3 that supplies ink to the ejection head 100 and the integrated circuit 550. As a result, even if ink leaks from the inlet SI3 that introduces ink into the ejection head 100 when removing the ejection head 100 for maintenance of the head unit 20 or the ejection head 100, the risk of the leaked ink unintentionally adhering to the integrated circuit 550 is reduced. That is, even if ink leaks from the inlet SI3, the risk of the integrated circuit 550 malfunctioning due to the influence of the leaked ink is also reduced.

[0148] As described above, by providing the integrated circuit 550 including the diagnostic circuit 250 on the surface 502 of the substrate 500 and providing the connection parts 520, 530 on the surface 501 of the substrate 500, the accuracy with which the diagnostic circuit 250 can detect whether or not there is an operational abnormality in the ejection head 100 can be improved, and the risk of malfunction of the integrated circuit 550 due to the influence of ink mist, etc. can be reduced.

[0149] However, the diagnostic circuit 250 shown in this embodiment also detects whether or not ink mist is attached inside the ejection head 100. If an integrated circuit 550 having such a diagnostic circuit 250 is provided on a surface 502 different from the surface 501 on which the connection parts 520 and 530 are provided, it is difficult for the diagnostic circuit 250 to detect the state of ink attachment on the surface 501 side of the substrate 500 where a large amount of ink mist may float, and as a result, the accuracy of detection by the diagnostic circuit 250 as to whether or not ink mist is attached to the wiring substrate 130 decreases. To address this problem, in the ejection head 100 of this embodiment, even if the integrated circuit 550 having the diagnostic circuit 250 is provided on a surface 502 different from the surface 501 on which the connection parts 520 and 530 are provided, the accuracy of detection as to whether or not ink is attached to the wiring substrate 130 decreases. It has a detection means that can reduce this risk.

[0150] Specifically, as shown in Figures 14 and 15, the ejection head 100 has through holes 541, 542, 543, 544, and 545 that penetrate between the surface 501 and the surface 502 in the mounting area of ​​the substrate 500 where the integrated circuit 550 is provided, as a detection means for detecting whether or not ink has adhered to the wiring substrate 130, the integrated circuit 550 including the diagnostic circuit 250.

[0151] As a result, even when the integrated circuit 550 including the diagnostic circuit 250 is provided on the surface 502 of the substrate 500, the ink adhering to the surface 501 on which the connecting parts 520 and 530 are provided is captured in the through holes 541, 542, 543, 544, and 545. Then, the ink captured in the through holes 541, 542, 543, 544, and 545 is guided to a desired detection terminal of the integrated circuit 550 via the through holes 541, 542, 543, 544, and 545. That is, the ink adhering to the surface 501 on which the connecting parts 520 and 530 are provided can be guided to a detection terminal where the integrated circuit 550 detects the presence or absence of ink adhering via the through holes 541, 542, 543, 544, and 545. As a result, even when the integrated circuit 550 is provided on the surface 502 of the substrate 500, the diagnostic circuit 250 can detect the presence or absence of ink adhering to the surface 501 side.

[0152] Furthermore, by forming the through holes 541, 542, 543, 544, and 545 in the mounting region where the integrated circuit 550 is provided, it is possible to reduce the risk that the ink that has entered the surface 502 side through the through holes 541, 542, 543, 544, and 545 will resuspend in the surface 502 side region of the substrate 500. In other words, it is also possible to reduce the risk that the integrated circuit 550 will malfunction due to the ink mist that has resuspended in the surface 502 side region of the substrate 500 unintentionally adhering to the integrated circuit 550.

[0153] As described above, in the ejection head 100 of this embodiment, the substrate 500 has through holes 541, 542, 543, 544, and 545 that penetrate between the surfaces 501 and 502 in the mounting area where the integrated circuit 550 is provided. This makes it possible to detect whether or not ink has adhered to the surface 501, even when the integrated circuit 550 is provided on the surface 502, and also reduces the risk of the integrated circuit 550 malfunctioning due to the adhesion of ink mist.

[0154] Here, at least one of the through holes 541, 542, 543, 544, and 545 formed in the mounting area where the integrated circuit 550 is mounted may be provided, but as shown in Figures 14 and 15, it is preferable that the mounting area where the integrated circuit 550 is mounted be provided with a plurality of through holes including the through holes 541, 542, 543, 544, and 545. This makes it possible to efficiently capture ink adhering to the surface 501 and efficiently guide it to the integrated circuit 550, thereby further improving the accuracy of detection of the presence or absence of ink adhering to the substrate 500 by the diagnostic circuit 250 of the integrated circuit 550.

[0155] Furthermore, in the mounting area in which the integrated circuit 550 is mounted, at least some of the through holes 541, 542, 543, 544, and 545 are preferably arranged in the square corners of the mounting area. Specifically, as shown in FIGS. 14 and 15 , among through holes 541, 542, 543, 544, and 545, the through hole 541 is located closer to the side 551 of the integrated circuit 550 than the side 552 and closer to the side 553 of the integrated circuit 550 than the side 554 in the mounting region in which the integrated circuit 550 is mounted on the substrate 500; the through hole 542 is located closer to the side 551 of the integrated circuit 550 than the side 552 and closer to the side 554 of the integrated circuit 550 than the side 553 of the integrated circuit 550; the through hole 543 is located closer to the side 552 of the integrated circuit 550 than the side 551 and closer to the side 553 of the integrated circuit 550 than the side 554 of the integrated circuit 550; and the through hole 544 is located closer to the side 552 of the integrated circuit 550 than the side 551 and closer to the side 553 of the integrated circuit 550 than the side 553 of the integrated circuit 550. It is also preferable that the second electrode 552 is located near side 554.

[0156] This allows the through holes 541-544 to be arranged discretely in the mounting area where the integrated circuit 550 is mounted on the substrate 500, and the ink adhering to the surface 501 can be captured more efficiently in the through holes 541, 542, 543, 544, and 545. As a result, the accuracy with which the diagnostic circuit 250 of the integrated circuit 550 can detect whether or not ink is adhering to the substrate 500 can be further improved.

[0157] Here, the through holes 541, 542, 543, 544, and 545 each capture ink adhering to the surface 501 of the ejection head 100 and introduce it to the integrated circuit 550 provided on the surface 502 side. Therefore, the hole diameter of each of the through holes 541, 542, 543, 544, and 545 formed in the substrate 500 is large enough to capture the ink adhering to the surface 501 and introduce it to the surface 502 side, and specifically, it is preferable that the major axis is 0.5 mm or more. This makes it possible to more efficiently capture the ink adhering to the surface 501, and furthermore, to efficiently introduce the captured ink to the surface 502. As a result, it is possible to further improve the accuracy of detection of the presence or absence of ink adhesion by the diagnostic circuit 250 included in the integrated circuit 550.

[0158] It is sufficient that the through holes 541, 542, 543, 544, and 545 have an opening that allows ink to be introduced from the surface 501 to the surface 502. For example, the inner periphery of the through holes 541, 542, 543, 544, and 545 may be plated with copper foil or the like.

[0159] Here, through hole 541 is an example of a first through hole, through hole 542 is an example of a second through hole, through hole 543 is an example of a third through hole, and through hole 544 is an example of a fourth through hole. Furthermore, side 551 of integrated circuit 550 is an example of a first side, side 552 is an example of a second side, side 553 is an example of a third side, and side 554 is an example of a fourth side.

[0160] 6. Effects As described above, in the liquid ejection device 1 of this embodiment, the integrated circuit 550 including the diagnostic circuit 250 is provided on the surface 502 of the substrate 500, and the connection parts 520, 530 are provided on the surface 501 of the substrate 500. As a result, even if a large amount of ink mist enters the inside of the ejection head 100 from gaps generated in the connection parts 520, 530, the ink mist is blocked by the substrate 500, reducing the risk of the ink mist adhering to the integrated circuit 550. As a result, the risk of the integrated circuit 550 malfunctioning due to the ink mist adhering to the integrated circuit 550 is reduced.

[0161] Furthermore, in the liquid ejection device 1 of the present embodiment, even if the integrated circuit 550 is provided on a surface 502 different from the surface 501 on which the connection parts 520 and 530 are provided, in order to reduce the risk of malfunction of the integrated circuit 550, the ink adhering to the surface 501 can be captured via the through holes 541, 542, 543, 544, and 545, and the captured ink can be guided to a desired terminal of the integrated circuit 550. This makes it possible to detect whether or not ink mist is adhering even in an area on the surface 501 side of the substrate 500 on which the integrated circuit 550 is not provided. In other words, it is possible to improve the detection accuracy of ink that has entered the inside of the ejection head 100.

[0162] Furthermore, in the liquid ejection device 1 of this embodiment, the through holes 541, 542, 543, 544, and 545 are provided in the mounting area where the integrated circuit 550 is mounted on the substrate 500, so that the ink captured via the through holes 541, 542, 543, 544, and 545 is less likely to float and diffuse again in the area on the surface 501 side of the substrate 500 where the integrated circuit 550 is provided. This reduces the risk of malfunction in the circuit 550.

[0163] Furthermore, in the liquid ejection device 1 of this embodiment, the substrate 500 is provided with a plurality of through holes 541, 542, 543, 544, and 545, so that ink adhering to the surface 501 can be efficiently captured. This makes it possible to efficiently detect whether or not ink mist is adhering even in an area on the surface 501 side of the substrate 500 where the integrated circuit 550 is not provided. In other words, the detection accuracy of ink that has entered the inside of the ejection head 100 can be further improved.

[0164] Furthermore, in the liquid ejection device 1 of the present embodiment, among the multiple through holes 541, 542, 543, 544, and 545 provided in the substrate 500, the through holes 541, 542, 543, and 544 are arranged in the vicinity of the four corners of the mounting area in which the integrated circuit 550 is mounted on the substrate 500, so that the through holes 541, 542, 543, and 544 are arranged discretely. This makes it possible to more efficiently capture the ink adhering to the surface 501, and to more efficiently detect whether or not ink mist is adhering even in an area on the surface 501 side of the substrate 500 where the integrated circuit 550 is not provided. In other words, the detection accuracy of the ink that has entered the inside of the ejection head 100 can be further improved.

[0165] Although the embodiments and modifications have been described above, the present invention is not limited to these embodiments, and can be embodied in various forms without departing from the spirit of the present invention. For example, the above embodiments can be appropriately combined.

[0166] The present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations with the same functions, methods, and results, or configurations with the same purpose and effect). The present invention also includes configurations in which non-essential parts of the configurations described in the embodiments are replaced. The present invention also includes configurations that achieve the same effects as the configurations described in the embodiments, or configurations that can achieve the same purpose. The present invention also includes configurations in which publicly known technology is added to the configurations described in the embodiments.

[0167] The following can be derived from the above-described embodiment.

[0168] One aspect of the liquid ejection device is A print head that ejects liquid; a digital signal output circuit for outputting a digital signal to the print head; a liquid container for supplying liquid to the print head; Equipped with The print head includes: a supply port through which liquid is supplied from the liquid storage container; a nozzle plate having a plurality of nozzles for ejecting liquid; A substrate having a first surface and a second surface different from the first surface; a connector to which the digital signal is input; an integrated circuit that receives the digital signal via the connector and outputs an abnormality detection signal that indicates whether or not the print head is abnormal; having The connector is provided on the first surface, the integrated circuit is disposed on the second surface; A through hole penetrating the first surface and the second surface is provided in a mounting region of the substrate in which the integrated circuit is provided.

[0169] According to this liquid ejection device, the integrated circuit and the connector are provided on different surfaces of the substrate. As a result, even if ink mist enters the inside of the print head through a gap that occurs near the connector, the ink mist is blocked by the substrate located between the connector and the integrated circuit, reducing the risk of the ink mist adhering to the integrated circuit that outputs an abnormality detection signal that indicates the presence or absence of an abnormality in the print head, thereby reducing the risk of abnormalities occurring in the operation of the integrated circuit.

[0170] Furthermore, by providing a through hole penetrating the first and second surfaces in the mounting area of ​​the substrate where the integrated circuit is mounted, ink adhering to the first surface can be captured via the through hole and the captured ink can be guided to the integrated circuit. This allows the integrated circuit provided on the second surface, which is different from the first surface of the substrate, to detect whether ink has adhered to the first surface of the substrate, improving the accuracy of ink mist detection by the integrated circuit.

[0171] In one aspect of the liquid ejection device, The supply port may be located vertically above the substrate.

[0172] In one aspect of the liquid ejection device, The substrate may be positioned such that the first surface faces upward and the second surface faces downward along a vertical direction.

[0173] In one aspect of the liquid ejection device, The substrate may be positioned so that the first surface is perpendicular to the vertical direction.

[0174] According to this liquid ejection device, even if ink leaks from the ink supply port, the risk of the leaked ink unintentionally adhering to the integrated circuit is reduced, thereby reducing the risk of the integrated circuit malfunctioning.

[0175] In one aspect of the liquid ejection device, the printhead has an ejection module including the nozzle plate; The integrated circuit may be located between the substrate and the dispensing module.

[0176] In one aspect of the liquid ejection device, the print head has a liquid flow path in communication with the supply port; At least a portion of the liquid flow path may pass through a through-portion that penetrates the first surface and the second surface of the substrate.

[0177] In one aspect of the liquid ejection device, The integrated circuit may be a surface mount component.

[0178] In one aspect of the liquid ejection device, The integrated circuit and the substrate may be electrically connected via bump electrodes.

[0179] According to this liquid ejection device, it is possible to increase the density of the electrodes that electrically connect the integrated circuit and the substrate, and it is possible to reduce the size of the integrated circuit and the substrate on which the integrated circuit is provided.

[0180] In one aspect of the liquid ejection device, The integrated circuit may output the abnormality detection signal at a low level when an abnormality occurs in the print head.

[0181] According to this liquid ejection device, it is possible to quickly transmit, with a simple signal, whether or not an abnormality has occurred in the print head, and as a result, appropriate measures can be taken to address the abnormality occurring in the print head. Appropriate measures can be taken early.

[0182] In one aspect of the liquid ejection device, The integrated circuit may output the abnormality detection signal at a high level when an abnormality occurs in the print head.

[0183] In one aspect of the liquid ejection device, The digital signal may include a signal that defines the timing of ejection of liquid.

[0184] In one aspect of the liquid ejection device, The digital signal may include a clock signal.

[0185] In one aspect of the liquid ejection device, a trapezoidal waveform signal output circuit that outputs a trapezoidal waveform signal including a trapezoidal waveform having a voltage value larger than that of the digital signal; The trapezoidal waveform signal may be input to the connector.

[0186] In one aspect of the liquid ejection device, A plurality of the through holes may be provided in the mounting region.

[0187] According to this liquid ejection device, the substrate is provided with a plurality of through holes, which can efficiently capture ink adhering to the first surface of the substrate. Therefore, the integrated circuit that detects whether ink is adhering to the first surface based on the ink captured by the through holes can efficiently detect ink mist, and the integrated circuit improves the accuracy of ink mist detection.

[0188] In one aspect of the liquid ejection device, the integrated circuit has first and second sides positioned opposite each other, and third and fourth sides positioned opposite each other; a first through hole of the plurality of through holes is located closer to the first side than to the second side and closer to the third side than to the fourth side; a second through hole of the plurality of through holes is located closer to the first side than to the second side and closer to the fourth side than to the third side; a third through hole of the plurality of through holes is located closer to the second side than to the first side and closer to the third side than to the fourth side; a fourth through hole of the plurality of through holes is located closer to the second side than to the first side and closer to the fourth side than to the third side; According to this liquid ejection device, when a plurality of through holes are provided in the substrate, the through holes are arranged at the four corners of the mounting area of ​​the integrated circuit, so that the ink adhering to the first surface of the substrate can be captured more efficiently. Therefore, the integrated circuit that detects whether or not ink is adhering to the first surface based on the ink captured by the through holes can detect ink mist more efficiently, and the integrated circuit further improves the accuracy of ink mist detection. [Explanation of symbols]

[0189] 1...liquid ejection device, 5...liquid container, 10...control unit, 11...main control circuit, 12...power supply circuit, 20...head unit, 21...head control circuit, 22...differential signal restoration circuit, 35...support member, 40...transport unit, 50...drive signal output circuit, 51a, 51b...drive circuit, 60...piezoelectric element, 100...ejection head, 110...filter section, 113...filter, 120...sealing member, 125...through opening, 130...wiring board, 135...notch, 136...FPC insertion hole, 137...FPC notch, 138...connection terminal, 140...holder, 14 1,142,143...holder member, 145...liquid flow path, 146...slit hole, 150...fixing plate, 151...flat portion, 152,153,154...bent portion, 155...opening, 200...driving signal selection circuit, 210...selection control circuit, 212...shift register, 214...latch circuit, 216...decoder, 230...selection circuit, 232a,232b...inverter, 234a,234b...transfer -gate, 250...diagnosis circuit, 253...individual flow path, 260...temperature detection circuit, 300...head chip, 310...nozzle plate, 321...flow path forming substrate, 322...pressure chamber substrate, 323...protection substrate, 324...case, 330...compliance portion, 331...sealing film, 332...support, 340...diaphragm, 346...flexible wiring substrate, 350...ink flow path, 351...liquid inlet, 353...individual flow path , 355...communicating flow passage, 410...wiring board, 411, 412...surfaces, 413...connecting portion, 420...wiring board, 421, 422...surfaces, 423...semiconductor device, 424, 425, 426...connecting portion, 427...notch, 450...casing, 451, 452, 453...opening hole, 454...opening, 500...board, 501, 502...surfaces, 511, 512, 513, 514...sides, 520...connecting portion, 521...terminal, 530...connecting portion connection portion, 531... terminal, 541, 542, 543, 544, 545... through holes, 550... integrated circuit, 551, 552, 553, 554... sides, 600... discharge portion, C... pressure chamber, DI1, DI2... discharge port, G1... introduction flow path portion, G2... supply flow path portion, G3... liquid discharge portion, G4... discharge control portion, G5... storage portion, N... nozzle, P... medium, R... reservoir, SI1, SI2, SI3... introduction port, U2... liquid supply unit

Claims

1. A print head that ejects liquid; a digital signal output circuit for outputting a digital signal to the print head; a liquid container for supplying liquid to the print head; Equipped with The print head includes: a supply port through which liquid is supplied from the liquid storage container; a nozzle plate having a plurality of nozzles for ejecting liquid; a substrate having a first surface and a second surface different from the first surface; a connector to which the digital signal is input; an integrated circuit that receives the digital signal via the connector and outputs an abnormality detection signal that indicates whether or not the print head is abnormal; having The connector is provided on the first surface, the integrated circuit is disposed on the second surface; a plurality of through holes penetrating the first surface and the second surface are provided in a mounting region of the substrate in which the integrated circuit is provided; the integrated circuit has first and second sides positioned opposite each other, and third and fourth sides positioned opposite each other; a first through hole of the plurality of through holes is located closer to the first side than to the second side and closer to the third side than to the fourth side; a second through hole of the plurality of through holes is located closer to the first side than to the second side and closer to the fourth side than to the third side; a third through hole of the plurality of through holes is located closer to the second side than to the first side and closer to the third side than to the fourth side; a fourth through hole of the plurality of through holes is located closer to the second side than to the first side and closer to the fourth side than to the third side; A liquid ejection device comprising:

2. The supply port is located above the substrate in the vertical direction. The liquid ejection device according to claim 1 .

3. The substrate is positioned such that the first surface faces upward and the second surface faces downward along a vertical direction.

3. The liquid ejection device according to claim 1, wherein the liquid ejection device is a liquid ejection device.

4. The substrate is positioned so that the first surface is perpendicular to the vertical direction.

4. The liquid ejection device according to claim 1, wherein the liquid ejection device is a liquid ejection device.

5. the printhead has an ejection module including the nozzle plate; the integrated circuit is located between the substrate and the dispensing module; 5. The liquid ejection device according to claim 1, wherein the liquid ejection device is a liquid ejection device.

6. the print head has a liquid flow path in communication with the supply port; At least a portion of the liquid flow path passes through a through-portion that penetrates the first surface and the second surface of the substrate.

6. The liquid ejection device according to claim 1,

7. The integrated circuit is a surface mount component.

7. The liquid ejection device according to claim 1, wherein the liquid ejection device is a liquid ejection device.

8. the integrated circuit and the substrate are electrically connected via bump electrodes; 8. The liquid ejection device according to claim 7.

9. the integrated circuit outputs the abnormality detection signal at a low level when an abnormality occurs in the print head.

9. The liquid ejection device according to claim 1, wherein the liquid ejection device is a liquid ejection device.

10. the integrated circuit outputs the abnormality detection signal at a high level when an abnormality occurs in the print head.

9. The liquid ejection device according to claim 1, wherein the liquid ejection device is a liquid ejection device.

11. the digital signal includes a signal that specifies a timing for ejecting liquid; The liquid ejection device according to any one of claims 1 to 10.

12. the digital signal includes a clock signal; The liquid ejection device according to any one of claims 1 to 11.

13. a trapezoidal waveform signal output circuit that outputs a trapezoidal waveform signal including a trapezoidal waveform having a voltage value larger than that of the digital signal; The trapezoidal waveform signal is input to the connector. The liquid ejection device according to any one of claims 1 to 12.

Citation Information

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