ARRAY SUBSTRATE, LIGHT EMITTING SUBSTRATE AND DISPLAY DEVICE

Abstract

The present disclosure relates to a display field and provides an array substrate, a light-emitting substrate and a display device, the array substrate including a base substrate, a first conductive layer and a second conductive layer insulated from each other are laminated on the base substrate, the array substrate includes a plurality of light-emitting element terminal sets arranged in an array on the second conductive layer and connected to the light-emitting elements, and further includes a number of sensor terminal sets located on the second conductive layer and connected to a sensor, the sensor senses the light-emitting elements, thereby quickly and effectively grasping the light-emitting status of the surrounding light-emitting elements, and timely and precisely adjusting the parameters of the light-emitting elements to ensure stable performance of each light-emitting element.

Description

[Technical field]

[0001] The present disclosure relates to the field of display technology, and in particular to an array substrate, a light-emitting substrate, and a display device. [Background technology]

[0002] MiniLED, also known as submillimeter wave light emitting diode, has a die size of about 100~300um, while MicroLED has a die size of less than 100um. Currently, research and development of MiniLED and MicroLED applications in the backlight and display fields is being conducted in depth to realize better quality products.

[0003] It should be noted that the information disclosed in the above Background section is intended solely to facilitate understanding of the context of the present disclosure, and therefore may contain information that does not constitute prior art known to those skilled in the art. Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present disclosure is to provide an array substrate, a light-emitting substrate, and a display device that can overcome the shortcomings of the prior art. [Means for solving the problem]

[0005] One aspect of the present disclosure provides an array substrate including a base substrate, on which a first conductive layer and a second conductive layer insulated from each other are laminated, wherein the array substrate includes a plurality of light-emitting element terminal sets arranged in an array, a number of sensor terminal sets, a first signal line set, and a second signal line set; the light-emitting element terminal sets arranged in an array are provided on the second conductive layer and coupled to the light-emitting elements; the some sensor terminal sets are provided on the second conductive layer and coupled to sensors, and orthogonal projections of the sensor terminal sets onto the base substrate do not overlap with orthogonal projections of the light-emitting element terminal sets onto the base substrate; the first signal line set is provided on the first conductive layer and electrically connected to the sensor terminal set to drive the sensor to perform sensing; The second signal line set is provided on the first conductive layer, electrically connected to the light-emitting element terminal set, and drives the light-emitting element to emit light.

[0006] In one embodiment of the present disclosure, the sensor terminal set includes an input terminal, an output terminal, a power supply terminal, and a common voltage terminal, and the corresponding sensor includes an input pin, an output pin, a power supply pin, and a common voltage pin, the input terminal is electrically connected to the input pin, the output terminal is electrically connected to the output pin, the power supply terminal is electrically connected to the power supply pin, and the common voltage terminal is electrically connected to the common voltage pin; the first signal line set includes an input signal line, an output signal line, a power supply signal line, and a first common voltage signal line; The input terminal is electrically connected to the input signal line, the output terminal is electrically connected to an output signal line, the power supply terminal is electrically connected to a power supply signal line, and the common voltage terminal is electrically connected to a first common voltage signal line.

[0007] In one embodiment of the present disclosure, the plurality of sensor terminal sets are arranged in an array evenly along the row and column directions.

[0008] In one embodiment of the present disclosure, the number of the input signal lines and the number of the output signal lines are both 1, In the column direction, in two adjacent sensor terminal sets located in the same column, an output terminal of one of the sensor terminal sets is electrically connected to an input terminal of the other sensor terminal set, and in the sensor terminal sets in two adjacent columns, an output terminal connected to the sensor terminal set in the first or last row of one column is electrically connected to an input terminal of the sensor terminal set located in the first or last row of the other column, thereby connecting all of the sensors in series; In all of the sensor terminal sets connected in series, the input terminal of the sensor terminal set located at one end is connected to the input signal line, and the output terminal of the sensor terminal set located at the other end is connected to the output signal line.

[0009] In one embodiment of the present disclosure, in the first signal line set, the number of the input signal lines is equal to the number of the sensor terminals in the row direction, the number of the output signal lines is equal to the number of the sensor terminals in the row direction, In the column direction, in two adjacent sensor terminal sets located in the same column, the output terminal of one of the sensor terminal sets is electrically connected to the input terminal of the other sensor terminal set, and in the sensor terminal sets located in the same column, the input terminal of the first sensor terminal set is connected to the input signal line and the output terminal of the last sensor terminal set is connected to the output signal line, so that all of the sensors in each column are connected in series.

[0010] In one embodiment of the present disclosure, in the first signal line set, the number of the input signal lines is equal to the number of rows of the sensor terminal set, the number of the output signal lines is equal to the number of rows of the sensor terminal set, In the column direction, the input terminals of each of the sensor terminal sets located in the same column are connected to the same input signal line, and the output terminals of each of the sensor terminal sets located in the same column are connected to the same output signal line.

[0011] In one embodiment of the present disclosure, in the first signal line set, the number of the power supply signal lines is equal to the number of the sensor terminals in a row direction, In the column direction, the power supply terminals of each of the sensor terminal sets in the same column are connected to the same power supply signal line.

[0012] In one embodiment of the present disclosure, in the first signal line set, the number of the first common voltage signal lines is equal to the number of the sensor terminal sets in the row direction; In the column direction, the common voltage terminals of each of the sensor terminal sets in the same column are connected to the same first common voltage signal line.

[0013] In one embodiment of the present disclosure, the array substrate further includes a plurality of first lead wires, the first lead wires being connected to the output terminals and the input terminals of two adjacent sensor terminal sets; The first lead wires include a first column lead wire extending in the column direction and a first row lead wire extending in the row direction, each of the first column lead wires being provided on the first conductive layer, each of the first row lead wires being provided on the second conductive layer, and the first column lead wires being electrically connected to the first row lead wires by vias.

[0014] In one embodiment of the present disclosure, the lead wires of the first row connected to the sensor terminal sets located in the same row are arranged at intervals along the row direction.

[0015] In one embodiment of the present disclosure, the array substrate further includes a number of capacitor terminal sets; A number of capacitor terminal sets are provided on the second conductive layer and are used for disposing capacitors, the capacitor terminal sets including a first capacitor terminal and a second capacitor terminal, the first capacitor terminal being connected to the power supply terminal and the second capacitor terminal being connected to the common voltage terminal.

[0016] In one embodiment of the present disclosure, the array substrate further includes a second lead wire and a third lead wire provided on the second conductive layer, the second lead wire being connected to the first capacitor terminal and the power supply signal line, and the third lead wire being connected to the first capacitor terminal and the power supply terminal of the sensor terminal set.

[0017] In one embodiment of the present disclosure, the second signal line set includes a second common voltage signal line, a driving voltage signal line, a source power supply line, and a source address line; Here, the second common voltage signal line is utilized as the first common voltage signal line.

[0018] In one embodiment of the present disclosure, an orthogonal projection of the sensor terminal set onto the base substrate and an orthogonal projection of the second signal line set onto the base substrate at least partially overlap with each other.

[0019] In one embodiment of the present disclosure, the orthogonal projection of the sensor terminal set onto the base substrate and the orthogonal projection of the light-emitting element terminal set onto the base substrate are each located at the orthogonal projection of different signal lines in the second signal line set onto the base substrate.

[0020] In one embodiment of the present disclosure, the orthogonal projection of the sensor terminal set onto the base substrate overlaps with the orthogonal projection of the driving voltage signal line, and the orthogonal projection of the light-emitting element terminal set onto the base substrate overlaps with the orthogonal projection of the second common voltage signal line.

[0021] In one embodiment of the present disclosure, the input signal line, the output signal line and the power supply signal line are located between the second common voltage signal line and the driving voltage signal line.

[0022] In one embodiment of the present disclosure, the array substrate further includes a common voltage signal line auxiliary line provided on the second conductive layer, and the common voltage signal line auxiliary line is electrically connected to the first common voltage signal line through a via.

[0023] In one embodiment of the present disclosure, the array substrate further includes a fourth lead wire provided on the second conductive layer, the fourth lead wire sequentially connects some of the light-emitting element terminal sets, and the some of the light-emitting elements are connected in series as a light-emitting unit; Here, the sensor terminal set is located in the gap between two adjacent light emitting units, or is located between each of the light emitting element terminal sets in the light emitting unit.

[0024] In one embodiment of the present disclosure, the array substrate further includes a driving circuit terminal set; A driving circuit terminal set is provided on the second conductive layer and is used to be coupled to a driving circuit, and the orthogonal projection of the driving circuit terminal set onto the base substrate does not overlap with the orthogonal projection of the light-emitting element terminal set and the sensor terminal set onto the base substrate.

[0025] In one embodiment of the present disclosure, the orthogonal projection of the driving circuit terminal set onto the base substrate and the orthogonal projection of the second signal line set onto the base substrate at least partially overlap, and the orthogonal projection of the driving circuit terminal set onto the base substrate and the orthogonal projection of the sensor terminal set onto the base substrate are each located at the orthogonal projections of different signal lines in the first signal line set onto the base substrate.

[0026] In one embodiment of the present disclosure, the light-emitting device terminal sets located at the outermost positions in each of the light-emitting units are connected in sequence to form a polygon, and the driving circuit terminal set is located outside the polygon.

[0027] In one embodiment of the present disclosure, the array substrate includes P rows and Q columns of light-emitting units, each of the driving circuit terminal sets drives a light-emitting unit, and the positions of the driving circuit terminal sets corresponding to the four light-emitting units with coordinates (a, b), (a+1, b), (a, b+1), and (a+1, b+1) form a convex quadrilateral, where 1≦a≦P and 1≦b≦Q.

[0028] In one embodiment of the present disclosure, the convex quadrilateral is composed of two isosceles triangles, and the isosceles triangles are composed of the positions of any three driving circuit terminal sets of the four light-emitting units.

[0029] Another embodiment of the present disclosure provides a light emitting substrate, The array substrate described above; a light emitting device coupled to the light emitting device terminal set of the array substrate; a sensor coupled to the set of sensor terminals of the array substrate.

[0030] Another embodiment of the present disclosure provides a display device including the light emitting substrate described above.

[0031] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. [Brief description of the drawings]

[0032] The accompanying drawings of this specification are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure, and are used in combination with this specification to explain the principles of the present disclosure. It will be apparent that the accompanying drawings in the following description are merely examples of some of the present disclosure, and other accompanying drawings can be obtained by those skilled in the art based on these drawings without creative efforts.

[0033] [Figure 1] 1 is a schematic diagram of a partial configuration of a mini LED array substrate in the present disclosure. [Diagram 2] FIG. 2 is a partial enlarged view of region M in FIG. [Diagram 3] FIG. 2 is a schematic diagram of an arrangement of light-emitting units. [Figure 4] FIG. 2 is a schematic diagram of the configuration of a sensor terminal set. [Diagram 5] FIG. 5 is a schematic cross-sectional view taken along line AA in FIG. 4. [Figure 6] FIG. 13 is a schematic diagram of an arrangement of a sensor terminal set and signal lines. [Figure 7] FIG. 7 is a schematic diagram of the configuration of the first conductive layer in FIG. 6. [Figure 8] FIG. 4 is a schematic diagram showing an arrangement of signal lines of a sensor terminal set according to an embodiment. [Figure 9] 9 is a schematic diagram showing a configuration of a part of the array substrate of FIG. 8. [Figure 10] FIG. 10 is a partial enlarged view of region M in FIG. [Figure 11] FIG. 10 is a schematic diagram of the configuration of one sensor terminal set in FIG. 9. [Figure 12] FIG. 10 is a schematic diagram of a wiring scheme for the first conductive layer of FIG. 9. [Figure 13] FIG. 4 is a schematic diagram of a configuration of a first lead wire. [Figure 14] FIG. 13 is a schematic diagram showing an arrangement of signal lines of a sensor terminal set in another embodiment. [Figure 15] 15 is a schematic diagram showing a configuration of a part of the array substrate of FIG. 14. [Figure 16] FIG. 15 is a schematic diagram of the configuration of one sensor terminal set in FIG. 14. [Figure 17] FIG. 15 is a schematic diagram of a wiring scheme for the first conductive layer of FIG. 14. [Figure 18] 15 is a schematic diagram of transmission paths of input signals and output signals in FIG. 14. [Figure 19] FIG. 13 is a schematic diagram illustrating a configuration of a portion of an array substrate according to another embodiment. [Figure 20] FIG. 20 is a partial enlarged view of region M in FIG. [Figure 21] FIG. 20 is a schematic diagram of the configuration of one sensor terminal set in FIG. 19. [Figure 22] 20 is a partial enlarged view of a capacitor terminal set included in region M in FIG. 19. [Diagram 23] FIG. 2 is a schematic diagram of a configuration of a capacitor terminal set. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] Next, the exemplary embodiments will be described in more detail with reference to the accompanying drawings. However, the exemplary embodiments can be implemented in various forms and should not be construed as being limited to the embodiments described herein, but rather, these embodiments can make the present disclosure comprehensive and complete, and can comprehensively convey the idea of ​​the exemplary embodiments to those skilled in the art. Note that the same attached reference numerals in the drawings indicate the same or similar structures, and therefore detailed descriptions thereof will be omitted. Furthermore, the accompanying drawings are provided only as schematic diagrams of the embodiments of the present disclosure, and are not necessarily drawn to scale.

[0035] Although relative terms such as "top" and "bottom" are used herein to describe the relative relationship of certain components to other components of a number, these terms are used for convenience only, for example according to the orientation of the embodiments depicted in the accompanying drawings. It will be understood that if a device of the number is rotated upside down, the parts described as being "top" will become the parts described as being "bottom." When a structure is on another structure, it can mean that the structure is integrally formed on the other structure, that the structure is "directly" set on the other structure, or that the structure is "indirectly" set on the other structure through the other structure.

[0036] The terms "a," "an," "the," "said," and "one or more" indicate the presence of one or more elements / components / etc., and the terms "comprising" and "having" are used to indicate an open-ended inclusiveness and mean that the recited elements / components / etc. may also be present. The terms "first," "second," and "third" are used as descriptive elements only and do not quantitatively limit their subject matter.

[0037] The embodiment of the present disclosure provides an array substrate, on which light emitting devices are arranged to function as a backlight for a Mini-LED display device, and a sensor is arranged on the array substrate to sense the light emitting properties of the light emitting devices and monitor the light emitting status of the backlight.

[0038] In the embodiment of the present disclosure, FIG. 1 is a schematic diagram of a part of the configuration of the array substrate of the mini LED in the present disclosure. FIG. 2 is a partial enlarged view of the M region in FIG. 1. FIG. 3 is a schematic diagram of the configuration of the sensor terminal set. FIG. 4 is a schematic diagram of the cross section of AA in FIG. 3. In the reference FIGS. 1 to 4, the Mini-LED array substrate includes a base substrate 900, a first conductive layer 100, and a second conductive layer 200. The first conductive layer 100 is provided on one side of the base substrate 900, and the second conductive layer 200 is provided on the side of the first conductive layer 100 that is away from the base substrate 900. An insulating layer 300 is provided between the first conductive layer 100 and the second conductive layer 200, and an insulating layer 400 is provided on the second conductive layer, and an opening region is provided in the insulating layer 400 to expose the element.

[0039] In the embodiment of the present disclosure, the first conductive layer 100 is used to arrange various signal lines, including a first set of signal lines for driving the sensor and a second set of signal lines for making the light-emitting element emit light. In some embodiments, a sputtering process is used to sequentially form a stacked structure of MoNb / Cu / MoNb, where the bottom layer MoNb improves adhesion, the top layer MoNb is for oxidation prevention, and the middle layer Cu is a low resistance material and is used as the main part of the signal line, and the width and thickness of the signal line may be further increased to further reduce the resistance of the signal line. In some other embodiments, the middle layer Cu can be formed using an electroplating process, in which the bottom layer is made by a sputtering process using MoNiTi as a seed layer to increase the nucleation density of metal Cu grains during electroplating, and finally the oxidation prevention layer MoNiTi or MoNb can be formed by a sputtering process.

[0040] The second conductive layer 200 is provided with a plurality of light-emitting element terminal sets 10 coupled to the light-emitting elements. The second conductive layer 200 is further provided with a number of sensor terminal sets 30 connected to the sensors. The sensor terminal sets 30 are distributed among the light-emitting element terminal sets 10, and the orthogonal projection of the sensor terminal sets 30 onto the base substrate does not overlap with the orthogonal projection of the light-emitting element terminal sets 10 onto the base substrate. The second conductive layer 200 can be sequentially formed with a layered structure of MoNb / Cu / CuNi by a sputtering process, where the lower layer MoNb improves adhesion, and the surface of the upper layer uses CuNi to realize oxidation prevention and solid crystallinity.

[0041] The light-emitting element terminal set 10 of the present disclosure is used to electrically connect the light-emitting element to the second signal line set on the base substrate, and since the light-emitting element can be fixed to the array substrate by soldering, the light-emitting element terminal set 10 may be a pad set, or since the light-emitting element can be directly prepared on the base substrate by a film formation process, the light-emitting element terminal set 10 may be an electrode set acting as a conductor. Similarly, the sensor terminal set 30 of the present disclosure may be a pad set or an electrode set.

[0042] By installing a sensor on the array substrate and quickly and effectively monitoring the light emission status of the surrounding light-emitting elements, the current, voltage, brightness, etc. of the light-emitting elements can be adjusted in a timely and more precise manner, enabling each light-emitting element to perform stably.

[0043] The sensor can be divided into several types according to its function, for example, the sensor can be a temperature sensor, which detects the temperature of the surrounding light-emitting components and adjusts the parameters such as voltage, current, etc., to avoid the wire burning caused by the overheating caused by the system or the overly high voltage and current. It can also be a photosensitive sensor, which detects the brightness of the surrounding light-emitting elements and adjusts the brightness of each light-emitting element in a timely manner, so that the brightness of each light-emitting element can maintain a constant and stable light. In one embodiment, the sensor can be an on-chip sensor coupled to the array substrate via the sensor terminal set 30.

[0044] The array substrate according to the embodiment of the present disclosure will be described in detail below.

[0045] 1 and 2, a plurality of light-emitting elements are arranged in an array, and one light-emitting unit 101 includes four light-emitting elements connected in series, where the light-emitting element electrically connected to the driving voltage signal line 202 is the starting point of the series connection of these four light-emitting elements, and the light-emitting element electrically connected to the control circuit is used as the end point of the series connection of these four light-emitting elements. Four light-emitting elements are driven by one control circuit. Therefore, a fourth lead wire 108 is further provided on the second conductive layer 200 of the array substrate, and the four light-emitting element terminal sets 10 are sequentially connected to the fourth lead wire 108 to serialize the four light-emitting elements as one light-emitting unit 101. Note that the embodiment of the present disclosure is not limited to the number of light-emitting elements in each light-emitting unit, and may be 5, 6, 7, or 8, but is not limited to four. In addition, the light-emitting elements may be LEDs or other types of light-emitting elements.

[0046] In some examples, in a specific implementation, as shown in FIG. 1, the light-emitting elements in the same light-emitting unit 101 can be sequentially connected to form a polygon. For example, if the light-emitting unit 101 is composed of four light-emitting elements, these four light-emitting elements can be sequentially connected to form a quadrangle. Two sides of the quadrangle can be parallel to the row direction and the other two sides can be parallel to the column direction. Alternatively, two sides of the quadrangle can be angled in the row direction and the other two sides can be angled in the column direction. Therefore, the four light-emitting element terminal sets 10 in each light-emitting unit 101 are also arranged in a corresponding shape.

[0047] Correspondingly, the positions of the light-emitting element terminal sets 10 corresponding to the four light-emitting elements in one light-emitting unit 101 can be connected to obtain one polygon (shown by the dashed frame X in the figure), specifically, a parallelogram. The vertices of the quadrangle can be the geometric centers of the light-emitting element terminal sets 10. Here, attention should be paid to the difference between the dashed frame X in FIG. 2 for indicating the positions of the light-emitting element terminal sets 10 and the dashed frame in FIG. 1 which merely roughly illustrates the method of dividing the light-emitting units 101. As a specific example, in the light-emitting units 101 adjacent in the row direction, the light-emitting elements located at the same position in each light-emitting unit 101 may be distributed on an almost identical line along the row direction. Furthermore, in the light-emitting units adjacent in the column direction, the light-emitting elements located at the same position in each light-emitting unit 101 may be arranged in an almost linear manner along the column direction. In this way, the light-emitting element terminal sets 10 in the row direction and the column direction are also arranged according to the corresponding rule.

[0048] Furthermore, in the four light-emitting element terminal sets 10 connected in series with each other, the fourth lead 108 between any two light-emitting element terminal sets is composed of a plurality of sub-portions extending in the row direction and / or column direction, and the fourth lead is composed of a plurality of sub-portions in the row direction and column direction, which makes it easier to manufacture, reduces the probability of short circuit between two elements in the same light-emitting element terminal set, and reduces the risk of the fourth lead being broken due to a segment difference existing in the gap between the signal line of the first conductive layer and the adjacent signal line. Referring specifically to FIG. 2, the fourth lead 108 of the upper left light-emitting element terminal set 10 extends to the lower left light-emitting element terminal set 10 in the order of the column direction, row direction, and column direction.

[0049] 2, in one embodiment, the light-emitting element terminal set 10 has two terminals, an anode terminal 11 and a cathode terminal 12. The anode terminal 11 is connected to one anode pin of the light-emitting element, and the cathode terminal 12 is connected to the other cathode pin of the light-emitting element.

[0050] Since the light-emitting element of the present disclosure is driven by a control circuit to emit light, the array substrate of the present disclosure also includes a drive circuit terminal set 20. As with the light-emitting element and the sensor, the drive circuit is integrated on a chip and connected to the array substrate by soldering, so the drive circuit terminal set 20 may be a pad set or may be directly provided on the substrate by a film formation process, and therefore the drive circuit terminal set 20 may also be an electrode set that functions as a conductor. Note that the orthogonal projection of the drive circuit terminal set 20 onto the substrate does not overlap with the orthogonal projection of the light-emitting element terminal set 10 and the sensor terminal set 30 onto the substrate.

[0051] In one embodiment, the control circuit used to drive the light-emitting element can be a microchip, the size (e.g., length) of the microchip is on the order of tens or hundreds of microns, the chip area is on the order of tens of thousands or hundreds of square microns or even smaller, the same size as a Mini-LED, has a miniaturization function for easy incorporation into the array substrate 10 (e.g., the surface of the array substrate 10), simplifies the overall structure, and facilitates thinning and weight reduction. Each control circuit directly drives one light-emitting unit 101, so that problems such as complicated operation and flicker in the line scan control method can be avoided. Furthermore, the driving circuit 110 has a small number of ports, requires few signals, is easy to control, has a simple wiring method, and is low cost.

[0052] Figures 1 and 2 show the configuration of a drive circuit terminal set 20 coupled to a drive circuit, the drive circuit terminal set 20 including four terminals: an input terminal 21 connected to the Di pin of the drive circuit, a power supply terminal 22 connected to the Pwr pin of the drive circuit, an output terminal 23 connected to the Out pin of the drive circuit, and a common voltage terminal 24 connected to the Gnd pin of the drive circuit.

[0053] 1 and 2, a second signal line set for driving the light emission of the light-emitting element is provided in the first conductive layer 100, the second signal line set includes a second common voltage signal line 201, a driving voltage signal line 202, a power supply line 203, and a source address line 204, and the input terminal 21 is configured to receive a first input signal, for example an address signal, and select a corresponding address driving circuit. For example, the first input signal may be 8-bit starting address information transmitted from the source address line 204, which can be analyzed to obtain the address of the corresponding first driving circuit. The power supply terminal 22 is configured to receive a second input signal, for example a power line carrier communication signal, from the power supply line 203. The second input signal can not only supply power to the driving circuit, but also transmit communication data to the driving circuit, determine the light emission time of the corresponding light-emitting unit, and further control its visual brightness. The output terminal 23 is configured to output a relay signal including address information to the next level driving circuit in the cascade during a first period, which can be used to obtain the address of the corresponding driving circuit, and the output terminal 23 is also configured to form a signal circuit for the corresponding light-emitting unit during a second period, so that the light-emitting unit can emit a corresponding brightness. The common voltage terminal 24 is configured to receive a common voltage signal, such as a ground signal, from the second common voltage signal line 201. In the disclosed embodiment, the above-mentioned second common voltage signal line 201, the driving voltage signal line 202, the power supply line 203 and the source address line 204 all extend in the column direction and are arranged at intervals along the row direction.

[0054] As shown in Fig. 1, the configuration of four light-emitting elements and a driving circuit in one light-emitting unit 101 may be regarded as a duplicated unit, and the array substrate may include a plurality of duplicated units, with adjacent duplicated units being arranged at intervals and periodically arranged along the row and column directions. This allows one light-emitting unit set to be arranged in an overlapping manner as an overlapping unit. For example, in a plurality of light-emitting units arranged in the column direction, the relative positions of the plurality of light-emitting elements and the driving circuit in each light-emitting unit may be approximately the same, and in a light-emitting unit arranged in the row direction, the relative positions of the plurality of light-emitting elements and the driving circuit in two adjacent light-emitting units may be arranged symmetrically about the center.

[0055] As shown in Fig. 2, the driving circuit terminal set 20 is located outside a quadrangle (shown by a dashed frame X in the figure) obtained by sequentially connecting the positions of the four light-emitting element terminal sets 10 connected in series, so that the wiring design of the fourth lead wire is easy and the influence of the driving circuit on the light-emitting element can be minimized. When each light-emitting unit includes n x M light-emitting element terminal sets, a polygon can be obtained by sequentially connecting the positions of the multiple light-emitting element terminal sets located outside the light-emitting unit, and the driving circuit terminal set 20 is located outside the polygon. Here, the position of each of the outermost light-emitting element terminal sets in the light-emitting unit refers to the geometric center of each of the light-emitting element terminal sets described above, and the light-emitting element terminal sets other than the outermost one in the light-emitting unit are located inside the polygon described above.

[0056] For ease of explanation, the light emitting units 101 on the array substrate are shown in coordinates according to the arrangement of the array. For example, the array substrate has a total of P rows and Q columns of light emitting units 101, and the light emitting unit 101 in the a-th row and b-th column corresponds to coordinates (a, b), where 1≦a≦P and 1≦b≦Q, and P, Q, a, and b are positive integers. Figure 3 shows the arrangement structure and coordinates of some of the light emitting units 101.

[0057] In one embodiment, the positions of the driving circuit terminal sets corresponding to the four light-emitting units 101 with coordinates (a, b), (a+1, b), (a, b+1), and (a+1, b+1) can be connected in sequence to obtain a convex quadrilateral, which can be, for example, a parallelogram, and specifically, can be a rectangle or a square. Obviously, each convex quadrilateral is composed of two triangles, which are composed of the positions of the three driving circuit terminal sets 20 in the four light-emitting units 101.

[0058] In some embodiments, each parallelogram is composed of two isosceles or equilateral triangles, and the isosceles or equilateral triangles are composed of the positions of the three driving circuit terminal sets 20 in the four light-emitting units 101, where if each parallelogram is composed of two equilateral triangles, the spacing between the driving circuit terminal sets 20 can be made closer. Note that the "isosceles triangle" and "equilateral triangle" described here are ideal descriptions, and in actual products, due to the influence of technology and device precision, an approximately "isosceles triangle" or "equilateral triangle" shape will suffice.

[0059] In some embodiments, referring to FIG. 1 to FIG. 3, the driving circuit terminal set 20 in the light-emitting unit (1,1), the driving circuit terminal set 20 in the light-emitting unit (1,2), and the driving circuit terminal set 20 in the light-emitting unit (2,1) are located at three vertices of a triangle, for example, at the three vertices of a first triangle. The driving circuit terminal set 20 in the light-emitting unit (2,1), the driving circuit terminal set 20 in the light-emitting unit (1,2), and the driving circuit terminal set 20 in the light-emitting unit (2,2) are located at three vertices of a triangle, for example, at the three vertices of a second triangle. The driving circuit terminal set 20 in the light-emitting unit (2,1), the driving circuit terminal set 20 in the light-emitting unit (2,2), and the driving circuit terminal set 20 in the light-emitting unit (3,1) are located at three vertices of a triangle, for example, at the three vertices of a third triangle. The driving circuit terminal set 20 in the light-emitting unit (3, 1), the driving circuit terminal set 20 in the light-emitting unit (2, 2), and the driving circuit terminal set 20 in the light-emitting unit (3, 2) are respectively located at the three vertices of a triangle, for example, the three vertices of a fourth triangle. The driving circuit terminal set 20 in the light-emitting unit (1, 2), the driving circuit terminal set 20 in the light-emitting unit (1, 3), and the driving circuit terminal set 20 in the light-emitting unit (2, 3) are located at three vertices of a triangle, for example, the three vertices of the fifth triangle; the driving circuit terminal set 20 in the light-emitting unit (2, 3), the driving circuit terminal set 20 in the light-emitting unit (1, 2), and the driving circuit terminal set 20 in the light-emitting unit (2, 2) are located at three vertices of a triangle, for example, the three vertices of a sixth triangle; and the driving circuit terminal set 20 in the light-emitting unit (1, 3), the driving circuit terminal set 20 in the light-emitting unit (1, 4), and the driving circuit terminal set 20 in the light-emitting unit (2, 3) are located at three vertices of a triangle, for example, the three vertices of the seventh triangle.

[0060] Here, the connection line between the centers of gravity of any two triangles adjacent in the row and column directions is parallel to the row or column direction. For example, the connection line between the center of gravity of the first triangle and the center of gravity of the third triangle is parallel to the column direction, and the connection line between the center of gravity of the second triangle and the center of gravity of the fourth triangle is parallel to the column direction. The connection lines between the centers of gravity of the first triangle, the fifth triangle, and the seventh triangle are parallel to the row direction, and the connection line between the center of gravity of the second triangle and the center of gravity of the sixth triangle is parallel to the row direction.

[0061] The layout of the other drive circuit terminal sets 20 is similar to that described above, and therefore a description thereof will be omitted here.

[0062] The arrangement of the driving circuit terminal sets 20 corresponding to the plurality of light-emitting units 101 on the array substrate is the same as above, and therefore the description thereof will be omitted here. In one embodiment, specifically, the arrangement of the light-emitting element terminal set 10 and the driving circuit terminal set 20 corresponding to one light-emitting unit along the row direction is one overlapping unit, and the array substrate includes a plurality of overlapping units, with adjacent overlapping units set at intervals and periodically arranged along the row direction. In this way, one light-emitting unit can be overlapped and arranged as an overlapping unit to form an array substrate. In this way, in the light-emitting units arranged in the row direction and the column direction, the relative positions of the plurality of light-emitting element terminal sets 10 and the driving circuit terminal sets 20 in each light-emitting unit can be made substantially the same.

[0063] 4 is a schematic diagram of the configuration of the sensor terminal set 30. The sensor terminal set 30 is x The input terminal 31 connected to the pin and the T x The output terminal 32 connected to the pin and the V + It includes a power supply terminal 33 connected to the pin and a common voltage terminal 34 connected to the Gnd pin of the sensor.

[0064] 5 is a schematic diagram of a cross section taken along the line AA in FIG. 4. A first signal line set for driving the sensor to detect is provided on the first conductive layer 100, and the first signal line set includes an input signal line 101, an output signal line 102, a power supply signal line 103, and a first common voltage signal line 104. The signal lines extend in the column direction and are arranged in the row direction. The input terminal 31 is electrically connected to the input signal line 101, the output terminal 32 is electrically connected to the output signal line 102, the power supply terminal 33 is electrically connected to the power supply signal line 103, and the common voltage terminal 34 is electrically connected to the first common voltage signal line 104.

[0065] Since the first common voltage signal line 104 and the second common voltage signal line 201 both supply a ground voltage, by combining the second common voltage signal line 201 and the first common voltage signal line 104 into a single signal line, it is possible to supply a common voltage signal to both the sensor and the drive circuit without increasing the number of signal lines.

[0066] The sensor in the embodiments of the present disclosure can be used to sense temperature, for example, the sensor can include a thermal transistor that senses a temperature change using a voltage change between its base and emitter, and can also include an analog-to-digital conversion unit that converts an analog signal characterizing the voltage change into a digital signal, and can further include signal processing equipment such as noise reduction and filtering to further process the digital signal, which is then converted to a corresponding temperature change so that it can be more accurately measured, and the measured temperature change can be compared to a reference value to identify the cause of the temperature change, for example, a problem with the circuitry of the measured part or a problem with the packaging of the measured part, and adjustments or overhauls can be made in response to different problems, thereby realizing temperature monitoring and improving product yield.

[0067] The sensor terminal set 30 may be located in the gap between two adjacent light-emitting units, as shown in Fig. 2. In other embodiments, the sensor terminal set 30 may be disposed between various light-emitting element terminal sets 10 in the light-emitting unit, as long as sensing can be achieved for the area in which the light-emitting unit is located. Regardless of the configuration, multiple sensor terminal sets 30 may be arranged on the array substrate along row and column directions to enable the sensor to monitor the temperatures of the light-emitting units in different areas.

[0068] The number of sensors is designed according to the need for accuracy in sensing the array substrate, and may be multiple or only one. Correspondingly, the number of sensor terminal sets 30 may be one or more.

[0069] In this disclosure, in order to realize more accurate inspection and adjustment, the number of sensor terminal sets 30 is multiple, and they are distributed and arranged in the gaps between the light-emitting units. Fig. 6 is a schematic diagram of an arrangement method of the sensor terminal sets 30 and signal lines as an example. The structure is shown in which 15 sensor terminal sets 30 are evenly arranged in 3 rows and 5 columns on the array substrate.

[0070] It is understood that the number and arrangement of the sensor terminal sets 30 are not unique. Each sensor can sense the light emitting elements around it, and the number and location of the sensors can be set according to the number and range of the light emitting elements that each sensor can sense, so that the sensing data can be useful for monitoring the actual performance of the light emitting elements, so that all the sensing ranges of the sensors can accurately cover all the light emitting elements and there is no overlapping sensing. In order to perform more accurate testing, the sensor terminal sets in FIG. 6 are distributed in each row and each column, and each sensor terminal set in each row or column is located on the same line, and two adjacent sensor terminal sets are equally spaced. In other embodiments, the sensors in each row or column can be arranged in other ways according to the needs of testing, for example, the sensors in each row or column are not located on the same line, as long as the sensing purpose can be achieved.

[0071] The connection relationship of the sensors is as follows: N sensors can be mounted on the array substrate, where N is an integer equal to or greater than 1.

[0072] In some cases, N sensors are cascaded together, i.e., the Tx pin of the Nth level sensor is connected to the R x pin and R of the first level sensor x The pin of the Nth level sensor is connected to the input signal line 101, and the Tx pin of the Nth level sensor is connected to the output signal line 102, where n is an integer greater than 1 and less than N-1. x The pin is connected to the input terminal 31 of the sensor terminal set corresponding to the sensor and the input signal line 101 to receive the input signal, and the output pin T of the Nth level sensor x are connected to the output signal line 102 via the output terminal 32 of the corresponding sensor terminal set to transmit the signal sensed by the sensor to an external circuit. The input signal is generated based on a communication protocol and is used for sequential setting of the sensors of each level. In the power-on stage, the input signal is configured to sequentially assign address information to the sensors of the 1st level to the Nth level, in the initial setting stage, the input signal is configured to sequentially specify the sensing accuracy and sensing range of the physical quantity (such as temperature) of the sensors of the 1st level to the Nth level, and in the sensing stage, the input signal is configured to specify that the sensor of the xth level performs a sensing function and outputs a corresponding sensing signal. In the sensing stage, only one sensor performs the sensing function at a time, and the sensors of the other levels can correspond to (N-1) resistors in series with the sensor performing the sensing function, thereby enabling sensing at a specific position on the array substrate. In this way, in the sensing stage, the input signal is configured to sequentially specify the sensors of each level to perform the sensing function, thereby enabling sensing signals to be obtained at all positions on the array substrate.

[0073] In some cases, it is possible to make each of the N sensors independent. In order to avoid an excessive number of signal lines and a complicated overall wiring, it is possible to connect sensors located in the same row to the same power supply signal line 103, the same input signal line 101, and the same output signal line 102. The Rx pin of each sensor is connected to the input signal line 101 via the input terminal 31 of the sensor terminal set corresponding to the sensor, and receives an input signal, and outputs the input signal to the output pin T of each sensor. x are connected to the output signal line 102 via the output terminal 32 of the corresponding sensor terminal set in order to transmit the signal sensed by the sensor to an external circuit. Address information is set in advance for each sensor, and the address information is different for each sensor. The input signal is generated based on a communication protocol for configuring and setting up each sensor. In the initial setting stage, the input signal having the address information is configured to specify the sensing accuracy and sensing range of the corresponding sensor, such as a physical quantity (e.g., temperature), and in the sensing stage, the input signal having the address information is configured to specify the sensor that performs the sensing function and output the corresponding sensing signal. Note that in the sensing stage, only one sensor performs the sensing function at a time, and other sensors connected to the same input signal line 101 and the same output signal line 102 as the sensor that performs the sensing function do not operate, thereby enabling sensing at a specific position on the array substrate. In this way, in the sensing stage, the input signal is configured so that sensors at different positions sequentially perform the sensing function, making it possible to obtain sensing signals at all positions on the array substrate.

[0074] In one embodiment, refer to FIG. 1 to FIG. 7, where FIG. 6 corresponds to the arrangement of the sensor terminal sets 30 and the signal lines in the array substrate of FIG. 1, and FIG. 7 shows the configuration of the first conductive layer 100 of FIG. 6. As shown in the figure, the number of input signal lines 101 is equal to the number of the sensor terminal sets 30 in the row direction, and the number of output signal lines 102 is equal to the number of the sensor terminal sets 30 in the row direction. In the column direction, the input terminals 31 of each sensor terminal set 30 located in the same column are connected to the same input signal line 101, and the output terminals 32 of each sensor terminal set 30 located in the same column are connected to the same output signal line 102, that is, only one input signal line 101 and one output signal line 102 may be provided in each column, thereby reducing the number of the input signal lines 101 and the output signal lines 102.

[0075] In another embodiment, refer to Figures 8 to 12, where Figure 8 shows a signal line layout scheme of the sensor terminal set 30 in this embodiment, and Figure 9 shows a configuration of a portion of the array substrate in this embodiment. Figure 10 is a partial enlarged view of region M in Figure 9. Figure 11 is a schematic diagram of the configuration of one sensor terminal set 30 in Figure 9. Figure 12 shows a wiring scheme of the first conductive layer 100 in Figure 8. As shown in the figure, the number of input signal lines 101 is equal to the number of sensor terminals in the row direction, and the number of output signal lines 102 is equal to the number of sensor terminals in the row direction. In the column direction, of two adjacent sensor terminal sets 30 located in the same column, the output terminal 32 of one sensor terminal set 30 is electrically connected to the input terminal 31 of the other sensor terminal set 30, and of each sensor terminal set 30 located in the same column, the input terminal 31 of the first sensor terminal set 30 is connected to one input signal line 101 and the output terminal 32 of the last sensor terminal set 30 is connected to one output signal line 102, so that all sensors in each column are connected in series and signals for configuring the sensors are transmitted to each sensor in the same column.

[0076] For example, in the structure shown in the figure, the input terminal 31 of the sensor terminal set 30 in the bottom row of the first column is connected to the input signal line 101, its output sub-terminal 32 is connected to the input terminal 31 of the sensor terminal set 30 in the second-to-last row of that column, the input terminal 31 of the sensor terminal set 30 in the second-to-last row of that column is connected to the input terminal 31 of the sensor terminal set 30 in the third-to-last row of that column, and so on, with the output terminal 32 of the sensor terminal set 30 in the top row of the first column being connected to the output signal line 102, making it possible to connect the sensors in the first column in series. Similarly, the sensor terminal sets 30 in each column are connected so that the sensors in each column can be connected in series. Based on this series connection configuration, one input signal line 101 and one output signal line 102 are provided for each column, and the input signal line 101 and the output signal line 102 only need to be provided above and below the array substrate, respectively, and can be connected to the junction of the array substrate by edge wiring without having to penetrate the entire array substrate from top to bottom. This makes it possible to further reduce the space occupied by the lines compared to the wiring method shown in Figure 5.

[0077] In this embodiment, of two adjacent sensor terminal sets 30, the output terminal 32 of one sensor terminal set 30 is electrically connected to the input terminal 31 of the other sensor terminal set 30, so that the two input terminals are connected by providing a lead wire on the second conductive layer 200.

[0078] 13, in one embodiment, the array substrate further includes a plurality of first lead wires 105, and the first lead wires 105 are connected to the output terminals and the input terminals of two adjacent sensor terminal sets 30. The first lead wires 105 include a first column lead wire 1051 extending along the column direction and a first row lead wire 1052 extending along the row direction, each of the first column lead wires 1051 is provided on the first conductive layer 100, each of the first row lead wires 1052 is provided on the second conductive layer 200, and the first column lead wires 1051 and the first row lead wires 1052 are electrically connected by vias. Taking the first lead 105 shown in the figure as an example, the first lead 105 includes one first column lead 1051 and two first row lead 1052, the two first row lead 1052 extend horizontally from the output terminal and the input terminal, and the two first row lead 1052 are electrically connected to the vertical first column lead 1051 by vias, thereby electrically connecting the output terminal and the input terminal of two adjacent sensor terminal sets 30. Fig. 13(a) shows that the first column lead 1051 does not cross the first row lead 1052, and Fig. 13(b) shows that the first column lead 1051 crosses the first row lead 1052.

[0079] In this embodiment, each first row lead wire 1051 connecting each sensor terminal set 30 arranged in the same row is arranged in a column direction so that all first row lead wires 1051 occupy the smallest space in the column direction.

[0080] In another embodiment, referring to Figs. 14 to 17, Fig. 14 shows the arrangement of the signal lines of the sensor terminal set 30 in this embodiment, and Fig. 15 shows a part of the configuration of the array substrate in this embodiment. The partial enlarged view of the M region in Fig. 15 is the same as Fig. 10, and Fig. 16 is a schematic diagram of the structure of one sensor terminal set 30 in Fig. 14. Fig. 17 shows the wiring method of the first conductive layer 100 in Fig. 14. As shown in the figure, the number of input signal lines 101 and the number of output signal lines 102 are both 1. In the column direction, in two adjacent sensor terminal sets 30 located in the same column, the output terminal 32 of one sensor terminal set 30 is electrically connected to the input terminal 31 of the other sensor terminal set 30. That is, all the sensors in each column are connected in series. Furthermore, in the sensor terminal sets 30 in two adjacent columns, the output terminal 32 connected to the sensor terminal set 30 in the first or last row of one column is electrically connected to the input terminal 31 of the sensor terminal set 30 located in the first or last row of the other column, thereby connecting all the sensors in series. In all the sensor terminal sets 30 connected in series, the input terminal 31 of the first sensor terminal set 30 is connected to the input signal line 101, and the output terminal 32 of the last sensor terminal set 30 is connected to the output signal line 102, thereby transmitting signals for configuring the sensors to all the sensors on the array substrate.

[0081] Figure 17 shows the transmission path of the input / output signals corresponding to this embodiment, and Figure 18 shows that 15 sensor terminal sets 30 are arranged in an array of 3 rows and 5 columns on the array substrate, where 15 points A, B, C, ..., M, N, O represent 15 sensors, each block represents a light-emitting unit, each block on the abscissa represents a column of the light-emitting unit, each block on the ordinate represents a row of the light-emitting unit, and all the light-emitting units are arranged in an array according to rows and columns, and the orthogonal projections of the sensor terminal sets 30 and the light-emitting units on the array do not overlap. The coordinate values ​​next to each character in Figure 18 are for indicating the position of the terminal sensor on the array substrate, for example, A (8.5, 38.5) represents that the sensor terminal A is located between the 8th and 9th columns of the light-emitting units and between the 38th and 39th columns of the light-emitting units.

[0082] In some embodiments, the m×n sensors are connected in series in an S-shape by row, or the m×n sensors are numbered in a Z-shape by row, for example, as shown in FIG. 18, when m=3 and n=5, the sensor A is connected to the input signal line 101 via the input terminal 31 of the corresponding sensor terminal set 30, and then the sensor A is connected in series with each sensor in the same column, for example, the sensor A, the sensor B, and the sensor C, and then the sensor C is connected in series with the adjacent sensor D in the same column, and the sensor D is connected in series with each sensor in the same column, for example, the sensor D, the sensor E, and the sensor F, and similarly, the sensor O is connected to the output signal line 102 via the output terminal 32 of the corresponding sensor terminal set 30, and 15 sensor terminal sets 30 are connected in series. Based on such a serial connection, at least one input signal line 101 and one output signal line 102 may be provided on the array substrate, and the input signal line 101 and the output signal line 102 may be connected to the first and last two of the multiple sensors connected in series, without vertically penetrating the entire array substrate. Such a serial connection can significantly reduce the number of signal lines compared to the connection between the sensor terminal sets and signal lines corresponding to the multiple sensors shown in FIG. 6, and can save wiring space on the array substrate. In this embodiment, the output terminal 32 of one sensor terminal set 30 of two adjacent sensor terminal sets 30 is electrically connected to the input terminal 31 of the other sensor terminal set 30, so that the two terminals can be connected by providing a lead wire on the second conductive layer 200.

[0083] 16, in one embodiment, the array substrate further includes a plurality of first lead wires 105, which are connected to the output sub-terminals and the input sub-terminals of two adjacent sensor terminal sets 30. The first lead wires 105 include a first column lead wire 1051 extending along the column direction and a first row lead wire 1052 extending along the row direction, each of the first column lead wires 1051 being provided on the first conductive layer 100, each of the first row lead wires 1052 being provided on the second conductive layer 200, and the first column lead wires 1051 and the first row lead wires 1052 being electrically connected by vias. Taking the first lead 105 shown in the figure as an example, the first lead 105 includes one first column lead 1051 and two first row lead 1052, the two first row lead 1052 extend horizontally from the output sub-terminal and the input sub-terminal, respectively, and the two first row lead 1052 are electrically connected to the vertical first column lead 1051 by vias, thereby connecting the output terminals 32 of two adjacent sensor terminal sets 30 to the input terminals 31. FIG. 16(a) shows that the first column lead 1051 and the first row lead 1052 do not cross, and FIG. 16(b) shows that the first column lead 1051 and the first row lead 1052 cross.

[0084] In this embodiment, each first row lead wire 1051 connected to each sensor terminal set 30 located in the same row is arranged along the row direction, so that all first row lead wires 1051 occupy minimal space in the row direction.

[0085] 6, 8, and 14, in these embodiments, the number of power supply signal lines 103 is the same as the number of sensor terminals in the column direction, and in the column direction, the power supply terminals 33 of each sensor terminal set 30 in the same column are connected to the same power supply signal line 103, which makes it possible to reduce the number of power supply signal lines 103. Since the power supply signal lines 103 extend in the column direction, it is possible to connect the power supply terminals 33 to the power supply signal lines 103 by providing horizontal leads on the second conductive layer 200. In the structures as shown in FIGS. 7, 12, and 17, the power supply signal lines 103 and the leads 1051 of the first column are provided side by side, and it is desirable to maintain a sufficient distance between them so that signals do not interfere with each other.

[0086] Similarly, referring to Figures 6, 8 and 14, in these embodiments, the number of first common voltage signal lines 104 is equal to the number of sensor terminal sets 30 in the row direction, and in the column direction, the common voltage terminals 34 of each sensor terminal set 30 in the same column are connected to the same first common voltage signal line 104 (i.e., the second common voltage signal line 201), so that the number of common voltage signal lines can be reduced.

[0087] In one embodiment, the array substrate further includes a common voltage signal line auxiliary line 205 disposed on the second conductive layer 200, and the common voltage signal line auxiliary line 205 is electrically connected to the first common voltage signal line through a via, so that the two-layered line increases the signal transmission path and enhances the signal transmission strength. Referring to Figs. 19 to 21, Fig. 19 shows a configuration of a part of the array substrate in this embodiment. Fig. 20 is a partial enlarged view of the M region in Fig. 19. Fig. 21 is a schematic diagram of the configuration of the sensor terminal set 30 in this embodiment. The figure shows the wiring method of the common voltage signal line auxiliary line 205, in which the common voltage signal line is a grid pattern, covering the adjacent gaps of each light-emitting unit, and in the thickness direction of the array substrate, the common voltage signal line auxiliary line 205 in this embodiment is located above the driving voltage signal line 202. Since both the sensor terminal and the common voltage signal line auxiliary line 205 are located on the second conductive layer 200, the common voltage sub-terminal 34 is directly connected to the common voltage signal line auxiliary line 205. In other embodiments, the common voltage signal line auxiliary line 205 may have other forms, which are not limited by this disclosure.

[0088] In each of the above structures, the terminal set 30 and the corresponding connecting signal lines need to occupy wiring space on the array substrate. In one embodiment, in order to save wiring space, the orthogonal projections of the sensor terminal set 30, the light emitting element terminal set 10 and the driving circuit terminal set 20 on the substrate all at least partially overlap with the orthogonal projection of the second signal line set on the substrate. Furthermore, the orthogonal projections of the sensor terminal set 30 on the substrate and the orthogonal projections of the light emitting element terminal set 10 and the driving circuit terminal set 20 on the substrate are respectively located on the orthogonal projections of different signal lines of the second signal line set on the substrate. Specifically, in the embodiment shown in Figures 1, 9 and 15, the orthogonal projection of the light-emitting element terminal set 10 on the substrate 900, which occupies most of the space, overlaps with the orthogonal projection of the wider second common voltage signal line 201, the orthogonal projection of the driving circuit terminal set 20 on the substrate also overlaps with the orthogonal projection of the second common voltage signal line 201, and the orthogonal projection of the sensor terminal set 30 on the substrate 900 overlaps with the orthogonal projection of the driving voltage signal line 202, thereby saving wiring space.

[0089] Regarding the above-mentioned input signal line 101, output signal line 102, power supply signal line 103, and first lead line 105, each signal line corresponding to the sensor terminal set 30 in each column is located between one second common voltage signal line 201 and one driving voltage signal line 202. In order to effectively utilize the space available for wiring, a slot can be appropriately provided at the end of the second common voltage signal line 201 or the driving voltage signal line 202. When there are at least two signal lines extending in the column direction adjacent to each other in the column direction, the orthogonal projections of any of the lines parallel to the column direction have an overlapping area, and a slot can be arranged to correspond to this overlapping area, so that a larger wiring space can be secured for these at least two adjacent signals, and the utilization rate of the board can be improved. 16(b), since there is an overlapping region in the orthogonal projection of two adjacent first column lead wires 1051 extending in the vertical direction on any straight line parallel to the column direction, it can be understood that the dimension in the column direction occupied by the portion corresponding to the overlapping region of the two first column lead wires 1051 becomes wider (including the line width of a single first column lead wire 1051 and the horizontal distance between the adjacent first column lead wires 1051). By providing the recess 5 on the left side of the second common voltage signal line 201 (i.e., at the position corresponding to the above-mentioned overlapping region), it is possible to make the portion corresponding to the overlapping region of the two first column lead wires 1051 correspond to a large space in the row direction. The shape of the recess 5 can be a rectangle as shown in the figure, but is not limited thereto, and the size and position of the recess 5 can be designed according to the degree of uniformity of the sizes of the respective signal lines and lead wires, and is not particularly limited by the present application.

[0090] 23, in one embodiment, the array substrate further includes some capacitor terminal sets 40, which are provided on the second conductive layer 200 and are used to place the capacitors. The capacitor terminal set 40 includes a first capacitor terminal 41 and a second capacitor terminal 42. The first capacitor terminal 41 is connected to the power supply terminal 33, and the second capacitor terminal 42 is connected to the common voltage terminal 34, thereby reducing noise from the sensor and stabilizing the overall electricity of the array substrate.

[0091] Fig. 22 is a partial enlarged view in which the capacitor terminal set 40 is included in region M in Fig. 18. Fig. 23 is a schematic diagram of the configuration of the capacitor terminal set 40. The array substrate further includes a second lead wire 106 and a third lead wire 107 provided on the second conductive layer 200, one end of the second lead wire 106 is connected to the first capacitor terminal 41 and the other end is connected to the power supply signal line 103 through a via, and one end of the third lead wire 107 is connected to the first capacitor terminal 41 and the other end is connected to the power supply terminal 33 of the sensor terminal set 30.

[0092] As shown in FIG. 23, in this embodiment, the common voltage signal line auxiliary line 205 is provided on the second conductive layer 200, and the common voltage terminal 34 is directly connected to the common voltage signal line auxiliary line 205, so that the second capacitor terminal 42 of the capacitor terminal set 40 is also connected to the common voltage signal line auxiliary line 205, i.e., electrically connected to the first common voltage signal line 104, and the static electricity generated in the vicinity is transmitted to the common voltage signal line, thereby avoiding damage to the array substrate caused by static electricity. Note that the common voltage terminal 34, the second capacitor terminal 42, and the common voltage signal line auxiliary line are all set on the second conductive layer 200, and the common voltage signal line auxiliary line 205 and other signal lines set on the second conductive layer need to be covered with an insulating layer to prevent the lines from being oxidized and affecting the electrical performance, and the upper surface of each terminal set on the second conductive layer needs to be electrically connected to the components, so that it is exposed to the outside. Therefore, the common voltage terminal 34 and the second capacitor terminal 42 can also be seen as part of the common voltage signal line auxiliary line 205.

[0093] It should be noted that both "extending in the row direction" and "extending in the column direction" in this disclosure refer to the entire signal line being along the row or column direction, and are not limited to a standard straight line, which may be partially bent to avoid other line structures or tilts in the process errors.

[0094] The array substrate provided by the embodiment of the present disclosure can be used both as a substrate having a light-emitting function to mount light-emitting elements, and as a backlight unit applied to a display device.

[0095] After the light emitting element, the sensor and the driver chip are installed on the array substrate of the present disclosure, a hemispherical microstructure can be formed above the light emitting element, the sensor and the driver chip to protect the above structures from being scratched during the manufacturing and transporting process. Specifically, by making the microstructure above the light emitting element a light-transmitting material, for example, the light emitted from the light emitting element can be further improved by the optical shaping effect of improving the light efficiency or increasing the emitted light from the equidistant direction, and the microstructure above the sensor and the driver chip can be made of a transparent material or a material with a light absorbing effect, but is not limited thereto.

[0096] The embodiment of the present invention also provides a display device comprising the array substrate of the above embodiment. Since the display device includes the array substrate as described above, it has the same beneficial effects, and the description of the present invention is omitted here.

[0097] The present invention is not particularly limited in terms of applicability of the display device, and it may be applicable to televisions, notebook computers, tablet terminals, wearable display devices, mobile phones, in-vehicle displays, navigation systems, e-books, digital photo frames, advertising light boxes, and other products or parts having a flexible display function.

[0098] Other embodiments provided by the embodiments of the present disclosure will be readily suggested to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. The present application is intended to cover any modifications, uses, or adaptations, including those technical means generally known or customary in the art, that follow the general principles provided by the embodiments of the present disclosure, but which are not disclosed herein. The present description and embodiments are considered to be exemplary only, with the true scope and spirit provided by the embodiments of the present disclosure being indicated by the appended claims. [Explanation of symbols]

[0099] 100 First conductive layer 200 Second conductive layer 300 Insulation layer 400 Insulation Layer 900 Base Board 10 Light emitting element terminal set 11 Anode terminal 12 Cathode terminal 101 Light Emitting Unit 20 Drive circuit terminal set 21 Input terminal 22 Power terminal 23 Output terminal 24 First common voltage terminal 30 Sensor Terminal Set 31 Input terminal 32 Output terminal 33 Power terminal 34 Second common voltage terminal 40 Capacitor Terminal Set 41 First capacitor terminal 42 Second capacitor terminal 101 Input signal line 102 Output signal line 103 Power signal line 104 First common voltage signal line 105 First Lead 1051 First row lead wire 1052 First row lead 106 Second Lead 107 Third Lead 108 4th Lead 201 Second common voltage signal line 202 Drive voltage signal line 203 Power line 204 Source Address Line 205 Common voltage signal line auxiliary line 5 Slots

Claims

1. An array substrate including a base substrate having a first conductive layer and a second conductive layer that are insulated from each other and laminated thereon, the array substrate further includes a plurality of light-emitting element terminal sets arranged in an array, a plurality of sensor terminal sets, a first signal line set, and a second signal line set; the plurality of light-emitting element terminal sets are provided on the second conductive layer and coupled to the light-emitting elements; the plurality of sensor terminal sets are provided on the second conductive layer and coupled to a sensor, the orthogonal projection of the sensor terminal sets onto the base substrate does not overlap with the orthogonal projection of the light-emitting element terminal set onto the base substrate; the first signal line set is provided on the first conductive layer and electrically connected to the sensor terminal set to drive the sensor to perform sensing; the second signal line set is provided on the first conductive layer and electrically connected to the light-emitting element terminal set to drive the light-emitting element to emit light; the sensor terminal set includes an input terminal, an output terminal, a power supply terminal, and a common voltage terminal, and the corresponding sensor includes an input pin, an output pin, a power supply pin, and a common voltage pin, the input terminal is electrically connected to the input pin, the output terminal is electrically connected to the output pin, the power supply terminal is electrically connected to the power supply pin, and the common voltage terminal is electrically connected to the common voltage pin; the first set of signal lines includes an input signal line, an output signal line, a power supply signal line, and a first common voltage signal line; the input terminal is electrically connected to the input signal line, the output terminal is electrically connected to an output signal line, the power supply terminal is electrically connected to a power supply signal line, and the common voltage terminal is electrically connected to a first common voltage signal line; The plurality of sensor terminal sets are uniformly arranged in an array along row and column directions, the number of the input signal lines and the number of the output signal lines are both 1; In the column direction, in two adjacent sensor terminal sets located in the same column, an output terminal of one of the sensor terminal sets is electrically connected to an input terminal of the other sensor terminal set, and in the sensor terminal sets in two adjacent columns, an output terminal connected to the sensor terminal set in the first or last row of one column is electrically connected to an input terminal of the sensor terminal set located in the first or last row of the other column, thereby connecting all of the sensors in series; In all the sensor terminal sets connected in series, the input terminal of the sensor terminal set located at one end is connected to the input signal line, and the output terminal of the sensor terminal set located at the other end is connected to the output signal line.

1. An array substrate comprising:

2. in the first signal line set, the number of the input signal lines is equal to the number of rows of the sensor terminal set, and the number of the output signal lines is equal to the number of rows of the sensor terminal set; In the column direction, in two adjacent sensor terminal sets located in the same column, the output terminal of one of the sensor terminal sets is electrically connected to the input terminal of the other sensor terminal set, and in the sensor terminal sets located in the same column, the input terminal of the first sensor terminal set is connected to the input signal line and the output terminal of the last sensor terminal set is connected to the output signal line, so that all of the sensors in each column are connected in series.

2. The array substrate according to claim 1.

3. in the first signal line set, the number of the input signal lines is equal to the number of rows of the sensor terminal set, and the number of the output signal lines is equal to the number of rows of the sensor terminal set; In the column direction, the input terminals of the sensor terminal sets located in the same column are connected to the same input signal line, and the output terminals of the sensor terminal sets located in the same column are connected to the same output signal line.

2. The array substrate according to claim 1.

4. In the first signal line set, the number of the power supply signal lines is equal to the number of the sensor terminal sets in the row direction; In the column direction, the power supply terminals of each of the sensor terminal sets in the same column are connected to the same power supply signal line.

4. The array substrate according to claim 1, wherein the first and second electrodes are arranged on the first and second substrates.

5. In the first signal line set, the number of the first common voltage signal lines is equal to the number of the sensor terminal sets in the row direction; In the column direction, the common voltage terminals of the sensor terminal sets in the same column are connected to the same first common voltage signal line.

4. The array substrate according to claim 1, wherein the first and second electrodes are arranged on the first and second substrates.

6. the array substrate further includes a plurality of first lead wires, the first lead wires being connected to the output terminals and the input terminals of two adjacent sensor terminal sets; The first lead wires include a first column lead wire extending in the column direction and a first row lead wire extending in the row direction, each of the first column lead wires being provided on the first conductive layer, each of the first row lead wires being provided on the second conductive layer, and the first column lead wires being electrically connected to the first row lead wires by vias.

3. The array substrate according to claim 1, wherein the first and second electrodes are arranged on the first and second substrates.

7. The lead wires of the first row connected to the sensor terminal sets located in the same row are arranged at intervals along the row direction.

7. The array substrate according to claim 6.

8. the array substrate includes a plurality of capacitor terminal sets; A plurality of capacitor terminal sets are provided on the second conductive layer and are used for arranging capacitors, the capacitor terminal sets including a first capacitor terminal and a second capacitor terminal, the first capacitor terminal is connected to the power supply terminal, and the second capacitor terminal is connected to the common voltage terminal.

2. The array substrate according to claim 1.

9. The array substrate further includes a second lead wire and a third lead wire provided on the second conductive layer, the second lead wire being connected to the first capacitor terminal and the power supply signal line, and the third lead wire being connected to the first capacitor terminal and the power supply terminal of the sensor terminal set.

9. The array substrate according to claim 8.

10. the second signal line set includes a second common voltage signal line, a driving voltage signal line, a source power supply line, and a source address line; The second common voltage signal line is used as the first common voltage signal line.

2. The array substrate according to claim 1.

11. The orthogonal projection of the sensor terminal set onto the base substrate and the orthogonal projection of the second signal line set onto the base substrate at least partially overlap with each other.

11. The array substrate according to claim 10.

12. The orthogonal projection of the sensor terminal set onto the base substrate and the orthogonal projection of the light-emitting element terminal set onto the base substrate are respectively located at orthogonal projections of different signal lines in the second signal line set onto the base substrate.

12. The array substrate according to claim 11.

13. The orthogonal projection of the sensor terminal set onto the base substrate overlaps with the orthogonal projection of the driving voltage signal line, and the orthogonal projection of the light-emitting element terminal set onto the base substrate overlaps with the orthogonal projection of the second common voltage signal line.

13. The array substrate according to claim 12.

14. The input signal line, the output signal line and the power supply signal line are located between the second common voltage signal line and the drive voltage signal line.

11. The array substrate according to claim 10.

15. The array substrate further includes an auxiliary common voltage signal line provided on the second conductive layer, the auxiliary common voltage signal line being electrically connected to the first common voltage signal line through a via.

11. The array substrate according to claim 10.

16. the array substrate further includes a fourth lead wire provided on the second conductive layer, the fourth lead wire sequentially connecting a plurality of the light-emitting element terminal sets, and the plurality of light-emitting elements are connected in series as a light-emitting unit; The sensor terminal set is located in a gap between two adjacent light emitting units, or is located between each of the light emitting element terminal sets in the light emitting unit.

11. The array substrate according to claim 10.

17. the array substrate further includes a driving circuit terminal set; A driving circuit terminal set is provided on the second conductive layer and is used to be coupled to a driving circuit, and an orthogonal projection of the driving circuit terminal set onto the base substrate does not overlap with an orthogonal projection of the light emitting element terminal set and the sensor terminal set onto the base substrate.

17. The array substrate according to claim 16.

18. The orthogonal projection of the drive circuit terminal set onto the base substrate and the orthogonal projection of the second signal line set onto the base substrate at least partially overlap, and the orthogonal projection of the drive circuit terminal set onto the base substrate and the orthogonal projection of the sensor terminal set onto the base substrate are respectively located at orthogonal projections of different signal lines in the second signal line set onto the base substrate.

18. The array substrate according to claim 17.

19. The light emitting device terminal sets located at the outermost positions in each of the light emitting units are connected in sequence to form a polygon, and the driving circuit terminal sets are located outside the polygon.

20. The array substrate according to claim 18.

20. The array substrate includes the light-emitting units in P rows and Q columns, each of the driving circuit terminal sets drives the light-emitting units, and the positions of the driving circuit terminal sets corresponding to the four light-emitting units with coordinates (a, b), (a+1, b), (a, b+1), and (a+1, b+1) form a convex quadrilateral, where 1≦a≦P and 1≦b≦Q.

18. The array substrate according to claim 17.

21. The convex quadrilateral is composed of two isosceles triangles, and the isosceles triangles are composed of positions of any three driving circuit terminal sets of the four light-emitting units.

21. The array substrate according to claim 20.

22. An array substrate according to any one of claims 1 to 21, a light emitting device coupled to the light emitting device terminal set of the array substrate; a sensor coupled to the sensor terminal set of the array substrate. A light-emitting substrate comprising:

23. The light emitting substrate according to claim 22 A display device comprising:

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