Pixel driving circuit, driving method thereof, and display device

Abstract

The present application provides a pixel driving circuit and its driving method, and a display panel (40). The pixel driving circuit includes a driving transistor (T0), a storage capacitor (C), a flip-flop (U1), a first response switch (T1), and a second response switch (T2), in which a first end of the driving transistor (T0) is connected to a power supply end (10), a second end of the driving transistor (T0) is connected to a light emitting unit (20), a control end is connected to a first end of the storage capacitor (C), a second end of the storage capacitor (C) is connected to the power supply end (10), and a first end of the first response switch (T1) is connected to a data line ( data), a control end is connected to the scan line (scan) and a second end is connected to a first end of the storage capacitor (C), an input end of the flip-flop (U1) is connected to the scan line (scan), a first end of the second response switch (T2) is connected to the second end of the driving transistor (T0), a second end of the second response switch (T2) is connected to the initial voltage end (30), and the control end of the second response switch (T2) is connected to the output end of the flip-flop (U1).

Description

[Technical field]

[0001] This application claims priority to a Chinese patent application filed with the China Patent Office on October 12, 2022, bearing application number CN202211244269.5 and entitled "Pixel driving circuit and driving method thereof, and display device", the entire contents of which are incorporated herein by reference.

[0002] The present application relates to the field of display technology, and in particular to a pixel driving circuit and a driving method thereof, and a display device. [Background technology]

[0003] In a display panel, a storage capacitor is provided in the pixel driving circuit of an AMOLED (Active-matrix organic light-emitting diode), and the presence of the storage capacitor generates a coupling capacitance in the driving transistor. The presence of the coupling capacitance increases the charging time of the driving light-emitting capacitor, delays the emission of the light-emitting unit, and slows the response speed of the entire display panel. Summary of the Invention

[0004] The present application provides a pixel driving circuit, a driving method thereof, and a display device, which can reduce coupling capacitance, reduce the light emission delay of a light emitting unit, and improve the response speed of the entire display panel.

[0005] According to an aspect of the present application, the present application provides a pixel driving circuit, the pixel driving circuit including a driving transistor and a storage capacitor, a first end of the driving transistor is connected to a power supply end, a second end of the driving transistor is connected to a light emitting unit, a control end is connected to a first end of the storage capacitor, and a second end of the storage capacitor is connected to the power supply end; The pixel driving circuit further includes a first response switch, a first end of the first response switch is connected to a data line, a control end of the first response switch is connected to a scanning line, and a second end of the first response switch is connected to a first end of the storage capacitance, and the control end is configured to provide a data signal provided from the data line to the first end of the storage capacitance in response to a scanning signal provided from the scanning line; the pixel driving circuit further includes a flip-flop and a second response switch; an input terminal of the flip-flop is connected to the scan line, and the flip-flop generates a first control signal in response to a scan signal of the scan line; A first end of the second response switch is connected to the second end of the driving transistor, a second end of the second response switch is connected to an initial voltage end, a control end of the second response switch is connected to the output end of the flip-flop, and the control end of the second response switch provides the voltage of the initial voltage end to the second end of the driving transistor in response to the first control signal.

[0006] According to another aspect of the present application, the present application also provides a driving method for a pixel driving circuit, the pixel driving circuit including a driving transistor, a storage capacitor, a flip-flop, a first response switch, and a second response switch, the first end of the driving transistor is connected to a power supply end, the second end of the driving transistor is connected to a light-emitting unit, a control end is connected to the first end of the storage capacitor, and the second end of the storage capacitor is connected to the power supply end; A first end of the first response switch is connected to a data line, a control end is connected to a scanning line, and a second end is connected to the first end of the storage capacitor, an input end of the flip-flop is connected to the scanning line, a first end of the second response switch is connected to the second end of the driving transistor, a second end of the second response switch is connected to an initial voltage end, and a control end of the second response switch is connected to an output end of the flip-flop; The driving method of the pixel driving circuit includes: controlling the scan line to provide a scan signal, an input end of the flip-flop receiving the scan signal, the flip-flop generating a first control signal in response to the scan signal; The control end of the second responsive switch responds to the first control signal to provide the voltage of the initial voltage end to the second end of the driving transistor.

[0007] According to yet another aspect of the present application, the present application also provides a display panel, the display panel including a display area and a non-display area surrounding the display area, the display panel including a gate drive circuit and a pixel drive circuit as described above, the gate drive circuit being disposed in the non-display area and the pixel drive circuit being disposed in the display area, the gate drive circuit being connected to the pixel drive circuit, and the gate drive circuit being configured to provide a scanning signal to the pixel drive circuit.

[0008] In the technical solution of the present application, the scanning line provides a scanning signal, and the control end of the first response switch responds to the scanning signal, so that the first and second ends of the first response switch are turned on, and the data signal provided by the data line is provided to the first end of the storage capacitance through the first response switch. The second end of the storage capacitance is connected to the power supply end, and the driving transistor is turned on through the cooperation of the voltage of the power supply end and the voltage of the data signal. Thus, the voltage of the power supply end is output to the light-emitting unit through the driving transistor, so that the light-emitting unit can be surely lit. Here, the input end of the flip-flop generates a first control signal after receiving the scanning signal, and the first control signal is transmitted to the second response switch. The control end of the second response switch responds to the first control signal, so that the first and second ends of the second response switch are turned on. In this way, the voltage of the initial voltage end is provided to the second end of the driving transistor through the second response switch. When the voltage initialization of the second end of the driving transistor is completed, the coupling capacitance is reduced or eliminated, so that the light emission delay of the light emitting unit is reduced and the response speed of the entire display panel is improved.

[0009] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. [Brief description of the drawings]

[0010] The above and other objects, features and advantages of the present invention will become more apparent from the following detailed description of illustrative embodiments thereof taken in conjunction with the accompanying drawings. [Figure 1] 1 is a circuit schematic diagram of a pixel driving circuit according to a first embodiment of the present application. [Diagram 2] FIG. 2 is a circuit schematic diagram of a pixel driving circuit of FIG. 1 in the present application that provides a third response switch. [Diagram 3] 3 is another connection method of the third response switch in the pixel driving circuit of FIG. 2 of the present application. [Figure 4] FIG. 4 is a schematic diagram of steps of a driving method for a pixel driving circuit in a second embodiment of the present application. [Diagram 5] 4 is a schematic flowchart of step S30 of the driving method of the pixel driving circuit of the present application. [Figure 6] FIG. 11 is a schematic diagram illustrating the configuration of a display panel according to a third embodiment of the present application. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] It should also be understood that while the present application may be readily embodied in different forms, only some of the specific embodiments have been shown in the drawings and are described in detail herein, and that this description is for illustrative purposes only and is not intended to limit the present application to the specific embodiments set forth herein.

[0012] Thus, a feature described herein is used to describe one of the features of one embodiment of the present application, but does not mean that all embodiments of the present application must include the described feature. Furthermore, it is noted that many features are described herein. Although some features may be combined to illustrate possible system designs, these features may also be used in other combinations not explicitly shown. Thus, unless otherwise stated, the described combinations are not intended to be limiting.

[0013] In the embodiments shown in the drawings, directional designations (e.g., up, down, left, right, front, back, etc.) are used to describe the structure and operation of each element of the present application in a relative, rather than absolute, manner. These descriptions are appropriate when the elements are in the positions shown in the drawings. If the description of the positions of these elements is changed, these directional designations will be changed accordingly.

[0014] Next, exemplary embodiments will be described in more detail with reference to the accompanying drawings. However, exemplary embodiments can be embodied in various forms, and should not be construed as being limited to the examples described herein, but rather, providing these exemplary embodiments will ensure that the description of the present application is thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The drawings are merely schematic diagrams of the present application, and are not necessarily drawn to scale. In the drawings, the same reference numerals indicate the same or similar parts, and therefore repeated descriptions thereof will be omitted.

[0015] Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the accompanying drawings of this specification.

[0016] Example 1 1, the present application provides a pixel driving circuit, which is provided with a light emitting unit 20, and the display principle of the light emitting unit 20 may be AMOLED active matrix organic light emitting diode or LCD (Liquid Crystal Display). In manufacturing the pixel driving circuit, the pixel driving circuit can be made of amorphous silicon (A-Si), indium gallium zinc oxide (IGZO), low temperature polysilicon (LTPS), etc.

[0017] The pixel driving circuit includes a driving transistor T0 and a storage capacitance C, a first end of the driving transistor T0 is connected to a power supply end 10, a second end of the driving transistor T0 is connected to a light-emitting unit 20, a control end is connected to a first end of the storage capacitance C, and a second end of the storage capacitance C is connected to a power supply end 10. The power supply end 10 is used to supply power for lighting the light-emitting unit 20. The storage capacitance C includes two electrode plates, a first electrode plate and a second electrode plate, which are arranged opposite to each other, and the first electrode plate can be understood as a first end and the second electrode plate as a second end.

[0018] The pixel driving circuit further includes a first response switch T1, a first end of the first response switch T1 is connected to the data line data, a control end is connected to the scanning line scan, and a second end is connected to the first end of the storage capacitance C, and the control end is used to provide a data signal provided by the data line data to the first end of the storage capacitance C in response to a scanning signal provided by the scanning line scan.

[0019] When driving the light emitting unit 20 to light, the scan line scan sends a scanning signal to the first response switch T1, and after the control end of the first response switch T1 receives the scanning signal, the first end and the second end of the first response switch T1 are turned on, and at this time, the data line data provides a data signal to the first response switch T1. When the first end and the second end of the first response switch T1 are turned on, the data signal is provided to the first end of the storage capacitance C through the first response switch T1, and the data signal can directly charge the storage capacitance C, thereby affecting the voltage stored in the storage capacitance C, and controlling the opening and closing of the driving transistor T0.

[0020] Among them, the storage capacitance C is used to store a voltage in advance, and by storing the voltage in advance, it can be associated with the threshold voltage of the driving transistor T0, so that when the light-emitting unit 20 is turned on, the storage voltage stored in the storage capacitance C and the threshold voltage of the driving transistor T0 can cancel each other out, preventing the threshold voltage of the driving transistor T0 from affecting the lighting of the light-emitting unit 20. For example, the storage capacitance C is pre-charged through the power supply terminal 10 or the data line data until the driving transistor T0 is turned on, and then the charging process of the storage capacitance C is completed. The storage capacitance C starts to continuously discharge, and the power gradually decreases. If the power stored in the storage capacitance C is enough to turn off the driving transistor T0, the voltage stored in the storage capacitance C will be equal to the threshold voltage of the driving transistor T0.

[0021] The pixel driving circuit further includes a flip-flop U1 and a second response switch T2. The input end of the flip-flop U1 is connected to the scan line scan, and the flip-flop U1 generates a first control signal in response to the scanning signal of the scan line scan, the first end of the second response switch T2 is connected to the second end of the driving transistor T0, the second end of the second response switch T2 is connected to the initial voltage end 30, and the control end of the second response switch T2 is connected to the output end of the flip-flop U1, and the control end of the second response switch T2 provides the voltage of the initial voltage end 30 to the second end of the driving transistor T0 in response to the first control signal. The voltage of the initial voltage end 30 is low, lower than the lighting voltage of the light-emitting unit 20.

[0022] In the solution of this embodiment, the scan line scan provides a scanning signal, and the control end of the first response switch T1 responds to the scanning signal, so that the first and second ends of the first response switch T1 are turned on, and the data signal provided by the data line data is provided to the first end of the storage capacitor C through the first response switch T1. The second end of the storage capacitor C is connected to the power supply end 10, and the driving transistor T0 is turned on through the cooperation of the voltage of the power supply end 10 and the voltage of the data signal. Thus, the voltage of the power supply end 10 is output to the light-emitting unit 20 through the driving transistor T0, so that the light-emitting unit 20 can be surely lit. Here, the input end of the flip-flop U1 generates a first control signal after receiving the scanning signal, and the first control signal is transmitted to the second response switch T2. The control end of the second response switch T2 responds to the first control signal, so that the first and second ends of the second response switch T2 are turned on. In this way, the voltage of the initial voltage terminal 30 is provided to the second terminal of the driving transistor T0 through the second response switch T2. When the voltage initialization of the second terminal of the driving transistor T0 is completed, the coupling capacitance is reduced or eliminated, thereby reducing the light emission delay of the light emitting unit 20 and improving the response speed of the entire display panel 40.

[0023] Furthermore, by providing the flip-flop U1, when initializing the voltage of the driving transistor T0, the existing scanning line scan is used without adding a new wiring, and the flip-flop U1 receives the scanning signal of the scanning line scan to generate a first control signal, and the control of the initial voltage terminal 30 is completed by the first control signal. That is, one scanning line scan can not only control the on-state of the first response switch T1, but also synchronously control the on-state of the second response switch T2.

[0024] The input terminal of the flip-flop U1 includes a first input terminal and a second input terminal, both of which are connected to the scan line scan, and the pixel driving circuit further includes an inverter U2, one terminal of the inverter U2 is connected to the second input terminal, and the other terminal is connected to the scan line scan. The signal flowing to the second input terminal first passes through the inverter U2, which is configured to invert the phase of the scanning signal by 180 degrees. This ensures that the signals received at the first input terminal and the second input terminal are different, and ensures that the flip-flop U1 operates smoothly. For example, if the signal received at the first input terminal is 0, the signal received at the second input terminal is 1. Conversely, if the signal received at the first input terminal is 1, the signal received at the second input terminal is 0.

[0025] In order to prevent the signal voltage received by the flip-flop U1 from becoming too large, the pixel driving circuit further includes a current limiting resistor R, one end of which is connected to the scan line scan, and the other end of which is connected to the inverter U2 and the first input terminal, respectively. That is, before the scanning signal flows to the first input terminal and the second input terminal of the flip-flop U1, the scanning signal first passes through the current limiting resistor R, and is divided by the current limiting resistor R, thereby reducing the current value of the first input terminal and the second input terminal, and preventing the flip-flop U1 from being destroyed by overcurrent.

[0026] In the related art, the light-emitting unit 20 is easily affected by the external environment, which results in the brightness of the light-emitting unit 20 being unstable, and even flickering after being shut down.

[0027] Referring to FIG. 2, for this purpose, the pixel driving circuit further includes a third response switch T3, a first end of the third response switch T3 is connected to a first end of the second response switch T2, and a second end of the third response switch T3 is connected to the light-emitting unit 20.

[0028] The output terminal of the flip-flop U1 includes a first output terminal and a second output terminal, the first output terminal is configured to provide a first control signal, the second output terminal is configured to provide a second control signal, the second output terminal is connected to the control terminal of the third response switch T3, and the control terminal of the third response switch T3 turns on the first terminal and the second terminal of the third response switch T3 in response to the second control signal.

[0029] The first control signal and the second control signal are both generated based on the scanning signal, the first control signal is output from the first output terminal, and the second control signal is output from the second output terminal, and the signals at the first output terminal and the second output terminal are different. When the first control signal is at a low level, the second control signal is at a high level. When the first control signal is at a high level, the second control signal is at a low level.

[0030] Then, in the case of initialization of the driving transistor T0, the first control signal is at a low level, and the control terminal of the second response switch T2 responds to the low-level first control signal, so that the first terminal and the second terminal of the second response switch T2 are turned on, and the voltage of the initial voltage terminal 30 is output to the second terminal of the driving transistor T0, thereby completing the initialization of the driving transistor T0.

[0031] At the same time, if the second control signal is at a high level, the control end of the third response switch T3 is turned off according to the second control signal at a high level, and the first and second ends of the third response switch T3 are turned off. The anode of the light-emitting unit 20 is disconnected from the driving transistor T0, and the light-emitting unit 20 is not affected by the external environment. The initial voltage end 30, the power supply end 10, or the storage capacitance C are all disconnected from the light-emitting unit 20. In this way, the voltage of the initial voltage end 30, the voltage of the power supply end 10, or the voltage stored in the storage capacitance C can not act on the light-emitting unit 20, which ensures that the light-emitting unit 20 presents a uniform black display and avoids screen flicker.

[0032] In this technical solution, the cooperation of one scan line scan and flip-flop U1 not only completes the transmission of data signals, but also controls the second response switch T2 to complete the initialization of the driving transistor T0, and controls the third response switch T3 to isolate the light-emitting unit 20 from the outside world, ensuring that the light-emitting unit 20 displays a uniform black display when it does not need to emit light. That is, one scan line scan can control the opening and closing of three response switches, simplifying the circuit design.

[0033] Moreover, the flip-flop U1 is an SR flip-flop U1, with the first input terminal being the S input terminal, the second input terminal being the R input terminal, the first output terminal being the Q output terminal, and the second output terminal being the Q' output terminal.

[0034] In this embodiment, the inverter U2 is provided to invert the signals input to the first input terminal and the second input terminal. For example, when a 0 signal representing a low level is input to the S input terminal, a 1 signal is input to the R input terminal, and at this time, the Q output terminal is at a low level, that is, the first control signal is at a low level. The control terminal of the second response switch T2 turns on the first terminal and the second terminal in response to the low level of the Q output terminal. The Q' output terminal outputs a high level, that is, the second control signal is at a high level, and the control terminal of the third response switch T3 turns off the first terminal and the second terminal in response to the high level output from the Q' output terminal. The SR flip-flop is further provided with a clock signal terminal CLK, which is configured to receive a clock pulse signal to control the on-state of the SR flip-flop.

[0035] It should be emphasized that the present application can control the on-timing of the SR flip-flop through the clock pulse signal, so as to flexibly control the on-timing of the second response switch T2, thereby avoiding the situation that the driving transistor T0 is turned on after the storage capacitance C is charged, which affects the anode initialization of the light-emitting unit 20.

[0036] An SR flip-flop can also be provided to ensure that the low level of the Q output is applied to the second response switch T2. In general, the gate drive voltage required to turn on the second response switch T2 is smaller than the gate drive voltage of the first response switch T1. This configuration requires less line control and reduces costs.

[0037] In order to ensure that the response switch effectively responds to the corresponding control signal, the driving transistor T0, the first response switch T1, the second response switch T2, and the third response switch T3 are all P-type tubes. That is, the first response switch T1, the second response switch T2, and the third response switch T3 are the same model number, and are all P-type field effect transistors. After the control end of the P-type field effect transistor receives a low level signal, the first end and the second end are turned on. After the control end of the P-type field effect transistor receives a high level signal, the first end and the second end are turned off.

[0038] Here, the first end of the responsive switch is understood as a source and the second end is understood as a drain. Of course, the first end of the responsive switch can also be understood as a drain and the second end as a source. Here, the control end of the responsive switch is a gate.

[0039] The first control signal is a low level signal, and the second control signal is a high level signal. The first and second ends of the second response switch T2 are turned on under the control of the low level signal of the first control signal, and the first and second ends of the third response switch T3 are turned off under the control of the high level signal of the second control signal.

[0040] Of course, the first response switch T1, the second response switch T2 and the third response switch T3 may be N-type field effect transistors. The N-type field effect transistor responds to a high level, and when the control end of the N-type field effect transistor receives a high level, the one end and the second end of the N-type field effect transistor are turned on. When the control end of the N-type field effect transistor receives a low level, the first end and the second end of the N-type field effect transistor are turned off.

[0041] 3, the driving transistor T0 and the first response switch T1 may be configured as P-type field effect transistors, and the second response switch T2 and the third response switch T3 may be configured as N-type field effect transistors. At this time, the control end of the second response switch T2 is connected to the second output end, i.e., the Q' output end. When a high level of the second control signal is output to the control end of the second response switch T2, the first end and the second end of the second response switch T2 are turned on, and the voltage of the second end of the driving transistor T0 is initialized.

[0042] The control end of the third response switch T3 is connected to the first output end, i.e. the Q output end. When the low level of the first control signal is output to the control end of the third response switch T3, the first and second ends of the third response switch T3 are turned off, so that the light-emitting unit 20 is disconnected from the environment.

[0043] Example 2 Referring to FIG. 4, the present invention also provides a driving method for a pixel driving circuit, which includes a driving transistor T0, a storage capacitance C, a flip-flop U1, a first response switch T1 and a second response switch T2, wherein the driving transistor T0 has a first end connected to a power supply end 10, a second end connected to a light-emitting unit 20, a control end connected to a first end of the storage capacitance C, and a second end of the storage capacitance C connected to the power supply end 10.

[0044] The first response switch T1 has a first terminal connected to the data line data, a control terminal connected to the scanning line scan, and a second terminal connected to the first terminal of the storage capacitance C, the input terminal of the flip-flop U1 is connected to the scanning line scan, the first terminal of the second response switch T2 is connected to the second terminal of the driving transistor T0, the second terminal of the second response switch T2 is connected to the initial voltage terminal 30, and the control terminal of the second response switch T2 is connected to the output terminal of the flip-flop U1.

[0045] The driving method of the pixel driving circuit includes step S10 and step S20.

[0046] In step S10, the scan line scan is controlled to provide a scan signal, the input terminal of the flip-flop U1 receives the scan signal, and the flip-flop U1 generates a first control signal in response to the scan signal.

[0047] In step S20, the control end of the second responsive switch T2 provides the voltage of the initial voltage end 30 to the second end of the driving transistor T0 in response to the first control signal.

[0048] Through the scanning signal provided by the scanning line scan, the control end of the first response switch T1 responds to the scanning signal, and the first and second ends of the first response switch T1 are turned on, and the data signal provided by the data line data is provided to the first end of the storage capacitor C through the first response switch T1. The second end of the storage capacitor C is connected to the power supply end 10, and the driving transistor T0 is turned on by the cooperation of the voltage of the power supply end 10 and the voltage of the data signal. Thus, the voltage of the power supply end 10 is output to the light emitting unit 20 through the driving transistor T0, so that the light emitting unit 20 can be surely lit. Here, the input end of the flip-flop U1 generates a first control signal after receiving the scanning signal, and the first control signal is transmitted to the second response switch T2. The control end of the second response switch T2 responds to the first control signal, and the first and second ends of the second response switch T2 are turned on. In this way, the voltage of the initial voltage terminal 30 is provided to the second terminal of the driving transistor T0 through the second response switch T2. When the voltage initialization of the second terminal of the driving transistor T0 is completed, the coupling capacitance is reduced or eliminated, thereby reducing the light emission delay of the light emitting unit 20 and improving the response speed of the entire display panel 40.

[0049] Referring to FIG. 5, the pixel driving circuit further includes a third response switch T3, a first end of the third response switch T3 is connected to a first end of the second response switch T2, and a second end of the third response switch T3 is connected to the light-emitting unit 20, and the output end of the flip-flop U1 includes a first output end and a second output end, the first output end is connected to the control end of the second response switch T2, and the second output end is connected to the control end of the third response switch T3.

[0050] The step of flip-flop U1 generating the first control signal in response to the scan signal includes the following steps S110 and S120.

[0051] In step S110, flip-flop U1 generates a first control signal and a second control signal in response to the scan signal.

[0052] In step S120, the first control signal is provided to the control end of the second response switch T2 via the first output end, and the second control signal is provided to the control end of the third response switch T3 via the second output end.

[0053] After the step of flip-flop U1 generating a first control signal in response to the scan signal, a step S30 is included.

[0054] In step S30, the control end of the third response switch T3 responds to the second control signal, so that the first end and the second end of the third response switch T3 are turned off.

[0055] The driving transistor T0, the first response switch T1, the second response switch T2, and the third response switch T3 are all P-type field effect transistors. Then, when the driving transistor T0 is initialized, the first control signal is at a low level, and the control end of the second response switch T2 responds to the first control signal at a low level, so that the first end and the second end of the second response switch T2 are turned on, and the voltage of the initial voltage end 30 is output to the second end of the driving transistor T0, thereby completing the initialization of the driving transistor T0.

[0056] At the same time, if the second control signal is at a high level, the control end of the third response switch T3 is turned off according to the second control signal at a high level, and the first and second ends of the third response switch T3 are turned off. The anode of the light-emitting unit 20 is disconnected from the driving transistor T0, and the light-emitting unit 20 is not affected by the external environment. The initial voltage end 30, the power supply end 10, or the storage capacitance C are all disconnected from the light-emitting unit 20. In this way, the voltage of the initial voltage end 30, the voltage of the power supply end 10, or the voltage stored in the storage capacitance C can not act on the light-emitting unit 20, which ensures that the light-emitting unit 20 presents a uniform black display and avoids screen flicker.

[0057] Example 3 6, the present invention also provides a display panel 40. The display panel 40 includes a display area 410 and a non-display area 420 surrounding the display area 410, and the display panel 40 includes a gate drive circuit and a pixel drive circuit, the gate drive circuit is disposed in the non-display area 420, the pixel drive circuit is disposed in the display area 410, the gate drive circuit is connected to the pixel drive circuit, and the gate drive circuit is configured to provide a scanning signal to the pixel drive circuit. By disposing the gate drive circuit in the non-display area 420, interference with the display screen can be avoided.

[0058] The pixel driving circuit includes a driving transistor T0 and a storage capacitance C, a first end of the driving transistor T0 is connected to a power supply end 10, a second end of the driving transistor T0 is connected to the light-emitting unit 20, a control end is connected to a first end of the storage capacitance C, and a second end of the storage capacitance C is connected to the power supply end 10, which is configured to supply power for lighting the light-emitting unit 20. The storage capacitance C includes two electrode plates, a first electrode plate and a second electrode plate, which are arranged opposite to each other, and the first electrode plate can be understood as a first end and the second electrode plate as a second end.

[0059] The pixel driving circuit further includes a first response switch T1, a first end of the first response switch T1 is connected to the data line data, a control end is connected to the scanning line scan, and a second end is connected to the first end of the storage capacitance C, and the control end is configured to provide a data signal provided by the data line data to the first end of the storage capacitance C in response to a scanning signal provided by the scanning line scan.

[0060] When driving the light emitting unit 20 to light, the scan line scan sends a scanning signal to the first response switch T1, and after the control end of the first response switch T1 receives the scanning signal, the first end and the second end of the first response switch T1 are turned on, and at this time, the data line data provides a data signal to the first response switch T1. When the first end and the second end of the first response switch T1 are turned on, the data signal is provided to the first end of the storage capacitance C through the first response switch T1, and the data signal can directly charge the storage capacitance C, thereby affecting the voltage stored in the storage capacitance C, and controlling the opening and closing of the driving transistor T0.

[0061] Among them, the storage capacitance C is configured to store a voltage in advance, and by storing the voltage in advance, it can be associated with the threshold voltage of the driving transistor T0, so that when the light-emitting unit 20 is turned on, the storage voltage stored in the storage capacitance C and the threshold voltage of the driving transistor T0 can cancel each other out, preventing the threshold voltage of the driving transistor T0 from affecting the lighting of the light-emitting unit 20. For example, the storage capacitance C is pre-charged through the power supply terminal 10 or the data line data until the driving transistor T0 is turned on, and then the charging process of the storage capacitance C is completed. The storage capacitance C starts to continuously discharge, and the power gradually decreases, and when the power stored in the storage capacitance C is enough to turn off the driving transistor T0, the voltage stored in the storage capacitance C is equal to the threshold voltage of the driving transistor T0.

[0062] The pixel driving circuit further includes a flip-flop U1 and a second response switch T2. The input end of the flip-flop U1 is connected to the scan line scan, and the flip-flop U1 generates a first control signal in response to the scanning signal of the scan line scan, the first end of the second response switch T2 is connected to the second end of the driving transistor T0, the second end of the second response switch T2 is connected to the initial voltage end 30, and the control end of the second response switch T2 is connected to the output end of the flip-flop U1, and the control end of the second response switch T2 provides the voltage of the initial voltage end 30 to the second end of the driving transistor T0 in response to the first control signal. The voltage of the initial voltage end 30 is low, lower than the lighting voltage of the light-emitting unit 20.

[0063] In the solution of this embodiment, the scan line scan provides a scanning signal, and the control end of the first response switch T1 responds to the scanning signal, so that the first and second ends of the first response switch T1 are turned on, and the data signal provided by the data line data is provided to the first end of the storage capacitor C through the first response switch T1. The second end of the storage capacitor C is connected to the power supply end 10, and the driving transistor T0 is turned on through the cooperation of the voltage of the power supply end 10 and the voltage of the data signal. Thus, the voltage of the power supply end 10 is output to the light-emitting unit 20 through the driving transistor T0, so that the light-emitting unit 20 can be surely lit. Here, the input end of the flip-flop U1 generates a first control signal after receiving the scanning signal, and the first control signal is transmitted to the second response switch T2. The control end of the second response switch T2 responds to the first control signal, so that the first and second ends of the second response switch T2 are turned on. In this way, the voltage of the initial voltage terminal 30 is provided to the second terminal of the driving transistor T0 through the second response switch T2. When the voltage initialization of the second terminal of the driving transistor T0 is completed, the coupling capacitance is reduced or eliminated, thereby reducing the light emission delay of the light emitting unit 20 and improving the response speed of the entire display panel 40.

[0064] In addition, in this embodiment, the pixel driving circuit may be entirely disposed in the display area 410, or a part of the pixel driving circuit may be disposed in the non-display area 420. For example, the light-emitting unit 20 is disposed in the display area 410, and the components other than the light-emitting unit 20 are disposed in the non-display area 420.

[0065] Although the present application has been described with reference to some exemplary embodiments, it should be understood that the terms used are descriptive and illustrative, rather than limiting. Since the present application can be implemented in various ways without departing from the spirit of the present invention, the above embodiments should not be limited to the details described above, but should be broadly interpreted within the spirit and scope defined by the appended claims. Accordingly, all changes and modifications that come within the scope of the claims or their equivalents are intended to be covered by the appended claims.

Claims

1. 1. A pixel driving circuit, comprising: The light emitting device includes a driving transistor and a storage capacitor, a first end of the driving transistor is connected to a power supply end and a second end of the driving transistor is connected to a light emitting unit, a control end is connected to the first end of the storage capacitor, and a second end of the storage capacitor is connected to the power supply end; The pixel driving circuit further includes a first response switch, a first end of the first response switch is connected to a data line, a control end of the first response switch is connected to a scanning line, and a second end of the first response switch is connected to a first end of the storage capacitance, and the control end is configured to provide a data signal provided from the data line to the first end of the storage capacitance in response to a scanning signal provided from the scanning line; the pixel driving circuit further includes a flip-flop and a second response switch; an input terminal of the flip-flop is connected to the scan line, and the flip-flop generates a first control signal in response to a scan signal of the scan line; a first end of the second response switch is connected to the second end of the driving transistor, a second end of the second response switch is connected to an initial voltage end, a control end of the second response switch is connected to an output end of the flip-flop, and the control end of the second response switch provides a voltage of the initial voltage end to the second end of the driving transistor in response to the first control signal; The input terminal of the flip-flop includes a first input terminal and a second input terminal, and the first input terminal and the second input terminal are both connected to the scan line; The pixel driving circuit further includes an inverter, one end of the inverter being connected to the second input terminal and the other end being connected to the scanning line.

2. 2. The pixel driving circuit according to claim 1, further comprising a current limiting resistor, one end of the current limiting resistor being connected to the scan line and the other end being connected to the inverter and the first input terminal, respectively.

3. The pixel driving circuit further includes a third response switch, a first end of the third response switch is connected to the first end of the second response switch, and a second end of the third response switch is connected to the light-emitting unit; 2. The pixel driving circuit of claim 1, wherein an output terminal of the flip-flop includes a first output terminal and a second output terminal, the first output terminal is configured to provide the first control signal, the second output terminal is configured to provide a second control signal, the second output terminal is connected to a control terminal of the third response switch, and the control terminal of the third response switch turns on the first terminal and the second terminal of the third response switch in response to the second control signal.

4. 4. The pixel driving circuit according to claim 3, wherein the flip-flop is an SR flip-flop, the first input terminal is an S input terminal, the second input terminal is an R input terminal, the first output terminal is a Q output terminal, and the second output terminal is a Q' output terminal.

5. 4. The pixel driving circuit according to claim 3, wherein the first response switch, the second response switch and the third response switch are all P-type tubes.

6. 6. The pixel driving circuit according to claim 5, wherein the first control signal is a low level signal, and the second control signal is a high level signal.

7. 2. The pixel driving circuit of claim 1, wherein a gate drive voltage required to turn on the second responsive switch is less than a gate drive voltage of the first responsive switch.

8. 2 . The pixel driving circuit according to claim 1 , wherein the voltage of the initial voltage end is lower than a lighting voltage of the light emitting unit.

9. A method for driving a pixel driving circuit, comprising the steps of: The pixel driving circuit includes a driving transistor, a storage capacitor, a flip-flop, a first response switch, and a second response switch, the first end of the driving transistor is connected to a power supply end, the second end of the driving transistor is connected to a light emitting unit, a control end is connected to the first end of the storage capacitor, and the second end of the storage capacitor is connected to the power supply end; a first end of the first response switch is connected to a data line, a control end is connected to a scanning line, and a second end is connected to a first end of the storage capacitor, an input end of the flip-flop is connected to the scanning line, a first end of the second response switch is connected to a second end of the driving transistor, a second end of the second response switch is connected to an initial voltage end, and a control end of the second response switch is connected to an output end of the flip-flop; The driving method of the pixel driving circuit includes: controlling the scan line to provide a scan signal, an input end of the flip-flop receiving the scan signal, the flip-flop generating a first control signal in response to the scan signal; and providing a voltage of the initial voltage end to a second end of the driving transistor in response to the first control signal by a control end of the second responsive switch; The input terminal of the flip-flop includes a first input terminal and a second input terminal, and the first input terminal and the second input terminal are both connected to the scan line; The pixel driving circuit further includes an inverter, one end of the inverter being connected to the second input terminal and the other end being connected to the scanning line.

10. The pixel driving circuit further includes a third response switch, a first end of the third response switch is connected to a first end of the second response switch, and a second end of the third response switch is connected to the light-emitting unit; an output end of the flip-flop includes a first output end and a second output end, the first output end is connected to a control end of the second response switch, and the second output end is connected to the control end of the third response switch; The step of the flip-flop generating a first control signal in response to the scanning signal includes: the flip-flop generating a first control signal and a second control signal in response to the scan signal; providing the first control signal to a control end of the second responsive switch via the first output end, and providing the second control signal to a control end of the third responsive switch via the second output end; 10. The method of claim 9, further comprising:

11. After the flip-flop generates a first control signal in response to the scan signal, 11. The driving method of claim 10, further comprising: a step of turning off the first and second terminals of the third responsive switch in response to the second control signal.

12. A display panel, The display panel includes a display area and a non-display area surrounding the display area, the display panel includes a gate driving circuit and a pixel driving circuit, the gate driving circuit is disposed in the non-display area, the pixel driving circuit is disposed in the display area, the gate driving circuit is connected to the pixel driving circuit, and the gate driving circuit is configured to provide a scanning signal to the pixel driving circuit, the pixel driving circuit includes a driving transistor and a storage capacitor, a first end of the driving transistor is connected to a power supply end and a second end is connected to a light emitting unit, a control end is connected to a first end of the storage capacitor, and a second end of the storage capacitor is connected to the power supply end; The pixel driving circuit further includes a first response switch, a first end of the first response switch is connected to a data line, a control end of the first response switch is connected to a scanning line, and a second end of the first response switch is connected to a first end of the storage capacitance, and the control end is configured to provide a data signal provided from the data line to the first end of the storage capacitance in response to a scanning signal provided from the scanning line; the pixel driving circuit further includes a flip-flop and a second response switch; an input terminal of the flip-flop is connected to the scan line, and the flip-flop generates a first control signal in response to a scan signal of the scan line; a first end of the second response switch is connected to the second end of the driving transistor, a second end of the second response switch is connected to an initial voltage end, a control end of the second response switch is connected to an output end of the flip-flop, and the control end of the second response switch provides a voltage of the initial voltage end to the second end of the driving transistor in response to the first control signal; The input terminal of the flip-flop includes a first input terminal and a second input terminal, and the first input terminal and the second input terminal are both connected to the scan line; The pixel driving circuit further includes an inverter, one end of the inverter being connected to the second input terminal and the other end being connected to the scanning line.

13. 13. The display panel of claim 12, wherein the pixel driving circuit further comprises a current limiting resistor, one end of the current limiting resistor being connected to the scan line and the other end being connected to the inverter and the first input terminal, respectively.

14. The pixel driving circuit further includes a third response switch, a first end of the third response switch is connected to the first end of the second response switch, and a second end of the third response switch is connected to the light-emitting unit; 13. The display panel of claim 12, wherein an output terminal of the flip-flop includes a first output terminal and a second output terminal, the first output terminal is configured to provide the first control signal, the second output terminal is configured to provide a second control signal, the second output terminal is connected to a control terminal of the third response switch, and the control terminal of the third response switch turns on the first terminal and the second terminal of the third response switch in response to the second control signal.

15. 15. The display panel of claim 14, wherein the flip-flop is an SR flip-flop, the first input terminal is an S input terminal, the second input terminal is an R input terminal, the first output terminal is a Q output terminal, and the second output terminal is a Q' output terminal.

16. 15. The display panel according to claim 14, wherein the first response switch, the second response switch, and the third response switch are all P-type tubes.

17. 17. The display panel of claim 16, wherein the first control signal is a low level signal, and the second control signal is a high level signal.

18. 13. The display panel according to claim 12, wherein a gate drive voltage of the second response switch is smaller than a gate drive voltage of the first response switch.

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