Network Delay Measurement System, Network Delay Measurement Method, and Network Delay Measurement Device

Abstract

The present invention enables delay measurement by a dedicated circuit without the use of software. A delay measurement apparatus according to the present invention comprises a general-purpose processor and a dedicated delay measurement circuit that operates in accordance with a circuit incorporated therein in advance and without the use of any program. A counter terminal communicates with the delay measurement apparatus. The dedicated delay measurement circuit is provided with a measurement packet generation unit, a response packet receiving unit, and a delay time calculation unit that are incorporated therein in advance. The measurement packet generation unit generates a measurement packet, transmits the measurement packet to the counter terminal, and stores the transmission time of the measurement packet. The response packet receiving unit receives a response packet from the counter terminal and stores the reception time of the response packet. The delay time calculation unit subtracts the transmission time from the reception time so as to calculate round-trip delay time. The counter terminal is provided with a dedicated response circuit that is incorporated therein in advance and that transmits the response packet when the measurement packet is received.

Description

Technical Field

[0001] The present invention relates to a network delay measurement system, a network delay measurement method, and a network delay measurement device.

Background Art

[0002] As disclosed in Non-Patent Document 1, ICMP (Internet Control Message Protocol) is known. The ICMP protocol is used to check the communication status between computers implementing TCP / IP.

[0003] Ping is known as a network diagnostic program using the ICMP protocol. Ping measures the time from sending an ICMP packet of "echo request" to receiving an ICMP packet of "echo reply" as the round-trip delay time. Ping measures the round-trip delay time between two nodes on a network (a configuration where the delay measurement device and the opposite terminal are in a 1:1 relationship).

Prior Art Documents

Non-Patent Documents

[0004]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] Referring to FIG. 7, the problems of the delay measurement process implemented by software will be described. In FIG. 7, a delay measuring device 70 is connected to a counter terminal 72 via a computer network 71. Ping is implemented by software, and the delay measurement process is calculated on CPUs 73 and 74. CPUs 73 and 74 are general-purpose processors, and during the calculation of the delay measurement process, calculations of other functions implemented by software may be requested. In that case, depending on the priority of the calculation, the delay measurement process may be temporarily stopped. This is called an interrupt process.

[0006] Due to the interrupt process of other functions, the delay measurement process temporarily stops the calculation, resulting in a problem that an accurate delay time cannot be measured. In addition, in the calculations by CPUs 73 and 74 which are general-purpose processors, the calculation speed and the information transfer speed are not always sufficient, and it cannot be said that the time required for calculating the delay time is sufficiently short. As the need for high-speed large-capacity communication increases, a high-speed and highly accurate delay measurement technology is required as an information processing infrastructure. It is expected that by high-speed and highly accurate delay measurement, fluctuations in delay occurring in the network can be grasped and utilized for network control (such as route change).

[0007] The present invention has been made to solve the above-described problems, and an object thereof is to provide a network delay measurement system, a network delay measurement method, and a network delay measurement device capable of high-speed and highly accurate delay measurement.

Means for Solving the Problems

[0008] The first aspect relates to a network delay measurement system. The network delay measurement system includes a delay measuring device and a counter terminal. The delay measuring device includes a general-purpose processor that operates according to a loaded program, and a dedicated delay measurement circuit that has a smaller latency than the general-purpose processor and operates according to a pre-embedded circuit without using the program. The counter terminal communicates with the delay measuring device via a computer network. The dedicated delay measurement circuit includes a measurement packet generation unit, a response packet reception unit, and a delay time calculation unit that are pre - incorporated. The measurement packet generation unit generates a measurement packet, transmits the measurement packet to the opposite terminal, and stores the transmission time of the measurement packet. The response packet reception unit receives a response packet from the opposite terminal and stores the reception time of the response packet. The delay time calculation unit calculates the round - trip delay time by subtracting the transmission time from the reception time. The opposite terminal includes a dedicated response circuit that is pre - incorporated. When the dedicated response circuit receives the measurement packet, it transmits the response packet.

[0009] The second aspect relates to a network delay measurement method using a delay measuring device and an opposite terminal. The delay measuring device includes a general - purpose processor that operates according to a loaded program, and a dedicated delay measurement circuit that has a smaller latency than the general - purpose processor and operates according to a pre - incorporated circuit without using the program. The opposite terminal communicates with the delay measuring device via a computer network and includes a dedicated response circuit that operates according to a pre - incorporated circuit. The network delay measurement method includes a measurement packet generation step, a response packet transmission step, a response packet reception step, and a delay time calculation step. In the measurement packet generation step, a measurement packet is generated using the dedicated delay measurement circuit, the measurement packet is transmitted to the opposite terminal, and the transmission time of the measurement packet is stored. In the response packet transmission step, when the opposite terminal receives the measurement packet, a response packet is transmitted using the dedicated response circuit. In the response packet reception step, the response packet is received from the opposite terminal using the dedicated delay measurement circuit, and the reception time of the response packet is stored. The delay time calculation step calculates the round-trip delay time by subtracting the transmission time from the reception time using the general-purpose processor or the dedicated delay measurement circuit.

[0010] A third aspect is related to a network delay measurement device. The network delay measurement device is a delay measurement device that communicates with a counterpart terminal via a computer network. The network delay measurement device includes a general-purpose processor that operates according to a loaded program, and a dedicated delay measurement circuit that has a smaller latency than the general-purpose processor and operates according to a circuit pre-embedded without using the program. The dedicated delay measurement circuit includes a pre-embedded measurement packet generation unit, a response packet reception unit, and a delay time calculation unit. The measurement packet generation unit generates a measurement packet, transmits the measurement packet to the counterpart terminal, and stores the transmission time of the measurement packet. The response packet reception unit receives a response packet from the counterpart terminal and stores the reception time of the response packet. The delay time calculation unit calculates the round-trip delay time by subtracting the transmission time from the reception time.

[0011] A fourth aspect is related to a network delay measurement device. The network delay measurement device is a counterpart terminal that communicates with a delay measurement device via a computer network. The network delay measurement device includes a dedicated response circuit that operates according to a pre-embedded circuit, a buffer, and a bifurcated circuit that transmits a received measurement packet to the dedicated response circuit and the buffer respectively. The dedicated response circuit receives the measurement packet from the bifurcated circuit without passing through the buffer and transmits the response packet.

Advantages of the Invention

[0012] According to the present invention, a delay measurement packet and a response packet are generated by a pre-embedded dedicated circuit for delay measurement and a dedicated circuit for response, and software processing is not required. Therefore, according to the present invention, high-speed and high-precision delay measurement is possible without being affected by interrupt processing. According to such a technique, it is possible to grasp fluctuations in delay occurring in a network and utilize them for network control (such as route change).

Brief Description of Drawings

[0013]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Embodiments for Carrying Out the Invention

[0014] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, common elements are denoted by the same reference numerals and redundant descriptions are omitted.

[0015] Embodiment 1. (1) Network Delay Measurement System FIG. 1 is a conceptual diagram for explaining the outline of the network delay measurement system according to Embodiment 1. The network delay measurement system 1 shown in FIG. 1 includes a delay measurement device 2, a computer network 3, at least one opposing terminal 4, and a plurality of splitters 5. In FIG. 1, as the opposing terminals 4, a first opposing terminal 4a, a second opposing terminal 4b, and a third opposing terminal 4c are illustrated. The delay measurement device 2 and the opposing terminal 4 function as a network delay measurement apparatus.

[0016] The delay measurement device 2 is connected to each opposing terminal 4 via a splitter 5 and a computer network 3. The delay measurement device 2 is a device having a function of measuring the delay time with the opposing terminal 4.

[0017] The opposing terminal 4 is a device to be measured for the delay time. The opposing terminal 4 is a device having a function of transmitting a response signal (response packet) in response to a request signal (delay measurement packet) from the delay measurement device 2. The opposing terminal 4 may be a user end terminal such as a personal computer, or may be a terminal on the network such as an ONU (Optical Network Unit). Also, there may be one opposing terminal 4 or a plurality of opposing terminals 4.

[0018] The computer network 3 is a wired or wireless network, and the type and scale of the network do not matter. As an example, the computer network 3 is an optical network.

[0019] The splitter 5 is a device for networking the delay measurement device 2 and the opposing terminal 4. The splitter 5 is, for example, an optical switch or an optical coupler in an optical network.

[0020] FIG. 2 is a diagram for explaining the outline of the network delay measurement apparatus according to Embodiment 1. In FIG. 2, the delay measurement device 2 and the opposing terminal 4 have a 1:1 configuration, but may have a 1:n configuration.

[0021] The delay measurement device 2 includes a memory (not shown), a CPU 21, and a hardware processing unit 22. The opposing terminal 4 includes a memory (not shown), a CPU 41, and a hardware processing unit 42. The CPUs 21 and 41 are general-purpose processors that operate according to programs loaded from the memory. The processing content of the programs is not limited. The hardware processing units 22 and 42 are dedicated circuits for delay measurement that operate according to pre-embedded circuits without using programs. The hardware processing units 22 and 42 are provided with internal memories. The hardware processing units 22 and 42 include, for example, FPGAs and GPUs. Since the CPUs 21 and 41 communicate via a general-purpose OS and a general-purpose bus, a delay occurs when an interrupt process occurs. However, in addition to the fact that the hardware processing units 22 and 42 can directly access the data source, since the logic is pre-embedded, a response is returned at a high speed and a constant speed.

[0022] The measurement of the delay time between the delay measurement device 2 and the opposing terminal 4 is executed by a delay measurement circuit 23 and a response circuit 43, which are dedicated circuits.

[0023] (2) Delay measurement device Next, the delay measurement device 2 will be described with reference to FIG. 3. FIG. 3 is a block diagram illustrating the configuration of the delay measurement device 2 according to Embodiment 1. The hardware processing unit 22 includes a delay measurement circuit 23 configured as a dedicated circuit for delay measurement. The delay measurement circuit 23 mounted on the hardware processing unit 22 is executed without passing through the CPU 21.

[0024] The delay measurement circuit 23 includes a pre-embedded measurement packet generation unit 24, a response packet reception unit 25, and a delay time calculation unit 26.

[0025] The measurement packet generation unit 24 generates a delay measurement packet and transmits the delay measurement packet to the opposing terminal 4. Further, the measurement packet generation unit 24 stores the transmission time when the delay measurement packet was transmitted.

[0026] The response packet receiving unit 25 receives a response packet from the opposite terminal 4 and stores the reception time of the response packet. The transmission time and the reception time are stored, for example, in the internal memory of the delay measurement circuit 23.

[0027] The delay time calculation unit 26 subtracts the transmission time when the delay measurement packet was transmitted from the reception time when the response packet was received, and calculates the time required for the round trip as the round trip delay time.

[0028] (3) Opposite terminal Next, the opposite terminal 4 will be described with reference to FIG. 4. FIG. 4 is a block diagram illustrating the configuration of the opposite terminal 4 according to the first embodiment. The hardware processing unit 42 includes a response circuit 43, a buffer 44, and a branching circuit 45. The response circuit 43 is a circuit configured specifically for delay measurement. The circuits implemented in the hardware processing unit 42 are executed without going through the CPU 41.

[0029] The buffer 44 includes a downstream buffer and an upstream buffer. The buffer 44 has at least one queue.

[0030] The branching circuit 45 is provided upstream of the downstream buffer and transmits the received delay measurement packet to the response circuit 43 and the buffer 44, respectively.

[0031] The response circuit 43 receives the delay measurement packet from the branching circuit 45 without going through the buffer 44 and immediately transmits a response packet. That is, the delay measurement packet is input to the response circuit 43 before the downstream buffer. The response packet is input to the upstream buffer. According to this configuration, it is possible to measure the delay time without including the downstream queuing delay of the opposite terminal 4.

[0032] (4) Effects As described above, in the system of the present embodiment, the delay measurement packet and the response packet are generated by a pre-installed dedicated circuit for delay measurement and a dedicated circuit for response, and do not require software processing. Therefore, high-speed and high-precision delay measurement can be realized without being affected by interrupt processing.

[0033] (5) Variation The variation will be described. In the system of Embodiment 1 described above, the delay time calculation unit 26 is incorporated in advance into the hardware processing unit 22 to calculate the delay time at high speed. By the way, since the transmission time and the reception time have already been grasped by the hardware processing unit 22, highly accurate delay measurement can also be realized by implementing the processing of the delay time calculation unit 26 by software and executing it with the CPU 21. Also, in this case, the transmission time and the reception time may be stored in a database or the like.

[0034] FIG. 5 is a block diagram illustrating another configuration of the opposite terminal 4. In this configuration example, the bifurcated circuit 45 is provided downstream of the downstream buffer, and sequentially transmits the delay measurement packets queued in the buffer 44 to the response circuit 43. According to this configuration example, the delay time including the downstream queuing delay of the opposite terminal 4 can be measured.

[0035] Also, the opposite terminal 4 can be configured not to have the buffer 44.

[0036] Also, the transmission method of the delay measurement packet and the response packet may be in-band (a method of inserting and transmitting between the data main signals) or out-of-band (a method of transmitting using a band different from the data main signal). That is, it is not limited to a method such as ping (in-band).

[0037] Embodiment 2. Next, Embodiment 2 of the present invention will be described with reference to FIG. 6. When applying this technology to a time-division multiple access optical communication system, there are the following problems. (A) It is necessary to perform measurement for each opposite terminal 4, and the number of packets required for measurement increases in proportion to the number of opposite terminals 4, squeezing the bandwidth. (B) The transmission waiting delay due to multi-access is included in the measured delay time, and accurate path delay cannot be measured. Therefore, in this embodiment, in a system that communicates using a time-division multiplexing method, high-speed and high-precision delay measurement is realized.

[0038] (1) Network Delay Measurement System FIG. 6 is a conceptual diagram for explaining the outline of the network delay measurement system according to Embodiment 2. The network delay measurement system 1 according to Embodiment 2 includes a plurality of opposing terminals 4. In the example shown in FIG. 6, one delay measurement device 2 is connected to N opposing terminals 4 (N is an integer of 2 or more).

[0039] The delay measurement device 2 and the opposing terminal 4 communicate using a time-division multiplexing method. As a communication system using time-division multiplexing, for example, there is PON (Passive Optical Network). However, the network configuration to which this technology is applied is not limited to the double-star type in PON.

[0040] (2) Delay Measurement Device The delay measurement circuit 23 of the delay measurement device 2 according to Embodiment 2 has a part of the processing of the measurement packet generation unit 24 changed in the configuration of Embodiment 1 described above, and newly includes an upstream transmission control unit 27. Note that the upstream transmission control unit 27 may be mounted on another device connected between the delay measurement device 2 and the opposing terminal 4.

[0041] The measurement packet generation unit 24 transmits delay measurement packets by broadcast. Note that the measurement packet generation unit 24 may group a plurality of opposing terminals 4 and transmit delay measurement packets by multicast with the group as the destination, or may transmit delay measurement packets by unicast for each opposing terminal.

[0042] The upstream transmission control unit 27 determines each upstream transmission timing so that the upstream transmissions from the first opposing terminal 4a to the nth opposing terminal 4n to the delay measurement device 2 do not collide. Each determined upstream transmission timing is notified to the first opposing terminal 4a to the nth opposing terminal 4n.

[0043] (3) Opposing Terminal The response circuit 43 of each opposing terminal 4 according to Embodiment 2 further includes a transmission timing control unit 46 and a waiting time measurement unit 47 in addition to the configuration of Embodiment 1 described above.

[0044] The transmission timing control unit 46 executes an upstream transmission based on the notified upstream transmission timing.

[0045] The waiting time measurement unit 47 measures the waiting time from when the response packet is generated until the opportunity for upstream transmission arrives, and attaches the waiting time to the response packet. The response packet is transmitted to the delay measurement circuit 23.

[0046] The delay time calculation unit 26 subtracts the transmission time when the measurement packet was transmitted and the waiting time from the reception time when the response packet was received, and calculates the time required for the round trip as the round-trip delay time.

[0047] (4) Effects As described above, according to the system of this embodiment, the same effects as those of Embodiment 1 are achieved. That is, according to this embodiment, high-speed and high-precision delay measurement can be realized without being affected by interrupt processing. Further, by measuring the waiting time from when the response packet is generated until it is transmitted, the influence of the transmission waiting delay in multi-access can be excluded, and accurate path delay measurement is possible. Furthermore, since the delay measurement packet is transmitted by broadcast or multicast, the number of packets and overhead required for delay measurement can be reduced, and network bandwidth compression can be suppressed.

[0048] The embodiments of the present invention have been described above. However, the present invention is not limited to the above-described embodiments, and can be implemented with various modifications without departing from the spirit of the present invention. When referring to numbers such as the number of elements, quantity, amount, range, etc. in the above-described embodiments, the present invention is not limited to the recited number, except when specifically stated or clearly specified by principle. Further, the structures and the like described in the above-described embodiments are not necessarily essential to the present invention, except when specifically stated or clearly specified by principle.

Explanation of Reference Numerals

[0049] 1 Network delay measurement system 2 Delay measurement device 3 Computer network 4 Opposite terminal 5 Splitter 21,41 CPU 22,42 Hardware processing unit 23 Delay measurement circuit 24 Measurement packet generation unit 25 Response packet reception unit 26 Delay time calculation unit 27 Transmission control unit 43 Response circuit 44 Buffer 45 Two-way splitter circuit 46 Transmission timing control unit 47 Standby time measurement unit 70 Delay measurement device 71 Computer network 72 Opposite terminal

Claims

1. A delay measurement device comprising: a general-purpose processor that operates according to a loaded program; and a dedicated delay measurement circuit that has a smaller latency than the general-purpose processor, operates according to a pre-incorporated circuit without using the program. A counterparty terminal that communicates with the delay measurement device via a computer network. The dedicated delay measurement circuit is pre-incorporated. A measurement packet generation unit that generates a measurement packet, transmits the measurement packet to the counterparty terminal, and stores the transmission time of the measurement packet. A response packet reception unit that receives a response packet from the counterparty terminal and stores the reception time of the response packet. The general-purpose processor or the dedicated delay measurement circuit. A delay time calculation unit that subtracts the transmission time from the reception time to calculate a round-trip delay time. The counterparty terminal is pre-incorporated. A dedicated response circuit that transmits the response packet when the measurement packet is received. The counterparty terminal. A buffer. A branching circuit that transmits the received measurement packet to the dedicated response circuit and the buffer, respectively. The dedicated response circuit receives the measurement packet from the branching circuit without passing through the buffer and transmits the response packet. The measurement packet generation unit transmits the measurement packet by broadcast or multicast. The delay measurement device and the counterparty terminal communicate in a time-division multiplexing manner. The counterparty terminal includes at least a first counterparty terminal and a second counterparty terminal. An upstream transmission control unit that determines an upstream transmission timing so that upstream transmissions from the first counterparty terminal and the second counterparty terminal to the delay measurement device do not collide. The dedicated response circuit. A transmission timing control unit that executes the upstream transmission based on the determined upstream transmission timing. A waiting time measurement unit that measures a waiting time from when the response packet is generated until an opportunity for the upstream transmission arrives, and attaches the waiting time to the response packet. The delay time calculation unit calculates the round-trip delay time by subtracting the transmission time when the measurement packet was transmitted and the waiting time from the reception time when the response packet was received. A network delay measurement system characterized by the above.

2. A delay measurement device comprising: a general-purpose processor that operates according to a loaded program; and a dedicated delay measurement circuit that has a smaller latency than the general-purpose processor and operates according to a pre-incorporated circuit without using the program. A counterparty terminal that communicates with the delay measurement device via a computer network. The dedicated delay measurement circuit is pre-incorporated. A measurement packet generation unit that generates a measurement packet, transmits the measurement packet to the counterparty terminal, and stores the transmission time of the measurement packet. A response packet reception unit that receives a response packet from the counterparty terminal and stores the reception time of the response packet. The general-purpose processor or the dedicated delay measurement circuit Comprises a delay time calculation unit that calculates the round-trip delay time by subtracting the transmission time from the reception time. The counterparty terminal is pre-incorporated. A dedicated response circuit that transmits the response packet when the measurement packet is received. The measurement packet generation unit transmits the measurement packet by broadcast or multicast. The delay measurement device and the counterparty terminal communicate in a time-division multiplexing system. The counterparty terminal includes at least a first counterparty terminal and a second counterparty terminal. An upstream transmission control unit that determines the upstream transmission timing so that the upstream transmissions of the first counterparty terminal and the second counterparty terminal to the delay measurement device do not collide. The dedicated response circuit A transmission timing control unit that executes the upstream transmission based on the determined upstream transmission timing. A standby time measurement unit that measures the standby time from when the response packet is generated until the opportunity for the upstream transmission arrives, and attaches the standby time to the response packet. The delay time calculation unit calculates the round-trip delay time by subtracting the transmission time and the standby time when the measurement packet was transmitted from the reception time when the response packet was received. A network delay measurement system characterized by the above.

3. A delay measurement device comprising: a general-purpose processor that operates according to a loaded program; and a dedicated delay measurement circuit that has a smaller latency than the general-purpose processor and operates according to a pre-incorporated circuit without using the program. A network delay measurement method using a counterparty terminal that communicates with the delay measurement device via a computer network and has a dedicated response circuit that operates according to a pre-incorporated circuit. A measurement packet generation step of generating a measurement packet using the dedicated delay measurement circuit, transmitting the measurement packet to the opposite terminal, and storing the transmission time of the measurement packet; A response packet transmission step of transmitting a response packet using the dedicated response circuit when the opposite terminal receives the measurement packet; A response packet reception step of receiving the response packet from the opposite terminal using the dedicated delay measurement circuit and storing the reception time of the response packet; A delay time calculation step of calculating a round-trip delay time by subtracting the transmission time from the reception time using the general-purpose processor or the dedicated delay measurement circuit; A transmission step of transmitting the measurement packet by broadcast or multicast; An upstream transmission control step of determining an upstream transmission timing so that the upstream transmission to the delay measuring device does not collide; A transmission timing control step of executing the upstream transmission based on the determined upstream transmission timing; A standby time measurement step of measuring a standby time from when the response packet is generated until an opportunity for the upstream transmission arrives, and attaching the standby time to the response packet; A calculation step of calculating the round-trip delay time by subtracting the transmission time when the measurement packet is transmitted and the standby time from the reception time when the response packet is received. A network delay measurement method characterized by comprising the above steps.

4. The opposite terminal comprises a buffer, and a bifurcated circuit that transmits the received measurement packet to the dedicated response circuit and the buffer respectively, and the response packet transmission step is to receive the measurement packet from the bifurcated circuit without passing through the buffer and transmit the response packet. The network delay measurement method according to claim 3, characterized by the above.

Images