Aligning device and method
The alignment apparatus and method address the challenge of accurately determining the wafer center position and correcting the global recipe position by using image acquisition and binarization techniques to model edge lines, resulting in improved manufacturing reliability and performance.
Patent Information
- Application Number
- JP2023117700
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-01-25
- Filing Date
- 2023-07-19
- Publication Date
- 2025-06-12
- Estimated Expiration
- 2043-07-19
AI Technical Summary
Existing wafer alignment systems face challenges in accurately determining the center position of a wafer and correcting the global position of a recipe, leading to potential errors in integrated circuit manufacturing due to misalignment of patterned layers.
An alignment apparatus and method that includes a detector to acquire images within the Field of View (FOV) on a wafer, and a processor to binarize the images, model edge lines, and identify the center position of the wafer using these modeled edge lines.
The solution enables fast and accurate determination of the wafer center position, simplifies the alignment process, and allows for precise correction of the global recipe position, thereby improving the reliability and performance of integrated circuit manufacturing.
Smart Images

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Abstract
Description
Technical Field
[0001] The present invention relates to an alignment apparatus and method for correcting the center position of a wafer.
Background Art
[0002] Generally, with the development of technology, the size of a measuring apparatus for measuring the characteristics of a wafer has become smaller, and the density of the integrated circuits of the measuring apparatus has increased. In order to form an integrated circuit on a wafer, many manufacturing processes must be performed so that the desired circuit structures and elements are sequentially formed at specific positions. These manufacturing processes sequentially generate patterned layers on the wafer.
[0003] Through such repeated stacking processes, an electrically activated pattern is generated in the integrated circuit. At this time, if each pattern is not aligned within the error range allowed in the production process, interference occurs between the electrically activated patterns, and such a phenomenon may cause problems in the performance and reliability of the manufactured circuit. Therefore, various forms of measuring equipment inspect the alignment state of these patterns.
[0004] Although these measuring equipments perform measurements according to a recipe, if there is a difference between the global position of the wafer in the recipe and the position of the wafer actually placed on the chuck, an error occurs in the measurement. Therefore, it is necessary to correct the global position of the recipe.
Summary of the Invention
Problems to be Solved by the Invention
[0005] The present invention provides an alignment apparatus and method for identifying the center position of a wafer.
[0006] Moreover, the present invention provides an alignment apparatus and method for correcting the global position of a recipe.
[0007] The object of the present invention is not limited to the objects mentioned above. Other objects and advantages of the present invention not mentioned can be understood from the following description and can be more clearly understood from the embodiments of the present invention. Also, it is easily understood that the objects and advantages of the present invention can be realized by the means and their combinations shown in the claims.
Means for Solving the Problems
[0008] To achieve these objects, an alignment device according to an embodiment of the present invention includes a detector that acquires an image within the FOV (Field of view) on a wafer, and a processor configured to binarize the acquired image into black and white, model an edge line, and identify the center position of the wafer using the modeled edge line.
[0009] To achieve these objects, an alignment method according to an embodiment of the present invention includes a step of acquiring an image within the FOV on a wafer, a step of binarizing the acquired image into black and white, a step of modeling an edge line in the binarized image, and a step of identifying the center position of the wafer using the modeled edge line.
Effects of the Invention
[0010] When the present invention acquires images for three points, it can determine the center position of the wafer and has the advantage of being fast.
[0011] Also, since the present invention models the edge line after binarizing the image, it also has the advantages of being simple and fast.
[0012] Also, since the present invention compares the gray values in the binarized image in pixel units, it also has the advantage of enabling an accurate edge line.
[0013] Also, the present invention has the advantage of accurately modeling the edge line using a gauge (reflector).
[0014] In addition, the present invention also has the advantage that it can calculate only the X value or the Y value at three points to obtain an offset value and easily identify the center position.
[0015] The above-described effects and the specific effects of the present invention will be described and described together with the embodiments for carrying out the following invention.
Brief Description of the Drawings
[0016]
Figure 1
Figure 2
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Figure 6
Embodiments for Carrying Out the Invention
[0017] The above-mentioned objects, features, and advantages will be described in detail below with reference to the accompanying drawings. As a result, those having ordinary knowledge in the technical field to which the present invention pertains can easily implement the technical idea of the present invention. In the description of the present invention, when it is determined that a specific description of a known technique related to the present invention obscures the gist of the present invention, the detailed description will be omitted. Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings are used to indicate the same or similar components.
[0018] Although terms such as first, second, etc. are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are merely used to distinguish one component from another, and of course, unless otherwise stated, the first component may be the second component.
[0019] In the following, when it is stated that any configuration is arranged "above (or below)" a component or "on (or under)" a component, it means that not only is any configuration arranged in contact with the upper surface (or lower surface) of the said component, but other configurations may also be interposed between the said component and any configuration arranged on (or under) the said component.
[0020] Also, when it is described that a certain component is "connected", "coupled" or "joined" to another component, it should be understood that the said components may be directly connected or joined to each other, but other components may "intervene" between the respective components, or each component may be "connected", "coupled" or "joined" via another component.
[0021] Throughout the specification, unless otherwise stated, each component may be singular or plural.
[0022] The singular expressions used in this specification include plural expressions unless the context clearly indicates otherwise. Terms such as "configured" or "comprising" in this application should not be construed as necessarily including all of the multiple components or multiple steps described in the specification. Some of those components or some of those steps may not be included, or it should be construed that additional components or steps may be included.
[0023] Throughout the specification, when it is "A and / or B", it means A, B, or A and B unless otherwise stated, and when it is "C to D", it means C or more and D or less unless otherwise stated.
[0024] Hereinafter, an alignment apparatus and method for identifying the center position of a wafer according to some embodiments of the present invention will be described.
[0025] FIG. 1 is a conceptual diagram of an alignment apparatus according to an embodiment of the present invention.
[0026] Referring to FIG. 1, an alignment apparatus 100 according to an embodiment of the present invention is an apparatus that photographs an arbitrary point on the edge of a wafer 140 to identify the exact center position of the wafer 140.
[0027] The alignment apparatus 100 according to an embodiment of the present invention may include a light source 110, a relay lens 118, a detector 131, a beam splitter 124, an objective lens 120, a lens focus actuator 125, and a processor 170.
[0028] The configuration of the alignment apparatus 100 shown in FIG. 1 is according to an embodiment, and the components of the alignment apparatus 100 are not limited to the embodiment shown in FIG. 1. If necessary, some components can be added, changed, or deleted. For example, the alignment apparatus 100 may include a memory (not shown) that stores instruction words, programs, logics, etc. for controlling the operation of each configuration of the alignment apparatus 100 by the processor 170.
[0029] The light source 110 irradiates light, and may be a halogen lamp, a xenon lamp, a supercontinuum laser, a light-emitting diode, or a laser induced lamp, etc.
[0030] The detector 131 detects light within the FOV (Field of view) to obtain an image visible in the FOV. The detector 131 photographs the wafer 140 placed on the chuck and the background of the wafer 140 (or the shadow and gauge (reflector) of the wafer 140) under the control of the processor 170 to obtain an image within the FOV.
[0031] The beam splitter 124 serves to separate light into two lights. The light irradiated by the light source 110 passes through the relay lens 118 and is polarized, and then is separated into two lights by the beam splitter 124.
[0032] The objective lens 120 is installed on a lens focus actuator 125. For example, the objective lens 120 may have a lower magnification than the objective lens for overlay measurement.
[0033] The lens focus actuator 125 adjusts the distance between the objective lens 120 and the wafer 140 to adjust the focus. The lens focus actuator 125 can adjust the focal length by vertically moving the objective lens 120 in the wafer direction (e.g., the Y direction) under the control of the processor 170.
[0034] The processor 170 models the edge line of the wafer 140 in the image acquired by the detector 131 and calculates the center position of the wafer 140. The edge line is a line formed between the wafer 140 and the external scene of the wafer 140. In some embodiments, the edge line may be a line formed between the shadow of the wafer 140 and the gauge (reflector). Details thereof will be described later.
[0035] FIG. 2 is a sequence diagram related to the alignment method according to an embodiment of the present invention. FIG. 3 is a drawing showing three reference points and a reference center in the alignment method according to an embodiment of the present invention. FIG. 4 is a drawing showing the modeling of three detection points and an edge line in the alignment method according to an embodiment of the present invention. FIG. 5 is a drawing showing three correction points and a correction center in the alignment method according to an embodiment of the present invention.
[0036] Hereinafter, with reference to FIGS. 2 to 5, the alignment method for the alignment apparatus according to an embodiment of the present invention to identify the center position of the wafer will be described in detail as follows.
[0037] When initially setting up the device for identifying the center position of a wafer, the present invention stores three reference points P1, P2, and P3 in a memory (not shown). The three reference points P1, P2, and P3 are arranged on the edge line 301 of the reference wafer.
[0038] As shown in FIG. 3(b), the three reference points P1, P2, and P3 are located in the middle of the FOV302. That is, the reference point P1(X 1 , Y 1 ) is located at half the width (X / 2) and half the height (Y / 2) of the FOV302. Similarly, P2(X 2 , Y 2 ) and P3(X 3 , Y 3 ) are also located at half the width (W / 2) and half the height (H / 2) of the FOV302. In the wafer coordinate system, the position of the reference center (A), which is the center of the wafer calculated using the three reference points P1, P2, and P3, is (0, 0).
[0039] After completing the setting as described above, the processor 170 determines whether the wafer 140 is placed on the chuck (S210). If it is determined that the wafer 140 is placed on the chuck, the processor 170 acquires an image of the wafer (S212). The processor 170 acquires an image of the wafer 140 placed on the chuck via the detector 131. Referring to FIG. 4(a), the processor 170 moves the screen of the detector 131 to the positions of the three reference points P1, P2, and P3 to acquire an image visible in the FOV320. At this time, although there are three detection points P'1, P'2, and P'3 on the edge line 310 of the wafer 140 in the acquired image, the three detection points P'1, P'2, and P'3 are not arranged in the middle of the FOV320 and are different from the reference points P1, P2, and P3.
[0040] The processor 170 binarizes the acquired image into black and white (S214). The processor 170 binarizes the image within the FOV 320 acquired at any one of the positions of the three reference points P1, P2, P3 (in this embodiment, P1), so that, as shown in FIG. 4(b), the pixel gray value becomes a black region 322 with a gray value of 0 or a white region 321 with a gray value of 255. Various algorithms can be used to binarize the image. The processor 170 in this embodiment stores the number of pixels for each gray value per pixel of the image, calculates the ratio of each gray value to the total pixels, calculates a threshold, compares the gray value with the threshold, and reconstructs the gray value of the pixel to 0 or 255 to binarize the image.
[0041] The processor 170 stores the positions of the pixels with different gray values in the binarized image (S216). Referring to FIGS. 4(b) and 4(c), the processor 170 proceeds in the vertical direction 323 in the binarized image and searches for the position of a pixel 340 whose gray value difference from the next pixel (350) is 255. The processor 170 moves from a pixel 322 with a gray value of 0 (black) to a pixel 321 with a gray value of 255. The processor 170 proceeds in the vertical direction 323 and searches for the position of a pixel 340 whose gray value difference from the next pixel 350 is 255. After searching for the position of the pixel 340 with different gray values in the vertical direction 323, the processor 170 moves 1 pixel in the horizontal direction 324, further proceeds in the vertical direction 323, and searches for the position of the pixel 340 with different gray values. The processor 170 stores the positions of the pixels 340 with different gray values found by the method described above. In this embodiment, the vertical direction 323 proceeds from the upper side to the lower side, but depending on the acquired image, the direction of moving from a pixel 321 with a gray value of 255 (white) to a pixel 322 with a gray value of 0 (black) may be from the lower side to the upper side.
[0042] The processor 170 models the edge line using the stored position and the RANSAC algorithm (S218). The processor 170 recognizes the position of each pixel 340 with different gray values as one point, and approximates these points with the RANSAC (RANdom SAmple Consensus) algorithm to model the edge line 310 of the wafer 140.
[0043] For each of the images acquired with the three reference points P1, P2, and P3, the processor 170 sequentially performs each of steps S214, S216, and S218 to model the edge line 310 in each image.
[0044] The processor 170 obtains the offset value between the result model 390 and the stored position in the equipment (S220). The processor 170 calculates the offset value of the points where the three reference points P1, P2, and P3 on the modeled edge line 390 have the same X value or Y value.
[0045] Referring to Fig. 5(a), for the edge line 390 modeled from the image acquired at P1 among the three reference points P1, P2, and P3, the processor 170 calculates the offset value (y A ) of the correction point P''1 passing through half of the width (X / 2) of the FOV302. Also, for the edge line 390 modeled from the image acquired at P2, the processor 170 calculates the offset value (x B ) of the correction point P''2 passing through half of the height (Y / 2) of the FOV302, and for the edge line 390 modeled from the image acquired at P3, the processor 170 calculates the offset value (x C ) of the correction point P''3 passing through half of the height (Y / 2) of the FOV302. That is, the processor 170 calculates the offset value (y A ) between P1 and the correction point P''1 with the same X value as P1 on the modeled edge line 390, and the offset value (x B) is calculated, and the offset value (x of the correction point P’’3 where P3 and the Y value are the same C ) is calculated.
[0046] The processor 170 identifies the center position of the wafer using three positions P’’1, P’’2, P’’3 of the wafer to which the obtained offset value is applied (S222).
[0047] The processor 170 calculates the positions of the three correction points P’’1, P’’2, P’’3 as offset values (y A , x B , x C ) with the three reference points P1, P2, P3. The X value of the correction point P’’1 is X 1 which is the same as the X value of the reference point P1, and the Y value of the correction point P’’1 is Y 1 to which the offset value y A is added, resulting in Y 1 +y A . The X value of the correction point P’’2 is X 2 to which the offset value x B is added, resulting in X 2 +x B , and the Y value of the correction point P’’2 is the same as the Y value of the reference point P2, which is Y2. The X value of the correction point P’’3 is X 3 to which the offset value x c is added, resulting in X 3 +x c , and the Y value of the correction point P’’3 is the same as the Y value of the reference point P3, which is Y 3 . That is, the coordinates of the three correction points P’’1, P’’2, P’’3 are as follows.
[0048] P’’1(X 1 , Y 1 +y A ) P’’2(X 2 +x B , Y 2 ) P’’3(X 3 +x c , Y 3 )
[0049] Using the positions of the three correction points P''1, P''2, and P''3 of the wafer to which the acquired offset value is applied, the processor 170 calculates the correction center (A') of the modeled edge line 390. The processor 170 calculates the correction center (A') from the three correction points P''1, P''2, and P''3 using the equation of a circle.
[0050] For a specific measurement of the wafer 140, the processor 170 corrects the global position of the recipe (S224). After calculating the center offset (O, O = A' - A) from the calculated correction center (A') and the reference center (A), the processor 170 adds the center offset (O) to the global position (G) of the recipe to calculate the corrected global position (G'). Since the reference center (A) is (0, 0), the corrected global position (G') is calculated by adding the correction center (A') to the global position (G) of the recipe.
[0051] FIG. 6 is a drawing showing the modeling of an edge line using a gauge in an alignment method according to another embodiment of the present invention.
[0052] The alignment method according to another embodiment of the present invention can obtain a more precise edge line using a gauge (reflector).
[0053] FIG. 6(a) shows three reference points 411, 412, and 413 formed by the wafer 140, the shadow 143 of the wafer, and the gauge 145 on the edge line 310 of the wafer 140. In the alignment method according to another embodiment, three gauges (reflectors) are arranged at the three reference points 411, 412, and 413 on the chuck on which the wafer 140 is placed. At the reference point A411, the wafer 140, the shadow 143 of the wafer, and the gauge 145 are arranged in sequence from top to bottom.
[0054] The images visible in the FOV 320 at the reference point A411 are two images: a wafer image 411a composed of a wafer 140 and a shadow 143 of the wafer as shown in Fig. 6(b), and a gauge image 411b composed of the shadow 143 of the wafer and a gauge 145 as shown in Fig. 6(c). Also, the images visible in the FOV 320 at the reference point B412 are two images: a wafer image 412a composed of a wafer 140 and a shadow 143 of the wafer as shown in Fig. 6(d), and a gauge image 412b composed of the shadow 143 of the wafer and a gauge 145 as shown in Fig. 6(e). The images visible in the FOV 320 at the reference point C41 are two images: a wafer image 413a composed of a wafer 140 and a shadow 143 of the wafer as shown in Fig. 6(f), and a gauge image 413b composed of the shadow 143 of the wafer and a gauge 145 as shown in Fig. 6(g).
[0055] In the wafer images 411a, 412a, 413a composed of the wafer 140 and the shadow 143 of the wafer, the processor 170 moves vertically from a pixel with a gray value of 0 (black) to a pixel with a gray value of 255 (white), searches for the position of a pixel where the gray value difference from the next pixel is 255, moves 1 pixel horizontally, and then moves vertically again to search for the position of a pixel with a different gray value.
[0056] In the gauge images 411b, 412b, 413b composed of the shadow 143 of the wafer and the gauge 145, the processor 170 moves vertically from a pixel with a gray value of 255 (white) to a pixel with a gray value of 0 (black), searches for the position of a pixel where the gray value difference from the previous pixel is 255, moves 1 pixel horizontally, and then moves vertically again to search for the position of a pixel with a different gray value.
[0057] The edge line can be more precisely modeled by the pixels found in the wafer images 411a, 412a, 413a and / or the pixels found in the gauge images 411b, 412b, 413b.
[0058] Each step in each of the sequence diagrams described above can operate regardless of the illustrated order or can be performed simultaneously. Also, at least one component of the present invention and at least one operation performed by the at least one component can be implemented in hardware and / or software.
[0059] As described above, the present invention has been described with reference to the exemplary drawings. However, the present invention is not limited by the embodiments and drawings disclosed herein, and it is obvious that various modifications can be made by those of ordinary skill in the art within the scope of the technical idea of the present invention. Further, even if the effects of the configuration of the present invention are not explicitly described while describing the embodiments of the present invention, it is natural that the effects predictable by the configuration should also be recognized.
Explanation of Reference Numerals
[0060] 100 Alignment device 110 Light source 118 Relay lens 120 Objective lens 124 Beam splitter 125 Lens focus actuator 131 Detector 170 Processor
Claims
1. A light source that irradiates light; A beam splitter that separates the irradiated light; An objective lens that moves in the direction where the wafer is located; A detector that acquires an image within the FOV (Field of view) on the wafer; and Binarize the acquired image into black and white, Recognize the positions of pixels in the binarized image where the gray value differs from the previous or next pixel in the vertical and / or horizontal directions as points, approximate them with the RANSAC (RANdom SAmple CONSensus) algorithm, and model the edge line, Identify the center position of the wafer using the modeled edge line, After calculating the center offset from the first correction center of the modeled edge line, correct the global position of the recipe for measurement, including a processor configured as such, The processor, stores three reference points arranged on the circular edge line of a reference wafer, and acquires a first image, a second image, and a third image from each of the three reference points, calculates a first offset value related to a first correction point having the same X value after half of the width of the image acquired from the first reference point of the first image, calculates a second offset value related to a second correction point having the same Y value after half of the height of the image acquired from the second reference point of the second image, calculates a third offset value related to a third correction point having the same Y value after half of the height of the image acquired from the third reference point of the third image, adds the calculated first offset value to the first reference point to obtain the first correction point, adds the calculated second offset value to the second reference point to obtain the second correction point, adds the calculated third offset value to the third reference point to obtain the third correction point, calculates a second correction center for the obtained first correction point to the obtained third correction point, adds the calculated second correction center to the global position of the recipe to correct the global position, The X value of the first correction point is the same as the X value of the first reference point, and the Y value of the first correction point is a value obtained by adding the calculated first offset value to the Y value of the first reference point, The X value of the second correction point is a value obtained by adding the calculated second offset value to the X value of the second reference point, and the Y value of the second correction point is the same as the Y value of the second reference point, The X value of the third correction point is a value obtained by adding the calculated third offset value to the X value of the third reference point, and the Y value of the third correction point is the same as the Y value of the third reference point. Alignment device. **Claim 2** The processor stores the number of pixels per gray value (brightness value) of the acquired image, calculates the ratio of each gray value to the total number of pixels, calculates a threshold value, compares the gray value with the threshold value, and reconstructs the gray value of the pixel to 0 or 255 to binarize the image. The alignment device according to claim 1. **Claim 3** The acquired image is composed of the wafer and the background of the wafer, or is composed of the wafer and the shadow of the wafer, or is composed of the shadow of the wafer and the reflector. The alignment device according to claim 1. **Claim 4** A method for aligning an alignment device including a light source that irradiates light, a beam splitter that separates the irradiated light, and an objective lens that moves in the direction where the wafer is located, comprising: Obtaining an image within the FOV on the wafer; Binarizing the obtained image into black and white; Recognizing the positions of pixels whose gray values are different from those of the previous or next pixels in the vertical direction and / or the horizontal direction in the binarized image as points, and approximating them with the RANSAC (RANdom SAmple CONSensus) algorithm to model an edge line; Identifying the center position of the wafer using the modeled edge line; and After calculating the center offset from the first correction center of the modeled edge line, correcting the global position of the recipe for measurement Including The step of obtaining an image within the FOV on the wafer Includes storing three reference points arranged on the circular edge line of the reference wafer and obtaining a first image, a second image, and a third image from each of the three reference points. The step of correcting the global position of the recipe Calculating a first offset value related to a first correction point having the same X value after half of the width of the image obtained from the first reference point of the first image; Calculating a second offset value related to a second correction point having the same Y value after half of the height of the image obtained from the second reference point of the second image; A step of calculating a third offset value related to a third correction point having the same Y value after half of the height of the image obtained from the third reference point of the third image; A step of adding the calculated first offset value to the first reference point to obtain the first correction point; A step of adding the calculated second offset value to the second reference point to obtain the second correction point; A step of adding the calculated third offset value to the third reference point to obtain the third correction point; A step of calculating a second correction center for the first correction point obtained from the third correction point obtained; and A step of adding the calculated second correction center to the global position of the recipe to correct the global position Including, The X value of the first correction point is the same as the X value of the first reference point, and the Y value of the first correction point is a value obtained by adding the calculated first offset value to the Y value of the first reference point, The X value of the second correction point is a value obtained by adding the calculated second offset value to the X value of the second reference point, and the Y value of the second correction point is the same as the Y value of the second reference point, The X value of the third correction point is a value obtained by adding the calculated third offset value to the X value of the third reference point, and the Y value of the third correction point is the same as the Y value of the third reference point, Alignment method.
5. The step of binarizing stores the number of individual gray values (light and dark values) per pixel of the obtained image, calculates the ratio of each gray value to the total pixels, calculates a threshold value, compares the gray value with the threshold value, and reconstructs the gray value of the pixel to 0 or 255 to binarize the image. The alignment method according to claim 4.
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