Demodulation circuit

The demodulation circuit addresses the challenges of high detection accuracy and short pull-in time in wireless communication systems by using a frequency analysis unit to determine the center frequency for correcting frequency errors, independent of synchronization, thereby improving performance across varying symbol rates.

JP7696680B2Active Publication Date: 2025-06-23JAPAN RADIO CO LTD
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Patent Information

Application Number
JP2021183826
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-11-11
Publication Date
2025-06-23
Estimated Expiration
2041-11-11

AI Technical Summary

Technical Problem

Conventional automatic frequency control processes in wireless communication systems, especially in satellite communications, face challenges in achieving high detection accuracy and shortening pull-in time, particularly at varying symbol rates.

Method used

A demodulation circuit that includes an automatic frequency control circuit, a roll-off filter, a carrier regeneration circuit, and a frequency analysis unit, which converts the received signal into the frequency domain to specify the center frequency for correcting frequency errors without relying on clock or carrier synchronization.

Benefits of technology

This solution enables high-speed frequency error detection at low symbol rates, achieving both high detection accuracy and shortened pull-in time with a consistent control flow across different symbol rates, while eliminating the need for complex frequency error correction controls.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To achieve both high detection accuracy and a reduced pull-in time by a same control flow independently of a symbol rate.SOLUTION: A demodulation circuit 1 has: an automatic frequency control circuit 2 that corrects a frequency error of a reception signal (a modulation signal); a roll-off filter 4 provided at a rear stage of the automatic frequency control circuit 2 to apply band limit processing on the reception signal; a carrier reproduction circuit 5 provided at a rear stage of the roll-off filter 4 to correct a phase error of the reception signal; and a frequency analysis part 3 connected between the automatic frequency control circuit 2 and the roll-off filter 4 to convert the reception signal outputted from the automatic frequency control circuit 2 into a frequency-domain signal and specify a center frequency of a power peak frequency band for a frequency-domain signal. The automatic frequency control circuit 2 corrects the frequency error of the reception signal using the center frequency.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present invention relates to a demodulation circuit that is applied to wireless communication performed via a communication satellite, for example, to achieve synchronous detection.

Background Art

[0002] In a wireless communication system that performs wireless communication between a transmitting device and a receiving device via a communication satellite, since the frequency error of the communication satellite is large, the total frequency error between transmission and reception may be outside the frequency pulling-in range of carrier regeneration of the reception demodulator. In order to cope with a wireless communication system having a local frequency error outside the frequency pulling-in range of carrier regeneration of the reception demodulator, the receiving device changes the local frequency within the width in which the carrier regeneration frequency can be pulled in and searches for the frequency error, thereby roughly adjusting the local frequency error. For this purpose, an Automatic Frequency Controller (AFC) circuit is used. As a conventional automatic frequency control device, the C / N of the control channel signal notified from the C / N measurement unit is collated with the number of U / W (unique word) detections notified from the U / W (unique word) detection unit corresponding to a predetermined C / N value, and the difference Δf between the carrier frequency and the current local signal is reduced until the required number of times is satisfied. An oscillation frequency control signal is output to the NCO to perform frequency correction, and the adjustment procedure is repeated. When a predetermined number of U / W detections is obtained, it is determined that the capture and lock procedures of the carrier required for AFC have been completed, and a device that shifts to the tracking mode is known (see Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, in the conventional automatic frequency control process such as Patent Document 1, the detection determination of the frequency error is performed based on the availability of unique word detection. However, in order to perform this determination, it is premised that clock synchronization and carrier synchronization are established. Therefore, there is a problem that it takes time to pull in at a low symbol rate where synchronization takes time. Further, in a wireless communication system that supports communications with various symbol rates (symbol frequencies) such as a satellite communication system, the synchronization pull-in range and pull-in time vary greatly depending on the symbol rate. For this reason, when the symbol rate is low, the pull-in time of carrier regeneration is long, so it takes time for the initial pull-in of automatic frequency control, and there is a problem that the wait time becomes long when the receiving device searches for the frequency error and it takes time for the initial pull-in. Also, when the symbol rate is high, there are cases where the correct frequency error cannot be detected because the carrier synchronization pull-in range is wide and the pull-in time is short, and there is a problem that complicated control such as re-inputting the frequency error of the automatic frequency control including the frequency error of the carrier regeneration loop and waiting for the synchronization of the carrier regeneration again is required.

[0005] Therefore, an object of the present invention is to provide a demodulation circuit capable of achieving both high detection accuracy and shortening of the pull-in time with the same control flow regardless of the symbol rate.

Means for Solving the Problems

[0006] In order to solve the above problems, a demodulation circuit according to the present invention includes an automatic frequency control circuit that corrects the frequency error of a received signal, a roll-off filter provided at a subsequent stage of the automatic frequency control circuit that performs a band-limiting process on the received signal, a carrier regeneration circuit provided at a subsequent stage of the roll-off filter that corrects the phase error of the received signal, and a frequency analysis unit connected between the automatic frequency control circuit and the roll-off filter that converts the received signal output from the automatic frequency control circuit into a signal in the frequency domain and specifies the center frequency of the frequency band of the peak of the power of the signal in the frequency domain, and the automatic frequency control circuit is Without determining the correction of the phase error in the carrier reproduction circuit,characterized in that the frequency error of the received signal is corrected using the center frequency.

[0007] The demodulation circuit according to the present invention measures the total power of the frequency band of the peak of the power for the signal in the frequency domain, and based on the power difference between the total power and a predetermined reference power, determines a attenuation rate so that the power of the received signal output from the automatic frequency control circuit converges to the reference power, and a variable attenuator provided between the connection point of the frequency analysis unit and the roll-off filter and attenuating the power of the received signal output from the automatic frequency control circuit by the attenuation rate.

[0008] The demodulation circuit according to the present invention estimates at least one of the carrier-to-noise ratio and the interference level of the signal in the frequency domain, and outputs a switch control signal when at least one of the conditions that the carrier-to-noise ratio is equal to or higher than a predetermined C / N threshold value and the interference level is equal to or lower than a predetermined interference level threshold value is satisfied, and an on-off switch provided between the automatic frequency control circuit and the frequency analysis unit and switching from an off state to an on state when the switch control signal is input and inputting the center frequency from the frequency analysis unit to the automatic frequency control circuit.

[0009] The demodulation circuit according to the present invention may have a switching switch that switches which of the center frequencies of the frequency bands of a plurality of power peaks for the signal in the frequency domain specified in the frequency analysis unit is output according to the result of known pattern synchronization in a synchronization detection unit provided after the carrier reproduction circuit.

[0010] The demodulation circuit according to the present invention In the frequency analysis unit, a signal having a narrower frequency band than the frequency band used in communication is converted into the signal in the frequency domain. The reception

Advantages of the Invention

[0011] According to the demodulation circuit of the present invention, since the frequency error can be detected without depending on clock synchronization, it is possible to detect the frequency error at high speed even at a low symbol rate. As a result, it is possible to achieve both high detection accuracy and shortened pull-in time with the same control flow regardless of the symbol rate. According to the demodulation circuit of the present invention, further, control for correcting different frequency errors for each symbol frequency becomes unnecessary.

[0012] According to the demodulation circuit of the present invention, since the automatic frequency control is completed without going through carrier synchronization (correction of phase error) in the carrier recovery circuit and known pattern synchronization (detection / judgment of phase synchronization / non-synchronization) in the synchronization detection unit, it is possible to shorten the pull-in time.

[0013] According to the demodulation circuit of the present invention, when having a power detection unit for determining the attenuation rate and a variable attenuator that operates using the attenuation rate, the result of power detection based on the information obtained in the frequency analysis unit used for automatic frequency control is supplied to the variable attenuator that may be provided when power (in other words, intensity, level) adjustment is required as a demodulation circuit. Therefore, it is possible to achieve both high detection accuracy and shortened pull-in time while suppressing the circuit configuration from becoming complicated.

[0014] According to the demodulation circuit of the present invention, when considering at least one of the carrier-to-noise ratio and the interference level, the frequency error can be corrected using the frequency when the carrier-to-noise ratio is high or the interference level is low, and it is possible to improve the reliability of the frequency error correction process.

[0015] According to the demodulation circuit of the present invention, when any one of the center frequencies of the frequency bands of the plurality of power peaks of the signal in the frequency region specified by the frequency analysis unit is used, synchronization processing is performed only on the power peaks narrowed down based on the result of the Fourier transform. Therefore, it is possible to shorten the acquisition time.

[0016] According to the demodulation circuit of the present invention, when a signal having a narrower frequency band than the frequency band used in communication is converted into a signal in the frequency region, it is possible to surely detect the peak of the intensity / level of the signal for the channel to be detected.

Brief Description of the Drawings

[0017]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Modes for Carrying Out the Invention

[0018] Hereinafter, the present invention will be described based on the illustrated embodiments.

[0019] (Embodiment 1) FIG. 1 is a functional block diagram showing a schematic configuration of a demodulation circuit 1 according to Embodiment 1 of the present invention. The demodulation circuit 1 is incorporated in, for example, a receiving device (or a processing mechanism for a received signal of each device when two-way communication is performed between a transmitting device and a receiving device) that constitutes a wireless communication system that performs wireless communication between a transmitting device and a receiving device via a communication satellite (in other words, using a satellite communication line).

[0020] The demodulation circuit 1 is a mechanism for performing synchronous detection of a modulation signal, and mainly includes an automatic frequency control circuit 2, a frequency analysis unit 3, a roll-off filter 4, a carrier reproduction circuit 5, a demodulation unit 6, and a synchronous detection unit 7. Although the modulation / demodulation method in the present invention is not limited to a specific method, for example, a QPSK (Quadrature Phase Shift Keying) method can be used.

[0021] In the automatic frequency control (AFC: Automatic Frequency Controller) circuit 2, for example, a high-frequency (RF: Radio Frequency) wireless signal received via an antenna is frequency-converted into an intermediate-frequency (IF: Intermediate Frequency) signal and a digital received signal (modulation signal) that has been analog-to-digital converted is input.

[0022] The automatic frequency control circuit 2 is a mechanism for removing / correcting a frequency error (in other words, a frequency deviation) between the transmission local frequency of the transmitting device included in the received signal (modulation signal) input to the circuit 2 and the reception local frequency in the receiving device, and mainly includes a frequency control unit 21, a numerically controlled oscillator 22 for AFC, and a multiplier 23 for AFC.

[0023] The frequency control unit 21 outputs frequency information corresponding to a frequency error between the transmission local frequency of the transmitting device and the reception local frequency in the receiving device.

[0024] The numerically controlled oscillator 22 (NCO: Numerically Controlled Oscillator) for AFC receives the input of the frequency information output from the frequency control unit 21, converts the frequency information into a complex number, and outputs it.

[0025] The multiplier 23 for AFC receives the input of the received signal (modulation signal) input to the automatic frequency control circuit 2 and the input of the complex number output from the numerically controlled oscillator 22 for AFC, and performs complex multiplication processing (that is, complex multiplication processing according to the above frequency information) on the received signal (modulation signal) using the complex number and outputs it.

[0026] In this invention, the automatic frequency control circuit 2 is not provided with a synchronization determination circuit for detecting and determining frequency synchronization / non-synchronization.

[0027] The frequency analysis unit 3 is connected between the automatic frequency control circuit 2 and the roll-off filter 4, receives the supply of the signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC), performs Fourier transform on the signal, and converts the signal in the time domain into a signal in the frequency domain. The frequency analysis unit 3 performs Fourier transform on the signal before the processing by the roll-off filter 4, and collectively processes the frequency band within the range of the assumed frequency error (or the range within which the demodulation circuit 1 can pull in the carrier frequency).

[0028] In the frequency analysis unit 3, the signal in the time domain is Fourier-transformed at regular intervals (in other words, in cycles at regular time intervals). As a result, the signal in the time domain is converted into a signal in the frequency domain. The Fourier transform may be a fast Fourier transform (FFT: Fast Fourier Transformation) or a discrete Fourier transform (DFT: Discrete Fourie Transform).

[0029] The frequency analysis unit 3 performs a Fourier transform on a frequency band that includes at least the range of assumed frequency errors (or the range within which the demodulation circuit 1 can lock in the frequency of the carrier recovery).

[0030] As a result of the Fourier transform in the frequency analysis unit 3, combined data of power (in dBm) and frequency bins is generated.

[0031] The roll-off filter 4 (ROF: Roll-Off Filter) is composed of a low-pass filter (LPF: Low Pass Filter) realized as a finite impulse response, receives the input of the signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC), performs a band-limiting process on the signal, and outputs it.

[0032] The carrier recovery (CR: Carrier Recovery) circuit 5 is a mechanism for removing / correcting the phase error between the phase of the transmission signal / carrier of the transmitting device included in the signal output from the roll-off filter 4 and the phase of the received signal (modulated signal) / carrier in the receiving device (in other words, the error / shift of the phase of the received signal with respect to the ideal phase), and mainly includes a phase error detection unit 51, a low-pass filter 52, a numerically controlled oscillator 53 for CR, and a multiplier 54 for CR.

[0033] The phase error detection unit 51 receives the supply of the signal output from the multiplier 54 for CR, detects the phase error (that is, the error / shift of the phase of the signal with respect to the ideal phase) included in the signal, and outputs a signal indicating the phase error.

[0034] The low-pass filter 52 (LPF: Low Pass Filter) receives the input of the signal indicating the phase error output from the phase error detection unit 51, performs a band-limiting process on the signal indicating the phase error, and outputs it (specifically, only allows low-frequency components to pass through).

[0035] The numerically controlled oscillator 53 (NCO: Numerically Controlled Oscillator) for CR receives the input of a signal indicating the phase error output from the low-pass filter 52, converts the phase error into a complex number, and outputs it.

[0036] The multiplier 54 for CR receives the input of the signal output from the roll-off filter 4 and the input of the complex number output from the numerically controlled oscillator 53 for CR, and performs complex multiplication processing (i.e., complex multiplication processing according to the above phase error) on the signal using the complex number and outputs it.

[0037] The demodulation unit 6 receives the input of the signal output from the carrier recovery circuit 5 (specifically, the multiplier 54 for CR), detects the signal, demodulates it into predetermined data (e.g., QPSK demodulation), and outputs it as a signal frame (a signal of a bit string).

[0038] The synchronization detection unit 7 receives the input of the signal frame output from the demodulation unit 6, and performs a process of detecting and determining phase synchronization / non-synchronization by using the detection of a known pattern such as a unique word (UW: Unique Word), which is a synchronization signal included in the signal frame.

[0039] And the demodulation circuit 1 according to Embodiment 1 includes an automatic frequency control circuit 2 that corrects the frequency error of the received signal (modulated signal), a roll-off filter 4 provided at the subsequent stage of the automatic frequency control circuit 2 that performs band-limiting processing on the received signal, a carrier recovery circuit 5 provided at the subsequent stage of the roll-off filter 4 that corrects the phase error of the received signal, and a frequency analysis unit 3 connected between the automatic frequency control circuit 2 and the roll-off filter 4 that converts the received signal output from the automatic frequency control circuit 2 into a signal in the frequency domain and specifies the center frequency of the frequency band of the peak of the power of the signal in the frequency domain. The automatic frequency control circuit 2 corrects the frequency error of the received signal using the center frequency.

[0040] The frequency analysis unit 3 identifies the frequency band of the peak of the power and the center frequency of the frequency band of the peak of the power (referred to as "peak frequency fpeak") for the combined data of the power (in dBm) and the frequency bin generated as a result of the Fourier transform. The peak frequency fpeak corresponds to the frequency error (in other words, the offset frequency) between the transmission local frequency of the transmission-side device and the reception local frequency in the reception-side device.

[0041] Then, the frequency analysis unit 3 outputs the value of the identified peak frequency fpeak to the frequency control unit 21.

[0042] The frequency control unit 21 receives the input of the value of the peak frequency fpeak output from the frequency analysis unit 3, and outputs the value of the peak frequency fpeak to the numerically controlled oscillator 22 for AFC as frequency information.

[0043] As described above, the value of the peak frequency fpeak corresponding to the frequency error (in other words, the offset frequency) between the transmission local frequency of the transmission-side device and the reception local frequency in the reception-side device is output to the numerically controlled oscillator 22 for AFC.

[0044] The numerically controlled oscillator 22 for AFC calculates the phase error Δθ according to the following formula 1 using the value of the peak frequency fpeak. As the reference clock Fref, for example, a clock that generates a symbol clock is used. (Equation 1) Δθ = 360 / (Fref / fpeak) Here, Δθ: Phase error [deg] Fref: Reference clock [kHz] fpeak: Peak frequency [kHz]

[0045] Then, the numerically controlled oscillator 22 for AFC converts the calculated phase error Δθ into a complex number by means of a table or the like and outputs it.

[0046] Subsequently, the multiplier 23 for AFC performs complex multiplication processing (i.e., complex multiplication processing according to the phase error Δθ corresponding to the peak frequency fpeak) on the received signal (modulated signal) input to the automatic frequency control circuit 2 using the complex number output from the numerically controlled oscillator 22 for AFC, and outputs the result. Thus, the automatic frequency control process is completed.

[0047] The signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC) is input to the carrier recovery circuit 5 via the roll-off filter 4, and the processing by the carrier recovery circuit 5, the demodulation unit 6, and the synchronous detection unit 7 is performed.

[0048] (Embodiment 2) FIG. 2 is a functional block diagram showing the schematic configuration of the demodulation circuit 1 according to Embodiment 2 of the present invention. The demodulation circuit 1 according to Embodiment 2 mainly differs from Embodiment 1 above in that it has a power detection unit 8 and a variable attenuator 9, and the roll-off filter 4 receives the input of the signal output from the variable attenuator 9 instead of the automatic frequency control circuit 2. Since the other configurations are the same as those in Embodiment 1, the same reference numerals are used for the same configurations as in Embodiment 1, and the description thereof is omitted.

[0049] The demodulation circuit 1 according to Embodiment 2 includes an automatic frequency control circuit 2 that corrects the frequency error of a received signal (modulated signal), a roll-off filter 4 provided at a subsequent stage of the automatic frequency control circuit 2 that performs band-limiting processing on the received signal, a carrier recovery circuit 5 provided at a subsequent stage of the roll-off filter 4 that corrects the phase error of the received signal, a frequency analysis unit 3 connected between the automatic frequency control circuit 2 and the roll-off filter 4 that converts the received signal output from the automatic frequency control circuit 2 into a signal in the frequency domain and identifies the center frequency of the frequency band of the peak of the power of the signal in the frequency domain, and the automatic frequency control circuit 2 corrects the frequency error of the received signal using the center frequency, measures the total power of the frequency band of the peak of the power of the signal in the frequency domain, and determines an attenuation rate based on the power difference between the total power and a predetermined reference power so that the power of the received signal output from the automatic frequency control circuit 2 converges to the reference power, and a variable attenuator 9 provided between the connection point of the frequency analysis unit 3 and the roll-off filter 4 that attenuates the power of the received signal output from the automatic frequency control circuit 2 by the attenuation rate.

[0050] Also in Embodiment 2, similar to the above-described Embodiment 1, the value of the peak frequency fpeak is output from the frequency analysis unit 3 to the frequency control unit 21, and the value of the peak frequency fpeak is output from the frequency control unit 21 to the numerically controlled oscillator 22 for AFC as frequency information.

[0051] The power detection unit 8 receives the supply of combined data of the power (in dBm) generated as a result of Fourier transform and the frequency bin from the frequency analysis unit 3, identifies the frequency band of the peak of the power for the combined data (note that it is identified in the same manner as the identification of the frequency band of the peak of the power by the frequency analysis unit 3. Also, the supply of the frequency band of the peak of the power identified by the frequency analysis unit 3 may be received from the frequency analysis unit 3), and measures the total power of the frequency band of the peak of the power.

[0052] The power detection unit 8 further detects the power difference between the total power in the frequency band of the peak of the power obtained as the measurement result and a predetermined reference power (for example, the power predetermined as an appropriate level for the processing and circuits subsequent to the variable attenuator 9), and based on the power difference, determines the attenuation rate so that the power of the signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC) converges to the reference power.

[0053] Then, the power detection unit 8 outputs an attenuation rate control signal for controlling the variable attenuator 9 so as to obtain the determined attenuation rate.

[0054] The variable attenuator 9 is provided between the connection point of the frequency analysis unit 3 connected between the automatic frequency control circuit 2 and the roll-off filter 4 and the roll-off filter 4 (that is, the frequency analysis unit 3 is connected between the automatic frequency control circuit 2 and the variable attenuator 9). It receives the input of the signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC) and the input of the attenuation rate control signal output from the power detection unit 8, and attenuates and outputs the power (in other words, the amplitude) of the signal output from the automatic frequency control circuit 2 at the attenuation rate according to the attenuation rate control signal.

[0055] As described above, similar to the first embodiment, the value of the peak frequency fpeak corresponding to the frequency error (in other words, the offset frequency) between the transmission local frequency of the transmission-side device and the reception local frequency in the reception-side device is output to the numerically controlled oscillator 22 for AFC.

[0056] The numerically controlled oscillator 22 for AFC calculates the phase error Δθ according to the above formula 1 using the value of the peak frequency fpeak, and converts the calculated phase error Δθ into a complex number by a table or the like and outputs it.

[0057] Subsequently, the multiplier 23 for AFC performs complex multiplication processing (i.e., complex multiplication processing according to the phase error Δθ corresponding to the peak frequency fpeak) on the received signal (modulated signal) input to the automatic frequency control circuit 2 using the complex number output from the numerically controlled oscillator 22 for AFC and outputs the result. Thereby, the processing of automatic frequency control is completed.

[0058] The signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC) is input to the carrier recovery circuit 5 via the roll-off filter 4, and the processing by the carrier recovery circuit 5, the demodulation unit 6, and the synchronous detection unit 7 is performed.

[0059] (Embodiment 3) FIG. 3 is a functional block diagram showing the schematic configuration of the demodulation circuit 1 according to Embodiment 3 of the present invention. The demodulation circuit 1 according to Embodiment 3 is different in configuration from Embodiment 1 above mainly in that it mainly has an estimation unit 10 and a switch 11. Since other configurations are the same as those in Embodiment 1 above, the same reference numerals are given to the same configurations as in Embodiment 1 and the description thereof is omitted.

[0060] The demodulation circuit 1 according to Embodiment 3 includes an automatic frequency control circuit 2 that corrects the frequency error of a received signal (modulated signal), a roll-off filter 4 provided at a subsequent stage of the automatic frequency control circuit 2 that performs band-limiting processing on the received signal, a carrier recovery circuit 5 provided at a subsequent stage of the roll-off filter 4 that corrects the phase error of the received signal, and a frequency analysis unit 3 connected between the automatic frequency control circuit 2 and the roll-off filter 4 that converts the received signal output from the automatic frequency control circuit 2 into a signal in the frequency domain and identifies the center frequency of the frequency band of the peak of the power of the signal in the frequency domain. The automatic frequency control circuit 2 corrects the frequency error of the received signal using the center frequency, and also estimates at least one of the carrier-to-noise ratio and the interference level of the signal in the frequency domain, and outputs a switch control signal when at least one of the conditions that the carrier-to-noise ratio is equal to or higher than a predetermined C / N threshold value and the interference level is equal to or lower than a predetermined interference level threshold value is satisfied. It has an on-off switch 11 provided between the automatic frequency control circuit 2 and the frequency analysis unit 3 that, when a switch control signal is input, changes from an off state to an on state and inputs the center frequency from the frequency analysis unit 3 to the automatic frequency control circuit 2.

[0061] Also in Embodiment 3, the frequency analysis unit 3 identifies the frequency band of the peak of the power and the center frequency of the frequency band of the peak of the power (i.e., the peak frequency fpeak) for the combined data of the power (in dBm units) and the frequency bin generated as a result of the Fourier transform.

[0062] The estimation unit 10 receives the supply of the combined data of the power (in dBm units) and the frequency bin generated as a result of the Fourier transform from the frequency analysis unit 3, and estimates the carrier-to-noise ratio or the interference level using the combined data.

[0063] Specifically, the estimation unit 10 identifies the frequency band of the power peak for the above combination data (note that the identification is performed in the same manner as the identification of the frequency band of the power peak by the frequency analysis unit 3. Alternatively, the frequency analysis unit 3 may supply the identified frequency band of the power peak. Also, the estimation unit 10 calculates the ratio between the total power of the frequency band of the power peak and the total power of other frequency bands, thereby estimating the carrier-to-noise ratio (C / N ratio, CNR: Carrier to Noise Ratio).

[0064] Alternatively, the estimation unit 10 calculates the ratio between the total power of the frequency band of the radio wave to be received (i.e., the desired signal) and the total power of the interfering radio wave (i.e., the undesired signal) for the above combination data, thereby estimating the interference level (D / U ratio).

[0065] The on / off switch 11 is provided between the frequency control unit 21 and the frequency analysis unit 3 and operates according to the switch control signal output from the estimation unit 10. The on / off switch 11 is in the "off" state (in other words, the "disconnected" state) as the initial state.

[0066] When the estimated carrier-to-noise ratio is equal to or greater than a predetermined C / N threshold value or when the estimated interference level is equal to or less than a predetermined interference level threshold value, the estimation unit 10 outputs a switch control signal for controlling the on / off switch 11 to be in the "on" state (in other words, the "connected" state).

[0067] As a result, the on / off switch 11 changes from the "off" state to the "on" state, and the value of the peak frequency fpeak identified by the frequency analysis unit 3 is output from the frequency analysis unit 3 to the frequency control unit 21 via the on / off switch 11.

[0068] In addition, when the estimated carrier-to-noise ratio is less than a predetermined C / N threshold value or when the estimated interference level is greater than a predetermined interference level threshold value, the Fourier transform processing by the frequency analysis unit 3, the estimation processing, and the determination processing by the estimation unit 10 are repeatedly performed until the estimated carrier-to-noise ratio becomes equal to or greater than the predetermined C / N threshold value or until the estimated interference level becomes equal to or less than the predetermined interference level threshold value. In other words, the process waits while repeating the processing until the state of the propagation path escapes from a low carrier-to-noise ratio or a high interference level.

[0069] The frequency control unit 21 receives the input of the value of the peak frequency fpeak output from the frequency analysis unit 3 and outputs the value of the peak frequency fpeak as frequency information to the numerically controlled oscillator 22 for AFC.

[0070] As described above, the value of the peak frequency fpeak corresponding to the frequency error (in other words, the offset frequency) between the transmission local frequency of the transmission-side device and the reception local frequency in the reception-side device is output to the numerically controlled oscillator 22 for AFC.

[0071] The numerically controlled oscillator 22 for AFC calculates the phase error Δθ according to the above formula 1 using the value of the peak frequency fpeak, and converts the calculated phase error Δθ into a complex number by a table or the like and outputs it.

[0072] Subsequently, the multiplier 23 for AFC performs complex multiplication processing (that is, complex multiplication processing according to the phase error Δθ corresponding to the peak frequency fpeak) on the reception signal (modulation signal) input to the automatic frequency control circuit 2 using the complex number output from the numerically controlled oscillator 22 for AFC and outputs the result. Thereby, the processing of automatic frequency control is completed.

[0073] The signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC) is input to the carrier recovery circuit 5 via the roll-off filter 4, and the processing by the carrier recovery circuit 5, the demodulation unit 6, and the synchronous detection unit 7 is performed.

[0074] (Embodiment 4) FIG. 4 is a functional block diagram showing a schematic configuration of the demodulation circuit 1 according to Embodiment 4 of the present invention. The demodulation circuit 1 according to Embodiment 4 is different in configuration from Embodiment 1 above mainly in that it has a switching switch 12, but the other configurations are the same as those in Embodiment 1 above. Therefore, the same components as those in Embodiment 1 are denoted by the same reference numerals and their description is omitted.

[0075] The demodulation circuit 1 according to Embodiment 4 includes an automatic frequency control circuit 2 that corrects the frequency error of a received signal (modulated signal), a roll-off filter 4 that is provided at the subsequent stage of the automatic frequency control circuit 2 and performs band-limiting processing on the received signal, a carrier recovery circuit 5 that is provided at the subsequent stage of the roll-off filter 4 and corrects the phase error of the received signal, and a frequency analysis unit 3 that is connected between the automatic frequency control circuit 2 and the roll-off filter 4, converts the received signal output from the automatic frequency control circuit 2 into a signal in the frequency domain, and specifies the center frequency of the frequency band of the peak of the power of the signal in the frequency domain. The automatic frequency control circuit 2 corrects the frequency error of the received signal using the center frequency, and a switching switch 12 that switches which of the center frequencies of the frequency bands of the plurality of power peaks of the signal in the frequency domain specified by the frequency analysis unit 3 is output according to the result of known pattern synchronization in a synchronization detection unit 7 provided at the subsequent stage of the carrier recovery circuit 5.

[0076] In Embodiment 4, it is assumed that a plurality of power peaks are identified. That is, in Embodiment 4, the frequency analysis unit 3 identifies a plurality of frequency bands of power peaks and the center frequency of each of the frequency bands of the plurality of power peaks (referred to as "peak frequency fpeak_m"; however, m is an identifier for mutually distinguishing the center frequencies of the frequency bands of the plurality of power peaks, and m = 1, 2, 3, ···) for the combined data of the power (in dBm) and the frequency bin generated as a result of the Fourier transform. Any one of the plurality of peak frequencies fpeak_m corresponds to the frequency error (in other words, the offset frequency) between the transmission local frequency of the transmission-side device and the reception local frequency in the reception-side device.

[0077] The switching switch 12 is provided between the frequency control unit 21 and the frequency analysis unit 3 as an output mechanism from the frequency analysis unit 3 to the frequency control unit 21, and operates according to the switch control signal output from the synchronous detection unit 7.

[0078] First, the switching switch 12 is in a state where the peak frequency fpeak_1 is output as the initial state. Thereby, the value of the peak frequency fpeak_1 among the plurality of peak frequencies fpeak_m specified by the frequency analysis unit 3 is output from the frequency analysis unit 3 to the frequency control unit 21 via the switching switch 12.

[0079] The frequency control unit 21 receives the input of the value of the peak frequency fpeak_1 output from the frequency analysis unit 3, and outputs the value of the peak frequency fpeak_1 to the numerically controlled oscillator 22 for AFC as frequency information.

[0080] The numerically controlled oscillator 22 for AFC calculates the phase error Δθ according to the above formula 1 using the value of the peak frequency fpeak_1, and converts the calculated phase error Δθ into a complex number by a table or the like and outputs it.

[0081] Subsequently, the multiplier 23 for AFC performs complex multiplication processing (i.e., complex multiplication processing according to the phase error Δθ corresponding to the peak frequency fpeak_1) on the received signal (modulated signal) input to the automatic frequency control circuit 2 using the complex number output from the numerically controlled oscillator 22 for AFC, and outputs the result.

[0082] The signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC) is input to the carrier recovery circuit 5 via the roll-off filter 4, and processing by the carrier recovery circuit 5 and the demodulation unit 6 is performed.

[0083] Subsequently, in the synchronization detection unit 7, processing is performed to detect and determine phase synchronization / non-synchronization by utilizing the detection of a known pattern such as a unique word (UW), which is a synchronization signal included in the signal frame output from the demodulation unit 6.

[0084] When the synchronization detection unit 7 detects phase non-synchronization, it outputs a switch control signal to the switching switch 12 to control the switching switch 12 so that the next peak frequency is output. As a result, the value of the peak frequency fpeak_2 among the plurality of peak frequencies fpeak_m specified by the frequency analysis unit 3 is output from the frequency analysis unit 3 to the frequency control unit 21 via the switching switch 12.

[0085] The frequency control unit 21 receives the input of the value of the peak frequency fpeak_2 output from the frequency analysis unit 3, and outputs the value of the peak frequency fpeak_2 as frequency information to the numerically controlled oscillator 22 for AFC.

[0086] Subsequently, similar to the case of the peak frequency fpeak_1 described above, processing is performed by the numerically controlled oscillator 22 for AFC, the multiplier 23 for AFC, the roll-off filter 4, the carrier recovery circuit 5, and the demodulation unit 6.

[0087] Subsequently, in the synchronization detection unit 7, a process of detecting and determining phase synchronization / asynchronization is performed by utilizing the detection of a known pattern such as a unique word (UW), which is a synchronization signal included in the signal frame output from the demodulation unit 6.

[0088] When the synchronization detection unit 7 detects phase asynchronization, it outputs a switch control signal to the switching switch 12 for controlling the switching switch 12 so that the next peak frequency is output. As a result, among the plurality of peak frequencies fpeak_m specified by the frequency analysis unit 3, the value of the peak frequency fpeak_3 is output from the frequency analysis unit 3 to the frequency control unit 21 via the switching switch 12.

[0089] On the other hand, when the synchronization detection unit 7 detects phase synchronization, it does not output a switch control signal to the switching switch 12. As a result, the state where the value of the current peak frequency fpeak_2 is output from the frequency analysis unit 3 to the frequency control unit 21 via the switching switch 12 is maintained.

[0090] As described above, a value of a frequency corresponding to the frequency error (in other words, the offset frequency) between the transmission local frequency of the transmission-side device and the reception local frequency in the reception-side device, and a value of any one of the plurality of peak frequencies fpeak_m is output to the numerically controlled oscillator 22 for AFC. As a result, the process of automatic frequency control is completed.

[0091] The numerically controlled oscillator 22 for AFC calculates the phase error Δθ according to the above formula 1 using the value of the peak frequency fpeak_m selected as described above, and converts the calculated phase error Δθ into a complex number by a table or the like and outputs it.

[0092] Subsequently, the multiplier 23 for AFC performs complex multiplication processing (i.e., complex multiplication processing according to the phase error Δθ corresponding to the peak frequency fpeak_m selected as described above) on the received signal (modulated signal) input to the automatic frequency control circuit 2 using the complex number output from the numerically controlled oscillator 22 for AFC, and outputs the result. Thereby, the processing of automatic frequency control is completed.

[0093] The signal output from the automatic frequency control circuit 2 (specifically, the multiplier 23 for AFC) is input to the carrier recovery circuit 5 via the roll-off filter 4, and the processing by the carrier recovery circuit 5, the demodulation unit 6, and the synchronous detection unit 7 is performed.

[0094] (Use of a signal with a narrow frequency band) For example, as shown in FIG. 5(A), in addition to the center frequency of the channel to be detected (in other words, the target of synchronous detection and the detection of frequency error, for example, the oscillation frequency (local frequency) of the numerically controlled oscillator 22 for AFC that follows the transmission local frequency of the transmitting device), the center frequencies of other (for example, adjacent) channels may be included in the frequency range in which the frequency analysis unit 3 performs Fourier transform (specifically, at least including the assumed frequency error range (or the range in which the demodulation circuit 1 can pull in the carrier frequency)).

[0095] In this case, there may be a plurality of peaks in the signal strength / level, and in the above-described Embodiments 1 to 3, in the frequency analysis unit 3, the peak of the signal strength / level of a signal of a channel other than the channel to be detected may be detected (in other words, selected).

[0096] Therefore, as shown in FIG. 5(B), for the channel to be detected, a signal with a frequency band narrower than the frequency band used for communication may be transmitted from the transmitting device, and the signal with the narrow frequency band may be used in the receiving device.

[0097] The receiving device (specifically, the frequency analysis unit 3) identifies, among the plurality of peaks in the signal intensity / level, the signal with a narrow peak width compared to the peak width (in other words, the spread at the base) of the peaks in the intensity / level of other signals as the signal of the channel to be detected. After that, the Fourier transform process is performed on the signal of the identified channel to be detected to convert it into a signal in the frequency domain, and the peak frequency fpeak is identified based on the peak in the intensity / level of the signal of the identified channel to be detected.

[0098] In this case, a signal with a narrow frequency band is transmitted from the transmitting device for a predetermined time determined in advance, or is transmitted until a signal for notifying that the process of detecting the peak in the intensity / level of the signal for the channel to be detected has ended is transmitted from the receiving device to the transmitting device.

[0099] According to the demodulation circuit 1 according to Embodiments 1 to 4, since the frequency error can be detected without relying on clock synchronization, it is possible to detect the frequency error at high speed even at a low symbol rate. Subsequently, it is possible to achieve both high detection accuracy and shortening of the pull-in time with the same control flow regardless of the symbol rate. According to the demodulation circuit 1 according to Embodiments 1 to 4, also, control for correcting different frequency errors for each symbol frequency becomes unnecessary.

[0100] According to the demodulation circuit 1 according to Embodiments 1 to 3, since the automatic frequency control is completed without going through the carrier synchronization (correction of phase error) in the carrier recovery circuit 5 and the known pattern synchronization (detection / judgment of phase synchronization / asynchronization) in the synchronization detection unit 7, it is possible to shorten the pull-in time.

[0101] According to the demodulation circuit 1 according to Embodiments 1 to 3, when a signal with a frequency band narrower than the frequency band used in communication is converted into a signal in the frequency domain, it becomes possible to reliably detect the peak in the intensity / level of the signal for the channel to be detected.

[0102] According to the demodulation circuit 1 according to Embodiment 2, the result of power detection based on the information acquired in the frequency analysis unit 3 used for automatic frequency control is supplied to a variable attenuator 9 that is provided when power (in other words, intensity, level) adjustment is required as a demodulation circuit. Therefore, it is possible to achieve both high detection accuracy and shortening of the pull-in time while suppressing the circuit configuration from becoming complicated.

[0103] According to the demodulation circuit 1 according to Embodiment 3, since the frequency error is corrected using the frequency when the carrier-to-noise ratio is high or the interference level is low, it is possible to improve the reliability of the frequency error correction process.

[0104] According to the demodulation circuit 1 according to Embodiment 4, since the synchronization process is performed only on the peak of the power narrowed down based on the result of the Fourier transform, it is possible to shorten the pull-in time.

[0105] Although the embodiments of the present invention have been described above, the specific configuration is not limited to the above embodiments, and even if there are design changes and the like within the scope not departing from the gist of the present invention, they are included in the present invention.

[0106] For example, the carrier reproduction circuit 5, the demodulation unit 6, and the synchronous detection unit 7 are not limited to a specific configuration in the present invention and are not limited to the configuration in the above embodiments.

[0107] Also, in the above Embodiment 3, the on-off switch 11 is turned on when the carrier-to-noise ratio is equal to or higher than the C / N threshold value or the interference level is equal to or lower than the interference level threshold value. However, after estimating both the carrier-to-noise ratio and the interference level, the on-off switch 11 may be turned on when at least one of the condition that the carrier-to-noise ratio is equal to or higher than the C / N threshold value and the condition that the interference level is equal to or lower than the interference level threshold value is satisfied.

[0108] Also, in the above-described Embodiments 3 and 4, the power detection unit 8 and the variable attenuator 9 are not provided. However, the power detection unit 8 and the variable attenuator 9 may also be provided in Embodiments 3 and 4. In the case of Embodiment 3, when the on-off switch 11 changes from the off state to the on state, the power detection unit 8 determines and outputs the attenuation rate, and the variable attenuator 9 performs attenuation processing using the attenuation rate. In the case of Embodiment 4, for the frequency band of the power peak corresponding to the peak frequency fpeak_m output from the frequency analysis unit 3 to the frequency control unit 21 via the switching switch 12 among the frequency bands of the power peaks specified by the frequency analysis unit 3, the power detection unit 8 determines and outputs the attenuation rate, and the variable attenuator 9 performs attenuation processing using the attenuation rate.

Explanation of Reference Numerals

[0109] 1 Demodulation circuit 2 Automatic frequency control circuit (AFC) 21 Frequency control unit 22 Numerically controlled oscillator (NCO) for AFC 23 Multiplier for AFC 3 Frequency analysis unit 4 Roll-off filter (ROF) 5 Carrier reproduction circuit (CR) 51 Phase error detection unit 52 Low-pass filter 53 Numerically controlled oscillator (NCO) for CR 54 Multiplier for CR 6 Demodulation unit 7 Synchronous detection unit 8 Power detection unit 9 Variable attenuator 10 Estimation unit 11 On-off switch 12 Switching switch

Claims

1. An automatic frequency control circuit that corrects the frequency error of a received signal, A roll-off filter provided at a subsequent stage of the automatic frequency control circuit and performing a band-limiting process on the received signal, A carrier recovery circuit provided at a subsequent stage of the roll-off filter and correcting the phase error of the received signal, A frequency analysis unit connected between the automatic frequency control circuit and the roll-off filter, converting the received signal output from the automatic frequency control circuit into a signal in the frequency domain and specifying the center frequency of the frequency band of the peak of the power of the signal in the frequency domain, The automatic frequency control circuit corrects the frequency error of the received signal using the center frequency without determining the correction of the phase error in the carrier recovery circuit. A demodulation circuit characterized by this.

2. Measuring the total power of the frequency band of the peak of the power of the signal in the frequency domain, and based on the power difference between the total power and a predetermined reference power, determining an attenuation rate so that the power of the received signal output from the automatic frequency control circuit converges to the reference power, a power detection unit, A variable attenuator provided between the connection point of the frequency analysis unit and the roll-off filter and attenuating the power of the received signal output from the automatic frequency control circuit at the attenuation rate, The demodulation circuit according to claim 1, characterized by this.

3. Estimating at least one of the carrier-to-noise ratio and the interference level of the signal in the frequency domain, and outputting a switch control signal when at least one of the conditions that the carrier-to-noise ratio is equal to or higher than a predetermined C / N threshold value and the interference level is equal to or lower than a predetermined interference level threshold value is satisfied, an estimation unit, An input / output switch provided between the automatic frequency control circuit and the frequency analysis unit, which enters the input state from the cut-off state when the switch control signal is input, and inputs the center frequency from the frequency analysis unit to the automatic frequency control circuit. The demodulation circuit according to claim 1 or 2, characterized in that.

4. A switching switch that switches which of the center frequencies of the frequency bands of the peaks of a plurality of powers of the signal in the frequency region specified in the frequency analysis unit is output according to the result of known pattern synchronization in the synchronization detection unit provided after the carrier reproduction circuit. The demodulation circuit according to claim 1 or 2, characterized in that.

5. In the frequency analysis unit, the received signal having a frequency band narrower than the frequency band used in communication is converted into the signal in the frequency region. The demodulation circuit according to any one of claims 1 to 3, characterized in that.

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