The invention discloses an out-of-order receiving management method for
RapidIO Message transactions based on an FPGA (
Field Programmable Gate Array), which relates to the technical field of communication, is used for improving the problem of data congestion caused by competition between source nodes, and comprises the following steps: receiving a
RapidIO transaction packet, transmitting the
RapidIO transaction packet into a RapidIO driving module, carrying out cross-
clock domain
processing on a RapidIO interface in the RapidIO driving module to enable
data transmission in different
clock domains to tend to be synchronous, and transmitting the data to the RapidIO interface. The method comprises the following steps: after cross-
clock domain
processing, caching a Message transaction packet, carrying out protocol analysis on the Message transaction packet, obtaining framing data after analysis of the Message transaction packet, outputting the analyzed Message framing data, caching the Message framing data, arbitrating an SRAM (
Static Random Access Memory) cache channel, obtaining a matched SRAM cache channel, writing the Message framing data into a corresponding channel, and outputting the cached Message framing data. The method comprises the following steps of: performing mapping
processing on an SRAM (
Static Random Access Memory) cache address and fragment offset of Message sub-frames, and writing sub-frame data into a corresponding space of an SRAM module, so that automatic sequencing of the Message sub-frames is completed, and the problem of communication faults caused by
retransmission disorder of Message transaction packets due to competition among source nodes is solved.