Sensor module for scanning electron microscopy applications

Abstract

A scanning electron microscopy (SEM) system is disclosed. The SEM system includes an electron source configured to generate an electron beam and an electron-optics set configured to scan the electron beam across a specimen and focus electrons scattered by the specimen onto one or more imaging planes. The SEM system includes a first detector module disposed at the one or more imaging planes, the first detector module including a multi-pixel solid-state sensor configured to convert scattered particles, e.g., electrons and / or x-rays, from the specimen into an equivalent set of signal charges. The multi-pixel solid-state sensor is connected to a plurality of application-specific integrated circuits (ASICs) configured to process the set of signal charges from one or more pixels of the multi-pixel solid-state sensor.

Description

Technical Field

[0001] The present invention generally relates to the field of scanning electron microscopy, and more specifically, to the implementation of an adaptive clustering and distributed digitization method using a multi-purpose sensor module for scanning electron microscopy applications.

Background Art

[0002] [Cross-reference to Related Applications] This application claims priority based on U.S. Provisional Patent Application No. 62 / 892,545, filed on August 28, 2019, with Marcel Trimpl as the inventor, and incorporates the entire content thereof herein by reference.

[0003] When manufacturing semiconductor devices, such as logic devices and memory devices, typically a number of manufacturing processes are used to process a substrate, such as a semiconductor wafer, to form various features (outer shape features) and multiple layers of those semiconductor devices. As semiconductor device sizes become increasingly smaller, it has become important to develop more excellent semiconductor devices and photomask inspection and review apparatuses. A scanning electron microscopy (SEM) system is one such technology, and it can be used to inspect and review specimens. The SEM system incorporates a particle detector, and by using it, secondary electrons, backscattered electrons, and X-rays scattered or emitted from the specimen in response to the transverse scanning of the specimen by a primary electron beam can be detected.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] To improve the efficiency and accuracy of SEM systems, it is desirable to improve particle (e.g., electron and X-ray) sensor devices and methods.

Means for Solving the Problem

[0006] A scanning electron microscopy system is disclosed. The system of one illustrative embodiment has an electron source configured to generate an electron beam. Also, the system of one illustrative embodiment has a set of electron optics configured to scan a specimen with the electron beam and focus electrons scattered by the specimen onto one or more imaging surfaces. Also, the system of one illustrative embodiment has a first detector module disposed on the one or more imaging surfaces. Also, in one illustrative embodiment, the first detector module has a multi-pixel solid-state sensor configured to convert scattered particles from the specimen into an equivalent set of signal charges. Also, in one illustrative embodiment, the multi-pixel solid-state sensor is connected to a plurality of application-specific integrated circuits (ASICs) configured to process the set of signal charges from one or more pixels of the sensor.

[0007] Additional and / or alternative scanning electron microscopy is disclosed. The system of one illustrative embodiment has an electron source configured to generate an electron beam. The system of one illustrative embodiment has a set of electron optics configured to scan a specimen with the electron beam and focus electrons scattered by the specimen onto one or more imaging surfaces. Also, the system of one illustrative embodiment has a first detector module disposed on the one or more imaging surfaces. Also, in one illustrative embodiment, the first detector module has a multi-pixel application-specific integrated circuit (ASIC). Also, in one illustrative embodiment, each pixel of the multi-pixel ASIC comprises a photodiode configured to convert particles scattered by the specimen into an equivalent electrical signal, and each pixel of the multi-pixel ASIC has a circuit for processing the equivalent electrical signal.

[0008] A specimen inspection method is disclosed. In the method of an illustrative embodiment, a scanning clock signal is generated. Also, in the method of an illustrative embodiment, a first electron beam is generated. Also, in the method of an illustrative embodiment, the first electron beam is deflected (redirected) in synchronization with the scanning clock signal to scan an area on the specimen. Also, in the method of an illustrative embodiment, a signal generated in the specimen in response to the electron beam is directed to a cluster provided with a plurality of pixels. Also, in the method of an illustrative embodiment, the charge collected by the cluster is detected in a first period synchronized with the scanning clock to generate a first electrical signal corresponding to the charge collected by the cluster in the first period, and the first electrical signal is converted into a first digital signal. Also, in the method of an illustrative embodiment, the charge collected by the cluster is detected in a second period synchronized with the scanning clock to generate a second electrical signal corresponding to the charge collected in the second period, and the second electrical signal is converted into a second digital signal, provided that the conversion of the second electrical signal is started before the conversion of the first electrical signal is completed. Also, in the method of an illustrative embodiment, the presence or absence of a defect is determined by analyzing the first digital signal and the second digital signal.

[0009] Additional and / or alternative specimen inspection methods are disclosed. In the method of an illustrative embodiment, a scanning clock signal is generated. Also, in the method of an illustrative embodiment, a first electron beam is generated. Also, in the method of an illustrative embodiment, the first electron beam is deflected toward a first location on the specimen. Also, in the method of an illustrative embodiment, a signal generated in the specimen in response to the first electron beam is directed to a pixel. Also, in the method of an illustrative embodiment, an electrical signal corresponding to the charge collected by the pixel is generated by detecting the charge collected by the pixel. Also, in the method of an illustrative embodiment, the electrical signal is compared with a first threshold value and a second threshold value, and when the electrical signal is greater than the first threshold value and the electrical signal is less than the second threshold value, it is determined that an element is present.

[0010] As can be understood, both the foregoing general description and the following detailed description are solely exemplary and explanatory, and do not necessarily limit the invention described in the claims. The accompanying drawings, which are incorporated herein and form a part hereof, depict embodiments of the present invention and, in conjunction with the general description, serve to explain the principles of the present invention.

[0011] Those skilled in the art (so-called persons skilled in the art) of the present technical field will be able to better understand the numerous advantages of the present disclosure by referring to the accompanying drawings.

Brief Description of the Drawings

[0012]

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DETAILED DESCRIPTION OF THE INVENTION

[0013] The present disclosure is specifically illustrated and described in connection with certain embodiments and their specific features. The embodiments described in the present application should be understood as illustrative rather than limiting. It should be immediately apparent to those of ordinary skill in the art that various modifications and changes can be made in form and detail without departing from the spirit and technical scope of the present disclosure. Reference will now be made in detail to the subject matter disclosed and illustrated in the accompanying drawings.

[0014] Embodiments of the present disclosure are multi-purpose sensor modules and methods suitable for scanning electron microscopy applications, and are directed to those with adaptive clustering and distributed digitization schemes.

[0015] FIG. 1 depicts a conceptual configuration of a scanning electron microscopy (SEM) system 100 according to one or more embodiments of the present disclosure. The SEM system 100 can be configured as an inspection and / or review tool. In that case, the SEM system 100 can be used to review and / or inspect a specimen 128 for defects and to elucidate the material composition of the specimen 128 and / or the defects. Alternatively, the SEM system 100 can be configured as an imaging overlay metrology tool. In that case, the SEM system 100 can be used to capture an image of an overlay metrology target disposed on the specimen 128 and to use it to determine overlay errors between successive layers of the specimen 128.

[0016] The SEM system 100 of the embodiment has an electron source 102. The electron source 102 may be any electron source suitable for generating one or more electron beams 106. The electron source 102 can be assumed to have one or more electron emitters 101. For example, the one or more electron emitters 101 may be composed of a single electron emitter. Also, for example, the one or more electron emitters 101 may be composed of a plurality of electron emitters. The one or more electron emitters 101 can include any electron emitter known in the field of electron emission. The electron source 102 can be assumed to have one or more extractors 103.

[0017] The SEM system 100 of the embodiment has an electron optical system 111, in which a set of electron optical systems are arranged in the form of an electron optical column. The electron optical system 111 can have one or more focusing optical systems for focusing the electron beam 106 onto the specimen 128. The electron optical system 111 can have one or more deflection optical systems configured to scan the specimen 128 transversely with the beam 106. The focusing and deflection optical systems provided in the electron optical system 111 can be any focusing and deflection optical systems known in the field of scanning electron microscopy. For example, among the one or more focusing optical systems, one or more condenser lenses 107 and one or more objective lenses 110, although not limited thereto, can be included. Among the one or more deflection optical systems, one or more deflectors (e.g., scanning coils), although not limited thereto, can be included. For example, the electron optical system 111 can have one or more deflectors 105 and one or more lower deflectors 109. During operation, the electron beam 106 is generated by the electron source 102. The electron beam 106 can be focused and deflected onto the specimen 128 disposed on the movable stage 130 by a plurality of focusing and deflection optical systems 105, 107, 109, 110 provided in the electron optical system 111. Depending on the embodiment, a plurality of beams can also be generated by the electron source 102 and focused and deflected onto the specimen 128. It should be noted that when arranging the electron source 102 and the electron optical column 111, it can be in the form of a single-beam configuration or a multi-beam configuration having a plurality of electron sources / columns.

[0018] The system 100 of the embodiment has one or more detector modules disposed at one or more specified locations within the electron optical system 111. Each of the one or more detector modules has one or more multi-pixel solid-state sensors. For example, each of the detector modules 122a, 122b, and / or 122c can be assumed to have one or more solid-state sensors. For example, the first multi-pixel detector module 122a can be disposed away from the specimen 128, and secondary electrons 129 scattered by the specimen and collected and accelerated by the electrode 121 can be gathered on the detector plane of the one or more multi-pixel solid-state sensors provided in the detector module 122a. Also, for example, the detector modules 122b and / or 122c can be disposed near the specimen 128, and particles such as backscattered electrons, X-rays, and / or Auger electrons emitted from the specimen 128 (e.g., particles emitted from the specimen at a very high solid angle) can be gathered there. As shown in FIG. 1, one or more of the detector modules 122a to 122c can be disposed within the electron optical column. It should be noted that the technical scope of the present disclosure is not limited to the position or number of detector modules shown in FIG. 1, and any number of multi-pixel detector modules and any positions can be provided within the system 100.

[0019] In the embodiment, one or more of the multi-pixel solid-state sensors provided in the detector modules 122a, 122b, and / or 122c are connected to a plurality of logic elements. For example, one or more of those multi-pixel solid-state sensors can be connected to a plurality of application-specific integrated circuits (ASICs). In the embodiment, the plurality of logic elements are configured to process a set of signal charges from a pixel group of a given multi-pixel solid-state sensor. It should be noted that the logic elements used in the one or more detector modules can be any logic elements known in the art suitable for processing signal charges from a pixel group, but for the purpose of simplification, the detector modules will be described in the context of ASICs. Such a configuration should not be construed as a limitation to the technical scope of the present disclosure.

[0020] Figures 2A to 2C depict various configurations of a multi-pixel detector module suitable for use within system 100 according to one or more embodiments of the present disclosure. The multi-pixel detector module of the configuration depicted in Figure 2A is suitable for use as a secondary electron detector. The multi-pixel detector module of the configuration depicted in Figure 2B is suitable for use as a backscattered electron and / or X-ray detector. The multi-pixel detector module of the configuration depicted in Figure 2C is for a multi-electron beam system, and deflection signals from any electron beam are simultaneously detected by the multi-pixel detector module.

[0021] In the embodiment shown in Figure 2A, the multi-pixel detector module 122 has a substrate carrier 201. For example, the substrate carrier 201 can be made of a ceramic material, and a multi-pixel solid-state sensor read by an ASIC can be mounted thereon. The substrate carrier 201 has a set of conductive contacts 203 for driving control voltage and provides a data path enabling data collection by the module. Area 202 represents the area covered by one ASIC. In the example shown in Figure 2B, area 202 is the area covered by one ASIC and represents something that has a size of 4 mm × 4 mm and can incorporate 16 × 16 pixel readout channels. It should be noted that the technical scope of the present disclosure is not limited to the number, size, or position of the ASIC clustering of the pixel group as shown in Figure 2A. Rather, it should be noted that different ASIC clustering configurations can be implemented considering different use cases. Table 1 shows the cluster size and the resulting cluster conversion speed.

[0022] [Table 1]

[0023] This example uses a sensor pixel of 250 μm, a total of 16 × 16 sensor pixels to be read per ASIC, and a data converter incorporated in each read pixel with a conversion speed of 3 MHz.

[0024] In the example of FIG. 2A, a cluster with a pixel size of 8 × 8 is created, and a total of 4 clusters are generated per ASIC. Such a configuration can be particularly useful in the case of a secondary electron detector. The conversion speed per cluster in this configuration is about 200 MHz. Further, the clusters generated by the ASIC can be reprocessed on the downstream data path to generate one or more sub-channels of the detector. It should be noted that in the example depicted in FIG. 2B, 5 channels are generated by the module.

[0025] According to the embodiment shown in FIG. 2B, a plurality of detector modules can be provided. In the example shown in FIG. 2B, a plurality of detector modules 122 (e.g., 2, 3, 4, 5, 6, N detector modules) are arranged around the primary beam 106, thereby forming a passage opening 205 near the specimen plane (e.g., wafer plane). Thus, backscattered electrons and / or other particles such as X-rays and Auger electrons can be collected at a high solid angle. Depending on the embodiment, each detector module 122 can be configured differently according to the purpose of detection. In the example shown in FIG. 2B, three detector modules are formed in a 2×2 cluster size, and one of the detector modules (upper right) is configured to detect X-rays emitted by the specimen. It should be noted that the arrangement, number, and cluster size are not limited to those described above. Rather, it should be noted that in the set of detector modules shown in FIG. 2B, any number of modules 122 can be arranged in any pattern to form the opening 205, and the modules can have any cluster size. It should be noted that by using a 4×4 size cluster, a cluster conversion speed close to 50 MHz can be achieved. In the case of X-ray detection, the detector module can be configured to individually read each pixel (e.g., 1×1 cluster) at a low conversion speed such as 3 MHz, although not limited thereto.

[0026] In some embodiments, a screen 204 can be provided on one or more of the detector modules 122. The screen 204 can be inserted on top of one or more of the modules 122. The screen can be formed of a low atomic number thin material. For example, the screen 204 can be composed of, but not limited to, a thin beryllium screen with a thickness of 50 to 150 μm. For example, the screen can be a 100 μm thick beryllium screen. Also, for example, the screen can be composed of a material layer directly formed on the sensor module 122. For example, the screen can be, but not limited to, one having a layer of boron, carbon, or aluminum directly deposited on the sensor module 122. During operation, this screen 204 absorbs electrons scattered by the specimen during scanning while allowing most of the X-rays generated by the specimen during scanning to pass through, thus achieving more efficient detection. The screen 204 can be added to one or more of the detector modules, and can also be permanently installed, or can be made such that it can be inserted and removed and the configuration of the module 122 can be changed. It should be noted that the usage form of the screen 204 is not limited to the configuration shown in FIG. 2B, and one or more screens 204 can be used with any number of detection modules 122 and in any arrangement.

[0027] In the embodiment shown in FIG. 2C, the ASIC of the detector module 122 is fabricated with a cluster size of 4×4. It should be noted that if such a detector module is provided in the SEM system 100 in a multi-beam configuration, a total of 400 scattered beams will be detected by the module at a speed close to 50 MHz.

[0028] Figures 3A to 3D depict combinations of clusters distributed to a specified number of channels by an ASIC according to one or more embodiments of the present disclosure. It should be noted that the formation of the plurality of channels can be adjusted as shown in Figures 3A to 3D for various use cases of the SEM system 100. For example, Figure 3A depicts a configuration having one center channel 301 and four side channels 302a, 302b, 302c, 302d. The combination of clusters can be executed dynamically during scanning, thereby changing the shape and size of the channels within the module 122. Such features can address changes in the scattered beam 129 during scanning, such as changes in the focusing / defocusing state of the primary beam 106 or the wandering of the scattered beam 129. For example, by implementing the cluster configuration of Figure 3B, it is possible to address a situation where the scattered electron beam 129 wanders or drifts from the central position of the module to a non-central position.

[0029] Also, for example, by implementing the cluster configuration of Figure 3C, it is possible to address a situation where a relatively large center channel is required. Also, for example, by implementing the cluster configuration of Figure 3D, it is possible to address a situation where a relatively small center channel is required. Also, for example, a plurality of separate clusters can be combined into a single center channel.

[0030] Figure 4A depicts a block configuration of sensor-ASIC indirect connection and operation within a single readout channel according to one or more embodiments of the present disclosure.

[0031] In an embodiment, at least one sensor 401 is attached to one or more ASICs 402 with at least one connection per pixel. According to a certain configuration, by forming the sensor pixel 403 with a floating diffusion node (FD), for example, a floating diffusion capacitor, the charges generated within the pixel can be collected within the volume connected to the gate of the amplifier stage. According to this example, the amplifier stage can be biased by a common voltage VOD (voltage drain). The output (OS) of the amplifier stage can be connected to an individual readout pixel 404 of the ASIC for further processing. Depending on the embodiment, by appropriately connecting the in-pixel amplifier, the source potential can be biased at a constant voltage and a signal can be read at the drain.

[0032] In an embodiment, the voltage of the floating diffusion node is controlled by a reset stage. According to this configuration, the reset stage can be provided with a simple reset transistor, and the drain of the transistor can be connected to a global reset voltage (RD). The reset stage can be controlled through a reset gate (RG).

[0033] Depending on the embodiment, a global signal common to all pixels of the sensor array can be supplied by the reset gate.

[0034] Depending on the embodiment, an additional per-pixel contact can be provided between the reset gate of the pixel in the sensor layer and the reset circuit unit within each pixel of the ASIC.

[0035] The upper sensor stage 401 of this assembly can be a sensor layer utilizing a floating diffusion technology and a resistive gate as described in Patent Document 1 in the name of Brown et al., issued on September 19, 2017, entitled "Scanning electron microscope and methods of inspecting and reviewing samples", the entire content of which is hereby incorporated by reference into the present application.

[0036] In some embodiments, instead of using the sensor layer 401 attached to the readout ASIC, a photodiode can be provided within each pixel of the ASIC to detect deflected particles from the specimen 128 during scanning. This photodiode can be created by using deep implantation by a high voltage (HV) process at a power supply rail of over 10V.

[0037] In an embodiment, pixel 404 of the readout ASIC receives the signal from the sensor pixel at the input stage. By minimizing the parasitic impedance between the amplifier output and its input stage, the maximum processing speed can be achieved with a given power consumption. The input stage is connected to the cluster by a cluster summing circuit that sums the signal from that pixel and the signals from the adjacent pixel group. FIG. 4A shows the connection from the central pixel to the two immediately adjacent pixels, and also shows the additional inputs from other pixel groups in the periphery. The actual size of the cluster should be in the range of 1 to 10 pixels; however, a 1-pixel cluster is one in which the summation is disabled and each pixel is processed individually (see, for example, the example described in Table 1). Thereafter, this cluster signal may be further processed by digitization and additional processing. In the digitization step, standard analog-to-digital conversion can be incorporated together with equidistant quantization steps and the multi-threshold chemical element search detailed in FIG. 7. For applications where individual event detection is essential, a timestamp unit can also be provided that records the arrival of each event with its scan clock and assigns the event to the scan location on the sample. It should be noted that a part of this post-processing incorporates data stream handling necessary to extract the data from each pixel outside each ASIC. The summation of the pixel values may be performed in the post-processing unit after digitization.

[0038] According to an embodiment, by triggering the reset circuit by its digitization unit, the voltage of the reset gate of the sensor pixel can be controlled. In the reset circuit, high-voltage process components are used, and thereby a voltage corresponding to the reset stage can be supplied to make it function (e.g., 10 to 30 V). The control of the reset gate can be in the form of resetting the floating diffusion by a reset pulse. By resetting each pixel, the dynamic range of the sensor pixel can be infinitely expanded and the variation of the particle flux between the pixels in the sensor can be addressed. By synchronizing such reset pulses for all the pixels of the sensor, the function of global reset can be simulated. Since a much smaller capacitance is driven compared to the global reset routed through the entire sensor array, the use of per-pixel reset enables a very fast reset with lower power. By supplying an analog voltage from the reset circuit, a closed-loop feedback control for the floating diffusion can be formed to enhance the immunity against pixel-to-pixel transistor variation and thermal drift.

[0039] FIG. 4B depicts a conceptual configuration of a coarse floor plan of a sensor pixel according to one or more embodiments of the present disclosure. In the sensor pixel coarse floor plan shown in FIG. 4B, a reset gate (RG) and an output signal (OS) are connected to a readout ASIC and other bias points, and a reset drain (RD) and a voltage drain (VOD) of the sensor pixel are routed as global signals across the entire sensor array. Among the embodiments, in those where the reset gate (RG) is not provided for each pixel of the ASIC, the reset gate (RG) can be routed row-by-row or globally on the sensor, similar to the reset drain and voltage drain signals.

[0040] FIGS. 5A and 5B respectively depict a physical assembly of a detector module 122 according to one or more embodiments of the present disclosure.

[0041] FIG. 5A shows the back appearance of a multi-pixel detector module according to an embodiment, with several ASICs 507 connected to its sensor. This view is towards the back of those ASICs. FIG. 5B shows the side appearance of detector module 122 having a multi-pixel solid-state sensor 502 with a back treatment 501. Depending on the embodiment, the back treatment can be boron-coated. In an embodiment, the sensor layer is connected to a through-silicon via interposer (TSI) 504 through solder bumps. Other assembly techniques, such as DBI (Direct-Bond-Interconnect; trademark) may also be used. With a TSI about 100 μm thick, a fine pitch (10 μm to 20 μm) can be utilized. Through-silicon vias 505 can electrically connect the front side of the TSI to its back side. The pitch of the TSVs in the TSI can be made considerably denser than the pixel pitch in the sensor or ASIC. On the back side of the TSI, by using a multi-metal redistribution layer (RDL) with multiple (e.g., 4 or more) metal layers 506, various pixel outputs from the sensor can be routed to the inputs of the ASIC 507, and this can be done at various pitches. For example, a 250 μm × 250 μm size pixel on the sensor layer could be matched to a pixel of about 180 μm × 180 μm size within the ASIC.

[0042] According to the embodiment shown in FIG. 5B, the ASIC can embody the TSVs, and the inputs and outputs of the ASIC can be connected to conductive connections on the mechanical substrate 509 on the back side of the ASIC. When each ASIC covers 16 × 16 pixels, due to the pixel size difference between the ASIC and the sensor, a space of about 1 mm can be left between the ASICs as an assembly margin.

[0043] Depending on the embodiment, TSVs may not be incorporated into the ASIC. In that case, an alternative assembly shown in FIGS. 5C and 5D may be implemented. In this embodiment, by shifting one ASIC row 511 on the side of the sensor, wire bonding pads are exposed and made accessible for connection to the substrate. The transfer of drive signals and data between ASICs below the sensor area can be achieved through additional solder connections to the TSI, and they will be routed to other ASICs within the RDL of the TSI.

[0044] It should be noted that in embodiments where one or more in-ASIC TSVs are utilized in the detector module 122, a detector module with infinite scalability can be constructed without creating gaps within the sensitive area of the module.

[0045] The assembly shown in FIG. 5D can be manufactured using the following procedure.

[0046] Create TSI504 to exhibit a specified thickness (e.g., about 100 μm), thin ASIC507 to the specified thickness (e.g., about 100 μm), and provide the unthinned sensor 502. First, a handle wafer (not shown) may be attached to the front side of the sensor 502 (the lower side of the sensor 502 according to the illustration in FIG. 5D). Then, the back side of the sensor 502 may be thinned. After thinning, the back side of the sensor 502 may be treated. For example, the back side of the sensor 502 may be treated by a boron implantation process to form a boron implantation layer 501. Then, a handle wafer (not shown) may be attached to the back side of the sensor 502 (the upper side of the sensor 502 according to the illustration in FIG. 5D). Next, the handle wafer may be removed from the front side of the sensor 502. Then, the front side of the sensor 502 may be conductively connected to the front side of the TSI through one or more connection mechanisms 503 (e.g., by solder bump or direct bonding (DBI) technology). In addition, ASIC507 may be conductively connected to the back side of TSI504 by a redistribution layer 506. Then, the handle wafer may be removed from the back side of the sensor 502, and the sensor / TSI / ASIC assembly may be attached to the substrate 509. The handle wafer may also be removed after attaching the sensor / TSI / ASIC assembly to the substrate 509.

[0047] It should be noted that the procedure for manufacturing the assembly shown in FIG. 5B can also follow a method similar to the procedure for the assembly shown in FIG. 5D. In addition, when manufacturing the assembly of FIG. 5B, additional steps may be performed, such as attaching TSV (through-silicon via) to the ASIC, thinning ASIC507 using a handle wafer, mounting it on the substrate 509, and making a conductive connection to the pad with a solder bump 513.

[0048] FIG. 6A depicts a conceptual configuration 600 of the timing of a distributed digitization scheme that processes a cluster using several in-ASIC ADCs in accordance with one or more embodiments of the present disclosure. It should be noted that in this distributed digitization scheme, any number of ADCs, such as 256, can be used, although not limited thereto. FIG. 6B shows a conceptual configuration 610 of a sample-and-hold circuit for signals from one or more pixels and subsequent analog-to-digital conversion of those signals. As shown in FIG. 6B, at each digitizer, a high-speed S&H circuit can be used to hold (sample) the analog value at the speed of the sample scan clock t1, i.e., at the speed at which the sample is raster scanned by the electron beam. Thereafter, at each ADC, the analog value can be converted to a digital value during a conversion period t2 that is much slower than t1. The conversion period t2 is made consistent with the number of sample scans and the number of pixels (and thus ADCs) that are combined to form a single cluster. As an example, the 8×8 pixels of the sensor can be combined into a single cluster, and 64 ADCs can be used for the conversion of that cluster. In this example, a single conversion frequency of 3 MHz can support a wafer scan clock of 192 MHz.

[0049] FIG. 7 depicts an analog-to-digital conversion (ADC) unit 700 within each pixel of a readout ASIC according to one or more embodiments of the present disclosure. In an embodiment, within the initial S&H unit, the captured signal from the detector is stored for each clock cycle of the sample scan. Then, using the ADC 700, classical analog-to-digital conversion can be performed according to the successive approximation register (SAR) ADC principle. In the "ADC mode", a look-up table (LUT), which is a standard conversion table incorporating standard conversion steps based on a binary search that results in equidistant digitization, is supplied to the digital-to-analog converter (DAC).

[0050] According to an embodiment, the DAC can also be driven by, for example, a look-up table (LUT) containing a reference level equivalent to the upper and lower threshold values (that which defines the energy window) of chemical elements such as silicon, aluminum, copper, titanium, etc., that may appear during specimen scanning. As a result of comparing each signal with its energy window, the presence or absence of a specific chemical element is determined. This mode can be called the "element ID mode". According to an embodiment, the ADC unit 700 can be switched between the ADC mode and the element ID mode. It should be noted that all that is required to switch between the ADC mode and the element ID mode is to configure the look-up table used in the ADC differently. A plurality of comparators can be provided in the ADC unit, including those for the upper threshold value and those for the lower threshold value that define the energy window for each specific element to be detected.

[0051] FIG. 8 depicts a flowchart of a specimen inspection method 800 according to one or more embodiments of the present disclosure. It should be noted in the present application that all or part of the steps of method 800 can be implemented by system 100. That being said, according to further understanding, method 800 is not limited to system 100, and all or part of the steps of method 800 can also be executed in additional or alternative system-level embodiments.

[0052] In step 802 of this method, a scanning clock signal is generated. In step 804 of this method, a first electron beam is generated. In step 806 of this method, an area on the specimen is scanned by deflecting the first electron beam in synchronization with the scanning clock signal. In step 808 of this method, the signal generated at the specimen in response to the electron beam is directed to a cluster provided with a plurality of pixels. In step 810 of this method, the charge collected by the cluster is detected in a first period synchronized with the scanning clock, thereby generating a first electrical signal corresponding to the charge collected in the first period by the cluster, and converting the first electrical signal into a first digital signal. In step 812 of this method, the charge collected by the cluster is detected in a second period synchronized with the scanning clock, thereby generating a second electrical signal corresponding to the charge collected in the second period, and converting the second electrical signal into a second digital signal, provided that the conversion of the second electrical signal is started before the conversion of the first electrical signal is completed. In step 814 of this method, the presence or absence of a defect is determined by analyzing the first digital signal and the second digital signal.

[0053] FIG. 9 depicts a flowchart of a specimen inspection method 900 according to one or more additional and / or alternative embodiments of the present disclosure. It should be noted in the present application that all or part of the steps of method 900 can be implemented by system 100. However, according to further understanding, method 900 is not limited to system 100, and all or part of the steps of method 900 can also be executed in additional or alternative system-level embodiments.

[0054] In step 902 of the present method, a scanning clock signal is generated. In step 904 of the present method, a first electron beam is generated. In step 906 of the present method, the first electron beam is deflected towards a first location on the specimen. In step 908 of the present method, a signal generated in the specimen in response to the first electron beam is directed to a pixel. In step 910 of the present method, an electrical signal corresponding to the charge collected by the pixel is generated by detecting the charge collected by the pixel. In step 912 of the present method, the electrical signal is compared with a first threshold value and a second threshold value, and when the electrical signal is greater than the first threshold value and the electrical signal is less than the second threshold value, it is determined that the element is present.

[0055] Conversely, according to FIG. 1, the system 100 according to the embodiment has a controller 140. Using the controller 140, one or a plurality of control signals C can be supplied to the electron source 102, the electron optical column 111, and / or the detector assemblies 122a to 122c. By doing so, the controller 140 can control all aspects of the SEM system 100. The controller 140 in the embodiment can receive one or a plurality of image data signals ID1, ID2 indicating or including one or a plurality of features (e.g., defects, pattern features, metrology targets, etc.) provided in the specimen 128 from the detector assemblies 122a to 122c. The controller 140 can be assumed to have one or a plurality of processors configured to execute program instructions stored in a storage medium. In this case, any of the various process steps described throughout the present disclosure can be executed by one or a plurality of processors provided in the controller 140.

[0056] In any of the methods described in this application, the results of one or more steps of those method embodiments can be stored in memory. Those results may include any of the results described in this application, and they may be stored in any manner known in the relevant technical field. The memory may include any of the memories described in this application, or any other storage medium known and suitable in the relevant technical field. After storing the results, it is possible to access the various results in that memory, use them in any of the methods or system embodiments described in this application, format them for display to the user, use them in another software module, method or system, etc. Furthermore, the result storage may be "permanent", "semi-permanent", "temporary", or for some period of time. For example, the memory may be a random access memory (RAM), and the results may not necessarily exist permanently in that memory.

[0057] Upon further consideration, any other step(s) of any other method(s) described in this application can be incorporated into each of the above-described method embodiments. Additionally, each of the above-described method embodiments may be executed by any of the systems described in this application.

[0058] As would be understood by those of ordinary skill in the art, the various components, operations, devices, objects, and the associated discussions described in this application are used as examples to contribute to conceptual clarity, and various structural modifications are contemplated. Accordingly, according to the usage in this application, the intention of the specific exemplars and the associated discussions described above is to be representative of their more general classification categories. Generally, the intention of using any specific exemplar is to be representative of its classification category, so it should not be construed as a limitation that specific components, operations, devices, and objects are not included.

[0059] The directional terms used in this application, such as "top", "bottom", "above", "below", "upper", "upward", "lower", "downward", and "downward", are for the purpose of presenting relative positions for the description purpose, not for the purpose of specifying an absolute coordinate system. It will be apparent to those skilled in the art that various modifications can be made to the described embodiments, and the general principles defined in this application can also be applied to other embodiments.

[0060] Regarding the use of almost all plural and / or singular terms in this application, those skilled in the art can read and replace from plural to singular and / or from singular to plural as appropriate to the context and / or usage. For clarity, this application does not explicitly explain various singular / plural readings.

[0061] The subject matter described in this application often represents that various members are incorporated into other members or connected / linked to other members. As you can understand, those illustrated architectures are merely examples, and in fact, many other architectures can be implemented to achieve the same function. Conceptually, all member arrangements that achieve the same function are effectively "cooperating" so that the desired function is achieved. Therefore, any two members in this application that are combined to achieve a specific function can be regarded as "cooperating" with each other so that the desired function is achieved, regardless of the architecture or intervening members. Similarly, any two members that are cooperating in this way can also be regarded as "connected / linked" or "coupled" to each other to achieve the desired function, and any two members that can be made to cooperate in this way can also be regarded as "couplable" to each other to achieve the desired function. Specific examples of couplable include, but are not limited to, members being physically fittable and / or physically interacting with each other, and / or members being wirelessly interactable and / or wirelessly interacting with each other, and / or members being logically interactable and / or logically interacting with each other.

[0062] Furthermore, as can be understood, the present invention is defined by the claims in the separate sections. As can be understood by those skilled in the art in general, the terms used in the claims of the present application, particularly in the claims in the separate sections (e.g., the main text of the claims in the separate sections), generally have the meaning of “open” terms (e.g., the term “comprising” should be understood as “comprising but not limited to”, the term “having” should be understood as “having at least”, the term “including” should be understood as “including but not limited to”, etc.). As can also be understood by those skilled in the art, if it is intended to introduce a requirement within a specific number of claims, the intention is clearly stated in that claim, so if there is no such requirement description, it means there is no such intention. For example, for the sake of understanding, some of the appended claims below incorporate the introduction of requirements within the claims by using introductory phrases such as “at least one” and “one or more”. However, the use of such phrases should not be interpreted as if there is an implication that all individual claims including the introduced requirements within the claims by using the indefinite article “a” or “an” are limited to inventions that include only one such component. Nor should it be so interpreted even when the introductory phrase “one or more” or “at least one” and the indefinite article, for example, “a” or “an” coexist in that claim (e.g., “a” and / or “an” should usually be understood to mean “at least one” or “one or more”). The same also holds true for the introduction of requirements within the claims by using the definite article. In addition, even when a specific number is explicitly stated for an introduced requirement within a claim, as can be understood by those skilled in the art, usually, the number description should be interpreted to mean at least that explicit number (e.g., the bare expression “two components” lacking other modifying phrases usually means at least two components or two or more components).Furthermore, in examples where a convention similar to "at least one of A, B, and C, etc." is used, generally, such syntax is contemplated in accordance with the sense that a so-called person skilled in the art would understand such a convention (e.g., "a system having at least one of A, B, and C" would include, but is not limited to, a system having only A, only B, only C, both A and B, both A and C, both B and C, and / or all of A, B, and C, etc.). In examples where a convention similar to "at least one of A, B, or C, etc." is used, generally, such syntax is contemplated in accordance with the sense that a so-called person skilled in the art would understand such a convention (e.g., "a system having at least one of A, B, or C" would include, but is not limited to, a system having only A, only B, only C, both A and B, both A and C, both B and C, and / or all of A, B, and C, etc.). Also, as should be understandable to a so-called person skilled in the art, almost all disjunctive conjunctions and / or disjunctive clauses presenting two or more alternative words, regardless of where they are in the specification, claims, and drawings, should be understood to contemplate the possibility of including one word, any one word, or both words. For example, the phrase "A or B" would be understood to include the possibilities of "A" or "B" or "A and B".

[0063] Many of the present disclosure and its attendant advantages will be understood from the foregoing description, and it will also be apparent that various modifications can be made to the form, construction, and arrangement of the various components without departing from the disclosed subject matter or sacrificing all of its main advantages. The forms described are for illustrative purposes only, and the intent of the claims set forth hereinafter is to cover, include such modifications. Furthermore, it is the claims in a separate section that define the present invention.

Claims

1. A scanning electron microscopy system, comprising: an electron source configured to generate an electron beam; a set of electron optical systems configured to scan a specimen with the electron beam and focus electrons scattered by the specimen onto one or more imaging surfaces; a first detector module disposed on the one or more imaging surfaces; The first detector module has a multi-pixel solid-state sensor configured to convert scattered particles from the specimen into a set of equivalent signal charges, The multi-pixel solid-state sensor is connected to a plurality of application-specific integrated circuits (ASICs) configured to process the set of signal charges from one or more pixels. Each ASIC has a plurality of clusters, each cluster having at least four pixels, and each ASIC is configured to: detect charges collected by each cluster during a first period, the first period being synchronized with a scanning clock for generating a first electrical signal corresponding to the charges collected by each cluster during the first period, and convert the first electrical signal into a first digital signal; detect charges collected by each cluster during a second period, the second period being: synchronized with a scanning clock for generating a second electrical signal corresponding to the charges collected by each cluster during the second period, and convert the first electrical signal into a first digital signal, and the conversion of the second electrical signal is started before the conversion of the first electrical signal is completed. A scanning electron microscopy system configured as described above.

2. The scanning electron microscopy system according to claim 1, wherein each pixel of the multi-pixel solid-state sensor comprises a capacitive floating diffusion node configured to collect the equivalent signal charges and generate an equivalent voltage, a reset stage configured to control the voltage of the floating diffusion node, and an amplifier configured to drive the voltage of the floating diffusion node for input to the plurality of ASICs.

3. The scanning electron microscopy system according to claim 2, wherein each pixel of the multi-pixel solid-state sensor of the first detector module is connected to a reset stage of each pixel and includes a second contact controlled by the plurality of ASICs. A scanning electron microscopy system.

4. The scanning electron microscopy system according to claim 1, wherein the electron source includes a multi-beam electron source configured to generate a second electron beam, and the set of electron optical systems is further configured to scan the sample across the sample with the second electron beam. A scanning electron microscopy system.

5. The scanning electron microscopy system according to claim 4, wherein the set of electron optical systems is further configured to focus electrons scattered from the electron beam by the sample onto a first pixel of the multi-pixel solid-state sensor, and electrons scattered from the second electron beam by the sample onto a second pixel of the multi-pixel solid-state sensor. A scanning electron microscopy system.

6. The scanning electron microscopy system according to claim 1, wherein the first detector module has a multi-pixel solid-state sensor layer and an ASIC layer formed on separate wafers, and the multi-pixel solid-state sensor layer and the ASIC layer are directly connected by at least one of a direct bonding interface connection and a microsolder bump with a pitch of 100 to 200 μm, one or more ASICs are mounted on a substrate, and at least one of the inputs and outputs of the one or more ASICs is connected to a conductive trace on the substrate by wire bonding. A scanning electron microscopy system.

7. The scanning electron microscopy system according to claim 1, wherein the multi-pixel solid-state sensor and the plurality of ASICs are connected via a through-silicon interposer (TSI). A scanning electron microscopy system.

8. The scanning electron microscopy system according to claim 1, wherein the plurality of ASICs further comprise through-silicon vias (TSVs) that connect one or more inputs and one or more outputs of the plurality of ASICs to traces on a substrate.

9. The scanning electron microscopy system according to claim 1, further comprising at least one second detector module that is substantially coplanar with the first detector module, wherein the first detector module and the at least one second detector module are configured to form an aperture for the electron beam, and the set of electron optical systems is configured to pass the electron beam into the aperture.

10. The scanning electron microscopy system according to claim 1, wherein at least one of the plurality of ASICs comprises a look-up table (LUT) configured to store a first threshold value and a second threshold value, and a comparator configured to compare a signal charge with the first threshold value and with the second threshold value, and the comparator is configured to generate a result indicating whether each signal charge is within the frame of the first and the second threshold values.

11. The scanning electron microscopy system according to claim 1, wherein the first detector module comprises one or more screens, and the one or more screens are formed from at least one of beryllium, carbon, boron, magnesium, and aluminum.

12. The scanning electron microscopy system according to claim 1, wherein the first detector module is configured to detect backscattered electrons from the specimen.

13. The scanning electron microscopy system according to claim 1, wherein the first detector module is configured to detect secondary electrons from the specimen.

14. The scanning electron microscopy system according to claim 1, wherein the first detector module is configured to detect X-rays from the specimen.

15. A scanning electron microscopy system, an electron source configured to generate an electron beam, a set of electron optical systems configured to scan a specimen with the electron beam and focus electrons scattered by the specimen onto one or more imaging surfaces, a first detector module disposed on the one or more imaging surfaces, comprising, wherein the first detector module has one or more multi-pixel application-specific integrated circuits (ASICs), each pixel of the one or more multi-pixel ASICs comprises a photodiode configured to convert particles scattered by the specimen into an equivalent electrical signal, each pixel of the one or more multi-pixel ASICs has a circuit for processing the equivalent electrical signal, each ASIC has a plurality of clusters, each cluster has at least four pixels, and each ASIC is configured to detect charges collected by each cluster during a first period, the first period being synchronized with a scanning clock for generating a first electrical signal corresponding to the charges collected by each cluster during the first period, and converting the first electrical signal into a first digital signal, configured to detect charges collected by each cluster during a second period, the second period being synchronized with a scanning clock for generating a second electrical signal corresponding to the charges collected by each cluster during the second period, and converting the first electrical signal into a first digital signal, and the conversion of the second electrical signal is started before the conversion of the first electrical signal is completed, configured as such, a scanning electron microscopy system.

16. The scanning electron microscopy system according to claim 15, wherein the electron source includes a multi-beam electron source configured to generate a second electron beam, and the set of electron optical systems is further configured to scan the specimen transversely with the second electron beam.

17. The scanning electron microscopy system according to claim 16, wherein the set of electron optical systems is further configured to focus electrons scattered by the specimen from the electron beam onto a first pixel and to focus second electrons scattered by the specimen from the second electron beam onto a second pixel.

18. The scanning electron microscopy system according to claim 15, wherein the multi-pixel application-specific integrated circuit (ASIC) further includes through-silicon vias (TSVs) that connect one or more inputs and one or more outputs of the multi-pixel application-specific integrated circuit (ASIC) to traces on a substrate.

19. The scanning electron microscopy system according to claim 15, further comprising at least one second detector module that is substantially coplanar with the first detector module, wherein the first detector module and the at least one second detector module are configured to form an aperture for the electron beam, and the set of electron optical systems is configured to pass the electron beam through the aperture.

20. The scanning electron microscopy system according to claim 15, wherein the ASIC includes a look-up table (LUT) configured to store a first threshold value and a second threshold value, and a comparator configured to compare a signal charge with the first threshold value and with the second threshold value, and the comparator is configured to generate a result indicating whether each signal charge is within the frame of the first and the second threshold values.

21. The scanning electron microscopy system according to claim 15, wherein the first detector module includes one or more screens, and the one or more screens are formed of at least one of beryllium, carbon, boron, magnesium, and aluminum.

22. The scanning electron microscopy system according to claim 15, wherein the first detector module is configured to detect backscattered electrons from the specimen.

23. The scanning electron microscopy system according to claim 15, wherein the first detector module is configured to detect secondary electrons from the specimen.

24. The scanning electron microscopy system according to claim 15, wherein the first detector module is configured to detect X-rays from the specimen.

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