Display panel and method for manufacturing a display panel

Abstract

The present application provides a display panel and a manufacturing method for the display panel, in which an auxiliary cathode is provided in a driving circuit layer of the display panel, and an overlapping hole is provided in the auxiliary cathode, so that the cathode layer extends into the overlapping hole and contacts the conductive structure, thus improving the voltage drop phenomenon.

Description

Technical Field

[0001] The present invention relates to the field of display technologies, and particularly to a display panel and a method for manufacturing the display panel.

Background Art

[0002] Organic Light-Emitting Diode (OLED) display panels have attracted wide attention because they have display characteristics and quality superior to those of LCDs, such as advantages like being thinner, having a short response time, a low driving voltage, better display colors, and a better display viewing angle. In recent years, their development has advanced by leaps and bounds. They can not only manufacture curved displays but also gradually develop towards larger sizes.

[0003] In large-sized OLED display panels, the voltage drop due to the large size and thin cathode is a problem to be solved. In particular, in top-emission panels, visible unevenness (display non-uniformity) is extremely likely to occur. Currently, the voltage drop phenomenon is improved by arranging an auxiliary electrode and a cathode layer in parallel. Generally, an inverse-tapered spacer is provided between the cathode and the auxiliary electrode. However, since the spacer has a large volume occupancy ratio and high forming difficulty, it affects the aperture ratio and packaging. Furthermore, there are few raw material options, the manufacturing process becomes complicated, the production efficiency decreases, and the yield is low.

[0004] From the above, there is a problem in the conventional display panel that the manufacturing process of the auxiliary cathode becomes complicated. Therefore, it is necessary to provide a display panel and a method for manufacturing the display panel that can improve this drawback.

Summary of the Invention

Problems to be Solved by the Invention

[0005] Embodiments of the present application provide a display panel and a method for manufacturing the display panel that can improve the voltage drop phenomenon, improve the display uniformity of the display panel, avoid the manufacture of spacers, and reduce the process difficulty.

Means for Solving the Problem

[0006] An embodiment of the present application includes a substrate, a drive circuit layer provided on the substrate, wherein an auxiliary electrode is provided in the drive circuit layer, a common layer provided on a side of the drive circuit layer away from the substrate, and a cathode layer provided on a side of the common layer away from the drive circuit layer, and provides a display panel including: The auxiliary electrode includes a multilayer conductive structure provided in a stacked manner, and an overlapping hole is provided in the auxiliary electrode. The common layer is provided discontinuously at the overlapping hole, and the cathode layer extends into the overlapping hole and contacts the conductive structure closer to the substrate.

[0007] According to an embodiment of the present application, the auxiliary electrode includes a first conductive structure, a second conductive structure provided on a side of the first conductive structure closer to the substrate, and a third conductive structure provided on a side of the second conductive structure closer to the substrate. The overlapping hole includes a first opening provided in the first conductive structure and a second opening provided in the second conductive structure. The common layer is provided discontinuously at the first opening, and the cathode layer is provided connected to the first opening and the second opening, extends into the second opening, and contacts the third conductive structure.

[0008] According to an embodiment of the present application, the size of the first opening is smaller than the size of the second opening.

[0009] According to an embodiment of the present application, the overlapping hole includes a third opening provided in the third conductive structure, and the size of the third opening is smaller than the size of the second opening.

[0010] According to an embodiment of the present application, the inner peripheral edge of the first conductive structure protrudes from the inner peripheral edge of the second conductive structure, and the inner peripheral edge of the third conductive structure protrudes from the inner peripheral edge of the second conductive structure.

[0011] According to an embodiment of the present application, the first conductive structure includes a first protruding portion that protrudes from the inner peripheral edge of the second conductive structure, and the third conductive structure includes a second protruding portion that protrudes from the inner peripheral edge of the second conductive structure. An undercut space is formed between the first protruding portion, the second protruding portion, and the inner side wall of the second conductive structure. The cathode layer extends into the undercut space and contacts the second protruding portion.

[0012] According to an embodiment of the present application, the driving circuit layer includes a source-drain electrode layer. The source-drain electrode layer includes a source and a drain. The auxiliary electrode and the source-drain electrode layer are provided in the same layer.

[0013] According to an embodiment of the present application, the driving circuit layer includes a protective layer and a planarizing layer. The protective layer is provided on the side of the auxiliary electrode away from the substrate, and the planarizing layer is provided on the side of the protective layer away from the auxiliary electrode. The driving circuit layer is provided with a secondary via hole. The secondary via hole penetrates the planarizing layer and the protective layer to expose the auxiliary electrode.

[0014] According to an embodiment of the present application, the driving circuit layer includes a source-drain electrode layer. The source-drain electrode layer includes a source and a drain. The auxiliary electrode is provided on the side of the source-drain electrode layer away from the substrate.

[0015] According to an embodiment of the present application, the driving circuit layer includes a protective layer and a planarizing layer. The protective layer is provided on the side of the auxiliary electrode away from the substrate, and the planarizing layer is provided on the side of the protective layer away from the auxiliary electrode. The driving circuit layer is provided with a secondary via hole. The secondary via hole penetrates the planarizing layer and the protective layer to expose the auxiliary electrode.

[0016] According to an embodiment of the present application, the activity of the material of the first conductive structure is weaker than the activity of the material of the second conductive structure, and the activity of the material of the third conductive structure is weaker than the activity of the material of the second conductive structure.

[0017] According to an embodiment of the present application, the materials of the first conductive structure and the third conductive structure are the same. The material of the first conductive structure includes a metal alloy, and the material of the second conductive structure is a metal.

[0018] According to an embodiment of the present application, the material of the first conductive structure is a molybdenum-titanium alloy, and the material of the second conductive structure is copper or aluminum.

[0019] According to the display panel provided by the above embodiment of the present application, the embodiment of the present application further provides a method for manufacturing a display panel for manufacturing and forming the display panel provided by the above embodiment.

[0020] The method for manufacturing the display panel includes forming a driving circuit layer on the substrate and providing an auxiliary electrode in the driving circuit layer, where the auxiliary electrode includes a multilayer conductive structure provided in a stacked manner. Forming an overlapping hole in the auxiliary electrode. Forming a common layer on a side of the driving circuit layer away from the substrate, where the common layer is interrupted by the overlapping hole. Forming a cathode layer on a side of the common layer away from the driving circuit layer, where the cathode layer extends into the overlapping hole and contacts the conductive structure on a side close to the substrate.

[0021] According to an embodiment of the present application, the step of forming a driving circuit layer on the substrate and providing an auxiliary electrode in the driving circuit layer, where the auxiliary electrode includes a multilayer conductive structure provided in a stacked manner is A step of forming a source-drain electrode layer on the substrate, wherein the source-drain electrode layer includes a first conductive layer, a second conductive layer, and a third conductive layer that are sequentially stacked and provided on the substrate; Performing a patterning process on the source-drain electrode layer to form a source, a drain, and the auxiliary electrode, and forming an initial via hole penetrating the auxiliary electrode in the auxiliary electrode.

[0022] According to an embodiment of the present application, the step of forming a via hole in the auxiliary electrode Forming a first anode material layer, a second anode material layer, and a third anode material layer sequentially stacked on a side of the source-drain electrode layer away from the substrate; Etching the first anode material layer, the second anode material layer, and the third anode material layer to form an anode, and at the same time, etching an initial via hole portion of the auxiliary electrode to form the via hole based on the initial via hole.

[0023] According to an embodiment of the present application, in the step of forming a via hole in the auxiliary electrode, the first anode material layer, the second anode material layer, the third anode material layer, and the auxiliary electrode are etched by an Ag acid etching process.

[0024] According to an embodiment of the present application, the activity of the material of the first conductive layer is weaker than the activity of the material of the second conductive layer, and the activity of the material of the third conductive layer is weaker than the activity of the material of the second conductive layer.

[0025] According to an embodiment of the present application, the materials of the first conductive layer and the third conductive layer are the same, the material of the first conductive layer includes a metal alloy, and the material of the second conductive layer is a metal.

[0026] According to an embodiment of the present application, the material of the first conductive layer is a molybdenum-titanium alloy, and the material of the second conductive layer is copper or aluminum.

Advantages of the Invention

[0027] Beneficial effects of the embodiments of the present disclosure: The embodiments of the present application provide a display panel and a method for manufacturing the display panel. The display panel includes a driving circuit layer, a common layer, and a cathode layer that are stacked and provided on a substrate. An auxiliary cathode is provided in the driving circuit layer of the display panel, and at the same time, an overlapping hole is provided in the auxiliary cathode. Due to the overlapping hole, the common layer is interrupted by the overlapping hole, and the cathode layer extends into the overlapping hole and can contact the conductive structure on the side close to the substrate. In this way, the voltage drop phenomenon can be improved. Compared with the prior art, the present application does not need to manufacture a spacer, and the auxiliary cathode can be manufactured and formed simultaneously by using the manufacturing process of the driving circuit layer, reducing the process difficulty and improving the production efficiency.

[0028] To more clearly illustrate the technical solutions in the embodiments or the prior art, the following briefly introduces the drawings that need to be used in the description of the embodiments or the prior art. It is obvious that the drawings in the following description are only some embodiments of the present disclosure. Those skilled in the art can also obtain other drawings based on these drawings without creative efforts.

Brief Description of the Drawings

[0029]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5a

Figure 5b

Figure 5c

Figure 5d

Figure 5e

Figure 5f

Embodiments for Carrying Out the Invention

[0030] The following description of each embodiment refers to the accompanying drawings for exemplifying specific embodiments in which the present disclosure can be implemented. The directional terms referred to in the present disclosure, such as "upper", "lower", "front", "rear", "left", "right", "inner", "outer", "side surface", etc., only refer to the directions of the accompanying drawings. Therefore, the directional terms used are for explaining and understanding the present disclosure and do not limit the present disclosure. In the drawings, structural units with similar structures are denoted by the same reference numerals.

[0031] The present disclosure will be further described below in combination with the drawings and specific embodiments.

[0032] The embodiment of the present application provides a display panel. As shown in FIG. 1, FIG. 1 is a schematic diagram of the laminated structure of the first display panel provided by the embodiment of the present application. The display panel includes a substrate 10, a driving circuit layer 20, a common layer 31, and a cathode layer 32.

[0033] The driving circuit layer 20 is provided on the substrate 10. For the sake of necessary explanation, being provided on the substrate 10 may refer to directly contacting the substrate 10 or indirectly contacting the substrate 10.

[0034] The common layer 31 is provided on the side of the driving circuit layer 20 away from the substrate 10, and the cathode layer 32 is provided on the side of the common layer 31 away from the driving circuit layer 20.

[0035] In an embodiment of the present application, the common layer 31 may include, but is not limited to, a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer provided in a stacked manner. The display panel may include an organic light-emitting material layer, and the organic light-emitting material layer may be provided between the hole transport layer and the electron transport layer.

[0036] An auxiliary electrode 21 is provided in the driving circuit layer 20. The auxiliary electrode 21 includes a multilayer conductive structure provided in a stacked manner. An overlapping hole H1 is provided in the auxiliary electrode 21. The common layer 31 is provided with a break at the overlapping hole H1. The cathode layer 32 extends into the overlapping hole H1 and contacts the conductive structure on the side of the auxiliary electrode 21 closer to the substrate 10.

[0037] It should be noted that in a conventional organic light-emitting diode display panel, due to the thick thickness of the cathode layer made of a metal material, the sheet resistance becomes large, the voltage drop becomes serious, and the phenomenon of luminance unevenness of the display panel becomes prominent. In an embodiment of the present application, by providing the overlapping hole H1 in the auxiliary electrode 21, the common layer 31 is provided with a break at the overlapping hole H1, and the cathode layer 32 can contact the conductive structure on the side of the auxiliary electrode 21 closer to the substrate 10 through the overlapping hole H1, thereby forming a circuit structure in parallel with the auxiliary electrode 21. Since the resistance of the auxiliary electrode 21 is small, when the display panel is energized, the resistance of the cathode layer 32 can be reduced, thereby reducing the voltage drop and improving the luminance uniformity of the display panel.

[0038] In an embodiment of the present application, by providing the auxiliary electrode 21 in the driving circuit layer 20, the auxiliary electrode 21 can be simultaneously manufactured and formed by utilizing the manufacturing process of the driving circuit layer 20. The overlapping hole H1 formed in the auxiliary electrode 21 can cause the common layer 31 to be interrupted at the overlapping hole H1. In this way, the effect of overlapping the cathode layer 32 and the auxiliary electrode 21 is realized, and at the same time, there is no need to manufacture a spacer, the process difficulty can be reduced, and the production efficiency can be improved.

[0039] Furthermore, the auxiliary electrode 21 includes a first conductive structure 211, a second conductive structure 212, and a third conductive structure 213.

[0040] The second conductive structure 212 is provided on the side of the first conductive structure 211 closer to the substrate 10, and the third conductive structure 213 is provided on the side of the second conductive structure 212 closer to the substrate 10.

[0041] Combining FIG. 2 and FIG. 3, FIG. 2 is an enlarged schematic view of part A of FIG. 1 provided by the embodiment of the present application, and FIG. 3 is a schematic structural view of the auxiliary electrode provided by the embodiment of the present application. The overlapping hole H1 includes a first opening H11 and a second opening H12 that communicate with each other. The first opening H11 is formed in the first conductive structure 211, and the second opening H12 is formed in the second conductive structure 212.

[0042] The common layer 31 is provided discontinuously at the first opening H11, and the cathode layer 32 is provided connected to the first opening H11 and the second opening H12, extends into the second opening H12, and contacts the third conductive structure 213.

[0043] The overlapping hole H1 further includes a third opening H13 that communicates with the second opening H12, and the third opening H13 is provided in the third conductive structure 213.

[0044] Combining FIG. 2 and FIG. 3, a part of the common layer 31 is formed by depositing on the bottom of the third opening H13, and another part of the common layer 31 is formed by depositing on the first conductive structure 211. There is a discontinuity between the part of the common layer 31 located at the bottom of the third opening H13 and the part of the common layer 31 located on the first conductive structure 211.

[0045] The cathode layer 32 is provided so as to be connected to the first opening H11 and the second opening H12, extends into the second opening H12 along the inner wall of the first opening H11, and contacts the side of the third conductive structure 213 where the second opening H12 is exposed and away from the substrate 10, and at the same time covers the common layer 31 located at the bottom of the third opening H13.

[0046] Furthermore, the size of the first opening H11 is smaller than the size of the second opening H12, and the size of the third opening H13 is smaller than the size of the second opening H12.

[0047] It should be noted that the size of the first opening H11 may refer to the width of the first opening H11 in the cross-sectional view shown in FIG. 3. When the first opening H11 is circular, the size of the first opening H11 may refer to the diameter of the first opening H11. The meaning of the sizes of other openings can refer to the size of the first opening H11 and will not be repeatedly described here.

[0048] As shown in FIG. 3, the inner peripheral edge of the first conductive structure 211 protrudes more than the inner peripheral edge of the second conductive structure 212, and the inner peripheral edge of the third conductive structure 213 protrudes more than the inner peripheral edge of the second conductive structure 212.

[0049] Furthermore, the first conductive structure 211 includes a first protrusion 2110 that protrudes more than the inner peripheral edge of the second conductive structure 212, and the third conductive structure 213 includes a second protrusion 2130 that protrudes more than the inner peripheral edge of the second conductive structure 212.

[0050] An undercut space UA is formed between the first protrusion 2110, the second protrusion 2130, and the inner peripheral edge of the second conductive structure 212. The cathode layer 32 can extend into the undercut space UA and contact the surface of the second protrusion 2130 on the side close to the first conductive structure 211.

[0051] Furthermore, the drive circuit layer 20 may include, but is not limited to, a light-shielding layer 201, a buffer layer 202, an active layer 203, a gate insulating layer 204, a gate metal layer 205, an interlayer dielectric layer 206, a source / drain electrode layer 207, a protective layer 208, and a planarization layer 209, which are sequentially stacked on the substrate 10.

[0052] The thicknesses of the protective layer 208 and the planarization layer 209 are both 1 μm or more and 4 μm or less. For example, the thickness of the protective layer 208 may be 1 μm, 2 μm, 3 μm, or 4 μm, and the thickness of the planarization layer 209 may be 1 μm, 2 μm, 3 μm, or 4 μm. The thickness of the protective layer 208 may or may not be equal to the thickness of the planarization layer 209, and is not limited herein.

[0053] The display panel further includes an anode 33 provided on the side of the planarization layer 209 away from the substrate 10, and a pixel definition layer 34 provided on the side of the planarization layer 209 away from the substrate 10 and covering the anode 33. The common layer 31 and the cathode layer 32 are stacked on the pixel definition layer 34.

[0054] In one of the embodiments, the auxiliary electrode 21 and the source / drain electrode layer 207 are provided in the same layer.

[0055] As shown in FIG. 2, both the auxiliary electrode 21 and the source / drain electrode layer 207 are provided on the side of the interlayer dielectric layer 206 away from the substrate 10. The source / drain electrode layer 207 may include a source 207a and a drain 207b. The active layer 203 may include a semiconductor portion located in the middle and conductor portions located on both sides of the semiconductor portion. The source 207a and the drain 207b are respectively connected to the corresponding conductor portions through via holes in the interlayer dielectric layer 206.

[0056] Furthermore, the source / drain electrode layer 207 includes a multilayer conductive film layer provided in a stacked manner.

[0057] In one of the embodiments, the source-drain electrode layer 207 may include a first conductive layer 2071, a second conductive layer 2072, and a third conductive layer 2073. The second conductive layer 2072 is provided between the first conductive layer 2071 and the third conductive layer 2073, and the first conductive layer 2071 is provided on the side of the third conductive layer 2073 away from the substrate 10.

[0058] The materials of the first conductive structure 211 of the auxiliary electrode 21 and the first conductive layer 2071 of the source-drain electrode layer 207 are the same. The materials of the second conductive structure 212 of the auxiliary electrode 21 and the second conductive layer 2072 of the source-drain electrode layer 207 are the same. The materials of the third conductive structure 213 of the auxiliary electrode 21 and the third conductive layer 2073 of the source-drain electrode layer 207 are the same. In this way, by using the manufacturing process of the source-drain electrode layer 207, the auxiliary electrode 21 can be simultaneously manufactured and formed. Thus, the manufacturing process and mask required for manufacturing the auxiliary electrode 21 alone can be saved, the manufacturing process of the display panel can be simplified, and the production cost can be reduced.

[0059] Also, by providing the auxiliary electrode 21 and the source-drain electrode layer 207 in the same layer, it is possible to avoid the auxiliary electrode 21 coming into contact with the water-absorbent resist material, and the risk of package failure can be reduced.

[0060] Furthermore, the activity of the first conductive structure 211 is weaker than that of the second conductive structure 212, and the activity of the third conductive structure 213 is weaker than that of the second conductive structure 212.

[0061] When etching the auxiliary electrode 21, the etching rate of the second conductive structure 212 with strong activity is greater than that of the first conductive structure 211 and the third conductive structure 213, so the undercut space UA is formed.

[0062] Furthermore, the materials of the first conductive structure 211 and the third conductive structure 213 are the same. The material of the first conductive structure 211 includes a metal alloy, and the material of the second conductive structure 212 is a metal.

[0063] For example, the materials of the first conductive structure 211 and the third conductive structure 213 are both molybdenum titanium alloy (MoTi), and the material of the second conductive structure 212 is copper (Cu) or aluminum (Al).

[0064] In one of the embodiments, the auxiliary electrode 21 is provided on the side of the source-drain electrode layer 207 away from the substrate 10.

[0065] As shown in FIG. 4, FIG. 4 is a schematic diagram of the stacked structure of the second display panel provided by the embodiment of the present application. For the sake of explanation, the structure of the display panel shown in FIG. 4 is substantially the same as the structure of the display panel shown in FIG. 1, and the difference is that the film layer positions where the auxiliary electrode 21 is provided are different.

[0066] In the embodiment shown in FIG. 4, a second interlayer dielectric layer 210 is provided on the side of the source-drain electrode layer 207 away from the substrate 10, and the auxiliary electrode 21 is provided on the side of the second interlayer dielectric layer 210 away from the substrate 10.

[0067] A conductive electrode 22 is further provided on the side of the second interlayer dielectric layer 210 away from the substrate 10. The conductive electrode has the same multi-layer conductive structure as the auxiliary electrode 21. The anode 33 is connected to the conductive electrode 22 through a via hole penetrating the planarization layer 209 and the protection layer 208, and the conductive electrode is connected to the drain through a via hole penetrating the second interlayer dielectric layer 210.

[0068] Furthermore, a secondary overlay hole H2 is provided in the driving circuit layer 20. The secondary overlay hole H2 penetrates the planarization layer 209 and the protection layer 208 to expose the auxiliary electrode 21.

[0069] As shown in FIG. 1 or FIG. 4, since the secondary via hole H2 penetrates the pixel definition layer 34, the planarization layer 209, and the protective layer 208 to expose the auxiliary electrode 21, the cathode layer 32 is formed by depositing on the auxiliary electrode 21 and can extend into the via hole H1 of the auxiliary electrode 21 and overlap with the auxiliary electrode 21.

[0070] Furthermore, the anode 33 has a multilayered anode material layer provided by stacking.

[0071] In one of the embodiments, as shown in FIG. 1, the anode 33 includes a first anode material layer 331, a second anode material layer 332, and a third anode material layer 333 that are sequentially stacked on the planarization layer 209. The materials of the first anode material layer 331 and the third anode material layer 333 are both transparent conductive oxides (TCOs), and the material of the second anode material layer 332 is a metal.

[0072] For example, the materials of the first anode material layer 331 and the third anode material layer 333 are both indium tin oxide (ITO), and the material of the second anode material layer 332 is silver (Ag).

[0073] According to the display panel provided by the above embodiment of the present application, the embodiment of the present application also provides a manufacturing method for manufacturing and forming the display panel provided by the above embodiment. As shown in FIGS. 5a to 5f, FIGS. 5a to 5f are schematic structural diagrams of the flow of the manufacturing method of the display panel provided by the embodiment of the present application. The manufacturing method of the display panel includes the following steps. Step S10: Form a driving circuit layer 20 on the substrate 10, and provide an auxiliary electrode 21 in the driving circuit layer 20. The auxiliary electrode 21 includes a multilayered conductive structure provided by stacking. Step S20: Form a via hole in the auxiliary electrode. Step S30: Form a common layer on the side of the driving circuit layer away from the substrate. The common layer is interrupted by the via hole. Step S40: Form a cathode layer on the side of the common layer away from the driving circuit layer. The cathode layer extends into the overlapping hole and contacts the conductive structure on the side close to the substrate.

[0074] Referring to FIGS. 5a, 5b, and 5c, step S10 may include the following steps. Step S101: Sequentially form a light-shielding layer 201, a buffer layer 202, an active layer 203, a gate insulating layer 204, a gate metal layer 205, and an interlayer dielectric layer 206 on the substrate 10. Step S102: Form a source / drain electrode layer 207 on the interlayer dielectric layer 206. The source / drain electrode layer 207 includes a first conductive layer 2071, a second conductive layer 2072, and a third conductive layer 2073 that are sequentially stacked. Step S103: Perform a patterning process on the source / drain electrode layer 207 to form a source 207a, a drain 207b, and the auxiliary electrode 21, and form an initial overlapping hole H0 penetrating the auxiliary electrode 21 in the auxiliary electrode 21. Step S104: Form a protective layer 208 on the interlayer dielectric layer 206, and etch the protective layer 208 to expose the auxiliary electrode 21, the initial overlapping hole H0, and the source 207a. Step S105: Form a planarization layer 209 on the protective layer 208, and etch the planarization layer 209 to form a secondary overlapping hole H2 and an anode contact hole H3. The secondary overlapping hole H2 exposes the auxiliary electrode 21 and the initial overlapping hole H0, and the anode contact hole H3 exposes the source 207a.

[0075] In an embodiment of the present application, as shown in FIG. 5a, the auxiliary electrode 21 may include a third conductive structure 213, a second conductive structure 212, and a first conductive structure 211 that are sequentially stacked. The initial overlapping hole H0 penetrates the first conductive structure 211, the second conductive structure 212, and the third conductive structure 213, and the size of the initial overlapping hole H0 gradually decreases from one end away from the substrate 10 to one end close to the substrate 10.

[0076] Referring to FIG. 5d, the step S20 includes the following steps. Step S201: The first anode material layer 331, the second anode material layer 332, and the third anode material layer 333 are sequentially stacked on the flat layer 209 to form. Step S202: The first anode material layer 331, the second anode material layer 332, and the third anode material layer 333 are etched by Ag acid etching to form the anode 33. At the same time, the auxiliary electrode 21 is etched by the Ag acid etching to form the via hole H1 based on the initial via hole H0.

[0077] It should be noted that by adjusting the Ag acid etching process, the first anode material layer 331, the second anode material layer 332, and the third anode material layer 333 can be etched, and at the same time, the auxiliary electrode 21 can be etched, and the mask required to etch the auxiliary electrode 21 alone to form the via hole H1 can be omitted.

[0078] Combined with FIG. 3, since the activity of the second conductive structure 212 in the auxiliary electrode 21 is higher than that of the first conductive structure 211 and the third conductive structure 213, the etching rate of the second conductive structure 212 becomes larger than the etching rates of the first conductive structure 211 and the third conductive structure 213, and a first protrusion 2110 protruding from the inner peripheral edge of the second conductive structure 212 is formed on the first conductive structure 211, and a second protrusion 2130 protruding from the inner peripheral edge of the second conductive structure 212 is formed on the third conductive structure 213, and an undercut space UA is formed between the first protrusion 2110, the third protrusion 2130, and the inner side wall of the second conductive structure 212.

[0079] Referring to FIGS. 5e to 5f, in the step S30, before forming the common layer 31, a pixel definition layer 34 needs to be formed on the flat layer 209, and the pixel definition layer 34 is etched to form a plurality of banks 340. The bank 340 is formed surrounding a pixel opening 341 and an opening exposing the auxiliary electrode 21.

[0080] In the step S30, the common layer 31 may be manufactured by full-surface evaporation. Since there is an undercut space UA in the overlapping hole H1, the common layer 31 is interrupted at the overlapping hole H1 and cannot completely cover the auxiliary electrode 21.

[0081] In some other embodiments, the cathode layer 32 may be formed by sputtering.

[0082] In the step S40, the cathode layer 32 may be manufactured by full-surface evaporation. When the cathode layer 32 is formed by evaporation, a film may be formed such that the cathode layer 32 is connected to the overlapping hole H1, and extends into the undercut space UA of the overlapping hole H1, and a deposition angle different from that of the common layer 31 may be controlled so as to contact the third conductive structure 213.

[0083] Beneficial effects of the embodiments of the present application: The embodiments of the present application provide a display panel and a method for manufacturing the display panel. The display panel includes a driving circuit layer, a common layer, and a cathode layer that are laminated on a substrate. An auxiliary cathode is provided in the driving circuit layer of the display panel, and at the same time, an overlapping hole is provided in the auxiliary cathode. Due to the overlapping hole, the common layer is interrupted at the overlapping hole, and the cathode layer extends into the overlapping hole and can contact the conductive structure closer to the substrate. In this way, the voltage drop phenomenon can be improved. Compared with the prior art, the present application does not need to manufacture a spacer, and the auxiliary cathode can be manufactured and formed simultaneously by using the manufacturing process of the driving circuit layer, reducing the process difficulty and improving the production efficiency.

[0084] As described above, the present application is disclosed as above by preferred embodiments. However, the above preferred embodiments are not for limiting the present application. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application is based on the scope defined by the claims.

Description of Reference Numerals

[0085] 10: Substrate 20: Driving circuit layer 201: Light-shielding layer 202: Buffer layer 203: Active layer 204: Gate insulating layer 205: Gate metal layer 206: Interlayer dielectric layer 207: Source / drain electrode layer 2071: First conductive layer 2072: Second conductive layer 2073: Third conductive layer 207a: Source 207b: Drain 208: Protection layer 209: Planarization layer 21: Auxiliary electrode 210: Second interlayer dielectric layer 211: First conductive structure 2110: First protrusion 212: Second conductive structure 213: Third conductive structure 2130: Second protrusion 22: Conductive electrode 31: Common layer 32: Cathode layer 33: Anode 331: First anode material layer 332: Second anode material layer 333: Third anode material layer 34: Pixel definition layer 340: Bank 341: Pixel opening H0: Initial overlap hole H1: Overlap hole H11: First opening H12: Second opening H13: Third opening H2: Secondary overlap hole H3: Anode contact hole UA: Undercut space

Claims

1. A substrate, a drive circuit layer provided on the substrate, wherein an auxiliary electrode is provided in the drive circuit layer, a common layer provided on a side of the drive circuit layer away from the substrate, and a cathode layer provided on a side of the common layer away from the drive circuit layer, comprising: The auxiliary electrode includes a multilayer conductive structure provided in a stacked manner, a superposed hole is provided in the auxiliary electrode, the common layer is provided discontinuously at the superposed hole, the cathode layer extends into the superposed hole and contacts the conductive structure closer to the substrate, The auxiliary electrode is a first conductive structure, a second conductive structure provided on a side of the first conductive structure closer to the substrate, and a third conductive structure provided on a side of the second conductive structure closer to the substrate, comprising: The superposed hole includes a first opening provided in the first conductive structure, a second opening provided in the second conductive structure, and a third opening provided in the third conductive structure, The common layer is provided discontinuously at the first opening, a part of the common layer is formed by depositing on the bottom of the third opening, and another part of the common layer is formed by depositing on the first conductive structure, The cathode layer is provided connected to the first opening and the second opening, extends into the second opening, contacts the third conductive structure, and at the same time covers a part formed by depositing on the bottom of the third opening and a part formed by depositing on the first conductive structure of the common layer, a display panel.

2. The display panel according to claim 1, wherein the size of the first opening is smaller than the size of the second opening.

3. The display panel according to claim 2, wherein the superposed hole includes a third opening provided in the third conductive structure, and the size of the third opening is smaller than the size of the second opening.

4. The display panel according to claim 3, wherein an inner peripheral edge of the first conductive structure protrudes more than an inner peripheral edge of the second conductive structure, and an inner peripheral edge of the third conductive structure protrudes more than the inner peripheral edge of the second conductive structure.

5. The first conductive structure includes a first protruding portion protruding more than the inner peripheral edge of the second conductive structure, the third conductive structure includes a second protruding portion protruding more than the inner peripheral edge of the second conductive structure, an undercut space is formed between the first protruding portion, the second protruding portion, and an inner sidewall of the second conductive structure, the cathode layer extends into the undercut space and contacts the second protruding portion, the display panel according to claim 4.

6. The display panel according to claim 1, wherein the driving circuit layer includes a source-drain electrode layer, the source-drain electrode layer includes a source and a drain, and the auxiliary electrode and the source-drain electrode layer are provided in the same layer.

7. The driving circuit layer includes a protective layer and a planarization layer, the protective layer is provided on the side of the auxiliary electrode away from the substrate, and the planarization layer is provided on the side of the protective layer away from the auxiliary electrode. The display panel according to claim 6, wherein a secondary via hole is provided in the driving circuit layer, the secondary via hole penetrates the planarization layer and the protective layer to expose the auxiliary electrode.

8. The display panel according to claim 1, wherein the driving circuit layer includes a source-drain electrode layer, the source-drain electrode layer includes a source and a drain, and the auxiliary electrode is provided on the side of the source-drain electrode layer away from the substrate.

9. The driving circuit layer includes a protective layer and a planarization layer, the protective layer is provided on the side of the auxiliary electrode away from the substrate, and the planarization layer is provided on the side of the protective layer away from the auxiliary electrode. The display panel according to claim 8, wherein a secondary via hole is provided in the driving circuit layer, the secondary via hole penetrates the planarization layer and the protective layer to expose the auxiliary electrode.

10. The display panel according to claim 1, wherein the activity of the material of the first conductive structure is weaker than that of the material of the second conductive structure, and the activity of the material of the third conductive structure is weaker than that of the material of the second conductive structure.

11. The display panel according to claim 10, wherein the materials of the first conductive structure and the third conductive structure are the same, the material of the first conductive structure includes a metal alloy, and the material of the second conductive structure is a metal.

12. The display panel according to claim 11, wherein the material of the first conductive structure is a molybdenum-titanium alloy, and the material of the second conductive structure is copper or aluminum.

13. A step of forming a driving circuit layer on a substrate and providing an auxiliary electrode in the driving circuit layer, the auxiliary electrode including a multilayer conductive structure provided in a stacked manner. A step of forming a via hole in the auxiliary electrode. A step of forming a common layer on the side of the driving circuit layer away from the substrate, the common layer being interrupted by the via hole. Forming a cathode layer on a side of the common layer away from the driving circuit layer, wherein the cathode layer extends into the overlapping hole and contacts the conductive structure on a side closer to the substrate. Forming a driving circuit layer on the substrate and providing an auxiliary electrode in the driving circuit layer, wherein the auxiliary electrode includes a multilayer conductive structure provided in a stacked manner. Forming a source-drain electrode layer on the substrate, wherein the source-drain electrode layer includes a third conductive layer, a second conductive layer, and a first conductive layer sequentially stacked on the substrate. Performing a patterning process on the source-drain electrode layer to form a source, a drain, and the auxiliary electrode, and forming an initial overlapping hole penetrating the auxiliary electrode in the auxiliary electrode. Forming a common layer on a side of the driving circuit layer away from the substrate, wherein the common layer is interrupted by the overlapping hole, and another part of the common layer is formed by deposition on the first conductive layer. A method for manufacturing a display panel, comprising forming a cathode layer on a side of the common layer away from the driving circuit layer, depositing the cathode layer so as to connect to the overlapping hole and extend into the overlapping hole, contacting the third conductive layer, and controlling a deposition angle different from that of the common layer to deposit and form the cathode layer so as to cover a part of the common layer formed by deposition on the first conductive layer.

14. The step of forming an overlapping hole in the auxiliary electrode. Forming a first anode material layer, a second anode material layer, and a third anode material layer in sequence by stacking on a side of the source-drain electrode layer away from the substrate. Etching the first anode material layer, the second anode material layer, and the third anode material layer to form an anode, and at the same time, etching an initial overlapping hole portion of the auxiliary electrode to form the overlapping hole based on the initial overlapping hole. The method for manufacturing a display panel according to claim 13.

15. The method for manufacturing a display panel according to claim 14, wherein in the step of forming an overlapping hole in the auxiliary electrode, the first anode material layer, the second anode material layer, the third anode material layer, and the auxiliary electrode are etched by an Ag acid etching process.

16. The activity of the material of the first conductive layer is weaker than that of the material of the second conductive layer, and the activity of the material of the third conductive layer is weaker than that of the material of the second conductive layer. The method for manufacturing a display panel according to claim 14.

17. The materials of the first conductive layer and the third conductive layer are the same. The material of the first conductive layer includes a metal alloy, and the material of the second conductive layer is a metal. The method for manufacturing a display panel according to claim 16.

18. The material of the first conductive layer is a molybdenum titanium alloy, and the material of the second conductive layer is copper or aluminum. The method for manufacturing a display panel according to claim 17.

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