High-density pixel array for AutoView 3D display
MicroLEDs with chiplets and microICs on a CMOS backplane address the limitations of OLED and LCD displays, enabling high-brightness, high-resolution, and high-angular resolution AutoView 3D displays by overcoming alignment issues and maintaining high image quality.
Patent Information
- Application Number
- JP2023537638
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-12-21
- Filing Date
- 2021-12-21
- Publication Date
- 2025-08-07
- Estimated Expiration
- 2041-12-21
AI Technical Summary
Existing autostereoscopic 3D displays face challenges in achieving high brightness, high resolution, and high angular resolution due to limitations in pixel size, lens size, and alignment tolerances, particularly in OLED and LCD technologies, which are exacerbated by the constraints of TFT and LTPS backplanes.
Employing microLEDs with chiplets and microICs on a CMOS backplane, allowing for high-density pixel arrangements with microLEDs spaced at a few microns, enabling high-brightness emission and precise optical alignment with microlenses or optical steering elements, thereby overcoming alignment issues and maintaining high resolution.
The solution enables high-brightness, high-resolution, and high-angular resolution AutoView 3D displays with reduced manufacturing complexity and cost, eliminating alignment artifacts and providing high-quality 3D images comparable to 2D displays.
Smart Images

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Abstract
Description
[Technical Field]
[0001] REFERENCE TO RELATED APPLICATIONS This application claims priority to U.S. Provisional Patent Application No. 63 / 128686, filed December 21, 2020, which is incorporated herein by reference in its entirety. [Background technology]
[0002] background Various types of displays have been proposed to provide autostereoscopic (i.e., viewable without glasses or near-eye optics, i.e., "autoview") three-dimensional (3D) displays. One type of autoview 3D display is called a horizontal parallax-only (HPO) display, a lenticular display, a raster barrier display, or a parallax barrier display, and includes various means of separating different parallax views in one dimension (e.g., horizontally). This type of display can present a different parallax view or animated sequence scene view to each eye by incorporating an aperture or lens to multiplex a two-dimensional (2D) pixel array into a specific narrow viewing angle. For example, the number of discrete parallax view channels is determined by the viewing angle of the lenticular lens used in the display, the spacing between the pixel and the lens or aperture, the width of the lens or aperture, and the size of the pixel. Some examples of existing autoview 3D displays are described in U.S. Patent Application Publication No. 2016 / 0234487 A1 to Kroon et al. and U.S. Patent Application Publication No. 2017 / 0208319 A1 to Kim et al.
[0003] When the field of view distribution is limited to the horizontal direction, the number of distinct samples in the horizontal pixel layer is at least two times, and more than 100 times, greater than the number of distinct samples in the vertical pixel layer. Standard display technologies based on organic light-emitting diode (OLED) or transmissive liquid crystal (LC) technology limit the minimum pixel size because pixel size is constrained by the required display brightness and the practical size of the pixel drive circuitry, which in turn limits the lens size or the spacing between apertures. Several tradeoffs have been exploited to potentially reduce crosstalk and increase the number and distribution span of horizontal angles, even at the expense of the display's vertical resolution, by using tilted lenticular lenses (see the aforementioned Kroon et al. application) and pixels from multiple vertical columns (see the aforementioned Kim et al. application).
[0004] Solutions to overcome these problems with existing display systems are desirable. Summary of the Invention
[0005] Disclosure Overview To provide a foundation for one or more aspects of the present disclosure, a brief summary of these aspects is presented below. The summary is not an extensive overview of all contemplated aspects, nor is it intended to identify key or essential elements of all aspects, nor is it intended to delineate the scope of any or all aspects. The purpose of the summary is to provide a brief overview of some concepts of one or more aspects and to serve as a prelude to the detailed description that follows.
[0006] A display device based on micro light emitting diodes (microLEDs) includes a plurality of chiplets. Each chiplet includes one or more rack cells, each rack cell including a plurality of microLEDs supported on a substrate. The chiplet also includes a micro-integrated circuit (microIC) electronically connected to the one or more rack cells. The microIC includes a plurality of interconnects supported on a backplane. Thus, when connected to a rack cell, the microIC can electrically drive each microLED of the rack cell. In one embodiment, a plurality of chiplets are arranged on a display substrate to form an AutoView 3D display with horizontal parallax only.
[0007] The accompanying drawings depict only some implementations and therefore should not be considered limiting of the scope. [Brief explanation of the drawings]
[0008] [Figure 1] FIG. 1 illustrates a display system configuration, according to one embodiment. [Figure 2] FIG. 1 illustrates a display system pixel configuration including an alternative architecture, according to one embodiment. [Figure 3] FIG. 1 illustrates an alternative display system configuration, according to one embodiment. [Figure 4] FIG. 1 illustrates an alternative display system configuration, according to one embodiment. [Figure 5] FIG. 10 illustrates yet another variation of a display system pixel configuration, according to one embodiment. [Figure 6] FIG. 10 illustrates yet another variation of a display system pixel configuration, according to one embodiment. [Figure 7] 10A-10C illustrate further variations of display system pixel configurations according to further embodiments. [Figure 8] 10A-10C illustrate further variations of display system pixel configurations according to further embodiments. [Figure 9]10A-10C illustrate further variations of display system pixel configurations according to further embodiments. [Figure 10] 10A-10C illustrate further variations of display system pixel configurations according to further embodiments. [Figure 11] FIG. 10 illustrates another alternative embodiment of a display system pixel configuration. [Figure 12] FIG. 1 illustrates another exemplary display system configuration, according to one embodiment. [Figure 13] FIG. 1 illustrates another exemplary display system configuration, according to one embodiment. [Figure 14] FIG. 1 illustrates another exemplary display system configuration, according to one embodiment. [Figure 15] FIG. 10 illustrates a further display system configuration according to a further embodiment. [Figure 16] FIG. 10 illustrates a further display system configuration according to a further embodiment. [Figure 17] FIG. 10 illustrates a further display system configuration according to a further embodiment. [Figure 19] FIG. 10 illustrates yet another display system configuration, according to one embodiment. [Figure 19] FIG. 10 illustrates yet another display system configuration, according to one embodiment. [Figure 20] FIG. 10 illustrates yet another display system configuration, according to one embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0009] Detailed Description The present invention will now be described in more detail with reference to the accompanying drawings, which show embodiments of the invention. However, the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the dimensions and relative dimensions of layers and regions may be exaggerated for clarity.
[0010] Although terms such as "first," "second," and "third" are used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be construed as being limited by these terms. These terms are used only to distinguish one element, component, region, layer, or section from another region, layer, or section. Thus, a first element, component, region, layer, or section described below may be referred to as a second element, component, region, layer, or section without departing from the teachings of the present invention.
[0011] Spatially relative terms such as "beneath," "below," "lower," "under," "above," and "upper" may be used herein to easily describe the relationship of one illustrated element or feature to another. It should be noted that spatially relative terms are intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures were inverted, elements may be described as being "below" or "beneath" or "lower" than the other element or feature. Thus, the exemplary terms "beneath" and "lower" can encompass both an orientation of above and below. The device may also be positioned in other orientations (rotated 90 degrees or at other orientations). Spatially relative descriptors used herein should be interpreted accordingly. Furthermore, when a layer is described as "between two layers," that layer may be the only layer between the two layers, or there may be one or more intervening layers.
[0012] The terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting of the present invention. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly dictates otherwise. It should be noted that the terms "comprise" and / or "comprising," as used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. The term "and / or," as used herein, includes any and all combinations of one or more of the associated listed items and may be abbreviated as " / ."
[0013] It should be noted that when an element or layer is referred to as being "on," "connected," "coupled," or "adjacent" another element or layer, the element or layer may be directly on, directly connected to, directly coupled to, or directly adjacent to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly connected," "directly coupled," or "directly adjacent" to another element or layer, no intervening elements or layers are present. Similarly, when light is received or provided from an element, the light may be received or provided directly from that element or from intervening elements. On the other hand, when light is "directly" received or provided from an element, no intervening elements are present.
[0014] Embodiments of the present invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the present invention. As such, variations from the shapes of the illustrations due, for example, to manufacturing techniques and / or tolerances are to be expected. Thus, embodiments of the present invention should not be construed as limited to the particular shapes of regions illustrated herein but include deviations in shape that result, for example, from manufacturing. Accordingly, the illustrated regions are schematic in nature and the shapes are not intended to represent the actual shape of a region of a device and are not intended to limit the scope of the present invention.
[0015] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Furthermore, terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the relevant art and / or the context of this specification, and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein.
[0016] To produce a high-brightness AutoView 3D HPO display (e.g., based on lenticular or raster barriers), pixel density must be relatively high compared to the lens size and / or aperture spacing. Furthermore, the luminous flux of the display must be comparable to or greater than that of a 2D display. This requirement is inherently impractical and contradictory to organic light-emitting diode (OLED) and liquid crystal-based displays (LCDs), because the minimum pixel size of such displays is constrained by brightness requirements, the physical properties of the pixel layer, the practical circuit density limitations of the required thin-film transistor (TFT) or low-temperature polycrystalline silicon (LTPS) backplane circuitry, and, in the case of LCDs, the fundamental need for a backlight for each pixel. For example, for existing displays, these constraints, plus the scaling constraints of TFT and LTPS, limit the size of red-green-blue (RGB) pixels to approximately 30 microns by 30 microns (e.g., the premium OLED display on the Sony® Xperia Z5 phone), approximately 50 microns by 50 microns (e.g., the Liquid Retina display on the Apple® iPhone® 11), and up to approximately 110 by 110 square microns (e.g., the Retina display on the Apple® MacBook).
[0017] Complementary metal-oxide silicon (CMOS) backplanes can provide much higher pixel drive circuit density, exceeding 10,000 pixels per square inch, but silicon-based CMOS backplanes are more expensive than TFT or LTPS backplanes. Tiling large LC or OLED display panels with CMOS backplanes is not cost-effective. Furthermore, mechanical tolerances can be problematic when aligning high-density display pixels with lenslets or apertures. Lenslets or apertures are typically formed as large sheets separately from the display pixels, for example, using injection molding, extrusion, or printing techniques, and then applied to the display pixels using, for example, a pressure-sensitive adhesive. All of these processes have inherent limitations on mechanical tolerances, on the order of tens of microns. Given the limited number of pixels behind each lens / aperture and the single-digit ratio between lens / aperture size and pixel size, undesirable artifacts associated with misalignment between the lens / aperture and the pixel cannot be compensated for by calibration or software. This problem is exacerbated because the display area is typically large compared to the pixel and lens / aperture size, and tolerance errors accumulate from one side of the display to the other or from the center to the edge during manufacturing. Given these limitations in manufacturability, brightness, and drive circuitry, it is difficult to produce high surface resolution, high angular resolution, and high brightness HPO auto-viewing 3D displays using existing technology.
[0018] In contrast, inorganic micro-light-emitting diodes (micro-LEDs) can generate high brightness from a small emitting area and have been demonstrated as a promising display pixel source. See, for example, International Publication Nos. WO 2019 / 209945 A1, WO 2019 / 209957 A1, and WO 2019 / 209961 (He et al.), which are incorporated herein by reference in their entireties. The luminous flux from a single micro-LED emitter has been demonstrated to be orders of magnitude higher than that of even larger area OLED devices and higher than that practically achievable with transmissive LCs and backlights. Thus, the emergence of smaller, denser, brighter, and more efficient emitting pixels enables unique solutions to the problems described above.
[0019] While the size limit for visually discernible pixels at a typical arm's length working distance is thought to be approximately 150 microns (i.e., equivalent to approximately 1 arc minute per pixel), microLEDs provide extremely bright emission at a fraction of that dimension. For example, a 10 micron by 10 micron square microLED can emit up to 1,000 times the luminous flux as a 10,000 square micron OLED or LC pixel (e.g., 500,000 nits versus 500 nits). That is, emitters within a microLED display can be spaced so that full-color red-green-blue (RGB) pixel units can be placed on a pitch of less than 3 microns, allowing all three colors to be emitted substantially simultaneously. Thus, while maintaining an overall pixel size of 10,000 square microns, and similarly providing retina-limited resolution and even higher luminous flux, the required microLED emitting area is much smaller than that of an OLED or LC pixel.
[0020] Utilizing the characteristics of micro LEDs described above, a new configuration of the AutoView HPO 3D display is disclosed. FIG. 1 illustrates a conceptual diagram related to a display system incorporating micro LEDs, according to one embodiment. As shown in FIG. 1, a micro LED emitter array 100 includes a plurality of micro LEDs supported on a wafer 104. As shown in inset 108, micro LEDs 110A, 110B, and 110C are arranged in an array, each with a pitch ranging from approximately 10 microns to the submicron level. For example, micro LEDs with an emitter pitch on the order of a few microns have been demonstrated that provide emission in the visible wavelength range with high brightness (i.e., brightness on the order of hundreds of thousands of nits). The micro LEDs 110A, 110B, and 110C can each emit light energy with different wavelengths. For example, the micro LED 110A can emit light in the red wavelength range, the micro LED 110B can emit light in the blue wavelength range, and the micro LED 110C can emit light in the green wavelength range. It should be noted that although micro LEDs of similar colors are shown arranged in rows in inset 108, the micro LEDs may be arranged in pairs, clusters, and other suitable configurations depending on the particular application without departing from the scope of this specification.
[0021] Continuing with reference to FIG. 1 , a portion of the micro LED emitter array 100 is divided into clusters or “rack cells” 120. The rack cells 120 may be formed, for example, by dicing the micro LED array 100 into a plurality of rack cells. As shown in FIG. 1 , a rack cell 120 includes one micro LED 110A, one micro LED 110B, and two micro LEDs 110C supported on a substrate 122 of a wafer 104. The rack cells 120 are then electronically connected to a micro integrated circuit (micro IC) 130. The micro IC 130 includes a plurality of interconnects 132 supported on a backplane 134. Thus, when connected to the rack cells 120, the micro IC 130 can electrically drive each of the micro LEDs 110A, 110B, and 110C. When electrically connected to the micro IC 130, the rack cells 120 form “chiplets” 135 having an overall pitch of 10 microns or less.
[0022] Finally, multiple chiplets 135 can be transferred to a display backplane to form a micro LED display 140. FIG. 1 illustrates a portion of a micro LED display 140. The micro LED display 140 includes multiple horizontal bus lines 142 and multiple vertical bus lines 144 supported on a display backplane 146. For example, because each chiplet 135 has a pitch of approximately 10 microns or less, the distance between chiplets 135 can be formed as 50-100 microns. This allows pixel sizes to be kept below the 150 micron size limit mentioned above while providing high-brightness emission of one or more wavelengths, while leaving room on the display backplane 146 for additional components, such as sensor elements and other miniature electronic or optical elements, using simple electronic connections. Furthermore, microlenses or other optical elements optically coupled to emitting pixels in the display to guide light from the emitting pixels to desired locations have dimensions on the order of 100 microns. Therefore, optical alignment of such optical elements to the chiplets 135 is simplified compared to conventional displays in which the light-emitting elements occupy a large portion of the pixel area. Similarly, since the microlens or optical element can easily cover the chiplet 135, shadow or edge effect artifacts caused by the edge of the microlens or optical element covering a portion of the micro-LED 110 can be eliminated.
[0023] 1 shows the micro LED array 120 diced from a high density micro LED array 100, the micro LED array 120 may alternatively be formed by transferring a single micro LED or a set of micro LEDs from the micro LED array 100 to the substrate 120. In one example, the micro LED array 100 may include micro LEDs that emit at different wavelengths as shown in FIG. 1, or may all include micro LEDs that emit at a single wavelength.
[0024] The concept of chiplets, such as chiplet 135, is expanded in the embodiment shown in FIG. 2. As shown in FIG. 2, a portion of a display 200 includes chiplets 202. Each chiplet 202 includes a rack cell 210, which includes a plurality of micro LEDs 212A, 212B, and 212C supported on a substrate 214. Note that each rack cell 210 includes a plurality of micro LEDs arranged in a column, as described in more detail in FIG. 3 below, rather than the four micro LEDs shown in FIG. 1. Micro LEDs 212A, 212B, and 212C are examples of micro LEDs 110A, 110B, and 110C, respectively. The rack cell 210 is an example of a rack cell 120.
[0025] Continuing with reference to FIG. 2, each of the micro LEDs 212A, 212B, and 212C emits light that may be collected and redirected by a structure such as a light cone 216. Each of the micro LEDs 212A, 212B, and 212C includes an electrical connector 218 that is used to electronically connect to a micro IC 220 via an interconnect 222. The interconnect 222 is supported on a backplane 224. The chiplets 202 are then connected to a display backplane 230 via a connector 232. The connector 232 may be, for example, a conductive or non-conductive adhesive. Each chiplet 202 is overlaid with a multi-view optics 240 configured to cooperate with the chiplet to guide the light emission from the chiplet to a desired location. As shown in FIG. 2, the combination of the chiplet 202 and the multi-view optics 240 forms a pixel 250.
[0026] FIG. 3 shows further details of an example of a chiplet used in conjunction with a microlens array, according to one embodiment. As shown in FIG. 3, chiplet 300 includes a rack cell 320 that includes a plurality of micro LEDs (e.g., micro LEDs 110A, 110B, and 110C of FIG. 1 ) supported on a substrate 322. In the example shown in FIG. 3, two rows of 17 micro LEDs are arranged in rack cell 320 to form a plurality of sub-rack cells 324. The rack cell 320 is configured to electronically couple to a micro IC 330, which includes a plurality of interconnects 332 supported on a backplane 334. The rack cell 320 is an example of a rack cell 210.
[0027] 3, the chiplet 300 includes a microlens array 350 configured to be optically aligned with the sub-rack cells 320. The microlens array 350 includes a plurality of microlenses 352. In one example, each microlens 352 may be configured to be optically aligned with one micro-LED in the sub-rack cell 320. Alternatively, each microlens 352 may be sized and aligned to cover each sub-rack cell 324. For example, the microlens array 350 may be bonded to the sub-rack cell 320 such that the chiplet 300 includes microlenses integrated thereon. Note that the microlenses 352 may be physically and functionally different from traditional lenslets or optical steering elements used to separate light from different sub-rack cells 324 to form different views. That is, the microlenses 352 may be part of the chiplet 300, and different sets of lenslets may be provided to form the multiple views formed by the entire 3D display.
[0028] 4, a portion of a display 400 includes a plurality of chiplets 300 supported on a display backplane 410. The display backplane 410 includes a plurality of horizontal bus lines 412 and a plurality of vertical bus lines 414. Thus, the portion of the illustrated display 400 includes 4×4 columns of pixels, each pixel including one chiplet 300. Each chiplet 300 is driven by the horizontal bus lines 412 and the vertical bus lines 414, respectively, to form one of a plurality of views presented by the display 400, e.g., a first view 422 and a second view 424. The first view 422 and the second view 424 are displayed to a right eye 432 and a left eye 434, respectively, e.g., via additional lenses or optical steering elements (not shown).
[0029] In one embodiment, each micro LED emitter has a pixel pitch on the order of a few microns (e.g., less than 10 microns, less than 5 microns, or less than 3 microns), and the controllers 320 are supported on an equally small CMOS backplane for addressing each micro LED, with each chiplet having an area as small as 10 microns by 60 microns. As a result, the chiplets 300 may include circuitry for interfacing with an addressing array (e.g., horizontal bus lines 412 and vertical bus lines 414) on the display backplane using a specific communication protocol. Alternatively, each chiplet 300 may be configured to be addressable by simpler TFT or LTPS display driver circuitry. Thus, the cost and complexity of the resulting display may be significantly reduced over comparable OLED or LC displays. In some embodiments, the driver circuitry may include one or more of unfolding circuitry, interpolation circuitry, disparity sequencing circuitry, or other circuitry configured to provide processing functionality. Additionally, the remaining area of the display backplane 410 not covered by the chiplets 300 may be populated with additional electronic or optical components, such as sensors or transistors.
[0030] FIG. 5 illustrates an alternative chiplet layout, according to one embodiment. As shown in FIG. 5, pixel cell 500 includes chiplet 510 supported on display backplane 512. Chiplet 510 includes a controller 520, which includes a substrate 522 supporting multiple micro LEDs 524A, 524B, and 524C. Controller 520 is an example of controller 320. While each of micro LEDs 524A, 524B, and 524C is shown in FIG. 5 as emitting light of a different color, other configurations of micro LEDs are possible. For example, all micro LEDs may emit monochromatic light, bichromatic light, or specific colored light, which may be converted to additional wavelengths using a color converter (not shown). Controller 520 is electrically connected to micro IC 530 (the interconnects and other components of micro IC 530 are not visible in FIG. 5).
[0031] FIG. 6 illustrates an application of the pixel 500 of FIG. 5 according to one embodiment. FIG. 6 shows an enlarged portion of a display 600. The portion of the display 600 illustrated in FIG. 6 includes a 4×4 column of pixel cells 500. In the embodiment illustrated in FIG. 6, the display 600 further includes a column of cylindrical lenslets 620 superimposed on each pixel cell column of the display 600, which uniquely maps the pixel light to distinct angles emitting horizontally, thereby providing a horizontal-only parallax view. Alternatively, the cylindrical lenslets 620 may be replaced by or combined with a parallax barrier that performs a similar function to the cylindrical lenslets. Thus, each pixel cell 500 contributes to a view seen by a viewer 630 and represented by light rays 632.
[0032] In one embodiment, each pixel cell 500 has dimensions of 150 microns by 150 microns or less. Thus, when viewed at a working distance of 500 millimeters, the pixel cells span approximately one arc minute or less. Because the width of each lenslet 620 is less than the perceptual limit of the viewer 630 and the micro-LED emitters on each chiplet 510 are smaller than the width of each lenslet 620, the display 600 can generate multiple directionally distinct output fields. Thus, the display 600 operates to render high-quality AutoView 3D images while providing a perceived surface resolution comparable to state-of-the-art 2D displays.
[0033] Referring to FIGS. 7-10, an alternative pixel configuration using linear chiplets similar to those shown in FIGS. 5 and 6 is described. FIG. 7 illustrates a pixel 700 including a backplane 710 supporting circuitry 712. Note that circuitry 712 is intended to represent a general overview of electronic components supported on the backplane 710 and is not intended to represent a circuit diagram of specific components or sizes. The pixel 700 also includes first, second, and third chiplets 722, 724, and 726, each of which is monochromatic. Each of the first, second, and third chiplets 722, 724, and 726 may be formed separately and connected to the backplane 710. As an example, the first chiplet 722 includes two rows of micro LEDs emitting in the red wavelength range. The second chiplet 724 includes one row of micro LEDs emitting in the green wavelength range, and the third chiplet 726 includes one row of micro LEDs emitting in the blue wavelength range. The first chiplet 722 includes an additional row of red-emitting microLEDs, for example, to compensate for the lower efficiency and brightness typically exhibited by red microLEDs compared to currently available green or blue-emitting microLEDs. The pixel 700 is overlaid with a portion of a cylindrical lenslet 730 for directing light from the pixel 700 to a desired location so as to contribute to a portion of the multiple views provided by the entire display including the pixel 700.
[0034] FIG. 8 illustrates another variation of a pixel using linear chiplets. As shown in FIG. 8, pixel 800 includes many of the same components as pixel 700 of FIG. 7. Similarly, circuitry 712 is representative of electronic components that may be supported on backplane 710 and is not specific. However, pixel 800 includes a three-color chiplet 820 that includes three rows of micro LEDs. The micro LEDs in each row emit light in a particular wavelength range. Thus, each column of micro LEDs provides light emission of three different colors. This columnar arrangement, unlike the hexagonal packing structure shown in FIG. 5, allows for denser packing of emitters and, optionally, variable spacing between colors. In this case, all three rows of micro LED emitters are driven as a single chiplet.
[0035] FIG. 9 illustrates another variation of a linear chiplet pixel configured to increase the density of different parallax output fields. Similarly, the circuit 712 illustrated in FIG. 9 is intended to represent a general overview of electronic components supported on the backplane 710 and is not intended to represent a circuit diagram of specific components or sizes. As illustrated in FIG. 9, the pixel 900 includes a first chiplet 922 that includes two rows of three-color microLEDs forming a row of subrack cells 924. The subrack cells 924 are an example of the subrack cells 324 in FIG. 3. In the example illustrated in FIG. 9, each subrack cell 924 includes at least one microLED emitting light in a red wavelength range, at least one microLED emitting light in a green wavelength range, and at least one microLED emitting light in a blue wavelength range. While FIG. 9 illustrates a 2×2 array of microLEDs, other layouts and combinations are possible.
[0036] 9 in conjunction with FIG. 10, pixel 900 further includes a second chiplet 932 that includes two rows of three-color microLEDs forming one row of subpixels 934. As shown in the example of FIG. 9, second chiplet 932 is offset from first chiplet 922 by half a subpixel. In one example, as shown in FIG. 10, the left-most subpixel of first chiplet 922 is configured to provide a left-most portion of the view, the left-most subpixel of second chiplet 932 is configured to provide a second left-most portion of the view, and so on. That is, when display device 1010 is formed by multiple pixels 900, view 1020 seen by viewer 1030 is a combination of views 1, 2, 3, 4... (shown in FIG. 10 and forming view 1020) provided by subpixels 1, 2, 3, 4... (indicated as numbers adjacent to subpixels 924 and 934 corresponding to first and second chiplets 922 and 932, respectively). In this way, combining the parallax views provided by each of first and second chiplets 922 and 932 can increase horizontal parallax sampling beyond the pixel pitch limit and produce higher angular resolution for a given pixel pitch with two chiplets compared to what is achievable with a single chiplet. Similar techniques may be applied to parallax barrier-based display systems incorporating chiplets.
[0037] FIG. 11 illustrates a further variation of a chiplet. As shown in FIG. 11, a pixel 1100 includes a first chiplet 1110A and a second chiplet 110B. The first chiplet 1110A is horizontally disposed along the top edge of the pixel 1100 and includes a multi-cell 1120. The multi-cell 1120 is an example of the multi-cell 120 of FIG. 1. As described above, the multi-cell 1120 is electrically connected to a micro-IC (not visible in FIG. 11). The multi-cell 1120 includes a substrate 1122 that supports a row of sub-multi-cells 1124. Each sub-multi-cell 1124 includes a first micro-LED 1126A, a second micro-LED 1126B, and a third micro-LED 1126C. 11, the first micro LED 1126A, the second micro LED 1126B, and the third micro LED 1126C emit light in different wavelength ranges, such as, by way of example, red, green, and blue wavelength ranges. The first chiplet 1110A is covered by a lens 1130. Alternatively, a parallax barrier may be provided instead of or in addition to the lens 1130. The second chiplet 1110B includes essentially the same components as the first chiplet 1110A and is vertically arranged along the left edge of the pixel 1100 as shown in the exemplary embodiment of FIG. 11.
[0038] By orthogonally positioning the first chiplet 1110A and the second chiplet 1110B, the pixels 1100 can provide a horizontal-only parallax 3D view even when the display is rotated. For example, if a display device incorporating a row of pixels 1100 further includes a gyroscope, the display device can use the first chiplet 1110A only when held in a first position, and upon detecting that it has been rotated 90 degrees to a second position, the display device can deactivate the first chiplet 1110A and activate the second chiplet 1110B. Such functionality is applicable, for example, to a mobile phone or tablet that can provide an AutoView horizontal-only parallax view when the mobile phone or tablet is held in portrait or landscape mode.
[0039] The available additional area of the pixel 1100 may be used in various ways. In one embodiment, the pixel 1100 of FIG. 11 further includes a single RGB emitter 1140. The single RGB emitter 1140 includes a substrate 1142 that supports sub-pixels 1144. The substrate 1142 is shown as a square, but other shapes (e.g., hexagonal) can be used depending on the particular application. The sub-pixels 1144 include a first micro LED 1146A that emits light in the red wavelength range, a second micro LED 1146B that emits light in the green wavelength range, and a third micro LED 1146C that emits light in the blue wavelength range. The single RGB emitter 1140 may be used, for example, to display standard (i.e., parallax-free) 2D images, thereby eliminating the need for integrated multi-view optics. If a display device incorporating the pixel 1100 is not being used to display 3D images, the single RGB emitter 1140 may be used to display 2D images. Alternatively, both 3D and 2D modes can be operated simultaneously, with a 2D image displayed on the surface of the display device, while the 3D image or specific portions of the 2D image are displayed as 3D objects floating above or below the surface of the display device. Additional electronic or optical components can also be incorporated into the available area of pixel 1100. For example, one or more sensors can be incorporated into pixel 1100 to perform tasks such as brightness sensing, motion sensing, depth sensing, and head / eye / gaze tracking.
[0040] 12-14 illustrate alternative display architectures incorporating chiplets. As shown in FIG. 12, a portion of a display 1200 includes multiple lenslets 1210 arranged in adjacent columns. Multiple chiplets 1220 are attached directly to each lenslet 1210 rather than supported on a display backplane. Each column of lenslets 1210 also includes signal-conducting bus lines 1230 embedded between the optically active areas of the lenslets 1210 and connected to each chiplet 1220 via branched conductors 1232. The bus lines 1230 and branched conductors 1232 may be embedded within the lenslets 1210 or printed on the surface of the lenslets 1210 using, for example, screen printing, metal deposition, or other suitable methods. Laterally adjacent chiplets may be offset from one another as shown in FIG. 12, or aligned as shown in FIG. 6.
[0041] 13 shows a side cross-sectional view of a portion of a lenslet 1210 incorporating a chiplet 1220. As shown in FIG. 13, by way of example, the chiplet 1220 may be held in place by an attachment feature 1310. The attachment feature 1310 may be a clip feature configured to securely receive at least a portion of the chiplet 1220 therein, and may be molded into the lenslet 1210 during the manufacturing process, or may be added after the lenslet 1210 is manufactured. The attachment feature 1310 may also incorporate electronic wiring for connecting the chiplet 1220 to the branch conductor 1232.
[0042] Figure 14 shows a top cross-sectional view of different portions of a row of lenslets 1210. As shown in Figure 14, chiplets 1220 are attached to the lenslets 1210 and electrically accessible via conductive bus lines 1230. As an illustrative example, as shown in Figure 14, a first portion of the upper chiplet 1220 emits light represented by solid arrow 1410. This light is guided downward in the figure by the curvature of the lenslet 1210. Similarly, a different second portion of the same upper chiplet 1220 emits light represented by dashed arrow 1412. This light is guided upward in the figure by the curvature of the lenslet 1210, providing a different view than the first portion of the upper chiplet 1220, resulting in a horizontal-only parallax view.
[0043] In the configurations shown in Figures 12-14, a row of lenslets 1210 (i.e., optical layer) becomes a structural element of the display device without the need for a display backplane, enabling thinner displays. Furthermore, this architecture facilitates precise alignment of the chiplets 1220 with associated optical elements, resulting in reduced optical aberrations and image artifacts. Furthermore, the optical output fields between pixels can be more effectively separated, thereby reducing crosstalk in the display and further improving image quality. Furthermore, the manufacturability of the display device can be improved by, for example, constructing each row of lenslets as a strip integrating the chiplets and branching conductors, and then assembling the display device from the strips row by row. Those skilled in the art will appreciate that this same scheme can be used with the integration of a parallax barrier rather than lenslets, or a combination of both.
[0044] 15 and 16 show another configuration in which chiplets are integrated directly with lenslets. As shown in FIG. 15, a flat display 1500 provides a horizontal-only parallax view to a viewer 1510. The flat display 1500 includes a chiplet 1530 supported by a column of lenslets 1540. At the center of the flat display 1500, where the viewer's 1510 eyes are aligned vertically with the flat display 1500, the chiplet 1530A reliably provides a parallax view with low aberrations. However, near the edges of the flat display 1500, for example, when the chiplet 1530B and the lenslet 1540B are still aligned with the plane of the flat display 1500, extreme off-axis motion of the display is likely to result in visual artifacts and optical aberrations in the view presented to the viewer 1510.
[0045] In contrast, if a flat display is formed from strips of lenslets assembled by integrating chiplets in rows, as described above, the orientation angle of each row of lenslets (and therefore the orientation angle of the integrated chiplets) may be adjusted from the center to the edge of the display to mitigate aberrations resulting from the display architecture shown in FIG. 15. For example, as shown in FIG. 16, chiplets 1630B and lenslets 1640B located closer to the center of the display may be rotated a certain amount toward the central axis, chiplets 1630C integrated with lenslets 1640C closer to the edge of the flat display may be rotated further toward the central axis of the display (e.g., by 31 degrees), and so on. By rotating the lenslet rows and their associated chiplets so that each lenslet faces the desired eye center, edge effects and other optical aberrations can be reduced.
[0046] A further alternative is to assemble strips of lenslets integrating chiplets into a curved display. As shown in Figure 17, a curved display 1700 is configured to provide a horizontal-only parallax view to a viewer 1710. The curvature of the curved display 1700 is configured so that the lenslets, and therefore the chiplets integrated therein, curve towards the eyeballs of the viewer 1710 as shown.
[0047] Figures 18-20 illustrate alternative display architectures to demonstrate alternative types of lenslets and conformally curved emitter strips. For example, a Luneburg lens with a graded refractive index from center to periphery is designed to have a conjugate focus at infinity, producing a high-quality transformation at the surface of the lens. As shown in Figure 18, the lenslet section 1800 includes a graded-index Luneburg cylindrical lenslet 1810 integrated with a curved chiplet 1820.
[0048] FIG. 19 shows a top cross-sectional view of a lenslet portion 1800. As shown in FIG. 19, the lenslets 1810 are supported by a preformed bed 1910, which includes conductive bus lines 1920 for electrically connecting with the curved chiplets 1820. Due to the refractive properties of the Luneburg lens, light from different portions of the curved chiplets 1820 generates parallel outputs exiting from opposite surfaces, as represented by light rays 1950 and 1955. Alternatively, as shown in FIG. 19, the curved chiplets 1820 may be integrated into the preformed bed 1910 so as to conformally contact the lenslets 1810. Furthermore, as shown in FIG. 20, a display can be formed by arranging multiple lenslets 1810 in an array. Each of the curved chiplets 1820 may be addressed, for example, via bus lines 2010. This Luneburg approach has the advantage of providing a much larger field of view due to the high-quality optical performance of the Luneburg lens at large angles. This approach also likely results in a relatively simple optical component in the manufacturing process.
[0049] While the above discussion primarily considers lenslet- or lenticular-based displays, this discussion is also readily applicable to parallax / raster barrier- and aperture-based displays. The microLED chiplet approach to providing an autoview 3D display essentially separates the display's large pixel bed from the parallax-generating light sheet by discretizing individual pixel cell emitters into their own modules. This approach, coupled with high-speed / high-resolution pick-and-place assembly systems or monolithically integrated microLED fabrication, enables previously unavailable display structures and system architectures. The ratios between pixel size and pitch, lenslet size and pitch, lenslet field of view (or distribution angle), and lenslet focal length may be tuned and optimized for display applications ranging from small form-factor wearable displays to ultra-high-resolution and large-scale displays. Furthermore, the placement of emitters within the chiplet may be tailored to the needs of a particular display system. For example, nonlinear spacing of parallax views or compensation for optical distortions caused by lenslets may be achieved through appropriate microLED layout.
[0050] Various alternative or additional structures or components can be implemented in one or more of the optical systems described above. Accordingly, many different embodiments can be derived from the above description and drawings. However, literally describing and illustrating every combination and subcombination of these embodiments would be overly repetitive and tedious. Therefore, the present specification, including the drawings, should be construed as constituting a complete written description of every combination and subcombination of the embodiments described herein, and the methods and processes for making and using them, and should support claims to every combination or subcombination.
Claims
1. 1. A display system comprising: comprising a plurality of chiplets; the plurality of chiplets includes a chiplet including a plurality of micro light emitting diodes arranged in one direction; the chiplet has a width dimension perpendicular to the one direction that is greater than a height dimension along the one direction; At least some of the plurality of chiplets are oriented such that the width dimension is parallel to the horizontal direction; The display system comprises: a display backplane subdivided into a plurality of pixel cells; a steering element array; the chiplets are electrically connected to the display backplane via electrical interconnects; At least one of the plurality of pixel cells is configured to support a first chiplet and a second chiplet of the plurality of chiplets; the plurality of chiplets are disposed between the display backplane and the steering element array; the first chiplet includes a first row of micro light emitting diodes along a first direction; The second chiplet includes a second row of micro light emitting diodes along a second direction orthogonal to the first direction.
2. 1. A display system comprising: comprising a plurality of chiplets; the plurality of chiplets includes a chiplet including a plurality of micro light emitting diodes arranged in one direction; the chiplet has a width dimension perpendicular to the one direction that is greater than a height dimension along the one direction; At least some of the plurality of chiplets are oriented such that the width dimension is parallel to the horizontal direction; The display system comprises: a display backplane subdivided into a plurality of pixel cells; a steering element array; the chiplets are electrically connected to the display backplane via electrical interconnects; At least one of the plurality of pixel cells is configured to support a first chiplet and a second chiplet of the plurality of chiplets; the plurality of chiplets are disposed between the display backplane and the steering element array; the plurality of micro light emitting diodes in the chiplet are subdivided into subcells containing groups of micro light emitting diodes; the second chiplet is parallel to the first chiplet; The display system, wherein the second chiplet is displaced relative to the first chiplet by half a sub-cell pitch along the horizontal direction.
3. 3. The display system of claim 1, wherein the plurality of micro light emitting diodes are arranged in a micro light emitting diode array, with a micro light emitting diode pitch between adjacent micro light emitting diodes being less than 10 microns.
4. 3. The display system of claim 1, wherein the plurality of chiplets are arranged in a two-dimensional chiplet grid with a chiplet pitch between adjacent chiplets of less than 150 microns.
5. a sensor disposed in a portion of the display backplane between adjacent chiplets among the plurality of chiplets; 3. The display system of claim 1, wherein the sensor comprises at least one selected from the group consisting of a brightness sensor, a motion sensor, a depth sensor, an eye gaze sensor, and an eye tracking sensor.
6. 3. The display system of claim 1, wherein the steering element array has a steering element pitch between adjacent steering elements that is less than 150 microns.
7. The display system of claim 6 , wherein the steering elements are lenslets.
8. 8. The display system of claim 7, wherein the lenslets have width dimensions of approximately 100 microns.
9. 3. The display system of claim 1, wherein the plurality of micro light-emitting diodes includes a red emitter, a green emitter, and a blue emitter.
10. 3. The display system of claim 1, wherein the array of steering elements comprises cylindrical lenses.
11. 3. A display system according to claim 1 or 2, wherein the array of steering elements comprises a parallax barrier.
12. 3. The display system of claim 1, wherein at least one of the plurality of pixel cells subtends an area of 1 arc minute or less when viewed from a distance of 500 millimeters.
13. 3. A display system according to claim 1 or 2, wherein the array of steering elements is arranged to define parallax views.
14. 3. The display system according to claim 1, wherein the plurality of micro light-emitting diodes are arranged along a line.
15. 14. The display system of claim 13, wherein the chiplets are electrically connected to a microintegrated circuit backplane, and the microintegrated circuit backplane is electrically connected to the display backplane.
16. the plurality of micro light-emitting diodes includes a first micro light-emitting diode and a second micro light-emitting diode; 3. The display system of claim 1, wherein the light emitted from the first micro light-emitting diode and the light emitted from the second micro light-emitting diode correspond to a parallax view.
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